2 * Copyright (C) 2014 Free Electrons
3 * Copyright (C) 2014 Atmel
5 * Author: Boris BREZILLON <boris.brezillon@free-electrons.com>
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 as published by
9 * the Free Software Foundation.
11 * This program is distributed in the hope that it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
16 * You should have received a copy of the GNU General Public License along with
17 * this program. If not, see <http://www.gnu.org/licenses/>.
20 #include "atmel_hlcdc_dc.h"
23 * Atmel HLCDC Plane state structure.
25 * @base: DRM plane state
26 * @crtc_x: x position of the plane relative to the CRTC
27 * @crtc_y: y position of the plane relative to the CRTC
28 * @crtc_w: visible width of the plane
29 * @crtc_h: visible height of the plane
30 * @src_x: x buffer position
31 * @src_y: y buffer position
32 * @src_w: buffer width
33 * @src_h: buffer height
34 * @alpha: alpha blending of the plane
35 * @bpp: bytes per pixel deduced from pixel_format
36 * @offsets: offsets to apply to the GEM buffers
37 * @xstride: value to add to the pixel pointer between each line
38 * @pstride: value to add to the pixel pointer between each pixel
39 * @nplanes: number of planes (deduced from pixel_format)
41 struct atmel_hlcdc_plane_state {
42 struct drm_plane_state base;
61 /* These fields are private and should not be touched */
62 int bpp[ATMEL_HLCDC_MAX_PLANES];
63 unsigned int offsets[ATMEL_HLCDC_MAX_PLANES];
64 int xstride[ATMEL_HLCDC_MAX_PLANES];
65 int pstride[ATMEL_HLCDC_MAX_PLANES];
69 static inline struct atmel_hlcdc_plane_state *
70 drm_plane_state_to_atmel_hlcdc_plane_state(struct drm_plane_state *s)
72 return container_of(s, struct atmel_hlcdc_plane_state, base);
75 #define SUBPIXEL_MASK 0xffff
77 static uint32_t rgb_formats[] = {
89 struct atmel_hlcdc_formats atmel_hlcdc_plane_rgb_formats = {
90 .formats = rgb_formats,
91 .nformats = ARRAY_SIZE(rgb_formats),
94 static uint32_t rgb_and_yuv_formats[] = {
115 struct atmel_hlcdc_formats atmel_hlcdc_plane_rgb_and_yuv_formats = {
116 .formats = rgb_and_yuv_formats,
117 .nformats = ARRAY_SIZE(rgb_and_yuv_formats),
120 static int atmel_hlcdc_format_to_plane_mode(u32 format, u32 *mode)
123 case DRM_FORMAT_XRGB4444:
124 *mode = ATMEL_HLCDC_XRGB4444_MODE;
126 case DRM_FORMAT_ARGB4444:
127 *mode = ATMEL_HLCDC_ARGB4444_MODE;
129 case DRM_FORMAT_RGBA4444:
130 *mode = ATMEL_HLCDC_RGBA4444_MODE;
132 case DRM_FORMAT_RGB565:
133 *mode = ATMEL_HLCDC_RGB565_MODE;
135 case DRM_FORMAT_RGB888:
136 *mode = ATMEL_HLCDC_RGB888_MODE;
138 case DRM_FORMAT_ARGB1555:
139 *mode = ATMEL_HLCDC_ARGB1555_MODE;
141 case DRM_FORMAT_XRGB8888:
142 *mode = ATMEL_HLCDC_XRGB8888_MODE;
144 case DRM_FORMAT_ARGB8888:
145 *mode = ATMEL_HLCDC_ARGB8888_MODE;
147 case DRM_FORMAT_RGBA8888:
148 *mode = ATMEL_HLCDC_RGBA8888_MODE;
150 case DRM_FORMAT_AYUV:
151 *mode = ATMEL_HLCDC_AYUV_MODE;
153 case DRM_FORMAT_YUYV:
154 *mode = ATMEL_HLCDC_YUYV_MODE;
156 case DRM_FORMAT_UYVY:
157 *mode = ATMEL_HLCDC_UYVY_MODE;
159 case DRM_FORMAT_YVYU:
160 *mode = ATMEL_HLCDC_YVYU_MODE;
162 case DRM_FORMAT_VYUY:
163 *mode = ATMEL_HLCDC_VYUY_MODE;
165 case DRM_FORMAT_NV21:
166 *mode = ATMEL_HLCDC_NV21_MODE;
168 case DRM_FORMAT_NV61:
169 *mode = ATMEL_HLCDC_NV61_MODE;
171 case DRM_FORMAT_YUV420:
172 *mode = ATMEL_HLCDC_YUV420_MODE;
174 case DRM_FORMAT_YUV422:
175 *mode = ATMEL_HLCDC_YUV422_MODE;
184 static bool atmel_hlcdc_format_embeds_alpha(u32 format)
188 for (i = 0; i < sizeof(format); i++) {
189 char tmp = (format >> (8 * i)) & 0xff;
198 static u32 heo_downscaling_xcoef[] = {
217 static u32 heo_downscaling_ycoef[] = {
228 static u32 heo_upscaling_xcoef[] = {
247 static u32 heo_upscaling_ycoef[] = {
259 atmel_hlcdc_plane_update_pos_and_size(struct atmel_hlcdc_plane *plane,
260 struct atmel_hlcdc_plane_state *state)
262 const struct atmel_hlcdc_layer_cfg_layout *layout =
263 &plane->layer.desc->layout;
266 atmel_hlcdc_layer_update_cfg(&plane->layer,
269 (state->crtc_w - 1) |
270 ((state->crtc_h - 1) << 16));
273 atmel_hlcdc_layer_update_cfg(&plane->layer,
277 ((state->src_h - 1) << 16));
280 atmel_hlcdc_layer_update_cfg(&plane->layer,
284 (state->crtc_y << 16));
286 /* TODO: rework the rescaling part */
287 if (state->crtc_w != state->src_w || state->crtc_h != state->src_h) {
290 if (state->crtc_w != state->src_w) {
293 u32 *coeff_tab = heo_upscaling_xcoef;
296 if (state->crtc_w < state->src_w)
297 coeff_tab = heo_downscaling_xcoef;
298 for (i = 0; i < ARRAY_SIZE(heo_upscaling_xcoef); i++)
299 atmel_hlcdc_layer_update_cfg(&plane->layer,
303 factor = ((8 * 256 * state->src_w) - (256 * 4)) /
306 max_memsize = ((factor * state->crtc_w) + (256 * 4)) /
308 if (max_memsize > state->src_w)
310 factor_reg |= factor | 0x80000000;
313 if (state->crtc_h != state->src_h) {
316 u32 *coeff_tab = heo_upscaling_ycoef;
319 if (state->crtc_h < state->src_h)
320 coeff_tab = heo_downscaling_ycoef;
321 for (i = 0; i < ARRAY_SIZE(heo_upscaling_ycoef); i++)
322 atmel_hlcdc_layer_update_cfg(&plane->layer,
326 factor = ((8 * 256 * state->src_h) - (256 * 4)) /
329 max_memsize = ((factor * state->crtc_h) + (256 * 4)) /
331 if (max_memsize > state->src_h)
333 factor_reg |= (factor << 16) | 0x80000000;
336 atmel_hlcdc_layer_update_cfg(&plane->layer, 13, 0xffffffff,
339 atmel_hlcdc_layer_update_cfg(&plane->layer, 13, 0xffffffff, 0);
344 atmel_hlcdc_plane_update_general_settings(struct atmel_hlcdc_plane *plane,
345 struct atmel_hlcdc_plane_state *state)
347 const struct atmel_hlcdc_layer_cfg_layout *layout =
348 &plane->layer.desc->layout;
349 unsigned int cfg = ATMEL_HLCDC_LAYER_DMA;
351 if (plane->base.type != DRM_PLANE_TYPE_PRIMARY) {
352 cfg |= ATMEL_HLCDC_LAYER_OVR | ATMEL_HLCDC_LAYER_ITER2BL |
353 ATMEL_HLCDC_LAYER_ITER;
355 if (atmel_hlcdc_format_embeds_alpha(state->base.fb->pixel_format))
356 cfg |= ATMEL_HLCDC_LAYER_LAEN;
358 cfg |= ATMEL_HLCDC_LAYER_GAEN |
359 ATMEL_HLCDC_LAYER_GA(state->alpha);
362 atmel_hlcdc_layer_update_cfg(&plane->layer,
363 ATMEL_HLCDC_LAYER_DMA_CFG_ID,
364 ATMEL_HLCDC_LAYER_DMA_BLEN_MASK,
365 ATMEL_HLCDC_LAYER_DMA_BLEN_INCR16);
367 atmel_hlcdc_layer_update_cfg(&plane->layer, layout->general_config,
368 ATMEL_HLCDC_LAYER_ITER2BL |
369 ATMEL_HLCDC_LAYER_ITER |
370 ATMEL_HLCDC_LAYER_GAEN |
371 ATMEL_HLCDC_LAYER_GA_MASK |
372 ATMEL_HLCDC_LAYER_LAEN |
373 ATMEL_HLCDC_LAYER_OVR |
374 ATMEL_HLCDC_LAYER_DMA, cfg);
377 static void atmel_hlcdc_plane_update_format(struct atmel_hlcdc_plane *plane,
378 struct atmel_hlcdc_plane_state *state)
383 ret = atmel_hlcdc_format_to_plane_mode(state->base.fb->pixel_format,
388 if ((state->base.fb->pixel_format == DRM_FORMAT_YUV422 ||
389 state->base.fb->pixel_format == DRM_FORMAT_NV61) &&
390 (state->base.rotation & (BIT(DRM_ROTATE_90) | BIT(DRM_ROTATE_270))))
391 cfg |= ATMEL_HLCDC_YUV422ROT;
393 atmel_hlcdc_layer_update_cfg(&plane->layer,
394 ATMEL_HLCDC_LAYER_FORMAT_CFG_ID,
399 * Rotation optimization is not working on RGB888 (rotation is still
400 * working but without any optimization).
402 if (state->base.fb->pixel_format == DRM_FORMAT_RGB888)
403 cfg = ATMEL_HLCDC_LAYER_DMA_ROTDIS;
407 atmel_hlcdc_layer_update_cfg(&plane->layer,
408 ATMEL_HLCDC_LAYER_DMA_CFG_ID,
409 ATMEL_HLCDC_LAYER_DMA_ROTDIS, cfg);
412 static void atmel_hlcdc_plane_update_buffers(struct atmel_hlcdc_plane *plane,
413 struct atmel_hlcdc_plane_state *state)
415 struct atmel_hlcdc_layer *layer = &plane->layer;
416 const struct atmel_hlcdc_layer_cfg_layout *layout =
417 &layer->desc->layout;
420 atmel_hlcdc_layer_update_set_fb(&plane->layer, state->base.fb,
423 for (i = 0; i < state->nplanes; i++) {
424 if (layout->xstride[i]) {
425 atmel_hlcdc_layer_update_cfg(&plane->layer,
431 if (layout->pstride[i]) {
432 atmel_hlcdc_layer_update_cfg(&plane->layer,
441 atmel_hlcdc_plane_prepare_disc_area(struct drm_crtc_state *c_state)
443 int disc_x = 0, disc_y = 0, disc_w = 0, disc_h = 0;
444 const struct atmel_hlcdc_layer_cfg_layout *layout;
445 struct atmel_hlcdc_plane_state *primary_state;
446 struct drm_plane_state *primary_s;
447 struct atmel_hlcdc_plane *primary;
448 struct drm_plane *ovl;
450 primary = drm_plane_to_atmel_hlcdc_plane(c_state->crtc->primary);
451 layout = &primary->layer.desc->layout;
452 if (!layout->disc_pos || !layout->disc_size)
455 primary_s = drm_atomic_get_plane_state(c_state->state,
457 if (IS_ERR(primary_s))
458 return PTR_ERR(primary_s);
460 primary_state = drm_plane_state_to_atmel_hlcdc_plane_state(primary_s);
462 drm_atomic_crtc_state_for_each_plane(ovl, c_state) {
463 struct atmel_hlcdc_plane_state *ovl_state;
464 struct drm_plane_state *ovl_s;
466 if (ovl == c_state->crtc->primary)
469 ovl_s = drm_atomic_get_plane_state(c_state->state, ovl);
471 return PTR_ERR(ovl_s);
473 ovl_state = drm_plane_state_to_atmel_hlcdc_plane_state(ovl_s);
476 atmel_hlcdc_format_embeds_alpha(ovl_s->fb->pixel_format) ||
477 ovl_state->alpha != 255)
480 /* TODO: implement a smarter hidden area detection */
481 if (ovl_state->crtc_h * ovl_state->crtc_w < disc_h * disc_w)
484 disc_x = ovl_state->crtc_x;
485 disc_y = ovl_state->crtc_y;
486 disc_h = ovl_state->crtc_h;
487 disc_w = ovl_state->crtc_w;
490 if (disc_x == primary_state->disc_x &&
491 disc_y == primary_state->disc_y &&
492 disc_w == primary_state->disc_w &&
493 disc_h == primary_state->disc_h)
497 primary_state->disc_x = disc_x;
498 primary_state->disc_y = disc_y;
499 primary_state->disc_w = disc_w;
500 primary_state->disc_h = disc_h;
501 primary_state->disc_updated = true;
507 atmel_hlcdc_plane_update_disc_area(struct atmel_hlcdc_plane *plane,
508 struct atmel_hlcdc_plane_state *state)
510 const struct atmel_hlcdc_layer_cfg_layout *layout =
511 &plane->layer.desc->layout;
512 int disc_surface = 0;
514 if (!state->disc_updated)
517 disc_surface = state->disc_h * state->disc_w;
519 atmel_hlcdc_layer_update_cfg(&plane->layer, layout->general_config,
520 ATMEL_HLCDC_LAYER_DISCEN,
521 disc_surface ? ATMEL_HLCDC_LAYER_DISCEN : 0);
526 atmel_hlcdc_layer_update_cfg(&plane->layer,
529 state->disc_x | (state->disc_y << 16));
531 atmel_hlcdc_layer_update_cfg(&plane->layer,
534 (state->disc_w - 1) |
535 ((state->disc_h - 1) << 16));
538 static int atmel_hlcdc_plane_atomic_check(struct drm_plane *p,
539 struct drm_plane_state *s)
541 struct atmel_hlcdc_plane *plane = drm_plane_to_atmel_hlcdc_plane(p);
542 struct atmel_hlcdc_plane_state *state =
543 drm_plane_state_to_atmel_hlcdc_plane_state(s);
544 const struct atmel_hlcdc_layer_cfg_layout *layout =
545 &plane->layer.desc->layout;
546 struct drm_framebuffer *fb = state->base.fb;
547 const struct drm_display_mode *mode;
548 struct drm_crtc_state *crtc_state;
549 unsigned int patched_crtc_w;
550 unsigned int patched_crtc_h;
551 unsigned int patched_src_w;
552 unsigned int patched_src_h;
560 if (!state->base.crtc || !fb)
563 crtc_state = s->state->crtc_states[drm_crtc_index(s->crtc)];
564 mode = &crtc_state->adjusted_mode;
566 state->src_x = s->src_x;
567 state->src_y = s->src_y;
568 state->src_h = s->src_h;
569 state->src_w = s->src_w;
570 state->crtc_x = s->crtc_x;
571 state->crtc_y = s->crtc_y;
572 state->crtc_h = s->crtc_h;
573 state->crtc_w = s->crtc_w;
574 if ((state->src_x | state->src_y | state->src_w | state->src_h) &
583 state->nplanes = drm_format_num_planes(fb->pixel_format);
584 if (state->nplanes > ATMEL_HLCDC_MAX_PLANES)
588 * Swap width and size in case of 90 or 270 degrees rotation
590 if (state->base.rotation & (BIT(DRM_ROTATE_90) | BIT(DRM_ROTATE_270))) {
592 state->crtc_w = state->crtc_h;
595 state->src_w = state->src_h;
599 if (state->crtc_x + state->crtc_w > mode->hdisplay)
600 patched_crtc_w = mode->hdisplay - state->crtc_x;
602 patched_crtc_w = state->crtc_w;
604 if (state->crtc_x < 0) {
605 patched_crtc_w += state->crtc_x;
606 x_offset = -state->crtc_x;
610 if (state->crtc_y + state->crtc_h > mode->vdisplay)
611 patched_crtc_h = mode->vdisplay - state->crtc_y;
613 patched_crtc_h = state->crtc_h;
615 if (state->crtc_y < 0) {
616 patched_crtc_h += state->crtc_y;
617 y_offset = -state->crtc_y;
621 patched_src_w = DIV_ROUND_CLOSEST(patched_crtc_w * state->src_w,
623 patched_src_h = DIV_ROUND_CLOSEST(patched_crtc_h * state->src_h,
626 hsub = drm_format_horz_chroma_subsampling(fb->pixel_format);
627 vsub = drm_format_vert_chroma_subsampling(fb->pixel_format);
629 for (i = 0; i < state->nplanes; i++) {
630 unsigned int offset = 0;
631 int xdiv = i ? hsub : 1;
632 int ydiv = i ? vsub : 1;
634 state->bpp[i] = drm_format_plane_cpp(fb->pixel_format, i);
638 switch (state->base.rotation & DRM_ROTATE_MASK) {
639 case BIT(DRM_ROTATE_90):
640 offset = ((y_offset + state->src_y + patched_src_w - 1) /
641 ydiv) * fb->pitches[i];
642 offset += ((x_offset + state->src_x) / xdiv) *
644 state->xstride[i] = ((patched_src_w - 1) / ydiv) *
646 state->pstride[i] = -fb->pitches[i] - state->bpp[i];
648 case BIT(DRM_ROTATE_180):
649 offset = ((y_offset + state->src_y + patched_src_h - 1) /
650 ydiv) * fb->pitches[i];
651 offset += ((x_offset + state->src_x + patched_src_w - 1) /
652 xdiv) * state->bpp[i];
653 state->xstride[i] = ((((patched_src_w - 1) / xdiv) - 1) *
654 state->bpp[i]) - fb->pitches[i];
655 state->pstride[i] = -2 * state->bpp[i];
657 case BIT(DRM_ROTATE_270):
658 offset = ((y_offset + state->src_y) / ydiv) *
660 offset += ((x_offset + state->src_x + patched_src_h - 1) /
661 xdiv) * state->bpp[i];
662 state->xstride[i] = -(((patched_src_w - 1) / ydiv) *
665 state->pstride[i] = fb->pitches[i] - state->bpp[i];
667 case BIT(DRM_ROTATE_0):
669 offset = ((y_offset + state->src_y) / ydiv) *
671 offset += ((x_offset + state->src_x) / xdiv) *
673 state->xstride[i] = fb->pitches[i] -
674 ((patched_src_w / xdiv) *
676 state->pstride[i] = 0;
680 state->offsets[i] = offset + fb->offsets[i];
683 state->src_w = patched_src_w;
684 state->src_h = patched_src_h;
685 state->crtc_w = patched_crtc_w;
686 state->crtc_h = patched_crtc_h;
689 (mode->hdisplay != state->crtc_w ||
690 mode->vdisplay != state->crtc_h))
693 if (plane->layer.desc->max_height &&
694 state->crtc_h > plane->layer.desc->max_height)
697 if (plane->layer.desc->max_width &&
698 state->crtc_w > plane->layer.desc->max_width)
701 if ((state->crtc_h != state->src_h || state->crtc_w != state->src_w) &&
703 atmel_hlcdc_format_embeds_alpha(state->base.fb->pixel_format)))
706 if (state->crtc_x < 0 || state->crtc_y < 0)
709 if (state->crtc_w + state->crtc_x > mode->hdisplay ||
710 state->crtc_h + state->crtc_y > mode->vdisplay)
716 static int atmel_hlcdc_plane_prepare_fb(struct drm_plane *p,
717 const struct drm_plane_state *new_state)
719 struct atmel_hlcdc_plane *plane = drm_plane_to_atmel_hlcdc_plane(p);
724 return atmel_hlcdc_layer_update_start(&plane->layer);
727 static void atmel_hlcdc_plane_atomic_update(struct drm_plane *p,
728 struct drm_plane_state *old_s)
730 struct atmel_hlcdc_plane *plane = drm_plane_to_atmel_hlcdc_plane(p);
731 struct atmel_hlcdc_plane_state *state =
732 drm_plane_state_to_atmel_hlcdc_plane_state(p->state);
734 if (!p->state->crtc || !p->state->fb)
737 atmel_hlcdc_plane_update_pos_and_size(plane, state);
738 atmel_hlcdc_plane_update_general_settings(plane, state);
739 atmel_hlcdc_plane_update_format(plane, state);
740 atmel_hlcdc_plane_update_buffers(plane, state);
741 atmel_hlcdc_plane_update_disc_area(plane, state);
743 atmel_hlcdc_layer_update_commit(&plane->layer);
746 static void atmel_hlcdc_plane_atomic_disable(struct drm_plane *p,
747 struct drm_plane_state *old_state)
749 struct atmel_hlcdc_plane *plane = drm_plane_to_atmel_hlcdc_plane(p);
751 atmel_hlcdc_layer_disable(&plane->layer);
754 static void atmel_hlcdc_plane_destroy(struct drm_plane *p)
756 struct atmel_hlcdc_plane *plane = drm_plane_to_atmel_hlcdc_plane(p);
759 drm_framebuffer_unreference(plane->base.fb);
761 atmel_hlcdc_layer_cleanup(p->dev, &plane->layer);
763 drm_plane_cleanup(p);
764 devm_kfree(p->dev->dev, plane);
767 static int atmel_hlcdc_plane_atomic_set_property(struct drm_plane *p,
768 struct drm_plane_state *s,
769 struct drm_property *property,
772 struct atmel_hlcdc_plane *plane = drm_plane_to_atmel_hlcdc_plane(p);
773 struct atmel_hlcdc_plane_properties *props = plane->properties;
774 struct atmel_hlcdc_plane_state *state =
775 drm_plane_state_to_atmel_hlcdc_plane_state(s);
777 if (property == props->alpha)
785 static int atmel_hlcdc_plane_atomic_get_property(struct drm_plane *p,
786 const struct drm_plane_state *s,
787 struct drm_property *property,
790 struct atmel_hlcdc_plane *plane = drm_plane_to_atmel_hlcdc_plane(p);
791 struct atmel_hlcdc_plane_properties *props = plane->properties;
792 const struct atmel_hlcdc_plane_state *state =
793 container_of(s, const struct atmel_hlcdc_plane_state, base);
795 if (property == props->alpha)
803 static void atmel_hlcdc_plane_init_properties(struct atmel_hlcdc_plane *plane,
804 const struct atmel_hlcdc_layer_desc *desc,
805 struct atmel_hlcdc_plane_properties *props)
807 struct regmap *regmap = plane->layer.hlcdc->regmap;
809 if (desc->type == ATMEL_HLCDC_OVERLAY_LAYER ||
810 desc->type == ATMEL_HLCDC_CURSOR_LAYER) {
811 drm_object_attach_property(&plane->base.base,
814 /* Set default alpha value */
815 regmap_update_bits(regmap,
817 ATMEL_HLCDC_LAYER_GENERAL_CFG(&plane->layer),
818 ATMEL_HLCDC_LAYER_GA_MASK,
819 ATMEL_HLCDC_LAYER_GA_MASK);
822 if (desc->layout.xstride && desc->layout.pstride)
823 drm_object_attach_property(&plane->base.base,
824 plane->base.dev->mode_config.rotation_property,
827 if (desc->layout.csc) {
829 * TODO: decare a "yuv-to-rgb-conv-factors" property to let
830 * userspace modify these factors (using a BLOB property ?).
834 ATMEL_HLCDC_LAYER_CSC_CFG(&plane->layer, 0),
838 ATMEL_HLCDC_LAYER_CSC_CFG(&plane->layer, 1),
842 ATMEL_HLCDC_LAYER_CSC_CFG(&plane->layer, 2),
847 static struct drm_plane_helper_funcs atmel_hlcdc_layer_plane_helper_funcs = {
848 .prepare_fb = atmel_hlcdc_plane_prepare_fb,
849 .atomic_check = atmel_hlcdc_plane_atomic_check,
850 .atomic_update = atmel_hlcdc_plane_atomic_update,
851 .atomic_disable = atmel_hlcdc_plane_atomic_disable,
854 static void atmel_hlcdc_plane_reset(struct drm_plane *p)
856 struct atmel_hlcdc_plane_state *state;
859 state = drm_plane_state_to_atmel_hlcdc_plane_state(p->state);
862 drm_framebuffer_unreference(state->base.fb);
868 state = kzalloc(sizeof(*state), GFP_KERNEL);
871 p->state = &state->base;
876 static struct drm_plane_state *
877 atmel_hlcdc_plane_atomic_duplicate_state(struct drm_plane *p)
879 struct atmel_hlcdc_plane_state *state =
880 drm_plane_state_to_atmel_hlcdc_plane_state(p->state);
881 struct atmel_hlcdc_plane_state *copy;
883 copy = kmemdup(state, sizeof(*state), GFP_KERNEL);
887 copy->disc_updated = false;
890 drm_framebuffer_reference(copy->base.fb);
895 static void atmel_hlcdc_plane_atomic_destroy_state(struct drm_plane *plane,
896 struct drm_plane_state *s)
898 struct atmel_hlcdc_plane_state *state =
899 drm_plane_state_to_atmel_hlcdc_plane_state(s);
902 drm_framebuffer_unreference(s->fb);
907 static struct drm_plane_funcs layer_plane_funcs = {
908 .update_plane = drm_atomic_helper_update_plane,
909 .disable_plane = drm_atomic_helper_disable_plane,
910 .set_property = drm_atomic_helper_plane_set_property,
911 .destroy = atmel_hlcdc_plane_destroy,
912 .reset = atmel_hlcdc_plane_reset,
913 .atomic_duplicate_state = atmel_hlcdc_plane_atomic_duplicate_state,
914 .atomic_destroy_state = atmel_hlcdc_plane_atomic_destroy_state,
915 .atomic_set_property = atmel_hlcdc_plane_atomic_set_property,
916 .atomic_get_property = atmel_hlcdc_plane_atomic_get_property,
919 static struct atmel_hlcdc_plane *
920 atmel_hlcdc_plane_create(struct drm_device *dev,
921 const struct atmel_hlcdc_layer_desc *desc,
922 struct atmel_hlcdc_plane_properties *props)
924 struct atmel_hlcdc_plane *plane;
925 enum drm_plane_type type;
928 plane = devm_kzalloc(dev->dev, sizeof(*plane), GFP_KERNEL);
930 return ERR_PTR(-ENOMEM);
932 ret = atmel_hlcdc_layer_init(dev, &plane->layer, desc);
936 if (desc->type == ATMEL_HLCDC_BASE_LAYER)
937 type = DRM_PLANE_TYPE_PRIMARY;
938 else if (desc->type == ATMEL_HLCDC_CURSOR_LAYER)
939 type = DRM_PLANE_TYPE_CURSOR;
941 type = DRM_PLANE_TYPE_OVERLAY;
943 ret = drm_universal_plane_init(dev, &plane->base, 0,
945 desc->formats->formats,
946 desc->formats->nformats, type, NULL);
950 drm_plane_helper_add(&plane->base,
951 &atmel_hlcdc_layer_plane_helper_funcs);
953 /* Set default property values*/
954 atmel_hlcdc_plane_init_properties(plane, desc, props);
959 static struct atmel_hlcdc_plane_properties *
960 atmel_hlcdc_plane_create_properties(struct drm_device *dev)
962 struct atmel_hlcdc_plane_properties *props;
964 props = devm_kzalloc(dev->dev, sizeof(*props), GFP_KERNEL);
966 return ERR_PTR(-ENOMEM);
968 props->alpha = drm_property_create_range(dev, 0, "alpha", 0, 255);
970 return ERR_PTR(-ENOMEM);
972 dev->mode_config.rotation_property =
973 drm_mode_create_rotation_property(dev,
976 BIT(DRM_ROTATE_180) |
977 BIT(DRM_ROTATE_270));
978 if (!dev->mode_config.rotation_property)
979 return ERR_PTR(-ENOMEM);
984 struct atmel_hlcdc_planes *
985 atmel_hlcdc_create_planes(struct drm_device *dev)
987 struct atmel_hlcdc_dc *dc = dev->dev_private;
988 struct atmel_hlcdc_plane_properties *props;
989 struct atmel_hlcdc_planes *planes;
990 const struct atmel_hlcdc_layer_desc *descs = dc->desc->layers;
991 int nlayers = dc->desc->nlayers;
994 planes = devm_kzalloc(dev->dev, sizeof(*planes), GFP_KERNEL);
996 return ERR_PTR(-ENOMEM);
998 for (i = 0; i < nlayers; i++) {
999 if (descs[i].type == ATMEL_HLCDC_OVERLAY_LAYER)
1000 planes->noverlays++;
1003 if (planes->noverlays) {
1004 planes->overlays = devm_kzalloc(dev->dev,
1006 sizeof(*planes->overlays),
1008 if (!planes->overlays)
1009 return ERR_PTR(-ENOMEM);
1012 props = atmel_hlcdc_plane_create_properties(dev);
1014 return ERR_CAST(props);
1016 planes->noverlays = 0;
1017 for (i = 0; i < nlayers; i++) {
1018 struct atmel_hlcdc_plane *plane;
1020 if (descs[i].type == ATMEL_HLCDC_PP_LAYER)
1023 plane = atmel_hlcdc_plane_create(dev, &descs[i], props);
1025 return ERR_CAST(plane);
1027 plane->properties = props;
1029 switch (descs[i].type) {
1030 case ATMEL_HLCDC_BASE_LAYER:
1031 if (planes->primary)
1032 return ERR_PTR(-EINVAL);
1033 planes->primary = plane;
1036 case ATMEL_HLCDC_OVERLAY_LAYER:
1037 planes->overlays[planes->noverlays++] = plane;
1040 case ATMEL_HLCDC_CURSOR_LAYER:
1042 return ERR_PTR(-EINVAL);
1043 planes->cursor = plane;