2 * Copyright 2013 Advanced Micro Devices, Inc.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
28 typedef struct _ATOM_PPLIB_THERMALCONTROLLER
31 UCHAR ucType; // one of ATOM_PP_THERMALCONTROLLER_*
32 UCHAR ucI2cLine; // as interpreted by DAL I2C
34 UCHAR ucFanParameters; // Fan Control Parameters.
35 UCHAR ucFanMinRPM; // Fan Minimum RPM (hundreds) -- for display purposes only.
36 UCHAR ucFanMaxRPM; // Fan Maximum RPM (hundreds) -- for display purposes only.
37 UCHAR ucReserved; // ----
38 UCHAR ucFlags; // to be defined
39 } ATOM_PPLIB_THERMALCONTROLLER;
41 #define ATOM_PP_FANPARAMETERS_TACHOMETER_PULSES_PER_REVOLUTION_MASK 0x0f
42 #define ATOM_PP_FANPARAMETERS_NOFAN 0x80 // No fan is connected to this controller.
44 #define ATOM_PP_THERMALCONTROLLER_NONE 0
45 #define ATOM_PP_THERMALCONTROLLER_LM63 1 // Not used by PPLib
46 #define ATOM_PP_THERMALCONTROLLER_ADM1032 2 // Not used by PPLib
47 #define ATOM_PP_THERMALCONTROLLER_ADM1030 3 // Not used by PPLib
48 #define ATOM_PP_THERMALCONTROLLER_MUA6649 4 // Not used by PPLib
49 #define ATOM_PP_THERMALCONTROLLER_LM64 5
50 #define ATOM_PP_THERMALCONTROLLER_F75375 6 // Not used by PPLib
51 #define ATOM_PP_THERMALCONTROLLER_RV6xx 7
52 #define ATOM_PP_THERMALCONTROLLER_RV770 8
53 #define ATOM_PP_THERMALCONTROLLER_ADT7473 9
54 #define ATOM_PP_THERMALCONTROLLER_KONG 10
55 #define ATOM_PP_THERMALCONTROLLER_EXTERNAL_GPIO 11
56 #define ATOM_PP_THERMALCONTROLLER_EVERGREEN 12
57 #define ATOM_PP_THERMALCONTROLLER_EMC2103 13 /* 0x0D */ // Only fan control will be implemented, do NOT show this in PPGen.
58 #define ATOM_PP_THERMALCONTROLLER_SUMO 14 /* 0x0E */ // Sumo type, used internally
59 #define ATOM_PP_THERMALCONTROLLER_NISLANDS 15
60 #define ATOM_PP_THERMALCONTROLLER_SISLANDS 16
61 #define ATOM_PP_THERMALCONTROLLER_LM96163 17
62 #define ATOM_PP_THERMALCONTROLLER_CISLANDS 18
63 #define ATOM_PP_THERMALCONTROLLER_KAVERI 19
66 // Thermal controller 'combo type' to use an external controller for Fan control and an internal controller for thermal.
67 // We probably should reserve the bit 0x80 for this use.
68 // To keep the number of these types low we should also use the same code for all ASICs (i.e. do not distinguish RV6xx and RV7xx Internal here).
69 // The driver can pick the correct internal controller based on the ASIC.
71 #define ATOM_PP_THERMALCONTROLLER_ADT7473_WITH_INTERNAL 0x89 // ADT7473 Fan Control + Internal Thermal Controller
72 #define ATOM_PP_THERMALCONTROLLER_EMC2103_WITH_INTERNAL 0x8D // EMC2103 Fan Control + Internal Thermal Controller
74 typedef struct _ATOM_PPLIB_STATE
76 UCHAR ucNonClockStateIndex;
77 UCHAR ucClockStateIndices[1]; // variable-sized
81 typedef struct _ATOM_PPLIB_FANTABLE
83 UCHAR ucFanTableFormat; // Change this if the table format changes or version changes so that the other fields are not the same.
84 UCHAR ucTHyst; // Temperature hysteresis. Integer.
85 USHORT usTMin; // The temperature, in 0.01 centigrades, below which we just run at a minimal PWM.
86 USHORT usTMed; // The middle temperature where we change slopes.
87 USHORT usTHigh; // The high point above TMed for adjusting the second slope.
88 USHORT usPWMMin; // The minimum PWM value in percent (0.01% increments).
89 USHORT usPWMMed; // The PWM value (in percent) at TMed.
90 USHORT usPWMHigh; // The PWM value at THigh.
91 } ATOM_PPLIB_FANTABLE;
93 typedef struct _ATOM_PPLIB_FANTABLE2
95 ATOM_PPLIB_FANTABLE basicTable;
96 USHORT usTMax; // The max temperature
97 } ATOM_PPLIB_FANTABLE2;
99 typedef struct _ATOM_PPLIB_FANTABLE3
101 ATOM_PPLIB_FANTABLE2 basicTable2;
102 UCHAR ucFanControlMode;
104 USHORT usFanOutputSensitivity;
105 } ATOM_PPLIB_FANTABLE3;
107 typedef struct _ATOM_PPLIB_EXTENDEDHEADER
110 ULONG ulMaxEngineClock; // For Overdrive.
111 ULONG ulMaxMemoryClock; // For Overdrive.
112 // Add extra system parameters here, always adjust size to include all fields.
113 USHORT usVCETableOffset; //points to ATOM_PPLIB_VCE_Table
114 USHORT usUVDTableOffset; //points to ATOM_PPLIB_UVD_Table
115 USHORT usSAMUTableOffset; //points to ATOM_PPLIB_SAMU_Table
116 USHORT usPPMTableOffset; //points to ATOM_PPLIB_PPM_Table
117 USHORT usACPTableOffset; //points to ATOM_PPLIB_ACP_Table
118 /* points to ATOM_PPLIB_POWERTUNE_Table */
119 USHORT usPowerTuneTableOffset;
120 /* points to ATOM_PPLIB_CLOCK_Voltage_Dependency_Table for sclkVddgfxTable */
121 USHORT usSclkVddgfxTableOffset;
122 } ATOM_PPLIB_EXTENDEDHEADER;
124 //// ATOM_PPLIB_POWERPLAYTABLE::ulPlatformCaps
125 #define ATOM_PP_PLATFORM_CAP_BACKBIAS 1
126 #define ATOM_PP_PLATFORM_CAP_POWERPLAY 2
127 #define ATOM_PP_PLATFORM_CAP_SBIOSPOWERSOURCE 4
128 #define ATOM_PP_PLATFORM_CAP_ASPM_L0s 8
129 #define ATOM_PP_PLATFORM_CAP_ASPM_L1 16
130 #define ATOM_PP_PLATFORM_CAP_HARDWAREDC 32
131 #define ATOM_PP_PLATFORM_CAP_GEMINIPRIMARY 64
132 #define ATOM_PP_PLATFORM_CAP_STEPVDDC 128
133 #define ATOM_PP_PLATFORM_CAP_VOLTAGECONTROL 256
134 #define ATOM_PP_PLATFORM_CAP_SIDEPORTCONTROL 512
135 #define ATOM_PP_PLATFORM_CAP_TURNOFFPLL_ASPML1 1024
136 #define ATOM_PP_PLATFORM_CAP_HTLINKCONTROL 2048
137 #define ATOM_PP_PLATFORM_CAP_MVDDCONTROL 4096
138 #define ATOM_PP_PLATFORM_CAP_GOTO_BOOT_ON_ALERT 0x2000 // Go to boot state on alerts, e.g. on an AC->DC transition.
139 #define ATOM_PP_PLATFORM_CAP_DONT_WAIT_FOR_VBLANK_ON_ALERT 0x4000 // Do NOT wait for VBLANK during an alert (e.g. AC->DC transition).
140 #define ATOM_PP_PLATFORM_CAP_VDDCI_CONTROL 0x8000 // Does the driver control VDDCI independently from VDDC.
141 #define ATOM_PP_PLATFORM_CAP_REGULATOR_HOT 0x00010000 // Enable the 'regulator hot' feature.
142 #define ATOM_PP_PLATFORM_CAP_BACO 0x00020000 // Does the driver supports BACO state.
143 #define ATOM_PP_PLATFORM_CAP_NEW_CAC_VOLTAGE 0x00040000 // Does the driver supports new CAC voltage table.
144 #define ATOM_PP_PLATFORM_CAP_REVERT_GPIO5_POLARITY 0x00080000 // Does the driver supports revert GPIO5 polarity.
145 #define ATOM_PP_PLATFORM_CAP_OUTPUT_THERMAL2GPIO17 0x00100000 // Does the driver supports thermal2GPIO17.
146 #define ATOM_PP_PLATFORM_CAP_VRHOT_GPIO_CONFIGURABLE 0x00200000 // Does the driver supports VR HOT GPIO Configurable.
147 #define ATOM_PP_PLATFORM_CAP_TEMP_INVERSION 0x00400000 // Does the driver supports Temp Inversion feature.
148 #define ATOM_PP_PLATFORM_CAP_EVV 0x00800000
149 #define ATOM_PP_PLATFORM_COMBINE_PCC_WITH_THERMAL_SIGNAL 0x01000000
150 #define ATOM_PP_PLATFORM_LOAD_POST_PRODUCTION_FIRMWARE 0x02000000
151 #define ATOM_PP_PLATFORM_CAP_DISABLE_USING_ACTUAL_TEMPERATURE_FOR_POWER_CALC 0x04000000
153 typedef struct _ATOM_PPLIB_POWERPLAYTABLE
155 ATOM_COMMON_TABLE_HEADER sHeader;
157 UCHAR ucDataRevision;
160 UCHAR ucStateEntrySize;
161 UCHAR ucClockInfoSize;
162 UCHAR ucNonClockSize;
164 // offset from start of this table to array of ucNumStates ATOM_PPLIB_STATE structures
165 USHORT usStateArrayOffset;
167 // offset from start of this table to array of ASIC-specific structures,
168 // currently ATOM_PPLIB_CLOCK_INFO.
169 USHORT usClockInfoArrayOffset;
171 // offset from start of this table to array of ATOM_PPLIB_NONCLOCK_INFO
172 USHORT usNonClockInfoArrayOffset;
174 USHORT usBackbiasTime; // in microseconds
175 USHORT usVoltageTime; // in microseconds
176 USHORT usTableSize; //the size of this structure, or the extended structure
178 ULONG ulPlatformCaps; // See ATOM_PPLIB_CAPS_*
180 ATOM_PPLIB_THERMALCONTROLLER sThermalController;
182 USHORT usBootClockInfoOffset;
183 USHORT usBootNonClockInfoOffset;
185 } ATOM_PPLIB_POWERPLAYTABLE;
187 typedef struct _ATOM_PPLIB_POWERPLAYTABLE2
189 ATOM_PPLIB_POWERPLAYTABLE basicTable;
190 UCHAR ucNumCustomThermalPolicy;
191 USHORT usCustomThermalPolicyArrayOffset;
192 }ATOM_PPLIB_POWERPLAYTABLE2, *LPATOM_PPLIB_POWERPLAYTABLE2;
194 typedef struct _ATOM_PPLIB_POWERPLAYTABLE3
196 ATOM_PPLIB_POWERPLAYTABLE2 basicTable2;
197 USHORT usFormatID; // To be used ONLY by PPGen.
198 USHORT usFanTableOffset;
199 USHORT usExtendendedHeaderOffset;
200 } ATOM_PPLIB_POWERPLAYTABLE3, *LPATOM_PPLIB_POWERPLAYTABLE3;
202 typedef struct _ATOM_PPLIB_POWERPLAYTABLE4
204 ATOM_PPLIB_POWERPLAYTABLE3 basicTable3;
205 ULONG ulGoldenPPID; // PPGen use only
206 ULONG ulGoldenRevision; // PPGen use only
207 USHORT usVddcDependencyOnSCLKOffset;
208 USHORT usVddciDependencyOnMCLKOffset;
209 USHORT usVddcDependencyOnMCLKOffset;
210 USHORT usMaxClockVoltageOnDCOffset;
211 USHORT usVddcPhaseShedLimitsTableOffset; // Points to ATOM_PPLIB_PhaseSheddingLimits_Table
212 USHORT usMvddDependencyOnMCLKOffset;
213 } ATOM_PPLIB_POWERPLAYTABLE4, *LPATOM_PPLIB_POWERPLAYTABLE4;
215 typedef struct _ATOM_PPLIB_POWERPLAYTABLE5
217 ATOM_PPLIB_POWERPLAYTABLE4 basicTable4;
219 ULONG ulNearTDPLimit;
220 ULONG ulSQRampingThreshold;
221 USHORT usCACLeakageTableOffset; // Points to ATOM_PPLIB_CAC_Leakage_Table
222 ULONG ulCACLeakage; // The iLeakage for driver calculated CAC leakage table
224 USHORT usLoadLineSlope; // in milliOhms * 100
225 } ATOM_PPLIB_POWERPLAYTABLE5, *LPATOM_PPLIB_POWERPLAYTABLE5;
227 //// ATOM_PPLIB_NONCLOCK_INFO::usClassification
228 #define ATOM_PPLIB_CLASSIFICATION_UI_MASK 0x0007
229 #define ATOM_PPLIB_CLASSIFICATION_UI_SHIFT 0
230 #define ATOM_PPLIB_CLASSIFICATION_UI_NONE 0
231 #define ATOM_PPLIB_CLASSIFICATION_UI_BATTERY 1
232 #define ATOM_PPLIB_CLASSIFICATION_UI_BALANCED 3
233 #define ATOM_PPLIB_CLASSIFICATION_UI_PERFORMANCE 5
234 // 2, 4, 6, 7 are reserved
236 #define ATOM_PPLIB_CLASSIFICATION_BOOT 0x0008
237 #define ATOM_PPLIB_CLASSIFICATION_THERMAL 0x0010
238 #define ATOM_PPLIB_CLASSIFICATION_LIMITEDPOWERSOURCE 0x0020
239 #define ATOM_PPLIB_CLASSIFICATION_REST 0x0040
240 #define ATOM_PPLIB_CLASSIFICATION_FORCED 0x0080
241 #define ATOM_PPLIB_CLASSIFICATION_3DPERFORMANCE 0x0100
242 #define ATOM_PPLIB_CLASSIFICATION_OVERDRIVETEMPLATE 0x0200
243 #define ATOM_PPLIB_CLASSIFICATION_UVDSTATE 0x0400
244 #define ATOM_PPLIB_CLASSIFICATION_3DLOW 0x0800
245 #define ATOM_PPLIB_CLASSIFICATION_ACPI 0x1000
246 #define ATOM_PPLIB_CLASSIFICATION_HD2STATE 0x2000
247 #define ATOM_PPLIB_CLASSIFICATION_HDSTATE 0x4000
248 #define ATOM_PPLIB_CLASSIFICATION_SDSTATE 0x8000
250 //// ATOM_PPLIB_NONCLOCK_INFO::usClassification2
251 #define ATOM_PPLIB_CLASSIFICATION2_LIMITEDPOWERSOURCE_2 0x0001
252 #define ATOM_PPLIB_CLASSIFICATION2_ULV 0x0002
253 #define ATOM_PPLIB_CLASSIFICATION2_MVC 0x0004 //Multi-View Codec (BD-3D)
255 //// ATOM_PPLIB_NONCLOCK_INFO::ulCapsAndSettings
256 #define ATOM_PPLIB_SINGLE_DISPLAY_ONLY 0x00000001
257 #define ATOM_PPLIB_SUPPORTS_VIDEO_PLAYBACK 0x00000002
259 // 0 is 2.5Gb/s, 1 is 5Gb/s
260 #define ATOM_PPLIB_PCIE_LINK_SPEED_MASK 0x00000004
261 #define ATOM_PPLIB_PCIE_LINK_SPEED_SHIFT 2
263 // lanes - 1: 1, 2, 4, 8, 12, 16 permitted by PCIE spec
264 #define ATOM_PPLIB_PCIE_LINK_WIDTH_MASK 0x000000F8
265 #define ATOM_PPLIB_PCIE_LINK_WIDTH_SHIFT 3
267 // lookup into reduced refresh-rate table
268 #define ATOM_PPLIB_LIMITED_REFRESHRATE_VALUE_MASK 0x00000F00
269 #define ATOM_PPLIB_LIMITED_REFRESHRATE_VALUE_SHIFT 8
271 #define ATOM_PPLIB_LIMITED_REFRESHRATE_UNLIMITED 0
272 #define ATOM_PPLIB_LIMITED_REFRESHRATE_50HZ 1
273 // 2-15 TBD as needed.
275 #define ATOM_PPLIB_SOFTWARE_DISABLE_LOADBALANCING 0x00001000
276 #define ATOM_PPLIB_SOFTWARE_ENABLE_SLEEP_FOR_TIMESTAMPS 0x00002000
278 #define ATOM_PPLIB_DISALLOW_ON_DC 0x00004000
280 #define ATOM_PPLIB_ENABLE_VARIBRIGHT 0x00008000
282 //memory related flags
283 #define ATOM_PPLIB_SWSTATE_MEMORY_DLL_OFF 0x000010000
285 //M3 Arb //2bits, current 3 sets of parameters in total
286 #define ATOM_PPLIB_M3ARB_MASK 0x00060000
287 #define ATOM_PPLIB_M3ARB_SHIFT 17
289 #define ATOM_PPLIB_ENABLE_DRR 0x00080000
291 // remaining 16 bits are reserved
292 typedef struct _ATOM_PPLIB_THERMAL_STATE
294 UCHAR ucMinTemperature;
295 UCHAR ucMaxTemperature;
296 UCHAR ucThermalAction;
297 }ATOM_PPLIB_THERMAL_STATE, *LPATOM_PPLIB_THERMAL_STATE;
299 // Contained in an array starting at the offset
300 // in ATOM_PPLIB_POWERPLAYTABLE::usNonClockInfoArrayOffset.
301 // referenced from ATOM_PPLIB_STATE_INFO::ucNonClockStateIndex
302 #define ATOM_PPLIB_NONCLOCKINFO_VER1 12
303 #define ATOM_PPLIB_NONCLOCKINFO_VER2 24
304 typedef struct _ATOM_PPLIB_NONCLOCK_INFO
306 USHORT usClassification;
307 UCHAR ucMinTemperature;
308 UCHAR ucMaxTemperature;
309 ULONG ulCapsAndSettings;
310 UCHAR ucRequiredPower;
311 USHORT usClassification2;
315 } ATOM_PPLIB_NONCLOCK_INFO;
317 // Contained in an array starting at the offset
318 // in ATOM_PPLIB_POWERPLAYTABLE::usClockInfoArrayOffset.
319 // referenced from ATOM_PPLIB_STATE::ucClockStateIndices
320 typedef struct _ATOM_PPLIB_R600_CLOCK_INFO
322 USHORT usEngineClockLow;
323 UCHAR ucEngineClockHigh;
325 USHORT usMemoryClockLow;
326 UCHAR ucMemoryClockHigh;
332 ULONG ulFlags; // ATOM_PPLIB_R600_FLAGS_*
334 } ATOM_PPLIB_R600_CLOCK_INFO;
336 // ulFlags in ATOM_PPLIB_R600_CLOCK_INFO
337 #define ATOM_PPLIB_R600_FLAGS_PCIEGEN2 1
338 #define ATOM_PPLIB_R600_FLAGS_UVDSAFE 2
339 #define ATOM_PPLIB_R600_FLAGS_BACKBIASENABLE 4
340 #define ATOM_PPLIB_R600_FLAGS_MEMORY_ODT_OFF 8
341 #define ATOM_PPLIB_R600_FLAGS_MEMORY_DLL_OFF 16
342 #define ATOM_PPLIB_R600_FLAGS_LOWPOWER 32 // On the RV770 use 'low power' setting (sequencer S0).
344 typedef struct _ATOM_PPLIB_RS780_CLOCK_INFO
347 USHORT usLowEngineClockLow; // Low Engine clock in MHz (the same way as on the R600).
348 UCHAR ucLowEngineClockHigh;
349 USHORT usHighEngineClockLow; // High Engine clock in MHz.
350 UCHAR ucHighEngineClockHigh;
351 USHORT usMemoryClockLow; // For now one of the ATOM_PPLIB_RS780_SPMCLK_XXXX constants.
352 UCHAR ucMemoryClockHigh; // Currentyl unused.
353 UCHAR ucPadding; // For proper alignment and size.
354 USHORT usVDDC; // For the 780, use: None, Low, High, Variable
355 UCHAR ucMaxHTLinkWidth; // From SBIOS - {2, 4, 8, 16}
356 UCHAR ucMinHTLinkWidth; // From SBIOS - {2, 4, 8, 16}. Effective only if CDLW enabled. Minimum down stream width could
357 USHORT usHTLinkFreq; // See definition ATOM_PPLIB_RS780_HTLINKFREQ_xxx or in MHz(>=200).
359 } ATOM_PPLIB_RS780_CLOCK_INFO;
361 #define ATOM_PPLIB_RS780_VOLTAGE_NONE 0
362 #define ATOM_PPLIB_RS780_VOLTAGE_LOW 1
363 #define ATOM_PPLIB_RS780_VOLTAGE_HIGH 2
364 #define ATOM_PPLIB_RS780_VOLTAGE_VARIABLE 3
366 #define ATOM_PPLIB_RS780_SPMCLK_NONE 0 // We cannot change the side port memory clock, leave it as it is.
367 #define ATOM_PPLIB_RS780_SPMCLK_LOW 1
368 #define ATOM_PPLIB_RS780_SPMCLK_HIGH 2
370 #define ATOM_PPLIB_RS780_HTLINKFREQ_NONE 0
371 #define ATOM_PPLIB_RS780_HTLINKFREQ_LOW 1
372 #define ATOM_PPLIB_RS780_HTLINKFREQ_HIGH 2
374 typedef struct _ATOM_PPLIB_EVERGREEN_CLOCK_INFO
376 USHORT usEngineClockLow;
377 UCHAR ucEngineClockHigh;
379 USHORT usMemoryClockLow;
380 UCHAR ucMemoryClockHigh;
386 ULONG ulFlags; // ATOM_PPLIB_R600_FLAGS_*
388 } ATOM_PPLIB_EVERGREEN_CLOCK_INFO;
390 typedef struct _ATOM_PPLIB_SI_CLOCK_INFO
392 USHORT usEngineClockLow;
393 UCHAR ucEngineClockHigh;
395 USHORT usMemoryClockLow;
396 UCHAR ucMemoryClockHigh;
403 ULONG ulFlags; // ATOM_PPLIB_SI_FLAGS_*, no flag is necessary for now
405 } ATOM_PPLIB_SI_CLOCK_INFO;
407 typedef struct _ATOM_PPLIB_CI_CLOCK_INFO
409 USHORT usEngineClockLow;
410 UCHAR ucEngineClockHigh;
412 USHORT usMemoryClockLow;
413 UCHAR ucMemoryClockHigh;
417 } ATOM_PPLIB_CI_CLOCK_INFO;
419 typedef struct _ATOM_PPLIB_SUMO_CLOCK_INFO{
420 USHORT usEngineClockLow; //clockfrequency & 0xFFFF. The unit is in 10khz
421 UCHAR ucEngineClockHigh; //clockfrequency >> 16.
422 UCHAR vddcIndex; //2-bit vddc index;
424 //please initalize to 0
426 //please initialize to 0s
428 }ATOM_PPLIB_SUMO_CLOCK_INFO;
430 typedef struct _ATOM_PPLIB_CZ_CLOCK_INFO {
433 } ATOM_PPLIB_CZ_CLOCK_INFO;
435 typedef struct _ATOM_PPLIB_STATE_V2
437 //number of valid dpm levels in this state; Driver uses it to calculate the whole
438 //size of the state: sizeof(ATOM_PPLIB_STATE_V2) + (ucNumDPMLevels - 1) * sizeof(UCHAR)
439 UCHAR ucNumDPMLevels;
441 //a index to the array of nonClockInfos
442 UCHAR nonClockInfoIndex;
444 * Driver will read the first ucNumDPMLevels in this array
446 UCHAR clockInfoIndex[1];
447 } ATOM_PPLIB_STATE_V2;
449 typedef struct _StateArray{
450 //how many states we have
453 ATOM_PPLIB_STATE_V2 states[1];
457 typedef struct _ClockInfoArray{
458 //how many clock levels we have
461 //sizeof(ATOM_PPLIB_CLOCK_INFO)
467 typedef struct _NonClockInfoArray{
469 //how many non-clock levels we have. normally should be same as number of states
471 //sizeof(ATOM_PPLIB_NONCLOCK_INFO)
474 ATOM_PPLIB_NONCLOCK_INFO nonClockInfo[1];
477 typedef struct _ATOM_PPLIB_Clock_Voltage_Dependency_Record
482 }ATOM_PPLIB_Clock_Voltage_Dependency_Record;
484 typedef struct _ATOM_PPLIB_Clock_Voltage_Dependency_Table
486 UCHAR ucNumEntries; // Number of entries.
487 ATOM_PPLIB_Clock_Voltage_Dependency_Record entries[1]; // Dynamically allocate entries.
488 }ATOM_PPLIB_Clock_Voltage_Dependency_Table;
490 typedef struct _ATOM_PPLIB_Clock_Voltage_Limit_Record
498 }ATOM_PPLIB_Clock_Voltage_Limit_Record;
500 typedef struct _ATOM_PPLIB_Clock_Voltage_Limit_Table
502 UCHAR ucNumEntries; // Number of entries.
503 ATOM_PPLIB_Clock_Voltage_Limit_Record entries[1]; // Dynamically allocate entries.
504 }ATOM_PPLIB_Clock_Voltage_Limit_Table;
506 union _ATOM_PPLIB_CAC_Leakage_Record
510 USHORT usVddc; // We use this field for the "fake" standardized VDDC for power calculations; For CI and newer, we use this as the real VDDC value. in CI we read it as StdVoltageHiSidd
511 ULONG ulLeakageValue; // For CI and newer we use this as the "fake" standar VDDC value. in CI we read it as StdVoltageLoSidd
522 typedef union _ATOM_PPLIB_CAC_Leakage_Record ATOM_PPLIB_CAC_Leakage_Record;
524 typedef struct _ATOM_PPLIB_CAC_Leakage_Table
526 UCHAR ucNumEntries; // Number of entries.
527 ATOM_PPLIB_CAC_Leakage_Record entries[1]; // Dynamically allocate entries.
528 }ATOM_PPLIB_CAC_Leakage_Table;
530 typedef struct _ATOM_PPLIB_PhaseSheddingLimits_Record
537 }ATOM_PPLIB_PhaseSheddingLimits_Record;
539 typedef struct _ATOM_PPLIB_PhaseSheddingLimits_Table
541 UCHAR ucNumEntries; // Number of entries.
542 ATOM_PPLIB_PhaseSheddingLimits_Record entries[1]; // Dynamically allocate entries.
543 }ATOM_PPLIB_PhaseSheddingLimits_Table;
545 typedef struct _VCEClockInfo{
552 typedef struct _VCEClockInfoArray{
554 VCEClockInfo entries[1];
557 typedef struct _ATOM_PPLIB_VCE_Clock_Voltage_Limit_Record
560 UCHAR ucVCEClockInfoIndex;
561 }ATOM_PPLIB_VCE_Clock_Voltage_Limit_Record;
563 typedef struct _ATOM_PPLIB_VCE_Clock_Voltage_Limit_Table
566 ATOM_PPLIB_VCE_Clock_Voltage_Limit_Record entries[1];
567 }ATOM_PPLIB_VCE_Clock_Voltage_Limit_Table;
569 typedef struct _ATOM_PPLIB_VCE_State_Record
571 UCHAR ucVCEClockInfoIndex;
572 UCHAR ucClockInfoIndex; //highest 2 bits indicates memory p-states, lower 6bits indicates index to ClockInfoArrary
573 }ATOM_PPLIB_VCE_State_Record;
575 typedef struct _ATOM_PPLIB_VCE_State_Table
578 ATOM_PPLIB_VCE_State_Record entries[1];
579 }ATOM_PPLIB_VCE_State_Table;
582 typedef struct _ATOM_PPLIB_VCE_Table
585 // VCEClockInfoArray array;
586 // ATOM_PPLIB_VCE_Clock_Voltage_Limit_Table limits;
587 // ATOM_PPLIB_VCE_State_Table states;
588 }ATOM_PPLIB_VCE_Table;
591 typedef struct _UVDClockInfo{
598 typedef struct _UVDClockInfoArray{
600 UVDClockInfo entries[1];
603 typedef struct _ATOM_PPLIB_UVD_Clock_Voltage_Limit_Record
606 UCHAR ucUVDClockInfoIndex;
607 }ATOM_PPLIB_UVD_Clock_Voltage_Limit_Record;
609 typedef struct _ATOM_PPLIB_UVD_Clock_Voltage_Limit_Table
612 ATOM_PPLIB_UVD_Clock_Voltage_Limit_Record entries[1];
613 }ATOM_PPLIB_UVD_Clock_Voltage_Limit_Table;
615 typedef struct _ATOM_PPLIB_UVD_Table
618 // UVDClockInfoArray array;
619 // ATOM_PPLIB_UVD_Clock_Voltage_Limit_Table limits;
620 }ATOM_PPLIB_UVD_Table;
622 typedef struct _ATOM_PPLIB_SAMClk_Voltage_Limit_Record
625 USHORT usSAMClockLow;
626 UCHAR ucSAMClockHigh;
627 }ATOM_PPLIB_SAMClk_Voltage_Limit_Record;
629 typedef struct _ATOM_PPLIB_SAMClk_Voltage_Limit_Table{
631 ATOM_PPLIB_SAMClk_Voltage_Limit_Record entries[1];
632 }ATOM_PPLIB_SAMClk_Voltage_Limit_Table;
634 typedef struct _ATOM_PPLIB_SAMU_Table
637 ATOM_PPLIB_SAMClk_Voltage_Limit_Table limits;
638 }ATOM_PPLIB_SAMU_Table;
640 typedef struct _ATOM_PPLIB_ACPClk_Voltage_Limit_Record
643 USHORT usACPClockLow;
644 UCHAR ucACPClockHigh;
645 }ATOM_PPLIB_ACPClk_Voltage_Limit_Record;
647 typedef struct _ATOM_PPLIB_ACPClk_Voltage_Limit_Table{
649 ATOM_PPLIB_ACPClk_Voltage_Limit_Record entries[1];
650 }ATOM_PPLIB_ACPClk_Voltage_Limit_Table;
652 typedef struct _ATOM_PPLIB_ACP_Table
655 ATOM_PPLIB_ACPClk_Voltage_Limit_Table limits;
656 }ATOM_PPLIB_ACP_Table;
658 typedef struct _ATOM_PowerTune_Table{
660 USHORT usConfigurableTDP;
662 USHORT usBatteryPowerLimit;
663 USHORT usSmallPowerLimit;
664 USHORT usLowCACLeakage;
665 USHORT usHighCACLeakage;
666 }ATOM_PowerTune_Table;
668 typedef struct _ATOM_PPLIB_POWERTUNE_Table
671 ATOM_PowerTune_Table power_tune_table;
672 }ATOM_PPLIB_POWERTUNE_Table;
674 typedef struct _ATOM_PPLIB_POWERTUNE_Table_V1
677 ATOM_PowerTune_Table power_tune_table;
678 USHORT usMaximumPowerDeliveryLimit;
681 } ATOM_PPLIB_POWERTUNE_Table_V1;
683 #define ATOM_PPM_A_A 1
684 #define ATOM_PPM_A_I 2
685 typedef struct _ATOM_PPLIB_PPM_Table
688 UCHAR ucPpmDesign; //A+I or A+A
689 USHORT usCpuCoreNumber;
691 ULONG ulSmallACPlatformTDP;
693 ULONG ulSmallACPlatformTDC;
696 ULONG ulDGpuUlvPower;
698 } ATOM_PPLIB_PPM_Table;