3 #include <linux/kernel.h>
5 int Mali_RdReg(int unit,int core, int regnum);
6 void Mali_WrReg(int unit,int core,int regnum,int value);
7 int Mali_AnyInterruptCheck(int type, int i_mask, int i_value);
8 void Mali_clear_irqs_and_set_all_masks (void);
9 void Mali_clear_and_set_masks_for_gpu_irq (void);
10 void Mali_clear_and_set_masks_for_mmu_irq (void);
11 void Mali_clear_and_set_masks_for_job_irq (void);
12 void Mali_SetBase(int* base);
13 void Mali_Reset(void) ;
14 void *Mali_LdMem(void *srcptr,int size,int ttb_base);
15 void Mali_InitPerfCountersFn(int core, int cnt_num, int cnt_id);
16 void Mali_InitPerfCounters();
17 void Mali_InitPerfCountersFn(int core, int cnt_num, int cnt_id);
18 void Mali_ReadPerfCounters();
19 int Mali_InterruptCheck(int i_mask, int i_value);
20 void Mali_CheckReg(int unit,int core, int regnum, int value);
25 /**********************************************
27 **********************************************/
32 #define GPU_ID_VALUE 0x69560002
35 /**********************************************
37 **********************************************/
38 #ifdef GPU_CONFIG_N_CONTROL_BASE
40 #define GPU_CONFIG_N_CONTROL_BASE 0x0000
43 #ifdef JOB_CONTROL_BASE
45 #define JOB_CONTROL_BASE 0x1000
48 #ifdef MEM_MANAGEMENT_BASE
50 #define MEM_MANAGEMENT_BASE 0x2000
56 #ifdef GPU_IRQ_RAWSTAT
58 #define GPU_IRQ_RAWSTAT 0x0020
63 #define GPU_IRQ_CLEAR 0x0024
68 #define GPU_IRQ_MASK 0x0028
73 #define GPU_IRQ_STATUS 0x002C
78 #define GPU_COMMAND 0x0030
83 #define GPU_STATUS 0x0034
86 #ifdef GPU_FAULTSTATUS
88 #define GPU_FAULTSTATUS 0x003C
95 #define CYCLE_COUNT_LO 0x0090
100 #define CYCLE_COUNT_HI 0x0094
105 #define TIMESTAMP_LO 0x0098
110 #define TIMESTAMP_HI 0x009c
115 #define L2_MMU_CONFIG 0x0f0c
119 #ifdef JOB_IRQ_RAWSTAT
121 #define JOB_IRQ_RAWSTAT 0x1000
126 #define JOB_IRQ_CLEAR 0x1004
131 #define JOB_IRQ_MASK 0x1008
134 #ifdef JOB_IRQ_STATUS
136 #define JOB_IRQ_STATUS 0x100c
139 #ifdef JOB_IRQ_THROTTLE
141 #define JOB_IRQ_THROTTLE 0x1014
148 #ifdef SHADER_PWRON_LO
150 #define SHADER_PWRON_LO 0x0180
152 #ifdef SHADER_PWROFF_LO
154 #define SHADER_PWROFF_LO 0x01c0
156 #ifdef SHADER_READY_LO
158 #define SHADER_READY_LO 0x0140
160 #ifdef SHADER_PWRTRANS_LO
162 #define SHADER_PWRTRANS_LO 0x0200
164 #ifdef SHADER_PWRACTIVE_LO
166 #define SHADER_PWRACTIVE_LO 0x0240
169 #ifdef SHADER_PWRON_HI
171 #define SHADER_PWRON_HI 0x0184
175 #ifdef TILER_PWRON_LO
177 #define TILER_PWRON_LO 0x0190
179 #ifdef TILER_PWROFF_LO
181 #define TILER_PWROFF_LO 0x01d0
183 #ifdef TILER_READY_LO
185 #define TILER_READY_LO 0x0150
187 #ifdef TILER_PWRTRANS_LO
189 #define TILER_PWRTRANS_LO 0x0210
191 #ifdef TILER_PWRACTIVE_LO
193 #define TILER_PWRACTIVE_LO 0x0250
196 #ifdef TILER_PWRON_HI
198 #define TILER_PWRON_HI 0x0194
203 #define L2_PWRON_LO 0x01A0
208 #define L2_PWRON_HI 0x01A4
213 #define L2_PWROFF_LO 0x01e0
218 #define L2_READY_LO 0x0160
221 #ifdef L2_PWRTRANS_LO
223 #define L2_PWRTRANS_LO 0x0220
226 #ifdef L2_PWRACTIVE_LO
228 #define L2_PWRACTIVE_LO 0x0260
233 /**********************************************
235 **********************************************/
238 #define JSn_BASE 0x800
243 #define JSn_CONFIG 0x18
246 #ifdef JSn_HEAD_NEXT_LO
248 #define JSn_HEAD_NEXT_LO 0x40
251 #ifdef JSn_HEAD_NEXT_HI
253 #define JSn_HEAD_NEXT_HI 0x44
256 #ifdef JSn_AFFINITY_NEXT_LO
258 #define JSn_AFFINITY_NEXT_LO 0x50
261 #ifdef JSn_AFFINITY_NEXT_HI
263 #define JSn_AFFINITY_NEXT_HI 0x54
266 #ifdef JSn_CONFIG_NEXT
268 #define JSn_CONFIG_NEXT 0x58
271 #ifdef JSn_COMMAND_NEXT
273 #define JSn_COMMAND_NEXT 0x60
278 #define JSn_STATUS 0x24
281 /**********************************************
283 **********************************************/
285 #ifdef JS0_HEAD_NEXT_LO
287 #define JS0_HEAD_NEXT_LO 0x1840
290 #ifdef JS0_HEAD_NEXT_HI
292 #define JS0_HEAD_NEXT_HI 0x1844
295 #ifdef JS0_AFFINITY_NEXT_LO
297 #define JS0_AFFINITY_NEXT_LO 0x1850
300 #ifdef JS0_AFFINITY_NEXT_HI
302 #define JS0_AFFINITY_NEXT_HI 0x1850
305 #ifdef JS0_CONFIG_NEXT
307 #define JS0_CONFIG_NEXT 0x1858
310 #ifdef JS0_COMMAND_NEXT
312 #define JS0_COMMAND_NEXT 0x1860
317 #define JS0_STATUS 0x1824
320 /**********************************************
322 **********************************************/
323 #ifdef JS1_HEAD_NEXT_LO
325 #define JS1_HEAD_NEXT_LO 0x18c0
328 #ifdef JS1_HEAD_NEXT_HI
330 #define JS1_HEAD_NEXT_HI 0x18c4
333 #ifdef JS1_AFFINITY_NEXT_LO
335 #define JS1_AFFINITY_NEXT_LO 0x18d0
338 #ifdef JS1_AFFINITY_NEXT_HI
340 #define JS1_AFFINITY_NEXT_HI 0x18d4
343 #ifdef JS1_CONFIG_NEXT
345 #define JS1_CONFIG_NEXT 0x18d8
348 #ifdef JS1_COMMAND_NEXT
350 #define JS1_COMMAND_NEXT 0x18e0
353 /**********************************************
355 **********************************************/
356 #ifdef JS2_HEAD_NEXT_LO
358 #define JS2_HEAD_NEXT_LO 0x1940
361 #ifdef JS2_HEAD_NEXT_HI
363 #define JS2_HEAD_NEXT_HI 0x1944
366 #ifdef JS2_AFFINITY_NEXT_LO
368 #define JS2_AFFINITY_NEXT_LO 0x1950
371 #ifdef JS2_AFFINITY_NEXT_HI
373 #define JS2_AFFINITY_NEXT_HI 0x1954
376 #ifdef JS2_CONFIG_NEXT
378 #define JS2_CONFIG_NEXT 0x1958
381 #ifdef JS2_COMMAND_NEXT
383 #define JS2_COMMAND_NEXT 0x1960
386 /**********************************************
388 **********************************************/
389 #ifdef MMU_IRQ_RAWSTAT
391 #define MMU_IRQ_RAWSTAT 0x2000
396 #define MMU_IRQ_CLEAR 0x2004
401 #define MMU_IRQ_MASK 0x2008
404 #ifdef MMU_IRQ_STATUS
406 #define MMU_IRQ_STATUS 0x200c
409 #ifdef MMU_IRQ_STATUS
411 #define MMU_IRQ_STATUS 0x200c
414 /**********************************************
415 Memory management regs
416 **********************************************/
419 #define ASn_BASE 0x400
422 #ifdef ASn_TRANSTAB_LO
424 #define ASn_TRANSTAB_LO 0x00
427 #ifdef ASn_TRANSTAB_HI
429 #define ASn_TRANSTAB_HI 0x04
432 #ifdef ASn_MEMATTR_LO
434 #define ASn_MEMATTR_LO 0x08
437 #ifdef ASn_MEMATTR_HI
439 #define ASn_MEMATTR_HI 0x0c
442 #ifdef ASn_LOCKADDR_LO
444 #define ASn_LOCKADDR_LO 0x10
447 #ifdef ASn_LOCKADDR_HI
449 #define ASn_LOCKADDR_HI 0x14
454 #define ASn_COMMAND 0x18
457 #ifdef ASn_FAULTSTATUS
459 #define ASn_FAULTSTATUS 0x1c
462 #ifdef ASn_FAULTADDR_LO
464 #define ASn_FAULTADDR_LO 0x20
467 #ifdef ASn_FAULTADDR_HI
469 #define ASn_FAULTADDR_HI 0x24
474 #define ASn_STATUS 0x28
478 /**********************************************
480 **********************************************/
483 #define PRFCNT_CONFIG 0x068
488 #define PRFCNT_JM_EN 0x06C
491 #ifdef PRFCNT_SHADER_EN
493 #define PRFCNT_SHADER_EN 0x070
496 #ifdef PRFCNT_TILER_EN
498 #define PRFCNT_TILER_EN 0x074
501 #ifdef PRFCNT_L3_CACHE_EN
503 #define PRFCNT_L3_CACHE_EN 0x078
506 #ifdef PRFCNT_MMU_L2_EN
508 #define PRFCNT_MMU_L2_EN 0x07C
512 /**********************************************
514 **********************************************/
516 #ifdef GPU_COMMAND__CYCLE_COUNT_START
518 #define GPU_COMMAND__CYCLE_COUNT_START 5
522 #ifdef GPU_COMMAND__NOP
524 #define GPU_COMMAND__NOP 0
528 #ifdef GPU_COMMAND__SOFT_RESET
530 #define GPU_COMMAND__SOFT_RESET 1
534 #ifdef GPU_COMMAND__HARD_RESET
536 #define GPU_COMMAND__HARD_RESET 2
540 #ifdef GPU_COMMAND__PRFCNT_CLEAR
542 #define GPU_COMMAND__PRFCNT_CLEAR 3
546 #ifdef GPU_COMMAND__PRFCNT_SAMPLE
548 #define GPU_COMMAND__PRFCNT_SAMPLE 4
551 #ifdef GPU_COMMAND__CYCLE_COUNT_START
553 #define GPU_COMMAND__CYCLE_COUNT_START 5
556 #ifdef GPU_COMMAND__CYCLE_COUNT_STOP
558 #define GPU_COMMAND__CYCLE_COUNT_STOP 6
561 #ifdef GPU_COMMAND__CLEAN_CACHES
563 #define GPU_COMMAND__CLEAN_CACHES 7
566 #ifdef GPU_COMMAND__CLEAN_INV_CACHES
568 #define GPU_COMMAND__CLEAN_INV_CACHES 8
572 /**********************************************
574 **********************************************/
575 #ifdef JSn_STATUS__ACTIVE
577 #define JSn_STATUS__ACTIVE 0x8
580 /**********************************************
581 Clock gating overrides
582 **********************************************/
583 #ifdef JM_CLOCK_GATING_OVERRIDE
585 #define JM_CLOCK_GATING_OVERRIDE 0xf00
588 #ifdef SC_CLOCK_GATING_OVERRIDE
590 #define SC_CLOCK_GATING_OVERRIDE 0xf04
593 #ifdef TILER_CLOCK_GATING_OVERRIDE
595 #define TILER_CLOCK_GATING_OVERRIDE 0xf08
598 #ifdef L2_CLOCK_GATING_OVERRIDE
600 #define L2_CLOCK_GATING_OVERRIDE 0xf0C
604 /**********************************************
605 Hardcoded regs (autogenerated from the toplevel testbench file
606 common/apb/mali_t760_apb/mali_t760_enums.sv)
607 **********************************************/
616 #define L2_FEATURES 0x4
621 #define L3_FEATURES 0x8
624 #ifdef TILER_FEATURES
626 #define TILER_FEATURES 0xC
631 #define MEM_FEATURES 0x10
636 #define MMU_FEATURES 0x14
641 #define AS_PRESENT 0x18
646 #define JS_PRESENT 0x1C
649 #ifdef GPU_IRQ_RAWSTAT
651 #define GPU_IRQ_RAWSTAT 0x20
656 #define GPU_IRQ_CLEAR 0x24
661 #define GPU_IRQ_MASK 0x28
664 #ifdef GPU_IRQ_STATUS
666 #define GPU_IRQ_STATUS 0x2C
671 #define GPU_COMMAND 0x30
676 #define GPU_STATUS 0x34
679 #ifdef GPU_FAULTSTATUS
681 #define GPU_FAULTSTATUS 0x3C
684 #ifdef GPU_FAULTADDRESS_LO
686 #define GPU_FAULTADDRESS_LO 0x40
689 #ifdef GPU_FAULTADDRESS_HI
691 #define GPU_FAULTADDRESS_HI 0x44
701 #define PWR_OVERRIDE0 0x54
706 #define PWR_OVERRIDE1 0x58
709 #ifdef PRFCNT_BASE_LO
711 #define PRFCNT_BASE_LO 0x60
714 #ifdef PRFCNT_BASE_HI
716 #define PRFCNT_BASE_HI 0x64
721 #define PRFCNT_CONFIG 0x68
726 #define PRFCNT_JM_EN 0x6C
729 #ifdef PRFCNT_SHADER_EN
731 #define PRFCNT_SHADER_EN 0x70
734 #ifdef PRFCNT_TILER_EN
736 #define PRFCNT_TILER_EN 0x74
739 #ifdef PRFCNT_L3_CACHE_EN
741 #define PRFCNT_L3_CACHE_EN 0x78
744 #ifdef PRFCNT_MMU_L2_EN
746 #define PRFCNT_MMU_L2_EN 0x7C
749 #ifdef CYCLE_COUNT_LO
751 #define CYCLE_COUNT_LO 0x90
754 #ifdef CYCLE_COUNT_HI
756 #define CYCLE_COUNT_HI 0x94
761 #define TIMESTAMP_LO 0x98
766 #define TIMESTAMP_HI 0x9C
769 #ifdef TEX_FEATURES_0
771 #define TEX_FEATURES_0 0xB0
774 #ifdef TEX_FEATURES_1
776 #define TEX_FEATURES_1 0xB4
779 #ifdef TEX_FEATURES_2
781 #define TEX_FEATURES_2 0xB8
786 #define JS0_FEATURES 0xC0
791 #define JS1_FEATURES 0xC4
796 #define JS2_FEATURES 0xC8
801 #define JS3_FEATURES 0xCC
806 #define JS4_FEATURES 0xD0
811 #define JS5_FEATURES 0xD4
816 #define JS6_FEATURES 0xD8
821 #define JS7_FEATURES 0xDC
826 #define JS8_FEATURES 0xE0
831 #define JS9_FEATURES 0xE4
836 #define JS10_FEATURES 0xE8
841 #define JS11_FEATURES 0xEC
846 #define JS12_FEATURES 0xF0
851 #define JS13_FEATURES 0xF4
856 #define JS16_FEATURES 0xF8
861 #define JS15_FEATURES 0xFC
864 #ifdef SHADER_PRESENT_LO
866 #define SHADER_PRESENT_LO 0x100
869 #ifdef SHADER_PRESENT_HI
871 #define SHADER_PRESENT_HI 0x104
874 #ifdef TILER_PRESENT_LO
876 #define TILER_PRESENT_LO 0x110
879 #ifdef TILER_PRESENT_HI
881 #define TILER_PRESENT_HI 0x114
886 #define L2_PRESENT_LO 0x120
891 #define L2_PRESENT_HI 0x124
896 #define L3_PRESENT_LO 0x130
901 #define L3_PRESENT_HI 0x134
904 #ifdef SHADER_READY_LO
906 #define SHADER_READY_LO 0x140
909 #ifdef SHADER_READY_HI
911 #define SHADER_READY_HI 0x144
914 #ifdef TILER_READY_LO
916 #define TILER_READY_LO 0x150
919 #ifdef TILER_READY_HI
921 #define TILER_READY_HI 0x154
926 #define L2_READY_LO 0x160
931 #define L2_READY_HI 0x164
936 #define L3_READY_LO 0x170
941 #define L3_READY_HI 0x174
944 #ifdef SHADER_PWRON_LO
946 #define SHADER_PWRON_LO 0x180
949 #ifdef SHADER_PWRON_HI
951 #define SHADER_PWRON_HI 0x184
954 #ifdef TILER_PWRON_LO
956 #define TILER_PWRON_LO 0x190
959 #ifdef TILER_PWRON_HI
961 #define TILER_PWRON_HI 0x194
966 #define L2_PWRON_LO 0x1A0
971 #define L2_PWRON_HI 0x1A4
976 #define L3_PWRON_LO 0x1B0
981 #define L3_PWRON_HI 0x1B4
984 #ifdef SHADER_PWROFF_LO
986 #define SHADER_PWROFF_LO 0x1C0
989 #ifdef SHADER_PWROFF_HI
991 #define SHADER_PWROFF_HI 0x1C4
994 #ifdef TILER_PWROFF_LO
996 #define TILER_PWROFF_LO 0x1D0
999 #ifdef TILER_PWROFF_HI
1001 #define TILER_PWROFF_HI 0x1D4
1006 #define L2_PWROFF_LO 0x1E0
1011 #define L2_PWROFF_HI 0x1E4
1016 #define L3_PWROFF_LO 0x1F0
1021 #define L3_PWROFF_HI 0x1F4
1024 #ifdef SHADER_PWRTRANS_LO
1026 #define SHADER_PWRTRANS_LO 0x200
1029 #ifdef SHADER_PWRTRANS_HI
1031 #define SHADER_PWRTRANS_HI 0x204
1034 #ifdef TILER_PWRTRANS_LO
1036 #define TILER_PWRTRANS_LO 0x210
1039 #ifdef TILER_PWRTRANS_HI
1041 #define TILER_PWRTRANS_HI 0x214
1044 #ifdef L2_PWRTRANS_LO
1046 #define L2_PWRTRANS_LO 0x220
1049 #ifdef L2_PWRTRANS_HI
1051 #define L2_PWRTRANS_HI 0x224
1054 #ifdef L3_PWRTRANS_LO
1056 #define L3_PWRTRANS_LO 0x230
1059 #ifdef L3_PWRTRANS_HI
1061 #define L3_PWRTRANS_HI 0x234
1064 #ifdef SHADER_PWRACTIVE_LO
1066 #define SHADER_PWRACTIVE_LO 0x240
1069 #ifdef SHADER_PWRACTIVE_HI
1071 #define SHADER_PWRACTIVE_HI 0x244
1074 #ifdef TILER_PWRACTIVE_LO
1076 #define TILER_PWRACTIVE_LO 0x250
1079 #ifdef TILER_PWRACTIVE_HI
1081 #define TILER_PWRACTIVE_HI 0x254
1084 #ifdef L2_PWRACTIVE_LO
1086 #define L2_PWRACTIVE_LO 0x260
1089 #ifdef L2_PWRACTIVE_HI
1091 #define L2_PWRACTIVE_HI 0x264
1094 #ifdef L3_PWRACTIVE_LO
1096 #define L3_PWRACTIVE_LO 0x270
1099 #ifdef L3_PWRACTIVE_HI
1101 #define L3_PWRACTIVE_HI 0x274
1106 #define USER_IN_00 0x400
1111 #define USER_IN_01 0x404
1116 #define USER_IN_02 0x408
1121 #define USER_IN_03 0x40C
1126 #define USER_IN_04 0x410
1131 #define USER_IN_05 0x414
1136 #define USER_IN_06 0x418
1141 #define USER_IN_07 0x41C
1146 #define USER_IN_08 0x420
1151 #define USER_IN_09 0x424
1156 #define USER_IN_10 0x428
1161 #define USER_IN_11 0x42C
1166 #define USER_IN_12 0x430
1171 #define USER_IN_13 0x434
1176 #define USER_IN_14 0x438
1181 #define USER_IN_15 0x43C
1186 #define USER_IN_16 0x440
1191 #define USER_IN_17 0x444
1196 #define USER_IN_18 0x448
1201 #define USER_IN_19 0x44C
1206 #define USER_IN_20 0x450
1211 #define USER_IN_21 0x454
1216 #define USER_IN_22 0x458
1221 #define USER_IN_23 0x45C
1226 #define USER_IN_24 0x460
1231 #define USER_IN_25 0x464
1236 #define USER_IN_26 0x468
1241 #define USER_IN_27 0x46C
1246 #define USER_IN_28 0x470
1251 #define USER_IN_29 0x474
1256 #define USER_IN_30 0x478
1261 #define USER_IN_31 0x47C
1266 #define USER_OUT_00 0x500
1271 #define USER_OUT_01 0x504
1276 #define USER_OUT_02 0x508
1281 #define USER_OUT_03 0x50C
1286 #define USER_OUT_04 0x510
1291 #define USER_OUT_05 0x514
1296 #define USER_OUT_06 0x518
1301 #define USER_OUT_07 0x51C
1306 #define USER_OUT_08 0x520
1311 #define USER_OUT_09 0x524
1316 #define USER_OUT_10 0x528
1321 #define USER_OUT_11 0x52C
1326 #define USER_OUT_12 0x530
1331 #define USER_OUT_13 0x534
1336 #define USER_OUT_14 0x538
1341 #define USER_OUT_15 0x53C
1346 #define USER_OUT_16 0x540
1351 #define USER_OUT_17 0x544
1356 #define USER_OUT_18 0x548
1361 #define USER_OUT_19 0x54C
1366 #define USER_OUT_20 0x550
1371 #define USER_OUT_21 0x554
1376 #define USER_OUT_22 0x558
1381 #define USER_OUT_23 0x55C
1386 #define USER_OUT_24 0x560
1391 #define USER_OUT_25 0x564
1396 #define USER_OUT_26 0x568
1401 #define USER_OUT_27 0x56C
1406 #define USER_OUT_28 0x570
1411 #define USER_OUT_29 0x574
1416 #define USER_OUT_30 0x578
1421 #define USER_OUT_31 0x57C
1426 #define JM_CONFIG 0xF00
1429 #ifdef SHADER_CONFIG
1431 #define SHADER_CONFIG 0xF04
1436 #define TILER_CONFIG 0xF08
1439 #ifdef L2_MMU_CONFIG
1441 #define L2_MMU_CONFIG 0xF0C
1446 #define GPU_DEBUG_LO 0xFE8
1451 #define GPU_DEBUG_HI 0xFEC
1454 #ifdef GPU_CHICKEN_BITS_0
1456 #define GPU_CHICKEN_BITS_0 0xFF0
1459 #ifdef GPU_CHICKEN_BITS_1
1461 #define GPU_CHICKEN_BITS_1 0xFF4
1464 #ifdef GPU_CHICKEN_BITS_2
1466 #define GPU_CHICKEN_BITS_2 0xFF8
1469 #ifdef GPU_CHICKEN_BITS_3
1471 #define GPU_CHICKEN_BITS_3 0xFFC
1474 #ifdef JOB_IRQ_RAWSTAT
1476 #define JOB_IRQ_RAWSTAT 0x1000
1479 #ifdef JOB_IRQ_CLEAR
1481 #define JOB_IRQ_CLEAR 0x1004
1486 #define JOB_IRQ_MASK 0x1008
1489 #ifdef JOB_IRQ_STATUS
1491 #define JOB_IRQ_STATUS 0x100C
1494 #ifdef JOB_IRQ_JS_STATE
1496 #define JOB_IRQ_JS_STATE 0x1010
1499 #ifdef JOB_IRQ_THROTTLE
1501 #define JOB_IRQ_THROTTLE 0x1014
1506 #define JS0_HEAD_LO 0x1800
1511 #define JS0_HEAD_HI 0x1804
1516 #define JS0_TAIL_LO 0x1808
1521 #define JS0_TAIL_HI 0x180C
1524 #ifdef JS0_AFFINITY_LO
1526 #define JS0_AFFINITY_LO 0x1810
1529 #ifdef JS0_AFFINITY_HI
1531 #define JS0_AFFINITY_HI 0x1814
1536 #define JS0_CONFIG 0x1818
1541 #define JS0_COMMAND 0x1820
1546 #define JS0_STATUS 0x1824
1549 #ifdef JS0_HEAD_NEXT_LO
1551 #define JS0_HEAD_NEXT_LO 0x1840
1554 #ifdef JS0_HEAD_NEXT_HI
1556 #define JS0_HEAD_NEXT_HI 0x1844
1559 #ifdef JS0_AFFINITY_NEXT_LO
1561 #define JS0_AFFINITY_NEXT_LO 0x1850
1564 #ifdef JS0_AFFINITY_NEXT_HI
1566 #define JS0_AFFINITY_NEXT_HI 0x1854
1569 #ifdef JS0_CONFIG_NEXT
1571 #define JS0_CONFIG_NEXT 0x1858
1574 #ifdef JS0_COMMAND_NEXT
1576 #define JS0_COMMAND_NEXT 0x1860
1581 #define JS1_HEAD_LO 0x1880
1586 #define JS1_HEAD_HI 0x1884
1591 #define JS1_TAIL_LO 0x1888
1596 #define JS1_TAIL_HI 0x188C
1599 #ifdef JS1_AFFINITY_LO
1601 #define JS1_AFFINITY_LO 0x1890
1604 #ifdef JS1_AFFINITY_HI
1606 #define JS1_AFFINITY_HI 0x1894
1611 #define JS1_CONFIG 0x1898
1616 #define JS1_COMMAND 0x18a0
1621 #define JS1_STATUS 0x18a4
1624 #ifdef JS1_HEAD_NEXT_LO
1626 #define JS1_HEAD_NEXT_LO 0x18c0
1629 #ifdef JS1_HEAD_NEXT_HI
1631 #define JS1_HEAD_NEXT_HI 0x18c4
1634 #ifdef JS1_AFFINITY_NEXT_LO
1636 #define JS1_AFFINITY_NEXT_LO 0x18d0
1639 #ifdef JS1_AFFINITY_NEXT_HI
1641 #define JS1_AFFINITY_NEXT_HI 0x18d4
1644 #ifdef JS1_CONFIG_NEXT
1646 #define JS1_CONFIG_NEXT 0x18d8
1649 #ifdef JS1_COMMAND_NEXT
1651 #define JS1_COMMAND_NEXT 0x18e0
1656 #define JS2_HEAD_LO 0x1900
1661 #define JS2_HEAD_HI 0x1904
1666 #define JS2_TAIL_LO 0x1908
1671 #define JS2_TAIL_HI 0x190C
1674 #ifdef JS2_AFFINITY_LO
1676 #define JS2_AFFINITY_LO 0x1910
1679 #ifdef JS2_AFFINITY_HI
1681 #define JS2_AFFINITY_HI 0x1914
1686 #define JS2_CONFIG 0x1918
1691 #define JS2_COMMAND 0x1920
1696 #define JS2_STATUS 0x1924
1699 #ifdef JS2_HEAD_NEXT_LO
1701 #define JS2_HEAD_NEXT_LO 0x1940
1704 #ifdef JS2_HEAD_NEXT_HI
1706 #define JS2_HEAD_NEXT_HI 0x1944
1709 #ifdef JS2_AFFINITY_NEXT_LO
1711 #define JS2_AFFINITY_NEXT_LO 0x1950
1714 #ifdef JS2_AFFINITY_NEXT_HI
1716 #define JS2_AFFINITY_NEXT_HI 0x1954
1719 #ifdef JS2_CONFIG_NEXT
1721 #define JS2_CONFIG_NEXT 0x1958
1724 #ifdef JS2_COMMAND_NEXT
1726 #define JS2_COMMAND_NEXT 0x1960
1729 #ifdef MMU_IRQ_RAWSTAT
1731 #define MMU_IRQ_RAWSTAT 0x2000
1734 #ifdef MMU_IRQ_CLEAR
1736 #define MMU_IRQ_CLEAR 0x2004
1741 #define MMU_IRQ_MASK 0x2008
1744 #ifdef MMU_IRQ_STATUS
1746 #define MMU_IRQ_STATUS 0x200C
1749 #ifdef AS0_TRANSTAB_LO
1751 #define AS0_TRANSTAB_LO 0x2400
1754 #ifdef AS0_TRANSTAB_HI
1756 #define AS0_TRANSTAB_HI 0x2404
1759 #ifdef AS0_MEMATTR_LO
1761 #define AS0_MEMATTR_LO 0x2408
1764 #ifdef AS0_MEMATTR_HI
1766 #define AS0_MEMATTR_HI 0x240C
1769 #ifdef AS0_LOCKADDR_LO
1771 #define AS0_LOCKADDR_LO 0x2410
1774 #ifdef AS0_LOCKADDR_HI
1776 #define AS0_LOCKADDR_HI 0x2414
1781 #define AS0_COMMAND 0x2418
1784 #ifdef AS0_FAULTSTATUS
1786 #define AS0_FAULTSTATUS 0x241C
1789 #ifdef AS0_FAULTADDRESS_LO
1791 #define AS0_FAULTADDRESS_LO 0x2420
1794 #ifdef AS0_FAULTADDRESS_HI
1796 #define AS0_FAULTADDRESS_HI 0x2424
1801 #define AS0_STATUS 0x2428
1804 #ifdef AS1_TRANSTAB_LO
1806 #define AS1_TRANSTAB_LO 0x2440
1809 #ifdef AS1_TRANSTAB_HI
1811 #define AS1_TRANSTAB_HI 0x2444
1814 #ifdef AS1_MEMATTR_LO
1816 #define AS1_MEMATTR_LO 0x2448
1819 #ifdef AS1_MEMATTR_HI
1821 #define AS1_MEMATTR_HI 0x244C
1824 #ifdef AS1_LOCKADDR_LO
1826 #define AS1_LOCKADDR_LO 0x2450
1829 #ifdef AS1_LOCKADDR_HI
1831 #define AS1_LOCKADDR_HI 0x2454
1836 #define AS1_COMMAND 0x2458
1839 #ifdef AS1_FAULTSTATUS
1841 #define AS1_FAULTSTATUS 0x245C
1844 #ifdef AS1_FAULTADDRESS_LO
1846 #define AS1_FAULTADDRESS_LO 0x2460
1849 #ifdef AS1_FAULTADDRESS_HI
1851 #define AS1_FAULTADDRESS_HI 0x2464
1856 #define AS1_STATUS 0x2468
1859 #ifdef AS2_TRANSTAB_LO
1861 #define AS2_TRANSTAB_LO 0x2480
1864 #ifdef AS2_TRANSTAB_HI
1866 #define AS2_TRANSTAB_HI 0x2484
1869 #ifdef AS2_MEMATTR_LO
1871 #define AS2_MEMATTR_LO 0x2488
1874 #ifdef AS2_MEMATTR_HI
1876 #define AS2_MEMATTR_HI 0x248C
1879 #ifdef AS2_LOCKADDR_LO
1881 #define AS2_LOCKADDR_LO 0x2490
1884 #ifdef AS2_LOCKADDR_HI
1886 #define AS2_LOCKADDR_HI 0x2494
1891 #define AS2_COMMAND 0x2498
1894 #ifdef AS2_FAULTSTATUS
1896 #define AS2_FAULTSTATUS 0x249C
1899 #ifdef AS2_FAULTADDRESS_LO
1901 #define AS2_FAULTADDRESS_LO 0x24A0
1904 #ifdef AS2_FAULTADDRESS_HI
1906 #define AS2_FAULTADDRESS_HI 0x24A4
1911 #define AS2_STATUS 0x24A8
1914 #ifdef AS3_TRANSTAB_LO
1916 #define AS3_TRANSTAB_LO 0x24C0
1919 #ifdef AS3_TRANSTAB_HI
1921 #define AS3_TRANSTAB_HI 0x24C4
1924 #ifdef AS3_MEMATTR_LO
1926 #define AS3_MEMATTR_LO 0x24C8
1929 #ifdef AS3_MEMATTR_HI
1931 #define AS3_MEMATTR_HI 0x24CC
1934 #ifdef AS3_LOCKADDR_LO
1936 #define AS3_LOCKADDR_LO 0x24D0
1939 #ifdef AS3_LOCKADDR_HI
1941 #define AS3_LOCKADDR_HI 0x24D4
1946 #define AS3_COMMAND 0x24D8
1949 #ifdef AS3_FAULTSTATUS
1951 #define AS3_FAULTSTATUS 0x24DC
1954 #ifdef AS3_FAULTADDRESS_LO
1956 #define AS3_FAULTADDRESS_LO 0x24E0
1959 #ifdef AS3_FAULTADDRESS_HI
1961 #define AS3_FAULTADDRESS_HI 0x24E4
1966 #define AS3_STATUS 0x24E8
1969 #ifdef ILLEGAL_ADDRESS1
1971 #define ILLEGAL_ADDRESS1 0x3000
1974 #ifdef ILLEGAL_ADDRESS2
1976 #define ILLEGAL_ADDRESS2 0x3ffc