MALI: midgard: RK: add separate src dir of Midgard driver for RK Linux device
[firefly-linux-kernel-4.4.55.git] / drivers / gpu / arm / midgard_for_linux / mali_kbase_gator_hwcnt_names_tmix.h
1 /*
2  *
3  * (C) COPYRIGHT 2016 ARM Limited. All rights reserved.
4  *
5  * This program is free software and is provided to you under the terms of the
6  * GNU General Public License version 2 as published by the Free Software
7  * Foundation, and any use by you of this program is subject to the terms
8  * of such GNU licence.
9  *
10  * A copy of the licence is included with the program, and can also be obtained
11  * from Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor,
12  * Boston, MA  02110-1301, USA.
13  *
14  */
15
16
17
18 /*
19  * This header was autogenerated, it should not be edited.
20  */
21
22 #ifndef _KBASE_GATOR_HWCNT_NAMES_TMIX_H_
23 #define _KBASE_GATOR_HWCNT_NAMES_TMIX_H_
24
25 static const char * const hardware_counters_mali_tMIx[] = {
26         /* Performance counters for the Job Manager */
27         "",
28         "",
29         "",
30         "",
31         "TMIx_MESSAGES_SENT",
32         "TMIx_MESSAGES_RECEIVED",
33         "TMIx_GPU_ACTIVE",
34         "TMIx_IRQ_ACTIVE",
35         "TMIx_JS0_JOBS",
36         "TMIx_JS0_TASKS",
37         "TMIx_JS0_ACTIVE",
38         "",
39         "TMIx_JS0_WAIT_READ",
40         "TMIx_JS0_WAIT_ISSUE",
41         "TMIx_JS0_WAIT_DEPEND",
42         "TMIx_JS0_WAIT_FINISH",
43         "TMIx_JS1_JOBS",
44         "TMIx_JS1_TASKS",
45         "TMIx_JS1_ACTIVE",
46         "",
47         "TMIx_JS1_WAIT_READ",
48         "TMIx_JS1_WAIT_ISSUE",
49         "TMIx_JS1_WAIT_DEPEND",
50         "TMIx_JS1_WAIT_FINISH",
51         "TMIx_JS2_JOBS",
52         "TMIx_JS2_TASKS",
53         "TMIx_JS2_ACTIVE",
54         "",
55         "TMIx_JS2_WAIT_READ",
56         "TMIx_JS2_WAIT_ISSUE",
57         "TMIx_JS2_WAIT_DEPEND",
58         "TMIx_JS2_WAIT_FINISH",
59         "",
60         "",
61         "",
62         "",
63         "",
64         "",
65         "",
66         "",
67         "",
68         "",
69         "",
70         "",
71         "",
72         "",
73         "",
74         "",
75         "",
76         "",
77         "",
78         "",
79         "",
80         "",
81         "",
82         "",
83         "",
84         "",
85         "",
86         "",
87         "",
88         "",
89         "",
90         "",
91
92         /* Performance counters for the Tiler */
93         "",
94         "",
95         "",
96         "",
97         "TMIx_TILER_ACTIVE",
98         "TMIx_JOBS_PROCESSED",
99         "TMIx_TRIANGLES",
100         "TMIx_LINES",
101         "TMIx_POINTS",
102         "TMIx_FRONT_FACING",
103         "TMIx_BACK_FACING",
104         "TMIx_PRIM_VISIBLE",
105         "TMIx_PRIM_CULLED",
106         "TMIx_PRIM_CLIPPED",
107         "TMIx_PRIM_SAT_CULLED",
108         "",
109         "",
110         "TMIx_BUS_READ",
111         "",
112         "TMIx_BUS_WRITE",
113         "TMIx_LOADING_DESC",
114         "TMIx_IDVS_POS_SHAD_REQ",
115         "TMIx_IDVS_POS_SHAD_WAIT",
116         "TMIx_IDVS_POS_SHAD_STALL",
117         "TMIx_IDVS_POS_FIFO_FULL",
118         "TMIx_PREFETCH_STALL",
119         "TMIx_VCACHE_HIT",
120         "TMIx_VCACHE_MISS",
121         "TMIx_VCACHE_LINE_WAIT",
122         "TMIx_VFETCH_POS_READ_WAIT",
123         "TMIx_VFETCH_VERTEX_WAIT",
124         "TMIx_VFETCH_STALL",
125         "TMIx_PRIMASSY_STALL",
126         "TMIx_BBOX_GEN_STALL",
127         "TMIx_IDVS_VBU_HIT",
128         "TMIx_IDVS_VBU_MISS",
129         "TMIx_IDVS_VBU_LINE_DEALLOCATE",
130         "TMIx_IDVS_VAR_SHAD_REQ",
131         "TMIx_IDVS_VAR_SHAD_STALL",
132         "TMIx_BINNER_STALL",
133         "TMIx_ITER_STALL",
134         "TMIx_COMPRESS_MISS",
135         "TMIx_COMPRESS_STALL",
136         "TMIx_PCACHE_HIT",
137         "TMIx_PCACHE_MISS",
138         "TMIx_PCACHE_MISS_STALL",
139         "TMIx_PCACHE_EVICT_STALL",
140         "TMIx_PMGR_PTR_WR_STALL",
141         "TMIx_PMGR_PTR_RD_STALL",
142         "TMIx_PMGR_CMD_WR_STALL",
143         "TMIx_WRBUF_ACTIVE",
144         "TMIx_WRBUF_HIT",
145         "TMIx_WRBUF_MISS",
146         "TMIx_WRBUF_NO_FREE_LINE_STALL",
147         "TMIx_WRBUF_NO_AXI_ID_STALL",
148         "TMIx_WRBUF_AXI_STALL",
149         "",
150         "",
151         "",
152         "TMIx_UTLB_TRANS",
153         "TMIx_UTLB_TRANS_HIT",
154         "TMIx_UTLB_TRANS_STALL",
155         "TMIx_UTLB_TRANS_MISS_DELAY",
156         "TMIx_UTLB_MMU_REQ",
157
158         /* Performance counters for the Shader Core */
159         "",
160         "",
161         "",
162         "",
163         "TMIx_FRAG_ACTIVE",
164         "TMIx_FRAG_PRIMITIVES",
165         "TMIx_FRAG_PRIM_RAST",
166         "TMIx_FRAG_FPK_ACTIVE",
167         "TMIx_FRAG_STARVING",
168         "TMIx_FRAG_WARPS",
169         "TMIx_FRAG_PARTIAL_WARPS",
170         "TMIx_FRAG_QUADS_RAST",
171         "TMIx_FRAG_QUADS_EZS_TEST",
172         "TMIx_FRAG_QUADS_EZS_UPDATE",
173         "TMIx_FRAG_QUADS_EZS_KILL",
174         "TMIx_FRAG_LZS_TEST",
175         "TMIx_FRAG_LZS_KILL",
176         "",
177         "TMIx_FRAG_PTILES",
178         "TMIx_FRAG_TRANS_ELIM",
179         "TMIx_QUAD_FPK_KILLER",
180         "",
181         "TMIx_COMPUTE_ACTIVE",
182         "TMIx_COMPUTE_TASKS",
183         "TMIx_COMPUTE_WARPS",
184         "TMIx_COMPUTE_STARVING",
185         "TMIx_EXEC_CORE_ACTIVE",
186         "TMIx_EXEC_ACTIVE",
187         "TMIx_EXEC_INSTR_COUNT",
188         "TMIx_EXEC_INSTR_DIVERGED",
189         "TMIx_EXEC_INSTR_STARVING",
190         "TMIx_ARITH_INSTR_SINGLE_FMA",
191         "TMIx_ARITH_INSTR_DOUBLE",
192         "TMIx_ARITH_INSTR_MSG",
193         "TMIx_ARITH_INSTR_MSG_ONLY",
194         "TMIx_TEX_INSTR",
195         "TMIx_TEX_INSTR_MIPMAP",
196         "TMIx_TEX_INSTR_COMPRESSED",
197         "TMIx_TEX_INSTR_3D",
198         "TMIx_TEX_INSTR_TRILINEAR",
199         "TMIx_TEX_COORD_ISSUE",
200         "TMIx_TEX_COORD_STALL",
201         "TMIx_TEX_STARVE_CACHE",
202         "TMIx_TEX_STARVE_FILTER",
203         "TMIx_LS_MEM_READ_FULL",
204         "TMIx_LS_MEM_READ_SHORT",
205         "TMIx_LS_MEM_WRITE_FULL",
206         "TMIx_LS_MEM_WRITE_SHORT",
207         "TMIx_LS_MEM_ATOMIC",
208         "TMIx_VARY_INSTR",
209         "TMIx_VARY_SLOT_32",
210         "TMIx_VARY_SLOT_16",
211         "TMIx_ATTR_INSTR",
212         "TMIx_ARITH_INSTR_FP_MUL",
213         "TMIx_BEATS_RD_FTC",
214         "TMIx_BEATS_RD_FTC_EXT",
215         "TMIx_BEATS_RD_LSC",
216         "TMIx_BEATS_RD_LSC_EXT",
217         "TMIx_BEATS_RD_TEX",
218         "TMIx_BEATS_RD_TEX_EXT",
219         "TMIx_BEATS_RD_OTHER",
220         "TMIx_BEATS_WR_LSC",
221         "TMIx_BEATS_WR_TIB",
222         "",
223
224         /* Performance counters for the Memory System */
225         "",
226         "",
227         "",
228         "",
229         "TMIx_MMU_REQUESTS",
230         "",
231         "",
232         "",
233         "",
234         "",
235         "",
236         "",
237         "",
238         "",
239         "",
240         "",
241         "TMIx_L2_RD_MSG_IN",
242         "TMIx_L2_RD_MSG_IN_STALL",
243         "TMIx_L2_WR_MSG_IN",
244         "TMIx_L2_WR_MSG_IN_STALL",
245         "TMIx_L2_SNP_MSG_IN",
246         "TMIx_L2_SNP_MSG_IN_STALL",
247         "TMIx_L2_RD_MSG_OUT",
248         "TMIx_L2_RD_MSG_OUT_STALL",
249         "TMIx_L2_WR_MSG_OUT",
250         "TMIx_L2_ANY_LOOKUP",
251         "TMIx_L2_READ_LOOKUP",
252         "TMIx_L2_WRITE_LOOKUP",
253         "TMIx_L2_EXT_SNOOP_LOOKUP",
254         "TMIx_L2_EXT_READ",
255         "TMIx_L2_EXT_READ_NOSNP",
256         "TMIx_L2_EXT_READ_UNIQUE",
257         "TMIx_L2_EXT_READ_BEATS",
258         "TMIx_L2_EXT_AR_STALL",
259         "TMIx_L2_EXT_AR_CNT_Q1",
260         "TMIx_L2_EXT_AR_CNT_Q2",
261         "TMIx_L2_EXT_AR_CNT_Q3",
262         "TMIx_L2_EXT_RRESP_0_127",
263         "TMIx_L2_EXT_RRESP_128_191",
264         "TMIx_L2_EXT_RRESP_192_255",
265         "TMIx_L2_EXT_RRESP_256_319",
266         "TMIx_L2_EXT_RRESP_320_383",
267         "TMIx_L2_EXT_WRITE",
268         "TMIx_L2_EXT_WRITE_NOSNP_FULL",
269         "TMIx_L2_EXT_WRITE_NOSNP_PTL",
270         "TMIx_L2_EXT_WRITE_SNP_FULL",
271         "TMIx_L2_EXT_WRITE_SNP_PTL",
272         "TMIx_L2_EXT_WRITE_BEATS",
273         "TMIx_L2_EXT_W_STALL",
274         "TMIx_L2_EXT_AW_CNT_Q1",
275         "TMIx_L2_EXT_AW_CNT_Q2",
276         "TMIx_L2_EXT_AW_CNT_Q3",
277         "TMIx_L2_EXT_SNOOP",
278         "TMIx_L2_EXT_SNOOP_STALL",
279         "TMIx_L2_EXT_SNOOP_RESP_CLEAN",
280         "TMIx_L2_EXT_SNOOP_RESP_DATA",
281         "TMIx_L2_EXT_SNOOP_INTERNAL",
282         "",
283         "",
284         "",
285         "",
286         "",
287         "",
288         "",
289 };
290
291 #endif /* _KBASE_GATOR_HWCNT_NAMES_TMIX_H_ */