66c2dc76fdb3661d5879b5bddcf23d5d18c9deff
[firefly-linux-kernel-4.4.55.git] / drivers / gpu / arm / midgard_for_linux / mali_base_hwconfig_issues.h
1 /*
2  *
3  * (C) COPYRIGHT 2015 ARM Limited. All rights reserved.
4  *
5  * This program is free software and is provided to you under the terms of the
6  * GNU General Public License version 2 as published by the Free Software
7  * Foundation, and any use by you of this program is subject to the terms
8  * of such GNU licence.
9  *
10  * A copy of the licence is included with the program, and can also be obtained
11  * from Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor,
12  * Boston, MA  02110-1301, USA.
13  *
14  */
15
16
17
18 /* AUTOMATICALLY GENERATED FILE. If you want to amend the issues/features,
19  * please update base/tools/hwconfig_generator/hwc_{issues,features}.py
20  * For more information see base/tools/hwconfig_generator/README
21  */
22
23 #ifndef _BASE_HWCONFIG_ISSUES_H_
24 #define _BASE_HWCONFIG_ISSUES_H_
25
26 enum base_hw_issue {
27         BASE_HW_ISSUE_5736,
28         BASE_HW_ISSUE_6367,
29         BASE_HW_ISSUE_6398,
30         BASE_HW_ISSUE_6402,
31         BASE_HW_ISSUE_6787,
32         BASE_HW_ISSUE_7027,
33         BASE_HW_ISSUE_7144,
34         BASE_HW_ISSUE_7304,
35         BASE_HW_ISSUE_8073,
36         BASE_HW_ISSUE_8186,
37         BASE_HW_ISSUE_8215,
38         BASE_HW_ISSUE_8245,
39         BASE_HW_ISSUE_8250,
40         BASE_HW_ISSUE_8260,
41         BASE_HW_ISSUE_8280,
42         BASE_HW_ISSUE_8316,
43         BASE_HW_ISSUE_8381,
44         BASE_HW_ISSUE_8394,
45         BASE_HW_ISSUE_8401,
46         BASE_HW_ISSUE_8408,
47         BASE_HW_ISSUE_8443,
48         BASE_HW_ISSUE_8456,
49         BASE_HW_ISSUE_8564,
50         BASE_HW_ISSUE_8634,
51         BASE_HW_ISSUE_8778,
52         BASE_HW_ISSUE_8791,
53         BASE_HW_ISSUE_8833,
54         BASE_HW_ISSUE_8879,
55         BASE_HW_ISSUE_8896,
56         BASE_HW_ISSUE_8975,
57         BASE_HW_ISSUE_8986,
58         BASE_HW_ISSUE_8987,
59         BASE_HW_ISSUE_9010,
60         BASE_HW_ISSUE_9418,
61         BASE_HW_ISSUE_9423,
62         BASE_HW_ISSUE_9435,
63         BASE_HW_ISSUE_9510,
64         BASE_HW_ISSUE_9566,
65         BASE_HW_ISSUE_9630,
66         BASE_HW_ISSUE_10127,
67         BASE_HW_ISSUE_10327,
68         BASE_HW_ISSUE_10410,
69         BASE_HW_ISSUE_10471,
70         BASE_HW_ISSUE_10472,
71         BASE_HW_ISSUE_10487,
72         BASE_HW_ISSUE_10607,
73         BASE_HW_ISSUE_10632,
74         BASE_HW_ISSUE_10676,
75         BASE_HW_ISSUE_10682,
76         BASE_HW_ISSUE_10684,
77         BASE_HW_ISSUE_10797,
78         BASE_HW_ISSUE_10817,
79         BASE_HW_ISSUE_10821,
80         BASE_HW_ISSUE_10883,
81         BASE_HW_ISSUE_10931,
82         BASE_HW_ISSUE_10946,
83         BASE_HW_ISSUE_10959,
84         BASE_HW_ISSUE_10969,
85         BASE_HW_ISSUE_10984,
86         BASE_HW_ISSUE_10995,
87         BASE_HW_ISSUE_11012,
88         BASE_HW_ISSUE_11020,
89         BASE_HW_ISSUE_11024,
90         BASE_HW_ISSUE_11035,
91         BASE_HW_ISSUE_11042,
92         BASE_HW_ISSUE_11051,
93         BASE_HW_ISSUE_T76X_26,
94         BASE_HW_ISSUE_T76X_1909,
95         BASE_HW_ISSUE_T76X_1963,
96         BASE_HW_ISSUE_T76X_3086,
97         BASE_HW_ISSUE_T76X_3542,
98         BASE_HW_ISSUE_T76X_3556,
99         BASE_HW_ISSUE_T76X_3700,
100         BASE_HW_ISSUE_T76X_3793,
101         BASE_HW_ISSUE_T76X_3953,
102         BASE_HW_ISSUE_T76X_3960,
103         BASE_HW_ISSUE_T76X_3966,
104         GPUCORE_1619,
105         BASE_HW_ISSUE_END
106 };
107
108 static const enum base_hw_issue base_hw_issues_generic[] = {
109         BASE_HW_ISSUE_END
110 };
111
112 static const enum base_hw_issue base_hw_issues_t60x_r0p0_15dev0[] = {
113         BASE_HW_ISSUE_6367,
114         BASE_HW_ISSUE_6398,
115         BASE_HW_ISSUE_6402,
116         BASE_HW_ISSUE_6787,
117         BASE_HW_ISSUE_7027,
118         BASE_HW_ISSUE_7144,
119         BASE_HW_ISSUE_7304,
120         BASE_HW_ISSUE_8073,
121         BASE_HW_ISSUE_8186,
122         BASE_HW_ISSUE_8215,
123         BASE_HW_ISSUE_8245,
124         BASE_HW_ISSUE_8250,
125         BASE_HW_ISSUE_8260,
126         BASE_HW_ISSUE_8280,
127         BASE_HW_ISSUE_8316,
128         BASE_HW_ISSUE_8381,
129         BASE_HW_ISSUE_8394,
130         BASE_HW_ISSUE_8401,
131         BASE_HW_ISSUE_8408,
132         BASE_HW_ISSUE_8443,
133         BASE_HW_ISSUE_8456,
134         BASE_HW_ISSUE_8564,
135         BASE_HW_ISSUE_8634,
136         BASE_HW_ISSUE_8778,
137         BASE_HW_ISSUE_8791,
138         BASE_HW_ISSUE_8833,
139         BASE_HW_ISSUE_8896,
140         BASE_HW_ISSUE_8975,
141         BASE_HW_ISSUE_8986,
142         BASE_HW_ISSUE_8987,
143         BASE_HW_ISSUE_9010,
144         BASE_HW_ISSUE_9418,
145         BASE_HW_ISSUE_9423,
146         BASE_HW_ISSUE_9435,
147         BASE_HW_ISSUE_9510,
148         BASE_HW_ISSUE_9566,
149         BASE_HW_ISSUE_9630,
150         BASE_HW_ISSUE_10410,
151         BASE_HW_ISSUE_10471,
152         BASE_HW_ISSUE_10472,
153         BASE_HW_ISSUE_10487,
154         BASE_HW_ISSUE_10607,
155         BASE_HW_ISSUE_10632,
156         BASE_HW_ISSUE_10676,
157         BASE_HW_ISSUE_10682,
158         BASE_HW_ISSUE_10684,
159         BASE_HW_ISSUE_10883,
160         BASE_HW_ISSUE_10931,
161         BASE_HW_ISSUE_10946,
162         BASE_HW_ISSUE_10969,
163         BASE_HW_ISSUE_10984,
164         BASE_HW_ISSUE_10995,
165         BASE_HW_ISSUE_11012,
166         BASE_HW_ISSUE_11020,
167         BASE_HW_ISSUE_11035,
168         BASE_HW_ISSUE_11051,
169         BASE_HW_ISSUE_T76X_1909,
170         GPUCORE_1619,
171         BASE_HW_ISSUE_END
172 };
173
174 static const enum base_hw_issue base_hw_issues_t60x_r0p0_eac[] = {
175         BASE_HW_ISSUE_6367,
176         BASE_HW_ISSUE_6402,
177         BASE_HW_ISSUE_6787,
178         BASE_HW_ISSUE_7027,
179         BASE_HW_ISSUE_7304,
180         BASE_HW_ISSUE_8408,
181         BASE_HW_ISSUE_8564,
182         BASE_HW_ISSUE_8778,
183         BASE_HW_ISSUE_8975,
184         BASE_HW_ISSUE_9010,
185         BASE_HW_ISSUE_9418,
186         BASE_HW_ISSUE_9423,
187         BASE_HW_ISSUE_9435,
188         BASE_HW_ISSUE_9510,
189         BASE_HW_ISSUE_10410,
190         BASE_HW_ISSUE_10471,
191         BASE_HW_ISSUE_10472,
192         BASE_HW_ISSUE_10487,
193         BASE_HW_ISSUE_10607,
194         BASE_HW_ISSUE_10632,
195         BASE_HW_ISSUE_10676,
196         BASE_HW_ISSUE_10682,
197         BASE_HW_ISSUE_10684,
198         BASE_HW_ISSUE_10883,
199         BASE_HW_ISSUE_10931,
200         BASE_HW_ISSUE_10946,
201         BASE_HW_ISSUE_10969,
202         BASE_HW_ISSUE_11012,
203         BASE_HW_ISSUE_11020,
204         BASE_HW_ISSUE_11035,
205         BASE_HW_ISSUE_11051,
206         BASE_HW_ISSUE_T76X_1909,
207         BASE_HW_ISSUE_END
208 };
209
210 static const enum base_hw_issue base_hw_issues_t60x_r0p1[] = {
211         BASE_HW_ISSUE_6367,
212         BASE_HW_ISSUE_6402,
213         BASE_HW_ISSUE_6787,
214         BASE_HW_ISSUE_7027,
215         BASE_HW_ISSUE_7304,
216         BASE_HW_ISSUE_8408,
217         BASE_HW_ISSUE_8564,
218         BASE_HW_ISSUE_8778,
219         BASE_HW_ISSUE_8975,
220         BASE_HW_ISSUE_9010,
221         BASE_HW_ISSUE_9435,
222         BASE_HW_ISSUE_9510,
223         BASE_HW_ISSUE_10410,
224         BASE_HW_ISSUE_10471,
225         BASE_HW_ISSUE_10472,
226         BASE_HW_ISSUE_10487,
227         BASE_HW_ISSUE_10607,
228         BASE_HW_ISSUE_10632,
229         BASE_HW_ISSUE_10676,
230         BASE_HW_ISSUE_10682,
231         BASE_HW_ISSUE_10684,
232         BASE_HW_ISSUE_10883,
233         BASE_HW_ISSUE_10931,
234         BASE_HW_ISSUE_10946,
235         BASE_HW_ISSUE_11012,
236         BASE_HW_ISSUE_11020,
237         BASE_HW_ISSUE_11035,
238         BASE_HW_ISSUE_11051,
239         BASE_HW_ISSUE_T76X_1909,
240         BASE_HW_ISSUE_T76X_1963,
241         BASE_HW_ISSUE_END
242 };
243
244 static const enum base_hw_issue base_hw_issues_t62x_r0p1[] = {
245         BASE_HW_ISSUE_6402,
246         BASE_HW_ISSUE_9435,
247         BASE_HW_ISSUE_10127,
248         BASE_HW_ISSUE_10327,
249         BASE_HW_ISSUE_10410,
250         BASE_HW_ISSUE_10471,
251         BASE_HW_ISSUE_10472,
252         BASE_HW_ISSUE_10487,
253         BASE_HW_ISSUE_10607,
254         BASE_HW_ISSUE_10632,
255         BASE_HW_ISSUE_10676,
256         BASE_HW_ISSUE_10682,
257         BASE_HW_ISSUE_10684,
258         BASE_HW_ISSUE_10817,
259         BASE_HW_ISSUE_10821,
260         BASE_HW_ISSUE_10883,
261         BASE_HW_ISSUE_10931,
262         BASE_HW_ISSUE_10946,
263         BASE_HW_ISSUE_10959,
264         BASE_HW_ISSUE_11012,
265         BASE_HW_ISSUE_11020,
266         BASE_HW_ISSUE_11024,
267         BASE_HW_ISSUE_11035,
268         BASE_HW_ISSUE_11042,
269         BASE_HW_ISSUE_11051,
270         BASE_HW_ISSUE_T76X_1909,
271         BASE_HW_ISSUE_T76X_1963,
272         BASE_HW_ISSUE_END
273 };
274
275 static const enum base_hw_issue base_hw_issues_t62x_r1p0[] = {
276         BASE_HW_ISSUE_6402,
277         BASE_HW_ISSUE_9435,
278         BASE_HW_ISSUE_10471,
279         BASE_HW_ISSUE_10472,
280         BASE_HW_ISSUE_10684,
281         BASE_HW_ISSUE_10821,
282         BASE_HW_ISSUE_10883,
283         BASE_HW_ISSUE_10931,
284         BASE_HW_ISSUE_10946,
285         BASE_HW_ISSUE_10959,
286         BASE_HW_ISSUE_11012,
287         BASE_HW_ISSUE_11020,
288         BASE_HW_ISSUE_11024,
289         BASE_HW_ISSUE_11042,
290         BASE_HW_ISSUE_11051,
291         BASE_HW_ISSUE_T76X_1909,
292         BASE_HW_ISSUE_T76X_1963,
293         BASE_HW_ISSUE_END
294 };
295
296 static const enum base_hw_issue base_hw_issues_t62x_r1p1[] = {
297         BASE_HW_ISSUE_6402,
298         BASE_HW_ISSUE_9435,
299         BASE_HW_ISSUE_10471,
300         BASE_HW_ISSUE_10472,
301         BASE_HW_ISSUE_10684,
302         BASE_HW_ISSUE_10821,
303         BASE_HW_ISSUE_10883,
304         BASE_HW_ISSUE_10931,
305         BASE_HW_ISSUE_10946,
306         BASE_HW_ISSUE_10959,
307         BASE_HW_ISSUE_11012,
308         BASE_HW_ISSUE_11042,
309         BASE_HW_ISSUE_11051,
310         BASE_HW_ISSUE_T76X_1909,
311         BASE_HW_ISSUE_T76X_1963,
312         BASE_HW_ISSUE_END
313 };
314
315 static const enum base_hw_issue base_hw_issues_t76x_r0p0[] = {
316         BASE_HW_ISSUE_9435,
317         BASE_HW_ISSUE_10821,
318         BASE_HW_ISSUE_10883,
319         BASE_HW_ISSUE_10946,
320         BASE_HW_ISSUE_11020,
321         BASE_HW_ISSUE_11024,
322         BASE_HW_ISSUE_11042,
323         BASE_HW_ISSUE_11051,
324         BASE_HW_ISSUE_T76X_26,
325         BASE_HW_ISSUE_T76X_1909,
326         BASE_HW_ISSUE_T76X_1963,
327         BASE_HW_ISSUE_T76X_3086,
328         BASE_HW_ISSUE_T76X_3542,
329         BASE_HW_ISSUE_T76X_3556,
330         BASE_HW_ISSUE_T76X_3700,
331         BASE_HW_ISSUE_T76X_3793,
332         BASE_HW_ISSUE_T76X_3953,
333         BASE_HW_ISSUE_T76X_3960,
334         BASE_HW_ISSUE_T76X_3966,
335         BASE_HW_ISSUE_END
336 };
337
338 static const enum base_hw_issue base_hw_issues_t76x_r0p1[] = {
339         BASE_HW_ISSUE_9435,
340         BASE_HW_ISSUE_10821,
341         BASE_HW_ISSUE_10883,
342         BASE_HW_ISSUE_10946,
343         BASE_HW_ISSUE_11020,
344         BASE_HW_ISSUE_11024,
345         BASE_HW_ISSUE_11042,
346         BASE_HW_ISSUE_11051,
347         BASE_HW_ISSUE_T76X_26,
348         BASE_HW_ISSUE_T76X_1909,
349         BASE_HW_ISSUE_T76X_1963,
350         BASE_HW_ISSUE_T76X_3086,
351         BASE_HW_ISSUE_T76X_3542,
352         BASE_HW_ISSUE_T76X_3556,
353         BASE_HW_ISSUE_T76X_3700,
354         BASE_HW_ISSUE_T76X_3793,
355         BASE_HW_ISSUE_T76X_3953,
356         BASE_HW_ISSUE_T76X_3960,
357         BASE_HW_ISSUE_T76X_3966,
358         BASE_HW_ISSUE_END
359 };
360
361 static const enum base_hw_issue base_hw_issues_t76x_r0p1_50rel0[] = {
362         BASE_HW_ISSUE_9435,
363         BASE_HW_ISSUE_10821,
364         BASE_HW_ISSUE_10883,
365         BASE_HW_ISSUE_10946,
366         BASE_HW_ISSUE_11042,
367         BASE_HW_ISSUE_11051,
368         BASE_HW_ISSUE_T76X_26,
369         BASE_HW_ISSUE_T76X_1909,
370         BASE_HW_ISSUE_T76X_1963,
371         BASE_HW_ISSUE_T76X_3086,
372         BASE_HW_ISSUE_T76X_3542,
373         BASE_HW_ISSUE_T76X_3556,
374         BASE_HW_ISSUE_T76X_3700,
375         BASE_HW_ISSUE_T76X_3793,
376         BASE_HW_ISSUE_T76X_3953,
377         BASE_HW_ISSUE_T76X_3960,
378         BASE_HW_ISSUE_T76X_3966,
379         BASE_HW_ISSUE_END
380 };
381
382 static const enum base_hw_issue base_hw_issues_t76x_r0p2[] = {
383         BASE_HW_ISSUE_9435,
384         BASE_HW_ISSUE_10821,
385         BASE_HW_ISSUE_10883,
386         BASE_HW_ISSUE_10946,
387         BASE_HW_ISSUE_11020,
388         BASE_HW_ISSUE_11024,
389         BASE_HW_ISSUE_11042,
390         BASE_HW_ISSUE_11051,
391         BASE_HW_ISSUE_T76X_26,
392         BASE_HW_ISSUE_T76X_1909,
393         BASE_HW_ISSUE_T76X_1963,
394         BASE_HW_ISSUE_T76X_3086,
395         BASE_HW_ISSUE_T76X_3542,
396         BASE_HW_ISSUE_T76X_3556,
397         BASE_HW_ISSUE_T76X_3700,
398         BASE_HW_ISSUE_T76X_3793,
399         BASE_HW_ISSUE_T76X_3953,
400         BASE_HW_ISSUE_T76X_3960,
401         BASE_HW_ISSUE_T76X_3966,
402         BASE_HW_ISSUE_END
403 };
404
405 static const enum base_hw_issue base_hw_issues_t76x_r0p3[] = {
406         BASE_HW_ISSUE_9435,
407         BASE_HW_ISSUE_10821,
408         BASE_HW_ISSUE_10883,
409         BASE_HW_ISSUE_10946,
410         BASE_HW_ISSUE_11042,
411         BASE_HW_ISSUE_11051,
412         BASE_HW_ISSUE_T76X_26,
413         BASE_HW_ISSUE_T76X_1909,
414         BASE_HW_ISSUE_T76X_1963,
415         BASE_HW_ISSUE_T76X_3086,
416         BASE_HW_ISSUE_T76X_3542,
417         BASE_HW_ISSUE_T76X_3556,
418         BASE_HW_ISSUE_T76X_3700,
419         BASE_HW_ISSUE_T76X_3793,
420         BASE_HW_ISSUE_T76X_3953,
421         BASE_HW_ISSUE_T76X_3960,
422         BASE_HW_ISSUE_T76X_3966,
423         BASE_HW_ISSUE_END
424 };
425
426 static const enum base_hw_issue base_hw_issues_t76x_r1p0[] = {
427         BASE_HW_ISSUE_9435,
428         BASE_HW_ISSUE_10821,
429         BASE_HW_ISSUE_10883,
430         BASE_HW_ISSUE_10946,
431         BASE_HW_ISSUE_11042,
432         BASE_HW_ISSUE_11051,
433         BASE_HW_ISSUE_T76X_1909,
434         BASE_HW_ISSUE_T76X_1963,
435         BASE_HW_ISSUE_T76X_3086,
436         BASE_HW_ISSUE_T76X_3700,
437         BASE_HW_ISSUE_T76X_3793,
438         BASE_HW_ISSUE_T76X_3953,
439         BASE_HW_ISSUE_T76X_3960,
440         BASE_HW_ISSUE_T76X_3966,
441         BASE_HW_ISSUE_END
442 };
443
444 static const enum base_hw_issue base_hw_issues_t72x_r0p0[] = {
445         BASE_HW_ISSUE_6402,
446         BASE_HW_ISSUE_9435,
447         BASE_HW_ISSUE_10471,
448         BASE_HW_ISSUE_10684,
449         BASE_HW_ISSUE_10797,
450         BASE_HW_ISSUE_10821,
451         BASE_HW_ISSUE_10883,
452         BASE_HW_ISSUE_10946,
453         BASE_HW_ISSUE_11042,
454         BASE_HW_ISSUE_11051,
455         BASE_HW_ISSUE_T76X_1909,
456         BASE_HW_ISSUE_T76X_1963,
457         BASE_HW_ISSUE_END
458 };
459
460 static const enum base_hw_issue base_hw_issues_t72x_r1p0[] = {
461         BASE_HW_ISSUE_6402,
462         BASE_HW_ISSUE_9435,
463         BASE_HW_ISSUE_10471,
464         BASE_HW_ISSUE_10684,
465         BASE_HW_ISSUE_10797,
466         BASE_HW_ISSUE_10821,
467         BASE_HW_ISSUE_10883,
468         BASE_HW_ISSUE_10946,
469         BASE_HW_ISSUE_11042,
470         BASE_HW_ISSUE_11051,
471         BASE_HW_ISSUE_T76X_1909,
472         BASE_HW_ISSUE_T76X_1963,
473         BASE_HW_ISSUE_END
474 };
475
476 static const enum base_hw_issue base_hw_issues_t72x_r1p1[] = {
477         BASE_HW_ISSUE_6402,
478         BASE_HW_ISSUE_9435,
479         BASE_HW_ISSUE_10471,
480         BASE_HW_ISSUE_10684,
481         BASE_HW_ISSUE_10797,
482         BASE_HW_ISSUE_10821,
483         BASE_HW_ISSUE_10883,
484         BASE_HW_ISSUE_10946,
485         BASE_HW_ISSUE_11042,
486         BASE_HW_ISSUE_11051,
487         BASE_HW_ISSUE_T76X_1909,
488         BASE_HW_ISSUE_T76X_1963,
489         BASE_HW_ISSUE_END
490 };
491
492 static const enum base_hw_issue base_hw_issues_model_t72x[] = {
493         BASE_HW_ISSUE_5736,
494         BASE_HW_ISSUE_6402,
495         BASE_HW_ISSUE_9435,
496         BASE_HW_ISSUE_10471,
497         BASE_HW_ISSUE_10797,
498         BASE_HW_ISSUE_11042,
499         BASE_HW_ISSUE_11051,
500         BASE_HW_ISSUE_T76X_1909,
501         BASE_HW_ISSUE_T76X_1963,
502         GPUCORE_1619,
503         BASE_HW_ISSUE_END
504 };
505
506 static const enum base_hw_issue base_hw_issues_model_t76x[] = {
507         BASE_HW_ISSUE_5736,
508         BASE_HW_ISSUE_9435,
509         BASE_HW_ISSUE_11020,
510         BASE_HW_ISSUE_11024,
511         BASE_HW_ISSUE_11042,
512         BASE_HW_ISSUE_11051,
513         BASE_HW_ISSUE_T76X_1909,
514         BASE_HW_ISSUE_T76X_1963,
515         BASE_HW_ISSUE_T76X_3086,
516         BASE_HW_ISSUE_T76X_3700,
517         BASE_HW_ISSUE_T76X_3793,
518         GPUCORE_1619,
519         BASE_HW_ISSUE_END
520 };
521
522 static const enum base_hw_issue base_hw_issues_model_t60x[] = {
523         BASE_HW_ISSUE_5736,
524         BASE_HW_ISSUE_6402,
525         BASE_HW_ISSUE_8778,
526         BASE_HW_ISSUE_9435,
527         BASE_HW_ISSUE_10472,
528         BASE_HW_ISSUE_10931,
529         BASE_HW_ISSUE_11012,
530         BASE_HW_ISSUE_11020,
531         BASE_HW_ISSUE_11024,
532         BASE_HW_ISSUE_11051,
533         BASE_HW_ISSUE_T76X_1909,
534         BASE_HW_ISSUE_T76X_1963,
535         GPUCORE_1619,
536         BASE_HW_ISSUE_END
537 };
538
539 static const enum base_hw_issue base_hw_issues_model_t62x[] = {
540         BASE_HW_ISSUE_5736,
541         BASE_HW_ISSUE_6402,
542         BASE_HW_ISSUE_9435,
543         BASE_HW_ISSUE_10472,
544         BASE_HW_ISSUE_10931,
545         BASE_HW_ISSUE_11012,
546         BASE_HW_ISSUE_11020,
547         BASE_HW_ISSUE_11024,
548         BASE_HW_ISSUE_11042,
549         BASE_HW_ISSUE_11051,
550         BASE_HW_ISSUE_T76X_1909,
551         BASE_HW_ISSUE_T76X_1963,
552         GPUCORE_1619,
553         BASE_HW_ISSUE_END
554 };
555
556 static const enum base_hw_issue base_hw_issues_tFRx_r0p1[] = {
557         BASE_HW_ISSUE_9435,
558         BASE_HW_ISSUE_10821,
559         BASE_HW_ISSUE_10883,
560         BASE_HW_ISSUE_10946,
561         BASE_HW_ISSUE_11051,
562         BASE_HW_ISSUE_T76X_1909,
563         BASE_HW_ISSUE_T76X_1963,
564         BASE_HW_ISSUE_T76X_3086,
565         BASE_HW_ISSUE_T76X_3700,
566         BASE_HW_ISSUE_T76X_3793,
567         BASE_HW_ISSUE_T76X_3953,
568         BASE_HW_ISSUE_T76X_3960,
569         BASE_HW_ISSUE_T76X_3966,
570         BASE_HW_ISSUE_END
571 };
572
573 static const enum base_hw_issue base_hw_issues_tFRx_r0p2[] = {
574         BASE_HW_ISSUE_9435,
575         BASE_HW_ISSUE_10821,
576         BASE_HW_ISSUE_10883,
577         BASE_HW_ISSUE_10946,
578         BASE_HW_ISSUE_11051,
579         BASE_HW_ISSUE_T76X_1909,
580         BASE_HW_ISSUE_T76X_1963,
581         BASE_HW_ISSUE_T76X_3086,
582         BASE_HW_ISSUE_T76X_3700,
583         BASE_HW_ISSUE_T76X_3793,
584         BASE_HW_ISSUE_T76X_3953,
585         BASE_HW_ISSUE_T76X_3966,
586         BASE_HW_ISSUE_END
587 };
588
589 static const enum base_hw_issue base_hw_issues_tFRx_r1p0[] = {
590         BASE_HW_ISSUE_9435,
591         BASE_HW_ISSUE_10821,
592         BASE_HW_ISSUE_10883,
593         BASE_HW_ISSUE_10946,
594         BASE_HW_ISSUE_11051,
595         BASE_HW_ISSUE_T76X_1963,
596         BASE_HW_ISSUE_T76X_3086,
597         BASE_HW_ISSUE_T76X_3700,
598         BASE_HW_ISSUE_T76X_3793,
599         BASE_HW_ISSUE_T76X_3953,
600         BASE_HW_ISSUE_T76X_3966,
601         BASE_HW_ISSUE_END
602 };
603
604 static const enum base_hw_issue base_hw_issues_tFRx_r2p0[] = {
605         BASE_HW_ISSUE_9435,
606         BASE_HW_ISSUE_10821,
607         BASE_HW_ISSUE_10883,
608         BASE_HW_ISSUE_10946,
609         BASE_HW_ISSUE_11051,
610         BASE_HW_ISSUE_T76X_1963,
611         BASE_HW_ISSUE_T76X_3086,
612         BASE_HW_ISSUE_T76X_3700,
613         BASE_HW_ISSUE_T76X_3793,
614         BASE_HW_ISSUE_T76X_3953,
615         BASE_HW_ISSUE_T76X_3966,
616         BASE_HW_ISSUE_END
617 };
618
619 static const enum base_hw_issue base_hw_issues_model_tFRx[] = {
620         BASE_HW_ISSUE_5736,
621         BASE_HW_ISSUE_9435,
622         BASE_HW_ISSUE_11051,
623         BASE_HW_ISSUE_T76X_1963,
624         BASE_HW_ISSUE_T76X_3086,
625         BASE_HW_ISSUE_T76X_3700,
626         BASE_HW_ISSUE_T76X_3793,
627         GPUCORE_1619,
628         BASE_HW_ISSUE_END
629 };
630
631 static const enum base_hw_issue base_hw_issues_t86x_r0p2[] = {
632         BASE_HW_ISSUE_9435,
633         BASE_HW_ISSUE_10821,
634         BASE_HW_ISSUE_10883,
635         BASE_HW_ISSUE_10946,
636         BASE_HW_ISSUE_11051,
637         BASE_HW_ISSUE_T76X_1909,
638         BASE_HW_ISSUE_T76X_1963,
639         BASE_HW_ISSUE_T76X_3086,
640         BASE_HW_ISSUE_T76X_3700,
641         BASE_HW_ISSUE_T76X_3793,
642         BASE_HW_ISSUE_T76X_3953,
643         BASE_HW_ISSUE_T76X_3966,
644         BASE_HW_ISSUE_END
645 };
646
647 static const enum base_hw_issue base_hw_issues_t86x_r1p0[] = {
648         BASE_HW_ISSUE_9435,
649         BASE_HW_ISSUE_10821,
650         BASE_HW_ISSUE_10883,
651         BASE_HW_ISSUE_10946,
652         BASE_HW_ISSUE_11051,
653         BASE_HW_ISSUE_T76X_1963,
654         BASE_HW_ISSUE_T76X_3086,
655         BASE_HW_ISSUE_T76X_3700,
656         BASE_HW_ISSUE_T76X_3793,
657         BASE_HW_ISSUE_T76X_3953,
658         BASE_HW_ISSUE_T76X_3966,
659         BASE_HW_ISSUE_END
660 };
661
662 static const enum base_hw_issue base_hw_issues_t86x_r2p0[] = {
663         BASE_HW_ISSUE_9435,
664         BASE_HW_ISSUE_10821,
665         BASE_HW_ISSUE_10883,
666         BASE_HW_ISSUE_10946,
667         BASE_HW_ISSUE_11051,
668         BASE_HW_ISSUE_T76X_1963,
669         BASE_HW_ISSUE_T76X_3086,
670         BASE_HW_ISSUE_T76X_3700,
671         BASE_HW_ISSUE_T76X_3793,
672         BASE_HW_ISSUE_T76X_3953,
673         BASE_HW_ISSUE_T76X_3966,
674         BASE_HW_ISSUE_END
675 };
676
677 static const enum base_hw_issue base_hw_issues_model_t86x[] = {
678         BASE_HW_ISSUE_5736,
679         BASE_HW_ISSUE_9435,
680         BASE_HW_ISSUE_11051,
681         BASE_HW_ISSUE_T76X_1963,
682         BASE_HW_ISSUE_T76X_3086,
683         BASE_HW_ISSUE_T76X_3700,
684         BASE_HW_ISSUE_T76X_3793,
685         GPUCORE_1619,
686         BASE_HW_ISSUE_END
687 };
688
689 static const enum base_hw_issue base_hw_issues_t83x_r0p1[] = {
690         BASE_HW_ISSUE_9435,
691         BASE_HW_ISSUE_10821,
692         BASE_HW_ISSUE_10883,
693         BASE_HW_ISSUE_10946,
694         BASE_HW_ISSUE_11051,
695         BASE_HW_ISSUE_T76X_1909,
696         BASE_HW_ISSUE_T76X_1963,
697         BASE_HW_ISSUE_T76X_3086,
698         BASE_HW_ISSUE_T76X_3700,
699         BASE_HW_ISSUE_T76X_3793,
700         BASE_HW_ISSUE_T76X_3953,
701         BASE_HW_ISSUE_T76X_3960,
702         BASE_HW_ISSUE_END
703 };
704
705 static const enum base_hw_issue base_hw_issues_t83x_r1p0[] = {
706         BASE_HW_ISSUE_9435,
707         BASE_HW_ISSUE_10821,
708         BASE_HW_ISSUE_10883,
709         BASE_HW_ISSUE_10946,
710         BASE_HW_ISSUE_11051,
711         BASE_HW_ISSUE_T76X_1963,
712         BASE_HW_ISSUE_T76X_3086,
713         BASE_HW_ISSUE_T76X_3700,
714         BASE_HW_ISSUE_T76X_3793,
715         BASE_HW_ISSUE_T76X_3953,
716         BASE_HW_ISSUE_T76X_3960,
717         BASE_HW_ISSUE_END
718 };
719
720 static const enum base_hw_issue base_hw_issues_model_t83x[] = {
721         BASE_HW_ISSUE_5736,
722         BASE_HW_ISSUE_9435,
723         BASE_HW_ISSUE_11051,
724         BASE_HW_ISSUE_T76X_1909,
725         BASE_HW_ISSUE_T76X_1963,
726         BASE_HW_ISSUE_T76X_3086,
727         BASE_HW_ISSUE_T76X_3700,
728         BASE_HW_ISSUE_T76X_3793,
729         GPUCORE_1619,
730         BASE_HW_ISSUE_END
731 };
732
733 static const enum base_hw_issue base_hw_issues_t82x_r0p0[] = {
734         BASE_HW_ISSUE_9435,
735         BASE_HW_ISSUE_10821,
736         BASE_HW_ISSUE_10883,
737         BASE_HW_ISSUE_10946,
738         BASE_HW_ISSUE_11051,
739         BASE_HW_ISSUE_T76X_1909,
740         BASE_HW_ISSUE_T76X_1963,
741         BASE_HW_ISSUE_T76X_3086,
742         BASE_HW_ISSUE_T76X_3700,
743         BASE_HW_ISSUE_T76X_3793,
744         BASE_HW_ISSUE_T76X_3953,
745         BASE_HW_ISSUE_T76X_3960,
746         BASE_HW_ISSUE_END
747 };
748
749 static const enum base_hw_issue base_hw_issues_t82x_r0p1[] = {
750         BASE_HW_ISSUE_9435,
751         BASE_HW_ISSUE_10821,
752         BASE_HW_ISSUE_10883,
753         BASE_HW_ISSUE_10946,
754         BASE_HW_ISSUE_11051,
755         BASE_HW_ISSUE_T76X_1909,
756         BASE_HW_ISSUE_T76X_1963,
757         BASE_HW_ISSUE_T76X_3086,
758         BASE_HW_ISSUE_T76X_3700,
759         BASE_HW_ISSUE_T76X_3793,
760         BASE_HW_ISSUE_T76X_3953,
761         BASE_HW_ISSUE_T76X_3960,
762         BASE_HW_ISSUE_END
763 };
764
765 static const enum base_hw_issue base_hw_issues_t82x_r1p0[] = {
766         BASE_HW_ISSUE_9435,
767         BASE_HW_ISSUE_10821,
768         BASE_HW_ISSUE_10883,
769         BASE_HW_ISSUE_10946,
770         BASE_HW_ISSUE_11051,
771         BASE_HW_ISSUE_T76X_1963,
772         BASE_HW_ISSUE_T76X_3086,
773         BASE_HW_ISSUE_T76X_3700,
774         BASE_HW_ISSUE_T76X_3793,
775         BASE_HW_ISSUE_T76X_3953,
776         BASE_HW_ISSUE_T76X_3960,
777         BASE_HW_ISSUE_END
778 };
779
780 static const enum base_hw_issue base_hw_issues_model_t82x[] = {
781         BASE_HW_ISSUE_5736,
782         BASE_HW_ISSUE_9435,
783         BASE_HW_ISSUE_11051,
784         BASE_HW_ISSUE_T76X_1909,
785         BASE_HW_ISSUE_T76X_1963,
786         BASE_HW_ISSUE_T76X_3086,
787         BASE_HW_ISSUE_T76X_3700,
788         BASE_HW_ISSUE_T76X_3793,
789         GPUCORE_1619,
790         BASE_HW_ISSUE_END
791 };
792
793
794
795 #endif /* _BASE_HWCONFIG_ISSUES_H_ */