3 * (C) COPYRIGHT 2014-2015 ARM Limited. All rights reserved.
5 * This program is free software and is provided to you under the terms of the
6 * GNU General Public License version 2 as published by the Free Software
7 * Foundation, and any use by you of this program is subject to the terms
10 * A copy of the licence is included with the program, and can also be obtained
11 * from Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor,
12 * Boston, MA 02110-1301, USA.
18 #include <mali_kbase.h>
19 #include <mali_kbase_hwaccess_time.h>
20 #include <backend/gpu/mali_kbase_device_internal.h>
21 #include <backend/gpu/mali_kbase_pm_internal.h>
23 void kbase_backend_get_gpu_time(struct kbase_device *kbdev, u64 *cycle_counter,
24 u64 *system_time, struct timespec *ts)
28 kbase_pm_request_gpu_cycle_counter(kbdev);
30 /* Read hi, lo, hi to ensure that overflow from lo to hi is handled
33 hi1 = kbase_reg_read(kbdev, GPU_CONTROL_REG(CYCLE_COUNT_HI),
35 *cycle_counter = kbase_reg_read(kbdev,
36 GPU_CONTROL_REG(CYCLE_COUNT_LO), NULL);
37 hi2 = kbase_reg_read(kbdev, GPU_CONTROL_REG(CYCLE_COUNT_HI),
39 *cycle_counter |= (((u64) hi1) << 32);
42 /* Read hi, lo, hi to ensure that overflow from lo to hi is handled
45 hi1 = kbase_reg_read(kbdev, GPU_CONTROL_REG(TIMESTAMP_HI),
47 *system_time = kbase_reg_read(kbdev,
48 GPU_CONTROL_REG(TIMESTAMP_LO), NULL);
49 hi2 = kbase_reg_read(kbdev, GPU_CONTROL_REG(TIMESTAMP_HI),
51 *system_time |= (((u64) hi1) << 32);
54 /* Record the CPU's idea of current time */
57 kbase_pm_release_gpu_cycle_counter(kbdev);
61 * kbase_wait_write_flush - Wait for GPU write flush
62 * @kctx: Context pointer
64 * Wait 1000 GPU clock cycles. This delay is known to give the GPU time to flush
67 * Only in use for BASE_HW_ISSUE_6367
69 * Note : If GPU resets occur then the counters are reset to zero, the delay may
72 #ifndef CONFIG_MALI_NO_MALI
73 void kbase_wait_write_flush(struct kbase_context *kctx)
77 /* A suspend won't happen here, because we're in a syscall from a
80 kbase_pm_context_active(kctx->kbdev);
81 kbase_pm_request_gpu_cycle_counter(kctx->kbdev);
86 new_count = kbase_reg_read(kctx->kbdev,
87 GPU_CONTROL_REG(CYCLE_COUNT_LO), NULL);
88 /* First time around, just store the count. */
89 if (base_count == 0) {
90 base_count = new_count;
94 /* No need to handle wrapping, unsigned maths works for this. */
95 if ((new_count - base_count) > 1000)
99 kbase_pm_release_gpu_cycle_counter(kctx->kbdev);
100 kbase_pm_context_idle(kctx->kbdev);
102 #endif /* CONFIG_MALI_NO_MALI */