MALI: rockchip: upgrade midgard DDK to r13p0-00rel0
[firefly-linux-kernel-4.4.55.git] / drivers / gpu / arm / midgard / mali_base_hwconfig_issues.h
1 /*
2  *
3  * (C) COPYRIGHT 2015-2016 ARM Limited. All rights reserved.
4  *
5  * This program is free software and is provided to you under the terms of the
6  * GNU General Public License version 2 as published by the Free Software
7  * Foundation, and any use by you of this program is subject to the terms
8  * of such GNU licence.
9  *
10  * A copy of the licence is included with the program, and can also be obtained
11  * from Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor,
12  * Boston, MA  02110-1301, USA.
13  *
14  */
15
16
17
18 /* AUTOMATICALLY GENERATED FILE. If you want to amend the issues/features,
19  * please update base/tools/hwconfig_generator/hwc_{issues,features}.py
20  * For more information see base/tools/hwconfig_generator/README
21  */
22
23 #ifndef _BASE_HWCONFIG_ISSUES_H_
24 #define _BASE_HWCONFIG_ISSUES_H_
25
26 enum base_hw_issue {
27         BASE_HW_ISSUE_5736,
28         BASE_HW_ISSUE_6367,
29         BASE_HW_ISSUE_6398,
30         BASE_HW_ISSUE_6402,
31         BASE_HW_ISSUE_6787,
32         BASE_HW_ISSUE_7027,
33         BASE_HW_ISSUE_7144,
34         BASE_HW_ISSUE_7304,
35         BASE_HW_ISSUE_8073,
36         BASE_HW_ISSUE_8186,
37         BASE_HW_ISSUE_8215,
38         BASE_HW_ISSUE_8245,
39         BASE_HW_ISSUE_8250,
40         BASE_HW_ISSUE_8260,
41         BASE_HW_ISSUE_8280,
42         BASE_HW_ISSUE_8316,
43         BASE_HW_ISSUE_8381,
44         BASE_HW_ISSUE_8394,
45         BASE_HW_ISSUE_8401,
46         BASE_HW_ISSUE_8408,
47         BASE_HW_ISSUE_8443,
48         BASE_HW_ISSUE_8456,
49         BASE_HW_ISSUE_8564,
50         BASE_HW_ISSUE_8634,
51         BASE_HW_ISSUE_8778,
52         BASE_HW_ISSUE_8791,
53         BASE_HW_ISSUE_8833,
54         BASE_HW_ISSUE_8879,
55         BASE_HW_ISSUE_8896,
56         BASE_HW_ISSUE_8975,
57         BASE_HW_ISSUE_8986,
58         BASE_HW_ISSUE_8987,
59         BASE_HW_ISSUE_9010,
60         BASE_HW_ISSUE_9418,
61         BASE_HW_ISSUE_9423,
62         BASE_HW_ISSUE_9435,
63         BASE_HW_ISSUE_9510,
64         BASE_HW_ISSUE_9566,
65         BASE_HW_ISSUE_9630,
66         BASE_HW_ISSUE_10127,
67         BASE_HW_ISSUE_10327,
68         BASE_HW_ISSUE_10410,
69         BASE_HW_ISSUE_10471,
70         BASE_HW_ISSUE_10472,
71         BASE_HW_ISSUE_10487,
72         BASE_HW_ISSUE_10607,
73         BASE_HW_ISSUE_10632,
74         BASE_HW_ISSUE_10649,
75         BASE_HW_ISSUE_10676,
76         BASE_HW_ISSUE_10682,
77         BASE_HW_ISSUE_10684,
78         BASE_HW_ISSUE_10797,
79         BASE_HW_ISSUE_10817,
80         BASE_HW_ISSUE_10821,
81         BASE_HW_ISSUE_10883,
82         BASE_HW_ISSUE_10931,
83         BASE_HW_ISSUE_10946,
84         BASE_HW_ISSUE_10959,
85         BASE_HW_ISSUE_10969,
86         BASE_HW_ISSUE_10984,
87         BASE_HW_ISSUE_10995,
88         BASE_HW_ISSUE_11012,
89         BASE_HW_ISSUE_11020,
90         BASE_HW_ISSUE_11024,
91         BASE_HW_ISSUE_11035,
92         BASE_HW_ISSUE_11042,
93         BASE_HW_ISSUE_11051,
94         BASE_HW_ISSUE_11054,
95         BASE_HW_ISSUE_T76X_26,
96         BASE_HW_ISSUE_T76X_1909,
97         BASE_HW_ISSUE_T76X_1963,
98         BASE_HW_ISSUE_T76X_3086,
99         BASE_HW_ISSUE_T76X_3542,
100         BASE_HW_ISSUE_T76X_3556,
101         BASE_HW_ISSUE_T76X_3700,
102         BASE_HW_ISSUE_T76X_3793,
103         BASE_HW_ISSUE_T76X_3953,
104         BASE_HW_ISSUE_T76X_3960,
105         BASE_HW_ISSUE_T76X_3964,
106         BASE_HW_ISSUE_T76X_3966,
107         BASE_HW_ISSUE_T76X_3979,
108         BASE_HW_ISSUE_T76X_3982,
109         BASE_HW_ISSUE_TMIX_7891,
110         BASE_HW_ISSUE_TMIX_7940,
111         BASE_HW_ISSUE_TMIX_8042,
112         BASE_HW_ISSUE_TMIX_8133,
113         BASE_HW_ISSUE_TMIX_8138,
114         BASE_HW_ISSUE_TMIX_8206,
115         BASE_HW_ISSUE_TMIX_8343,
116         GPUCORE_1619,
117         BASE_HW_ISSUE_END
118 };
119
120 static const enum base_hw_issue base_hw_issues_generic[] = {
121         BASE_HW_ISSUE_END
122 };
123
124 static const enum base_hw_issue base_hw_issues_t60x_r0p0_15dev0[] = {
125         BASE_HW_ISSUE_6367,
126         BASE_HW_ISSUE_6398,
127         BASE_HW_ISSUE_6402,
128         BASE_HW_ISSUE_6787,
129         BASE_HW_ISSUE_7027,
130         BASE_HW_ISSUE_7144,
131         BASE_HW_ISSUE_7304,
132         BASE_HW_ISSUE_8073,
133         BASE_HW_ISSUE_8186,
134         BASE_HW_ISSUE_8215,
135         BASE_HW_ISSUE_8245,
136         BASE_HW_ISSUE_8250,
137         BASE_HW_ISSUE_8260,
138         BASE_HW_ISSUE_8280,
139         BASE_HW_ISSUE_8316,
140         BASE_HW_ISSUE_8381,
141         BASE_HW_ISSUE_8394,
142         BASE_HW_ISSUE_8401,
143         BASE_HW_ISSUE_8408,
144         BASE_HW_ISSUE_8443,
145         BASE_HW_ISSUE_8456,
146         BASE_HW_ISSUE_8564,
147         BASE_HW_ISSUE_8634,
148         BASE_HW_ISSUE_8778,
149         BASE_HW_ISSUE_8791,
150         BASE_HW_ISSUE_8833,
151         BASE_HW_ISSUE_8896,
152         BASE_HW_ISSUE_8975,
153         BASE_HW_ISSUE_8986,
154         BASE_HW_ISSUE_8987,
155         BASE_HW_ISSUE_9010,
156         BASE_HW_ISSUE_9418,
157         BASE_HW_ISSUE_9423,
158         BASE_HW_ISSUE_9435,
159         BASE_HW_ISSUE_9510,
160         BASE_HW_ISSUE_9566,
161         BASE_HW_ISSUE_9630,
162         BASE_HW_ISSUE_10410,
163         BASE_HW_ISSUE_10471,
164         BASE_HW_ISSUE_10472,
165         BASE_HW_ISSUE_10487,
166         BASE_HW_ISSUE_10607,
167         BASE_HW_ISSUE_10632,
168         BASE_HW_ISSUE_10649,
169         BASE_HW_ISSUE_10676,
170         BASE_HW_ISSUE_10682,
171         BASE_HW_ISSUE_10684,
172         BASE_HW_ISSUE_10883,
173         BASE_HW_ISSUE_10931,
174         BASE_HW_ISSUE_10946,
175         BASE_HW_ISSUE_10969,
176         BASE_HW_ISSUE_10984,
177         BASE_HW_ISSUE_10995,
178         BASE_HW_ISSUE_11012,
179         BASE_HW_ISSUE_11020,
180         BASE_HW_ISSUE_11035,
181         BASE_HW_ISSUE_11051,
182         BASE_HW_ISSUE_11054,
183         BASE_HW_ISSUE_T76X_1909,
184         BASE_HW_ISSUE_T76X_3964,
185         GPUCORE_1619,
186         BASE_HW_ISSUE_END
187 };
188
189 static const enum base_hw_issue base_hw_issues_t60x_r0p0_eac[] = {
190         BASE_HW_ISSUE_6367,
191         BASE_HW_ISSUE_6402,
192         BASE_HW_ISSUE_6787,
193         BASE_HW_ISSUE_7027,
194         BASE_HW_ISSUE_7304,
195         BASE_HW_ISSUE_8408,
196         BASE_HW_ISSUE_8564,
197         BASE_HW_ISSUE_8778,
198         BASE_HW_ISSUE_8975,
199         BASE_HW_ISSUE_9010,
200         BASE_HW_ISSUE_9418,
201         BASE_HW_ISSUE_9423,
202         BASE_HW_ISSUE_9435,
203         BASE_HW_ISSUE_9510,
204         BASE_HW_ISSUE_10410,
205         BASE_HW_ISSUE_10471,
206         BASE_HW_ISSUE_10472,
207         BASE_HW_ISSUE_10487,
208         BASE_HW_ISSUE_10607,
209         BASE_HW_ISSUE_10632,
210         BASE_HW_ISSUE_10649,
211         BASE_HW_ISSUE_10676,
212         BASE_HW_ISSUE_10682,
213         BASE_HW_ISSUE_10684,
214         BASE_HW_ISSUE_10883,
215         BASE_HW_ISSUE_10931,
216         BASE_HW_ISSUE_10946,
217         BASE_HW_ISSUE_10969,
218         BASE_HW_ISSUE_11012,
219         BASE_HW_ISSUE_11020,
220         BASE_HW_ISSUE_11035,
221         BASE_HW_ISSUE_11051,
222         BASE_HW_ISSUE_11054,
223         BASE_HW_ISSUE_T76X_1909,
224         BASE_HW_ISSUE_T76X_3964,
225         BASE_HW_ISSUE_END
226 };
227
228 static const enum base_hw_issue base_hw_issues_t60x_r0p1[] = {
229         BASE_HW_ISSUE_6367,
230         BASE_HW_ISSUE_6402,
231         BASE_HW_ISSUE_6787,
232         BASE_HW_ISSUE_7027,
233         BASE_HW_ISSUE_7304,
234         BASE_HW_ISSUE_8408,
235         BASE_HW_ISSUE_8564,
236         BASE_HW_ISSUE_8778,
237         BASE_HW_ISSUE_8975,
238         BASE_HW_ISSUE_9010,
239         BASE_HW_ISSUE_9435,
240         BASE_HW_ISSUE_9510,
241         BASE_HW_ISSUE_10410,
242         BASE_HW_ISSUE_10471,
243         BASE_HW_ISSUE_10472,
244         BASE_HW_ISSUE_10487,
245         BASE_HW_ISSUE_10607,
246         BASE_HW_ISSUE_10632,
247         BASE_HW_ISSUE_10649,
248         BASE_HW_ISSUE_10676,
249         BASE_HW_ISSUE_10682,
250         BASE_HW_ISSUE_10684,
251         BASE_HW_ISSUE_10883,
252         BASE_HW_ISSUE_10931,
253         BASE_HW_ISSUE_10946,
254         BASE_HW_ISSUE_11012,
255         BASE_HW_ISSUE_11020,
256         BASE_HW_ISSUE_11035,
257         BASE_HW_ISSUE_11051,
258         BASE_HW_ISSUE_11054,
259         BASE_HW_ISSUE_T76X_1909,
260         BASE_HW_ISSUE_T76X_1963,
261         BASE_HW_ISSUE_T76X_3964,
262         BASE_HW_ISSUE_END
263 };
264
265 static const enum base_hw_issue base_hw_issues_t62x_r0p1[] = {
266         BASE_HW_ISSUE_6402,
267         BASE_HW_ISSUE_9435,
268         BASE_HW_ISSUE_10127,
269         BASE_HW_ISSUE_10327,
270         BASE_HW_ISSUE_10410,
271         BASE_HW_ISSUE_10471,
272         BASE_HW_ISSUE_10472,
273         BASE_HW_ISSUE_10487,
274         BASE_HW_ISSUE_10607,
275         BASE_HW_ISSUE_10632,
276         BASE_HW_ISSUE_10649,
277         BASE_HW_ISSUE_10676,
278         BASE_HW_ISSUE_10682,
279         BASE_HW_ISSUE_10684,
280         BASE_HW_ISSUE_10817,
281         BASE_HW_ISSUE_10821,
282         BASE_HW_ISSUE_10883,
283         BASE_HW_ISSUE_10931,
284         BASE_HW_ISSUE_10946,
285         BASE_HW_ISSUE_10959,
286         BASE_HW_ISSUE_11012,
287         BASE_HW_ISSUE_11020,
288         BASE_HW_ISSUE_11024,
289         BASE_HW_ISSUE_11035,
290         BASE_HW_ISSUE_11042,
291         BASE_HW_ISSUE_11051,
292         BASE_HW_ISSUE_11054,
293         BASE_HW_ISSUE_T76X_1909,
294         BASE_HW_ISSUE_T76X_1963,
295         BASE_HW_ISSUE_END
296 };
297
298 static const enum base_hw_issue base_hw_issues_t62x_r1p0[] = {
299         BASE_HW_ISSUE_6402,
300         BASE_HW_ISSUE_9435,
301         BASE_HW_ISSUE_10471,
302         BASE_HW_ISSUE_10472,
303         BASE_HW_ISSUE_10649,
304         BASE_HW_ISSUE_10684,
305         BASE_HW_ISSUE_10821,
306         BASE_HW_ISSUE_10883,
307         BASE_HW_ISSUE_10931,
308         BASE_HW_ISSUE_10946,
309         BASE_HW_ISSUE_10959,
310         BASE_HW_ISSUE_11012,
311         BASE_HW_ISSUE_11020,
312         BASE_HW_ISSUE_11024,
313         BASE_HW_ISSUE_11042,
314         BASE_HW_ISSUE_11051,
315         BASE_HW_ISSUE_11054,
316         BASE_HW_ISSUE_T76X_1909,
317         BASE_HW_ISSUE_T76X_1963,
318         BASE_HW_ISSUE_T76X_3964,
319         BASE_HW_ISSUE_END
320 };
321
322 static const enum base_hw_issue base_hw_issues_t62x_r1p1[] = {
323         BASE_HW_ISSUE_6402,
324         BASE_HW_ISSUE_9435,
325         BASE_HW_ISSUE_10471,
326         BASE_HW_ISSUE_10472,
327         BASE_HW_ISSUE_10649,
328         BASE_HW_ISSUE_10684,
329         BASE_HW_ISSUE_10821,
330         BASE_HW_ISSUE_10883,
331         BASE_HW_ISSUE_10931,
332         BASE_HW_ISSUE_10946,
333         BASE_HW_ISSUE_10959,
334         BASE_HW_ISSUE_11012,
335         BASE_HW_ISSUE_11042,
336         BASE_HW_ISSUE_11051,
337         BASE_HW_ISSUE_11054,
338         BASE_HW_ISSUE_T76X_1909,
339         BASE_HW_ISSUE_T76X_1963,
340         BASE_HW_ISSUE_END
341 };
342
343 static const enum base_hw_issue base_hw_issues_t76x_r0p0[] = {
344         BASE_HW_ISSUE_9435,
345         BASE_HW_ISSUE_10821,
346         BASE_HW_ISSUE_10883,
347         BASE_HW_ISSUE_10946,
348         BASE_HW_ISSUE_11020,
349         BASE_HW_ISSUE_11024,
350         BASE_HW_ISSUE_11042,
351         BASE_HW_ISSUE_11051,
352         BASE_HW_ISSUE_11054,
353         BASE_HW_ISSUE_T76X_26,
354         BASE_HW_ISSUE_T76X_1909,
355         BASE_HW_ISSUE_T76X_1963,
356         BASE_HW_ISSUE_T76X_3086,
357         BASE_HW_ISSUE_T76X_3542,
358         BASE_HW_ISSUE_T76X_3556,
359         BASE_HW_ISSUE_T76X_3700,
360         BASE_HW_ISSUE_T76X_3793,
361         BASE_HW_ISSUE_T76X_3953,
362         BASE_HW_ISSUE_T76X_3960,
363         BASE_HW_ISSUE_T76X_3964,
364         BASE_HW_ISSUE_T76X_3966,
365         BASE_HW_ISSUE_T76X_3979,
366         BASE_HW_ISSUE_T76X_3982,
367         BASE_HW_ISSUE_TMIX_7891,
368         BASE_HW_ISSUE_END
369 };
370
371 static const enum base_hw_issue base_hw_issues_t76x_r0p1[] = {
372         BASE_HW_ISSUE_9435,
373         BASE_HW_ISSUE_10821,
374         BASE_HW_ISSUE_10883,
375         BASE_HW_ISSUE_10946,
376         BASE_HW_ISSUE_11020,
377         BASE_HW_ISSUE_11024,
378         BASE_HW_ISSUE_11042,
379         BASE_HW_ISSUE_11051,
380         BASE_HW_ISSUE_11054,
381         BASE_HW_ISSUE_T76X_26,
382         BASE_HW_ISSUE_T76X_1909,
383         BASE_HW_ISSUE_T76X_1963,
384         BASE_HW_ISSUE_T76X_3086,
385         BASE_HW_ISSUE_T76X_3542,
386         BASE_HW_ISSUE_T76X_3556,
387         BASE_HW_ISSUE_T76X_3700,
388         BASE_HW_ISSUE_T76X_3793,
389         BASE_HW_ISSUE_T76X_3953,
390         BASE_HW_ISSUE_T76X_3960,
391         BASE_HW_ISSUE_T76X_3964,
392         BASE_HW_ISSUE_T76X_3966,
393         BASE_HW_ISSUE_T76X_3979,
394         BASE_HW_ISSUE_T76X_3982,
395         BASE_HW_ISSUE_TMIX_7891,
396         BASE_HW_ISSUE_END
397 };
398
399 static const enum base_hw_issue base_hw_issues_t76x_r0p1_50rel0[] = {
400         BASE_HW_ISSUE_9435,
401         BASE_HW_ISSUE_10821,
402         BASE_HW_ISSUE_10883,
403         BASE_HW_ISSUE_10946,
404         BASE_HW_ISSUE_11042,
405         BASE_HW_ISSUE_11051,
406         BASE_HW_ISSUE_11054,
407         BASE_HW_ISSUE_T76X_26,
408         BASE_HW_ISSUE_T76X_1909,
409         BASE_HW_ISSUE_T76X_1963,
410         BASE_HW_ISSUE_T76X_3086,
411         BASE_HW_ISSUE_T76X_3542,
412         BASE_HW_ISSUE_T76X_3556,
413         BASE_HW_ISSUE_T76X_3700,
414         BASE_HW_ISSUE_T76X_3793,
415         BASE_HW_ISSUE_T76X_3953,
416         BASE_HW_ISSUE_T76X_3960,
417         BASE_HW_ISSUE_T76X_3964,
418         BASE_HW_ISSUE_T76X_3966,
419         BASE_HW_ISSUE_T76X_3979,
420         BASE_HW_ISSUE_T76X_3982,
421         BASE_HW_ISSUE_TMIX_7891,
422         BASE_HW_ISSUE_END
423 };
424
425 static const enum base_hw_issue base_hw_issues_t76x_r0p2[] = {
426         BASE_HW_ISSUE_9435,
427         BASE_HW_ISSUE_10821,
428         BASE_HW_ISSUE_10883,
429         BASE_HW_ISSUE_10946,
430         BASE_HW_ISSUE_11020,
431         BASE_HW_ISSUE_11024,
432         BASE_HW_ISSUE_11042,
433         BASE_HW_ISSUE_11051,
434         BASE_HW_ISSUE_11054,
435         BASE_HW_ISSUE_T76X_26,
436         BASE_HW_ISSUE_T76X_1909,
437         BASE_HW_ISSUE_T76X_1963,
438         BASE_HW_ISSUE_T76X_3086,
439         BASE_HW_ISSUE_T76X_3542,
440         BASE_HW_ISSUE_T76X_3556,
441         BASE_HW_ISSUE_T76X_3700,
442         BASE_HW_ISSUE_T76X_3793,
443         BASE_HW_ISSUE_T76X_3953,
444         BASE_HW_ISSUE_T76X_3960,
445         BASE_HW_ISSUE_T76X_3964,
446         BASE_HW_ISSUE_T76X_3966,
447         BASE_HW_ISSUE_T76X_3979,
448         BASE_HW_ISSUE_T76X_3982,
449         BASE_HW_ISSUE_TMIX_7891,
450         BASE_HW_ISSUE_END
451 };
452
453 static const enum base_hw_issue base_hw_issues_t76x_r0p3[] = {
454         BASE_HW_ISSUE_9435,
455         BASE_HW_ISSUE_10821,
456         BASE_HW_ISSUE_10883,
457         BASE_HW_ISSUE_10946,
458         BASE_HW_ISSUE_11042,
459         BASE_HW_ISSUE_11051,
460         BASE_HW_ISSUE_11054,
461         BASE_HW_ISSUE_T76X_26,
462         BASE_HW_ISSUE_T76X_1909,
463         BASE_HW_ISSUE_T76X_1963,
464         BASE_HW_ISSUE_T76X_3086,
465         BASE_HW_ISSUE_T76X_3542,
466         BASE_HW_ISSUE_T76X_3556,
467         BASE_HW_ISSUE_T76X_3700,
468         BASE_HW_ISSUE_T76X_3793,
469         BASE_HW_ISSUE_T76X_3953,
470         BASE_HW_ISSUE_T76X_3960,
471         BASE_HW_ISSUE_T76X_3964,
472         BASE_HW_ISSUE_T76X_3966,
473         BASE_HW_ISSUE_T76X_3979,
474         BASE_HW_ISSUE_T76X_3982,
475         BASE_HW_ISSUE_TMIX_7891,
476         BASE_HW_ISSUE_END
477 };
478
479 static const enum base_hw_issue base_hw_issues_t76x_r1p0[] = {
480         BASE_HW_ISSUE_9435,
481         BASE_HW_ISSUE_10821,
482         BASE_HW_ISSUE_10883,
483         BASE_HW_ISSUE_10946,
484         BASE_HW_ISSUE_11042,
485         BASE_HW_ISSUE_11051,
486         BASE_HW_ISSUE_11054,
487         BASE_HW_ISSUE_T76X_1909,
488         BASE_HW_ISSUE_T76X_1963,
489         BASE_HW_ISSUE_T76X_3086,
490         BASE_HW_ISSUE_T76X_3700,
491         BASE_HW_ISSUE_T76X_3793,
492         BASE_HW_ISSUE_T76X_3953,
493         BASE_HW_ISSUE_T76X_3960,
494         BASE_HW_ISSUE_T76X_3964,
495         BASE_HW_ISSUE_T76X_3966,
496         BASE_HW_ISSUE_T76X_3979,
497         BASE_HW_ISSUE_T76X_3982,
498         BASE_HW_ISSUE_TMIX_7891,
499         BASE_HW_ISSUE_END
500 };
501
502 static const enum base_hw_issue base_hw_issues_t72x_r0p0[] = {
503         BASE_HW_ISSUE_6402,
504         BASE_HW_ISSUE_9435,
505         BASE_HW_ISSUE_10471,
506         BASE_HW_ISSUE_10649,
507         BASE_HW_ISSUE_10684,
508         BASE_HW_ISSUE_10797,
509         BASE_HW_ISSUE_10821,
510         BASE_HW_ISSUE_10883,
511         BASE_HW_ISSUE_10946,
512         BASE_HW_ISSUE_11042,
513         BASE_HW_ISSUE_11051,
514         BASE_HW_ISSUE_11054,
515         BASE_HW_ISSUE_T76X_1909,
516         BASE_HW_ISSUE_T76X_1963,
517         BASE_HW_ISSUE_T76X_3964,
518         BASE_HW_ISSUE_END
519 };
520
521 static const enum base_hw_issue base_hw_issues_t72x_r1p0[] = {
522         BASE_HW_ISSUE_6402,
523         BASE_HW_ISSUE_9435,
524         BASE_HW_ISSUE_10471,
525         BASE_HW_ISSUE_10649,
526         BASE_HW_ISSUE_10684,
527         BASE_HW_ISSUE_10797,
528         BASE_HW_ISSUE_10821,
529         BASE_HW_ISSUE_10883,
530         BASE_HW_ISSUE_10946,
531         BASE_HW_ISSUE_11042,
532         BASE_HW_ISSUE_11051,
533         BASE_HW_ISSUE_11054,
534         BASE_HW_ISSUE_T76X_1909,
535         BASE_HW_ISSUE_T76X_1963,
536         BASE_HW_ISSUE_T76X_3964,
537         BASE_HW_ISSUE_END
538 };
539
540 static const enum base_hw_issue base_hw_issues_t72x_r1p1[] = {
541         BASE_HW_ISSUE_6402,
542         BASE_HW_ISSUE_9435,
543         BASE_HW_ISSUE_10471,
544         BASE_HW_ISSUE_10649,
545         BASE_HW_ISSUE_10684,
546         BASE_HW_ISSUE_10797,
547         BASE_HW_ISSUE_10821,
548         BASE_HW_ISSUE_10883,
549         BASE_HW_ISSUE_10946,
550         BASE_HW_ISSUE_11042,
551         BASE_HW_ISSUE_11051,
552         BASE_HW_ISSUE_11054,
553         BASE_HW_ISSUE_T76X_1909,
554         BASE_HW_ISSUE_T76X_1963,
555         BASE_HW_ISSUE_T76X_3964,
556         BASE_HW_ISSUE_END
557 };
558
559 static const enum base_hw_issue base_hw_issues_model_t72x[] = {
560         BASE_HW_ISSUE_5736,
561         BASE_HW_ISSUE_6402,
562         BASE_HW_ISSUE_9435,
563         BASE_HW_ISSUE_10471,
564         BASE_HW_ISSUE_10649,
565         BASE_HW_ISSUE_10797,
566         BASE_HW_ISSUE_11042,
567         BASE_HW_ISSUE_11051,
568         BASE_HW_ISSUE_T76X_1909,
569         BASE_HW_ISSUE_T76X_1963,
570         BASE_HW_ISSUE_T76X_3964,
571         GPUCORE_1619,
572         BASE_HW_ISSUE_END
573 };
574
575 static const enum base_hw_issue base_hw_issues_model_t76x[] = {
576         BASE_HW_ISSUE_5736,
577         BASE_HW_ISSUE_9435,
578         BASE_HW_ISSUE_11020,
579         BASE_HW_ISSUE_11024,
580         BASE_HW_ISSUE_11042,
581         BASE_HW_ISSUE_11051,
582         BASE_HW_ISSUE_T76X_1909,
583         BASE_HW_ISSUE_T76X_1963,
584         BASE_HW_ISSUE_T76X_3086,
585         BASE_HW_ISSUE_T76X_3700,
586         BASE_HW_ISSUE_T76X_3793,
587         BASE_HW_ISSUE_T76X_3964,
588         BASE_HW_ISSUE_T76X_3979,
589         BASE_HW_ISSUE_T76X_3982,
590         BASE_HW_ISSUE_TMIX_7891,
591         GPUCORE_1619,
592         BASE_HW_ISSUE_END
593 };
594
595 static const enum base_hw_issue base_hw_issues_model_t60x[] = {
596         BASE_HW_ISSUE_5736,
597         BASE_HW_ISSUE_6402,
598         BASE_HW_ISSUE_8778,
599         BASE_HW_ISSUE_9435,
600         BASE_HW_ISSUE_10472,
601         BASE_HW_ISSUE_10649,
602         BASE_HW_ISSUE_10931,
603         BASE_HW_ISSUE_11012,
604         BASE_HW_ISSUE_11020,
605         BASE_HW_ISSUE_11024,
606         BASE_HW_ISSUE_11051,
607         BASE_HW_ISSUE_T76X_1909,
608         BASE_HW_ISSUE_T76X_1963,
609         BASE_HW_ISSUE_T76X_3964,
610         GPUCORE_1619,
611         BASE_HW_ISSUE_END
612 };
613
614 static const enum base_hw_issue base_hw_issues_model_t62x[] = {
615         BASE_HW_ISSUE_5736,
616         BASE_HW_ISSUE_6402,
617         BASE_HW_ISSUE_9435,
618         BASE_HW_ISSUE_10472,
619         BASE_HW_ISSUE_10649,
620         BASE_HW_ISSUE_10931,
621         BASE_HW_ISSUE_11012,
622         BASE_HW_ISSUE_11020,
623         BASE_HW_ISSUE_11024,
624         BASE_HW_ISSUE_11042,
625         BASE_HW_ISSUE_11051,
626         BASE_HW_ISSUE_T76X_1909,
627         BASE_HW_ISSUE_T76X_1963,
628         BASE_HW_ISSUE_T76X_3964,
629         GPUCORE_1619,
630         BASE_HW_ISSUE_END
631 };
632
633 static const enum base_hw_issue base_hw_issues_tFRx_r0p1[] = {
634         BASE_HW_ISSUE_9435,
635         BASE_HW_ISSUE_10821,
636         BASE_HW_ISSUE_10883,
637         BASE_HW_ISSUE_10946,
638         BASE_HW_ISSUE_11051,
639         BASE_HW_ISSUE_11054,
640         BASE_HW_ISSUE_T76X_1909,
641         BASE_HW_ISSUE_T76X_1963,
642         BASE_HW_ISSUE_T76X_3086,
643         BASE_HW_ISSUE_T76X_3700,
644         BASE_HW_ISSUE_T76X_3793,
645         BASE_HW_ISSUE_T76X_3953,
646         BASE_HW_ISSUE_T76X_3960,
647         BASE_HW_ISSUE_T76X_3964,
648         BASE_HW_ISSUE_T76X_3966,
649         BASE_HW_ISSUE_T76X_3979,
650         BASE_HW_ISSUE_T76X_3982,
651         BASE_HW_ISSUE_TMIX_7891,
652         BASE_HW_ISSUE_END
653 };
654
655 static const enum base_hw_issue base_hw_issues_tFRx_r0p2[] = {
656         BASE_HW_ISSUE_9435,
657         BASE_HW_ISSUE_10821,
658         BASE_HW_ISSUE_10883,
659         BASE_HW_ISSUE_10946,
660         BASE_HW_ISSUE_11051,
661         BASE_HW_ISSUE_11054,
662         BASE_HW_ISSUE_T76X_1909,
663         BASE_HW_ISSUE_T76X_1963,
664         BASE_HW_ISSUE_T76X_3086,
665         BASE_HW_ISSUE_T76X_3700,
666         BASE_HW_ISSUE_T76X_3793,
667         BASE_HW_ISSUE_T76X_3953,
668         BASE_HW_ISSUE_T76X_3964,
669         BASE_HW_ISSUE_T76X_3966,
670         BASE_HW_ISSUE_T76X_3979,
671         BASE_HW_ISSUE_T76X_3982,
672         BASE_HW_ISSUE_TMIX_7891,
673         BASE_HW_ISSUE_END
674 };
675
676 static const enum base_hw_issue base_hw_issues_tFRx_r1p0[] = {
677         BASE_HW_ISSUE_9435,
678         BASE_HW_ISSUE_10821,
679         BASE_HW_ISSUE_10883,
680         BASE_HW_ISSUE_10946,
681         BASE_HW_ISSUE_11051,
682         BASE_HW_ISSUE_11054,
683         BASE_HW_ISSUE_T76X_1963,
684         BASE_HW_ISSUE_T76X_3086,
685         BASE_HW_ISSUE_T76X_3700,
686         BASE_HW_ISSUE_T76X_3793,
687         BASE_HW_ISSUE_T76X_3953,
688         BASE_HW_ISSUE_T76X_3966,
689         BASE_HW_ISSUE_T76X_3979,
690         BASE_HW_ISSUE_T76X_3982,
691         BASE_HW_ISSUE_TMIX_7891,
692         BASE_HW_ISSUE_END
693 };
694
695 static const enum base_hw_issue base_hw_issues_tFRx_r2p0[] = {
696         BASE_HW_ISSUE_9435,
697         BASE_HW_ISSUE_10821,
698         BASE_HW_ISSUE_10883,
699         BASE_HW_ISSUE_10946,
700         BASE_HW_ISSUE_11051,
701         BASE_HW_ISSUE_11054,
702         BASE_HW_ISSUE_T76X_1963,
703         BASE_HW_ISSUE_T76X_3086,
704         BASE_HW_ISSUE_T76X_3700,
705         BASE_HW_ISSUE_T76X_3793,
706         BASE_HW_ISSUE_T76X_3953,
707         BASE_HW_ISSUE_T76X_3966,
708         BASE_HW_ISSUE_T76X_3979,
709         BASE_HW_ISSUE_T76X_3982,
710         BASE_HW_ISSUE_TMIX_7891,
711         BASE_HW_ISSUE_END
712 };
713
714 static const enum base_hw_issue base_hw_issues_model_tFRx[] = {
715         BASE_HW_ISSUE_5736,
716         BASE_HW_ISSUE_9435,
717         BASE_HW_ISSUE_11051,
718         BASE_HW_ISSUE_T76X_1963,
719         BASE_HW_ISSUE_T76X_3086,
720         BASE_HW_ISSUE_T76X_3700,
721         BASE_HW_ISSUE_T76X_3793,
722         BASE_HW_ISSUE_T76X_3964,
723         BASE_HW_ISSUE_T76X_3979,
724         BASE_HW_ISSUE_T76X_3982,
725         BASE_HW_ISSUE_TMIX_7891,
726         GPUCORE_1619,
727         BASE_HW_ISSUE_END
728 };
729
730 static const enum base_hw_issue base_hw_issues_t86x_r0p2[] = {
731         BASE_HW_ISSUE_9435,
732         BASE_HW_ISSUE_10821,
733         BASE_HW_ISSUE_10883,
734         BASE_HW_ISSUE_10946,
735         BASE_HW_ISSUE_11051,
736         BASE_HW_ISSUE_11054,
737         BASE_HW_ISSUE_T76X_1909,
738         BASE_HW_ISSUE_T76X_1963,
739         BASE_HW_ISSUE_T76X_3086,
740         BASE_HW_ISSUE_T76X_3700,
741         BASE_HW_ISSUE_T76X_3793,
742         BASE_HW_ISSUE_T76X_3953,
743         BASE_HW_ISSUE_T76X_3964,
744         BASE_HW_ISSUE_T76X_3966,
745         BASE_HW_ISSUE_T76X_3979,
746         BASE_HW_ISSUE_T76X_3982,
747         BASE_HW_ISSUE_TMIX_7891,
748         BASE_HW_ISSUE_END
749 };
750
751 static const enum base_hw_issue base_hw_issues_t86x_r1p0[] = {
752         BASE_HW_ISSUE_9435,
753         BASE_HW_ISSUE_10821,
754         BASE_HW_ISSUE_10883,
755         BASE_HW_ISSUE_10946,
756         BASE_HW_ISSUE_11051,
757         BASE_HW_ISSUE_11054,
758         BASE_HW_ISSUE_T76X_1963,
759         BASE_HW_ISSUE_T76X_3086,
760         BASE_HW_ISSUE_T76X_3700,
761         BASE_HW_ISSUE_T76X_3793,
762         BASE_HW_ISSUE_T76X_3953,
763         BASE_HW_ISSUE_T76X_3966,
764         BASE_HW_ISSUE_T76X_3979,
765         BASE_HW_ISSUE_T76X_3982,
766         BASE_HW_ISSUE_TMIX_7891,
767         BASE_HW_ISSUE_END
768 };
769
770 static const enum base_hw_issue base_hw_issues_t86x_r2p0[] = {
771         BASE_HW_ISSUE_9435,
772         BASE_HW_ISSUE_10821,
773         BASE_HW_ISSUE_10883,
774         BASE_HW_ISSUE_10946,
775         BASE_HW_ISSUE_11051,
776         BASE_HW_ISSUE_11054,
777         BASE_HW_ISSUE_T76X_1963,
778         BASE_HW_ISSUE_T76X_3086,
779         BASE_HW_ISSUE_T76X_3700,
780         BASE_HW_ISSUE_T76X_3793,
781         BASE_HW_ISSUE_T76X_3953,
782         BASE_HW_ISSUE_T76X_3966,
783         BASE_HW_ISSUE_T76X_3979,
784         BASE_HW_ISSUE_T76X_3982,
785         BASE_HW_ISSUE_TMIX_7891,
786         BASE_HW_ISSUE_END
787 };
788
789 static const enum base_hw_issue base_hw_issues_model_t86x[] = {
790         BASE_HW_ISSUE_5736,
791         BASE_HW_ISSUE_9435,
792         BASE_HW_ISSUE_11051,
793         BASE_HW_ISSUE_T76X_1963,
794         BASE_HW_ISSUE_T76X_3086,
795         BASE_HW_ISSUE_T76X_3700,
796         BASE_HW_ISSUE_T76X_3793,
797         BASE_HW_ISSUE_T76X_3979,
798         BASE_HW_ISSUE_TMIX_7891,
799         BASE_HW_ISSUE_T76X_3982,
800         GPUCORE_1619,
801         BASE_HW_ISSUE_END
802 };
803
804 static const enum base_hw_issue base_hw_issues_t83x_r0p1[] = {
805         BASE_HW_ISSUE_9435,
806         BASE_HW_ISSUE_10821,
807         BASE_HW_ISSUE_10883,
808         BASE_HW_ISSUE_10946,
809         BASE_HW_ISSUE_11051,
810         BASE_HW_ISSUE_11054,
811         BASE_HW_ISSUE_T76X_1909,
812         BASE_HW_ISSUE_T76X_1963,
813         BASE_HW_ISSUE_T76X_3086,
814         BASE_HW_ISSUE_T76X_3700,
815         BASE_HW_ISSUE_T76X_3793,
816         BASE_HW_ISSUE_T76X_3953,
817         BASE_HW_ISSUE_T76X_3960,
818         BASE_HW_ISSUE_T76X_3979,
819         BASE_HW_ISSUE_T76X_3982,
820         BASE_HW_ISSUE_TMIX_7891,
821         BASE_HW_ISSUE_END
822 };
823
824 static const enum base_hw_issue base_hw_issues_t83x_r1p0[] = {
825         BASE_HW_ISSUE_9435,
826         BASE_HW_ISSUE_10821,
827         BASE_HW_ISSUE_10883,
828         BASE_HW_ISSUE_10946,
829         BASE_HW_ISSUE_11051,
830         BASE_HW_ISSUE_11054,
831         BASE_HW_ISSUE_T76X_1963,
832         BASE_HW_ISSUE_T76X_3086,
833         BASE_HW_ISSUE_T76X_3700,
834         BASE_HW_ISSUE_T76X_3793,
835         BASE_HW_ISSUE_T76X_3953,
836         BASE_HW_ISSUE_T76X_3960,
837         BASE_HW_ISSUE_T76X_3979,
838         BASE_HW_ISSUE_T76X_3982,
839         BASE_HW_ISSUE_TMIX_7891,
840         BASE_HW_ISSUE_END
841 };
842
843 static const enum base_hw_issue base_hw_issues_model_t83x[] = {
844         BASE_HW_ISSUE_5736,
845         BASE_HW_ISSUE_9435,
846         BASE_HW_ISSUE_11051,
847         BASE_HW_ISSUE_T76X_1963,
848         BASE_HW_ISSUE_T76X_3086,
849         BASE_HW_ISSUE_T76X_3700,
850         BASE_HW_ISSUE_T76X_3793,
851         BASE_HW_ISSUE_T76X_3964,
852         BASE_HW_ISSUE_T76X_3979,
853         BASE_HW_ISSUE_T76X_3982,
854         BASE_HW_ISSUE_TMIX_7891,
855         GPUCORE_1619,
856         BASE_HW_ISSUE_END
857 };
858
859 static const enum base_hw_issue base_hw_issues_t82x_r0p0[] = {
860         BASE_HW_ISSUE_9435,
861         BASE_HW_ISSUE_10821,
862         BASE_HW_ISSUE_10883,
863         BASE_HW_ISSUE_10946,
864         BASE_HW_ISSUE_11051,
865         BASE_HW_ISSUE_11054,
866         BASE_HW_ISSUE_T76X_1909,
867         BASE_HW_ISSUE_T76X_1963,
868         BASE_HW_ISSUE_T76X_3086,
869         BASE_HW_ISSUE_T76X_3700,
870         BASE_HW_ISSUE_T76X_3793,
871         BASE_HW_ISSUE_T76X_3953,
872         BASE_HW_ISSUE_T76X_3960,
873         BASE_HW_ISSUE_T76X_3964,
874         BASE_HW_ISSUE_T76X_3979,
875         BASE_HW_ISSUE_T76X_3982,
876         BASE_HW_ISSUE_TMIX_7891,
877         BASE_HW_ISSUE_END
878 };
879
880 static const enum base_hw_issue base_hw_issues_t82x_r0p1[] = {
881         BASE_HW_ISSUE_9435,
882         BASE_HW_ISSUE_10821,
883         BASE_HW_ISSUE_10883,
884         BASE_HW_ISSUE_10946,
885         BASE_HW_ISSUE_11051,
886         BASE_HW_ISSUE_11054,
887         BASE_HW_ISSUE_T76X_1909,
888         BASE_HW_ISSUE_T76X_1963,
889         BASE_HW_ISSUE_T76X_3086,
890         BASE_HW_ISSUE_T76X_3700,
891         BASE_HW_ISSUE_T76X_3793,
892         BASE_HW_ISSUE_T76X_3953,
893         BASE_HW_ISSUE_T76X_3960,
894         BASE_HW_ISSUE_T76X_3979,
895         BASE_HW_ISSUE_T76X_3982,
896         BASE_HW_ISSUE_TMIX_7891,
897         BASE_HW_ISSUE_END
898 };
899
900 static const enum base_hw_issue base_hw_issues_t82x_r1p0[] = {
901         BASE_HW_ISSUE_9435,
902         BASE_HW_ISSUE_10821,
903         BASE_HW_ISSUE_10883,
904         BASE_HW_ISSUE_10946,
905         BASE_HW_ISSUE_11051,
906         BASE_HW_ISSUE_11054,
907         BASE_HW_ISSUE_T76X_1963,
908         BASE_HW_ISSUE_T76X_3086,
909         BASE_HW_ISSUE_T76X_3700,
910         BASE_HW_ISSUE_T76X_3793,
911         BASE_HW_ISSUE_T76X_3953,
912         BASE_HW_ISSUE_T76X_3960,
913         BASE_HW_ISSUE_T76X_3979,
914         BASE_HW_ISSUE_T76X_3982,
915         BASE_HW_ISSUE_TMIX_7891,
916         BASE_HW_ISSUE_END
917 };
918
919 static const enum base_hw_issue base_hw_issues_model_t82x[] = {
920         BASE_HW_ISSUE_5736,
921         BASE_HW_ISSUE_9435,
922         BASE_HW_ISSUE_11051,
923         BASE_HW_ISSUE_T76X_1963,
924         BASE_HW_ISSUE_T76X_3086,
925         BASE_HW_ISSUE_T76X_3700,
926         BASE_HW_ISSUE_T76X_3793,
927         BASE_HW_ISSUE_T76X_3979,
928         BASE_HW_ISSUE_T76X_3982,
929         BASE_HW_ISSUE_TMIX_7891,
930         GPUCORE_1619,
931         BASE_HW_ISSUE_END
932 };
933
934 static const enum base_hw_issue base_hw_issues_tMIx_r0p0_05dev0[] = {
935         BASE_HW_ISSUE_9435,
936         BASE_HW_ISSUE_10682,
937         BASE_HW_ISSUE_10821,
938         BASE_HW_ISSUE_11054,
939         BASE_HW_ISSUE_T76X_3700,
940         BASE_HW_ISSUE_T76X_3953,
941         BASE_HW_ISSUE_T76X_3982,
942         BASE_HW_ISSUE_TMIX_7891,
943         BASE_HW_ISSUE_TMIX_8042,
944         BASE_HW_ISSUE_TMIX_8133,
945         BASE_HW_ISSUE_TMIX_8138,
946         BASE_HW_ISSUE_TMIX_8343,
947         BASE_HW_ISSUE_END
948 };
949
950 static const enum base_hw_issue base_hw_issues_tMIx_r0p0[] = {
951         BASE_HW_ISSUE_9435,
952         BASE_HW_ISSUE_10682,
953         BASE_HW_ISSUE_10821,
954         BASE_HW_ISSUE_11054,
955         BASE_HW_ISSUE_T76X_3700,
956         BASE_HW_ISSUE_T76X_3982,
957         BASE_HW_ISSUE_TMIX_7891,
958         BASE_HW_ISSUE_TMIX_7940,
959         BASE_HW_ISSUE_TMIX_8042,
960         BASE_HW_ISSUE_TMIX_8133,
961         BASE_HW_ISSUE_TMIX_8138,
962         BASE_HW_ISSUE_TMIX_8206,
963         BASE_HW_ISSUE_TMIX_8343,
964         BASE_HW_ISSUE_END
965 };
966
967 static const enum base_hw_issue base_hw_issues_model_tMIx[] = {
968         BASE_HW_ISSUE_5736,
969         BASE_HW_ISSUE_9435,
970         BASE_HW_ISSUE_T76X_3700,
971         BASE_HW_ISSUE_T76X_3982,
972         BASE_HW_ISSUE_TMIX_7891,
973         BASE_HW_ISSUE_TMIX_7940,
974         BASE_HW_ISSUE_TMIX_8042,
975         BASE_HW_ISSUE_TMIX_8133,
976         BASE_HW_ISSUE_TMIX_8138,
977         BASE_HW_ISSUE_TMIX_8206,
978         BASE_HW_ISSUE_TMIX_8343,
979         GPUCORE_1619,
980         BASE_HW_ISSUE_END
981 };
982
983
984
985
986
987 #endif /* _BASE_HWCONFIG_ISSUES_H_ */