drivers/gpu/arm/midgard/mali_base_hwconfig_features.h

   1 /*
   2  *
   3  * (C) COPYRIGHT 2015-2016 ARM Limited. All rights reserved.
   4  *
   5  * This program is free software and is provided to you under the terms of the
   6  * GNU General Public License version 2 as published by the Free Software
   7  * Foundation, and any use by you of this program is subject to the terms
   8  * of such GNU licence.
   9  *
  10  * A copy of the licence is included with the program, and can also be obtained
  11  * from Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor,
  12  * Boston, MA  02110-1301, USA.
  13  *
  14  */
  15
  16
  17
  18 /* AUTOMATICALLY GENERATED FILE. If you want to amend the issues/features,
  19  * please update base/tools/hwconfig_generator/hwc_{issues,features}.py
  20  * For more information see base/tools/hwconfig_generator/README
  21  */
  22
  23 #ifndef _BASE_HWCONFIG_FEATURES_H_
  24 #define _BASE_HWCONFIG_FEATURES_H_
  25
  26 enum base_hw_feature {
  27         BASE_HW_FEATURE_JOBCHAIN_DISAMBIGUATION,
  28         BASE_HW_FEATURE_PWRON_DURING_PWROFF_TRANS,
  29         BASE_HW_FEATURE_33BIT_VA,
  30         BASE_HW_FEATURE_OUT_OF_ORDER_EXEC,
  31         BASE_HW_FEATURE_MRT,
  32         BASE_HW_FEATURE_BRNDOUT_CC,
  33         BASE_HW_FEATURE_INTERPIPE_REG_ALIASING,
  34         BASE_HW_FEATURE_LD_ST_TILEBUFFER,
  35         BASE_HW_FEATURE_MSAA_16X,
  36         BASE_HW_FEATURE_32_BIT_UNIFORM_ADDRESS,
  37         BASE_HW_FEATURE_ATTR_AUTO_TYPE_INFERRAL,
  38         BASE_HW_FEATURE_OPTIMIZED_COVERAGE_MASK,
  39         BASE_HW_FEATURE_T7XX_PAIRING_RULES,
  40         BASE_HW_FEATURE_LD_ST_LEA_TEX,
  41         BASE_HW_FEATURE_LINEAR_FILTER_FLOAT,
  42         BASE_HW_FEATURE_WORKGROUP_ROUND_MULTIPLE_OF_4,
  43         BASE_HW_FEATURE_IMAGES_IN_FRAGMENT_SHADERS,
  44         BASE_HW_FEATURE_TEST4_DATUM_MODE,
  45         BASE_HW_FEATURE_NEXT_INSTRUCTION_TYPE,
  46         BASE_HW_FEATURE_BRNDOUT_KILL,
  47         BASE_HW_FEATURE_WARPING,
  48         BASE_HW_FEATURE_V4,
  49         BASE_HW_FEATURE_FLUSH_REDUCTION,
  50         BASE_HW_FEATURE_PROTECTED_MODE,
  51         BASE_HW_FEATURE_COHERENCY_REG,
  52         BASE_HW_FEATURE_END
  53 };
  54
  55 static const enum base_hw_feature base_hw_features_generic[] = {
  56         BASE_HW_FEATURE_END
  57 };
  58
  59 static const enum base_hw_feature base_hw_features_t60x[] = {
  60         BASE_HW_FEATURE_LD_ST_LEA_TEX,
  61         BASE_HW_FEATURE_LINEAR_FILTER_FLOAT,
  62         BASE_HW_FEATURE_V4,
  63         BASE_HW_FEATURE_END
  64 };
  65
  66 static const enum base_hw_feature base_hw_features_t62x[] = {
  67         BASE_HW_FEATURE_LD_ST_LEA_TEX,
  68         BASE_HW_FEATURE_LINEAR_FILTER_FLOAT,
  69         BASE_HW_FEATURE_ATTR_AUTO_TYPE_INFERRAL,
  70         BASE_HW_FEATURE_V4,
  71         BASE_HW_FEATURE_END
  72 };
  73
  74 static const enum base_hw_feature base_hw_features_t72x[] = {
  75         BASE_HW_FEATURE_33BIT_VA,
  76         BASE_HW_FEATURE_32_BIT_UNIFORM_ADDRESS,
  77         BASE_HW_FEATURE_ATTR_AUTO_TYPE_INFERRAL,
  78         BASE_HW_FEATURE_INTERPIPE_REG_ALIASING,
  79         BASE_HW_FEATURE_OPTIMIZED_COVERAGE_MASK,
  80         BASE_HW_FEATURE_T7XX_PAIRING_RULES,
  81         BASE_HW_FEATURE_WORKGROUP_ROUND_MULTIPLE_OF_4,
  82         BASE_HW_FEATURE_WARPING,
  83         BASE_HW_FEATURE_V4,
  84         BASE_HW_FEATURE_END
  85 };
  86
  87 static const enum base_hw_feature base_hw_features_t76x[] = {
  88         BASE_HW_FEATURE_JOBCHAIN_DISAMBIGUATION,
  89         BASE_HW_FEATURE_PWRON_DURING_PWROFF_TRANS,
  90         BASE_HW_FEATURE_32_BIT_UNIFORM_ADDRESS,
  91         BASE_HW_FEATURE_ATTR_AUTO_TYPE_INFERRAL,
  92         BASE_HW_FEATURE_BRNDOUT_CC,
  93         BASE_HW_FEATURE_LD_ST_LEA_TEX,
  94         BASE_HW_FEATURE_LD_ST_TILEBUFFER,
  95         BASE_HW_FEATURE_LINEAR_FILTER_FLOAT,
  96         BASE_HW_FEATURE_MRT,
  97         BASE_HW_FEATURE_MSAA_16X,
  98         BASE_HW_FEATURE_OUT_OF_ORDER_EXEC,
  99         BASE_HW_FEATURE_T7XX_PAIRING_RULES,
 100         BASE_HW_FEATURE_TEST4_DATUM_MODE,
 101         BASE_HW_FEATURE_END
 102 };
 103
 104 static const enum base_hw_feature base_hw_features_tFxx[] = {
 105         BASE_HW_FEATURE_JOBCHAIN_DISAMBIGUATION,
 106         BASE_HW_FEATURE_PWRON_DURING_PWROFF_TRANS,
 107         BASE_HW_FEATURE_32_BIT_UNIFORM_ADDRESS,
 108         BASE_HW_FEATURE_ATTR_AUTO_TYPE_INFERRAL,
 109         BASE_HW_FEATURE_BRNDOUT_CC,
 110         BASE_HW_FEATURE_BRNDOUT_KILL,
 111         BASE_HW_FEATURE_LD_ST_LEA_TEX,
 112         BASE_HW_FEATURE_LD_ST_TILEBUFFER,
 113         BASE_HW_FEATURE_LINEAR_FILTER_FLOAT,
 114         BASE_HW_FEATURE_MRT,
 115         BASE_HW_FEATURE_MSAA_16X,
 116         BASE_HW_FEATURE_NEXT_INSTRUCTION_TYPE,
 117         BASE_HW_FEATURE_OUT_OF_ORDER_EXEC,
 118         BASE_HW_FEATURE_T7XX_PAIRING_RULES,
 119         BASE_HW_FEATURE_TEST4_DATUM_MODE,
 120         BASE_HW_FEATURE_END
 121 };
 122
 123 static const enum base_hw_feature base_hw_features_t83x[] = {
 124         BASE_HW_FEATURE_33BIT_VA,
 125         BASE_HW_FEATURE_JOBCHAIN_DISAMBIGUATION,
 126         BASE_HW_FEATURE_PWRON_DURING_PWROFF_TRANS,
 127         BASE_HW_FEATURE_WARPING,
 128         BASE_HW_FEATURE_INTERPIPE_REG_ALIASING,
 129         BASE_HW_FEATURE_32_BIT_UNIFORM_ADDRESS,
 130         BASE_HW_FEATURE_ATTR_AUTO_TYPE_INFERRAL,
 131         BASE_HW_FEATURE_BRNDOUT_CC,
 132         BASE_HW_FEATURE_BRNDOUT_KILL,
 133         BASE_HW_FEATURE_LD_ST_LEA_TEX,
 134         BASE_HW_FEATURE_LD_ST_TILEBUFFER,
 135         BASE_HW_FEATURE_LINEAR_FILTER_FLOAT,
 136         BASE_HW_FEATURE_MRT,
 137         BASE_HW_FEATURE_NEXT_INSTRUCTION_TYPE,
 138         BASE_HW_FEATURE_OUT_OF_ORDER_EXEC,
 139         BASE_HW_FEATURE_T7XX_PAIRING_RULES,
 140         BASE_HW_FEATURE_TEST4_DATUM_MODE,
 141         BASE_HW_FEATURE_END
 142 };
 143
 144 static const enum base_hw_feature base_hw_features_t82x[] = {
 145         BASE_HW_FEATURE_33BIT_VA,
 146         BASE_HW_FEATURE_JOBCHAIN_DISAMBIGUATION,
 147         BASE_HW_FEATURE_PWRON_DURING_PWROFF_TRANS,
 148         BASE_HW_FEATURE_WARPING,
 149         BASE_HW_FEATURE_INTERPIPE_REG_ALIASING,
 150         BASE_HW_FEATURE_32_BIT_UNIFORM_ADDRESS,
 151         BASE_HW_FEATURE_ATTR_AUTO_TYPE_INFERRAL,
 152         BASE_HW_FEATURE_BRNDOUT_CC,
 153         BASE_HW_FEATURE_BRNDOUT_KILL,
 154         BASE_HW_FEATURE_LD_ST_LEA_TEX,
 155         BASE_HW_FEATURE_LD_ST_TILEBUFFER,
 156         BASE_HW_FEATURE_LINEAR_FILTER_FLOAT,
 157         BASE_HW_FEATURE_MRT,
 158         BASE_HW_FEATURE_NEXT_INSTRUCTION_TYPE,
 159         BASE_HW_FEATURE_OUT_OF_ORDER_EXEC,
 160         BASE_HW_FEATURE_T7XX_PAIRING_RULES,
 161         BASE_HW_FEATURE_TEST4_DATUM_MODE,
 162         BASE_HW_FEATURE_END
 163 };
 164
 165 static const enum base_hw_feature base_hw_features_tMIx[] = {
 166         BASE_HW_FEATURE_JOBCHAIN_DISAMBIGUATION,
 167         BASE_HW_FEATURE_PWRON_DURING_PWROFF_TRANS,
 168         BASE_HW_FEATURE_WARPING,
 169         BASE_HW_FEATURE_INTERPIPE_REG_ALIASING,
 170         BASE_HW_FEATURE_32_BIT_UNIFORM_ADDRESS,
 171         BASE_HW_FEATURE_ATTR_AUTO_TYPE_INFERRAL,
 172         BASE_HW_FEATURE_BRNDOUT_CC,
 173         BASE_HW_FEATURE_BRNDOUT_KILL,
 174         BASE_HW_FEATURE_LD_ST_LEA_TEX,
 175         BASE_HW_FEATURE_LD_ST_TILEBUFFER,
 176         BASE_HW_FEATURE_LINEAR_FILTER_FLOAT,
 177         BASE_HW_FEATURE_MRT,
 178         BASE_HW_FEATURE_MSAA_16X,
 179         BASE_HW_FEATURE_NEXT_INSTRUCTION_TYPE,
 180         BASE_HW_FEATURE_OUT_OF_ORDER_EXEC,
 181         BASE_HW_FEATURE_T7XX_PAIRING_RULES,
 182         BASE_HW_FEATURE_TEST4_DATUM_MODE,
 183         BASE_HW_FEATURE_FLUSH_REDUCTION,
 184         BASE_HW_FEATURE_PROTECTED_MODE,
 185         BASE_HW_FEATURE_COHERENCY_REG,
 186         BASE_HW_FEATURE_END
 187 };
 188
 189 #endif /* _BASE_HWCONFIG_FEATURES_H_ */