3 * (C) COPYRIGHT 2014-2016 ARM Limited. All rights reserved.
5 * This program is free software and is provided to you under the terms of the
6 * GNU General Public License version 2 as published by the Free Software
7 * Foundation, and any use by you of this program is subject to the terms
10 * A copy of the licence is included with the program, and can also be obtained
11 * from Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor,
12 * Boston, MA 02110-1301, USA.
20 * Register-based HW access backend specific definitions
23 #ifndef _KBASE_HWACCESS_GPU_DEFS_H_
24 #define _KBASE_HWACCESS_GPU_DEFS_H_
26 /* SLOT_RB_SIZE must be < 256 */
27 #define SLOT_RB_SIZE 2
28 #define SLOT_RB_MASK (SLOT_RB_SIZE - 1)
31 * struct rb_entry - Ringbuffer entry
32 * @katom: Atom associated with this entry
35 struct kbase_jd_atom *katom;
39 * struct slot_rb - Slot ringbuffer
40 * @entries: Ringbuffer entries
41 * @last_context: The last context to submit a job on this slot
42 * @read_idx: Current read index of buffer
43 * @write_idx: Current write index of buffer
44 * @job_chain_flag: Flag used to implement jobchain disambiguation
47 struct rb_entry entries[SLOT_RB_SIZE];
49 struct kbase_context *last_context;
58 * struct kbase_backend_data - GPU backend specific data for HW access layer
59 * @slot_rb: Slot ringbuffers
60 * @rmu_workaround_flag: When PRLAM-8987 is present, this flag determines
61 * whether slots 0/1 or slot 2 are currently being
63 * @scheduling_timer: The timer tick used for rescheduling jobs
64 * @timer_running: Is the timer running? The runpool_mutex must be
65 * held whilst modifying this.
66 * @suspend_timer: Is the timer suspended? Set when a suspend
67 * occurs and cleared on resume. The runpool_mutex
68 * must be held whilst modifying this.
69 * @reset_gpu: Set to a KBASE_RESET_xxx value (see comments)
70 * @reset_workq: Work queue for performing the reset
71 * @reset_work: Work item for performing the reset
72 * @reset_wait: Wait event signalled when the reset is complete
73 * @reset_timer: Timeout for soft-stops before the reset
74 * @timeouts_updated: Have timeout values just been updated?
76 * The kbasep_js_device_data::runpool_irq::lock (a spinlock) must be held when
77 * accessing this structure
79 struct kbase_backend_data {
80 struct slot_rb slot_rb[BASE_JM_MAX_NR_SLOTS];
82 bool rmu_workaround_flag;
84 struct hrtimer scheduling_timer;
91 /* The GPU reset isn't pending */
92 #define KBASE_RESET_GPU_NOT_PENDING 0
93 /* kbase_prepare_to_reset_gpu has been called */
94 #define KBASE_RESET_GPU_PREPARED 1
95 /* kbase_reset_gpu has been called - the reset will now definitely happen
96 * within the timeout period */
97 #define KBASE_RESET_GPU_COMMITTED 2
98 /* The GPU reset process is currently occuring (timeout has expired or
99 * kbasep_try_reset_gpu_early was called) */
100 #define KBASE_RESET_GPU_HAPPENING 3
101 /* Reset the GPU silently, used when resetting the GPU as part of normal
102 * behavior (e.g. when exiting protected mode). */
103 #define KBASE_RESET_GPU_SILENT 4
104 struct workqueue_struct *reset_workq;
105 struct work_struct reset_work;
106 wait_queue_head_t reset_wait;
107 struct hrtimer reset_timer;
109 bool timeouts_updated;
113 * struct kbase_jd_atom_backend - GPU backend specific katom data
115 struct kbase_jd_atom_backend {
119 * struct kbase_context_backend - GPU backend specific context data
121 struct kbase_context_backend {
124 #endif /* _KBASE_HWACCESS_GPU_DEFS_H_ */