MALI: rockchip: upgrade DDK to r8p0-02rel0.
[firefly-linux-kernel-4.4.55.git] / drivers / gpu / arm / midgard / backend / gpu / mali_kbase_gpuprops_backend.c
1 /*
2  *
3  * (C) COPYRIGHT 2014-2015 ARM Limited. All rights reserved.
4  *
5  * This program is free software and is provided to you under the terms of the
6  * GNU General Public License version 2 as published by the Free Software
7  * Foundation, and any use by you of this program is subject to the terms
8  * of such GNU licence.
9  *
10  * A copy of the licence is included with the program, and can also be obtained
11  * from Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor,
12  * Boston, MA  02110-1301, USA.
13  *
14  */
15
16
17
18
19
20 /*
21  * Base kernel property query backend APIs
22  */
23
24 #include <mali_kbase.h>
25 #include <backend/gpu/mali_kbase_device_internal.h>
26 #include <backend/gpu/mali_kbase_pm_internal.h>
27 #include <mali_kbase_hwaccess_gpuprops.h>
28
29 void kbase_backend_gpuprops_get(struct kbase_device *kbdev,
30                                         struct kbase_gpuprops_regdump *regdump)
31 {
32         int i;
33
34         /* Fill regdump with the content of the relevant registers */
35         regdump->gpu_id = kbase_reg_read(kbdev, GPU_CONTROL_REG(GPU_ID), NULL);
36
37         regdump->l2_features = kbase_reg_read(kbdev,
38                                 GPU_CONTROL_REG(L2_FEATURES), NULL);
39         regdump->suspend_size = kbase_reg_read(kbdev,
40                                 GPU_CONTROL_REG(SUSPEND_SIZE), NULL);
41         regdump->tiler_features = kbase_reg_read(kbdev,
42                                 GPU_CONTROL_REG(TILER_FEATURES), NULL);
43         regdump->mem_features = kbase_reg_read(kbdev,
44                                 GPU_CONTROL_REG(MEM_FEATURES), NULL);
45         regdump->mmu_features = kbase_reg_read(kbdev,
46                                 GPU_CONTROL_REG(MMU_FEATURES), NULL);
47         regdump->as_present = kbase_reg_read(kbdev,
48                                 GPU_CONTROL_REG(AS_PRESENT), NULL);
49         regdump->js_present = kbase_reg_read(kbdev,
50                                 GPU_CONTROL_REG(JS_PRESENT), NULL);
51
52         for (i = 0; i < GPU_MAX_JOB_SLOTS; i++)
53                 regdump->js_features[i] = kbase_reg_read(kbdev,
54                                 GPU_CONTROL_REG(JS_FEATURES_REG(i)), NULL);
55
56         for (i = 0; i < BASE_GPU_NUM_TEXTURE_FEATURES_REGISTERS; i++)
57                 regdump->texture_features[i] = kbase_reg_read(kbdev,
58                                 GPU_CONTROL_REG(TEXTURE_FEATURES_REG(i)), NULL);
59
60         regdump->thread_max_threads = kbase_reg_read(kbdev,
61                                 GPU_CONTROL_REG(THREAD_MAX_THREADS), NULL);
62         regdump->thread_max_workgroup_size = kbase_reg_read(kbdev,
63                                 GPU_CONTROL_REG(THREAD_MAX_WORKGROUP_SIZE),
64                                                                         NULL);
65         regdump->thread_max_barrier_size = kbase_reg_read(kbdev,
66                                 GPU_CONTROL_REG(THREAD_MAX_BARRIER_SIZE), NULL);
67         regdump->thread_features = kbase_reg_read(kbdev,
68                                 GPU_CONTROL_REG(THREAD_FEATURES), NULL);
69
70         regdump->shader_present_lo = kbase_reg_read(kbdev,
71                                 GPU_CONTROL_REG(SHADER_PRESENT_LO), NULL);
72         regdump->shader_present_hi = kbase_reg_read(kbdev,
73                                 GPU_CONTROL_REG(SHADER_PRESENT_HI), NULL);
74
75         regdump->tiler_present_lo = kbase_reg_read(kbdev,
76                                 GPU_CONTROL_REG(TILER_PRESENT_LO), NULL);
77         regdump->tiler_present_hi = kbase_reg_read(kbdev,
78                                 GPU_CONTROL_REG(TILER_PRESENT_HI), NULL);
79
80         regdump->l2_present_lo = kbase_reg_read(kbdev,
81                                 GPU_CONTROL_REG(L2_PRESENT_LO), NULL);
82         regdump->l2_present_hi = kbase_reg_read(kbdev,
83                                 GPU_CONTROL_REG(L2_PRESENT_HI), NULL);
84 }
85
86 void kbase_backend_gpuprops_get_features(struct kbase_device *kbdev,
87                                         struct kbase_gpuprops_regdump *regdump)
88 {
89                 regdump->coherency_features =
90                                 COHERENCY_FEATURE_BIT(COHERENCY_NONE) |
91                                 COHERENCY_FEATURE_BIT(COHERENCY_ACE_LITE);
92 }
93