2 * Renesas R-Car GPIO Support
4 * Copyright (C) 2013 Magnus Damm
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
16 #include <linux/err.h>
17 #include <linux/gpio.h>
18 #include <linux/init.h>
19 #include <linux/interrupt.h>
21 #include <linux/ioport.h>
22 #include <linux/irq.h>
23 #include <linux/irqdomain.h>
24 #include <linux/module.h>
25 #include <linux/platform_data/gpio-rcar.h>
26 #include <linux/platform_device.h>
27 #include <linux/spinlock.h>
28 #include <linux/slab.h>
30 struct gpio_rcar_priv {
33 struct gpio_rcar_config config;
34 struct platform_device *pdev;
35 struct gpio_chip gpio_chip;
36 struct irq_chip irq_chip;
37 struct irq_domain *irq_domain;
52 static inline u32 gpio_rcar_read(struct gpio_rcar_priv *p, int offs)
54 return ioread32(p->base + offs);
57 static inline void gpio_rcar_write(struct gpio_rcar_priv *p, int offs,
60 iowrite32(value, p->base + offs);
63 static void gpio_rcar_modify_bit(struct gpio_rcar_priv *p, int offs,
66 u32 tmp = gpio_rcar_read(p, offs);
73 gpio_rcar_write(p, offs, tmp);
76 static void gpio_rcar_irq_disable(struct irq_data *d)
78 struct gpio_rcar_priv *p = irq_data_get_irq_chip_data(d);
80 gpio_rcar_write(p, INTMSK, ~BIT(irqd_to_hwirq(d)));
83 static void gpio_rcar_irq_enable(struct irq_data *d)
85 struct gpio_rcar_priv *p = irq_data_get_irq_chip_data(d);
87 gpio_rcar_write(p, MSKCLR, BIT(irqd_to_hwirq(d)));
90 static void gpio_rcar_config_interrupt_input_mode(struct gpio_rcar_priv *p,
92 bool active_high_rising_edge,
97 /* follow steps in the GPIO documentation for
98 * "Setting Edge-Sensitive Interrupt Input Mode" and
99 * "Setting Level-Sensitive Interrupt Input Mode"
102 spin_lock_irqsave(&p->lock, flags);
104 /* Configure postive or negative logic in POSNEG */
105 gpio_rcar_modify_bit(p, POSNEG, hwirq, !active_high_rising_edge);
107 /* Configure edge or level trigger in EDGLEVEL */
108 gpio_rcar_modify_bit(p, EDGLEVEL, hwirq, !level_trigger);
110 /* Select "Interrupt Input Mode" in IOINTSEL */
111 gpio_rcar_modify_bit(p, IOINTSEL, hwirq, true);
113 /* Write INTCLR in case of edge trigger */
115 gpio_rcar_write(p, INTCLR, BIT(hwirq));
117 spin_unlock_irqrestore(&p->lock, flags);
120 static int gpio_rcar_irq_set_type(struct irq_data *d, unsigned int type)
122 struct gpio_rcar_priv *p = irq_data_get_irq_chip_data(d);
123 unsigned int hwirq = irqd_to_hwirq(d);
125 dev_dbg(&p->pdev->dev, "sense irq = %d, type = %d\n", hwirq, type);
127 switch (type & IRQ_TYPE_SENSE_MASK) {
128 case IRQ_TYPE_LEVEL_HIGH:
129 gpio_rcar_config_interrupt_input_mode(p, hwirq, true, true);
131 case IRQ_TYPE_LEVEL_LOW:
132 gpio_rcar_config_interrupt_input_mode(p, hwirq, false, true);
134 case IRQ_TYPE_EDGE_RISING:
135 gpio_rcar_config_interrupt_input_mode(p, hwirq, true, false);
137 case IRQ_TYPE_EDGE_FALLING:
138 gpio_rcar_config_interrupt_input_mode(p, hwirq, false, false);
146 static irqreturn_t gpio_rcar_irq_handler(int irq, void *dev_id)
148 struct gpio_rcar_priv *p = dev_id;
150 unsigned int offset, irqs_handled = 0;
152 while ((pending = gpio_rcar_read(p, INTDT))) {
153 offset = __ffs(pending);
154 gpio_rcar_write(p, INTCLR, BIT(offset));
155 generic_handle_irq(irq_find_mapping(p->irq_domain, offset));
159 return irqs_handled ? IRQ_HANDLED : IRQ_NONE;
162 static inline struct gpio_rcar_priv *gpio_to_priv(struct gpio_chip *chip)
164 return container_of(chip, struct gpio_rcar_priv, gpio_chip);
167 static void gpio_rcar_config_general_input_output_mode(struct gpio_chip *chip,
171 struct gpio_rcar_priv *p = gpio_to_priv(chip);
174 /* follow steps in the GPIO documentation for
175 * "Setting General Output Mode" and
176 * "Setting General Input Mode"
179 spin_lock_irqsave(&p->lock, flags);
181 /* Configure postive logic in POSNEG */
182 gpio_rcar_modify_bit(p, POSNEG, gpio, false);
184 /* Select "General Input/Output Mode" in IOINTSEL */
185 gpio_rcar_modify_bit(p, IOINTSEL, gpio, false);
187 /* Select Input Mode or Output Mode in INOUTSEL */
188 gpio_rcar_modify_bit(p, INOUTSEL, gpio, output);
190 spin_unlock_irqrestore(&p->lock, flags);
193 static int gpio_rcar_direction_input(struct gpio_chip *chip, unsigned offset)
195 gpio_rcar_config_general_input_output_mode(chip, offset, false);
199 static int gpio_rcar_get(struct gpio_chip *chip, unsigned offset)
201 return (int)(gpio_rcar_read(gpio_to_priv(chip), INDT) & BIT(offset));
204 static void gpio_rcar_set(struct gpio_chip *chip, unsigned offset, int value)
206 struct gpio_rcar_priv *p = gpio_to_priv(chip);
209 spin_lock_irqsave(&p->lock, flags);
210 gpio_rcar_modify_bit(p, OUTDT, offset, value);
211 spin_unlock_irqrestore(&p->lock, flags);
214 static int gpio_rcar_direction_output(struct gpio_chip *chip, unsigned offset,
217 /* write GPIO value to output before selecting output mode of pin */
218 gpio_rcar_set(chip, offset, value);
219 gpio_rcar_config_general_input_output_mode(chip, offset, true);
223 static int gpio_rcar_to_irq(struct gpio_chip *chip, unsigned offset)
225 return irq_create_mapping(gpio_to_priv(chip)->irq_domain, offset);
228 static int gpio_rcar_irq_domain_map(struct irq_domain *h, unsigned int virq,
231 struct gpio_rcar_priv *p = h->host_data;
233 dev_dbg(&p->pdev->dev, "map hw irq = %d, virq = %d\n", (int)hw, virq);
235 irq_set_chip_data(virq, h->host_data);
236 irq_set_chip_and_handler(virq, &p->irq_chip, handle_level_irq);
237 set_irq_flags(virq, IRQF_VALID); /* kill me now */
241 static struct irq_domain_ops gpio_rcar_irq_domain_ops = {
242 .map = gpio_rcar_irq_domain_map,
245 static int gpio_rcar_probe(struct platform_device *pdev)
247 struct gpio_rcar_config *pdata = pdev->dev.platform_data;
248 struct gpio_rcar_priv *p;
249 struct resource *io, *irq;
250 struct gpio_chip *gpio_chip;
251 struct irq_chip *irq_chip;
252 const char *name = dev_name(&pdev->dev);
255 p = devm_kzalloc(&pdev->dev, sizeof(*p), GFP_KERNEL);
257 dev_err(&pdev->dev, "failed to allocate driver data\n");
262 /* deal with driver instance configuration */
267 platform_set_drvdata(pdev, p);
268 spin_lock_init(&p->lock);
270 io = platform_get_resource(pdev, IORESOURCE_MEM, 0);
271 irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
274 dev_err(&pdev->dev, "missing IRQ or IOMEM\n");
279 p->base = devm_ioremap_nocache(&pdev->dev, io->start,
282 dev_err(&pdev->dev, "failed to remap I/O memory\n");
287 gpio_chip = &p->gpio_chip;
288 gpio_chip->direction_input = gpio_rcar_direction_input;
289 gpio_chip->get = gpio_rcar_get;
290 gpio_chip->direction_output = gpio_rcar_direction_output;
291 gpio_chip->set = gpio_rcar_set;
292 gpio_chip->to_irq = gpio_rcar_to_irq;
293 gpio_chip->label = name;
294 gpio_chip->owner = THIS_MODULE;
295 gpio_chip->base = p->config.gpio_base;
296 gpio_chip->ngpio = p->config.number_of_pins;
298 irq_chip = &p->irq_chip;
299 irq_chip->name = name;
300 irq_chip->irq_mask = gpio_rcar_irq_disable;
301 irq_chip->irq_unmask = gpio_rcar_irq_enable;
302 irq_chip->irq_enable = gpio_rcar_irq_enable;
303 irq_chip->irq_disable = gpio_rcar_irq_disable;
304 irq_chip->irq_set_type = gpio_rcar_irq_set_type;
305 irq_chip->flags = IRQCHIP_SKIP_SET_WAKE | IRQCHIP_SET_TYPE_MASKED;
307 p->irq_domain = irq_domain_add_simple(pdev->dev.of_node,
308 p->config.number_of_pins,
310 &gpio_rcar_irq_domain_ops, p);
311 if (!p->irq_domain) {
313 dev_err(&pdev->dev, "cannot initialize irq domain\n");
317 if (devm_request_irq(&pdev->dev, irq->start,
318 gpio_rcar_irq_handler, 0, name, p)) {
319 dev_err(&pdev->dev, "failed to request IRQ\n");
324 ret = gpiochip_add(gpio_chip);
326 dev_err(&pdev->dev, "failed to add GPIO controller\n");
330 dev_info(&pdev->dev, "driving %d GPIOs\n", p->config.number_of_pins);
332 /* warn in case of mismatch if irq base is specified */
333 if (p->config.irq_base) {
334 ret = irq_find_mapping(p->irq_domain, 0);
335 if (p->config.irq_base != ret)
336 dev_warn(&pdev->dev, "irq base mismatch (%u/%u)\n",
337 p->config.irq_base, ret);
343 irq_domain_remove(p->irq_domain);
348 static int gpio_rcar_remove(struct platform_device *pdev)
350 struct gpio_rcar_priv *p = platform_get_drvdata(pdev);
353 ret = gpiochip_remove(&p->gpio_chip);
357 irq_domain_remove(p->irq_domain);
361 static struct platform_driver gpio_rcar_device_driver = {
362 .probe = gpio_rcar_probe,
363 .remove = gpio_rcar_remove,
369 module_platform_driver(gpio_rcar_device_driver);
371 MODULE_AUTHOR("Magnus Damm");
372 MODULE_DESCRIPTION("Renesas R-Car GPIO Driver");
373 MODULE_LICENSE("GPL v2");