2 * MXC GPIO support. (c) 2008 Daniel Mack <daniel@caiaq.de>
3 * Copyright 2008 Juergen Beisert, kernel@pengutronix.de
5 * Based on code from Freescale,
6 * Copyright (C) 2004-2010 Freescale Semiconductor, Inc. All Rights Reserved.
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License
10 * as published by the Free Software Foundation; either version 2
11 * of the License, or (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
23 #include <linux/err.h>
24 #include <linux/init.h>
25 #include <linux/interrupt.h>
27 #include <linux/irq.h>
28 #include <linux/irqdomain.h>
29 #include <linux/gpio.h>
31 #include <linux/of_address.h>
32 #include <linux/of_device.h>
33 #include <linux/platform_device.h>
34 #include <linux/slab.h>
35 #include <linux/basic_mmio_gpio.h>
36 #include <linux/module.h>
41 #define PINCTRL_DOUT(p) ((is_imx23_gpio(p) ? 0x0500 : 0x0700) + (p->id) * 0x10)
42 #define PINCTRL_DIN(p) ((is_imx23_gpio(p) ? 0x0600 : 0x0900) + (p->id) * 0x10)
43 #define PINCTRL_DOE(p) ((is_imx23_gpio(p) ? 0x0700 : 0x0b00) + (p->id) * 0x10)
44 #define PINCTRL_PIN2IRQ(p) ((is_imx23_gpio(p) ? 0x0800 : 0x1000) + (p->id) * 0x10)
45 #define PINCTRL_IRQEN(p) ((is_imx23_gpio(p) ? 0x0900 : 0x1100) + (p->id) * 0x10)
46 #define PINCTRL_IRQLEV(p) ((is_imx23_gpio(p) ? 0x0a00 : 0x1200) + (p->id) * 0x10)
47 #define PINCTRL_IRQPOL(p) ((is_imx23_gpio(p) ? 0x0b00 : 0x1300) + (p->id) * 0x10)
48 #define PINCTRL_IRQSTAT(p) ((is_imx23_gpio(p) ? 0x0c00 : 0x1400) + (p->id) * 0x10)
50 #define GPIO_INT_FALL_EDGE 0x0
51 #define GPIO_INT_LOW_LEV 0x1
52 #define GPIO_INT_RISE_EDGE 0x2
53 #define GPIO_INT_HIGH_LEV 0x3
54 #define GPIO_INT_LEV_MASK (1 << 0)
55 #define GPIO_INT_POL_MASK (1 << 1)
62 struct mxs_gpio_port {
66 struct irq_domain *domain;
67 struct bgpio_chip bgc;
68 enum mxs_gpio_id devid;
71 static inline int is_imx23_gpio(struct mxs_gpio_port *port)
73 return port->devid == IMX23_GPIO;
76 static inline int is_imx28_gpio(struct mxs_gpio_port *port)
78 return port->devid == IMX28_GPIO;
81 /* Note: This driver assumes 32 GPIOs are handled in one register */
83 static int mxs_gpio_set_irq_type(struct irq_data *d, unsigned int type)
85 u32 pin_mask = 1 << d->hwirq;
86 struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d);
87 struct mxs_gpio_port *port = gc->private;
88 void __iomem *pin_addr;
92 case IRQ_TYPE_EDGE_RISING:
93 edge = GPIO_INT_RISE_EDGE;
95 case IRQ_TYPE_EDGE_FALLING:
96 edge = GPIO_INT_FALL_EDGE;
98 case IRQ_TYPE_LEVEL_LOW:
99 edge = GPIO_INT_LOW_LEV;
101 case IRQ_TYPE_LEVEL_HIGH:
102 edge = GPIO_INT_HIGH_LEV;
108 /* set level or edge */
109 pin_addr = port->base + PINCTRL_IRQLEV(port);
110 if (edge & GPIO_INT_LEV_MASK)
111 writel(pin_mask, pin_addr + MXS_SET);
113 writel(pin_mask, pin_addr + MXS_CLR);
116 pin_addr = port->base + PINCTRL_IRQPOL(port);
117 if (edge & GPIO_INT_POL_MASK)
118 writel(pin_mask, pin_addr + MXS_SET);
120 writel(pin_mask, pin_addr + MXS_CLR);
123 port->base + PINCTRL_IRQSTAT(port) + MXS_CLR);
128 /* MXS has one interrupt *per* gpio port */
129 static void mxs_gpio_irq_handler(u32 irq, struct irq_desc *desc)
132 struct mxs_gpio_port *port = irq_get_handler_data(irq);
134 desc->irq_data.chip->irq_ack(&desc->irq_data);
136 irq_stat = readl(port->base + PINCTRL_IRQSTAT(port)) &
137 readl(port->base + PINCTRL_IRQEN(port));
139 while (irq_stat != 0) {
140 int irqoffset = fls(irq_stat) - 1;
141 generic_handle_irq(irq_find_mapping(port->domain, irqoffset));
142 irq_stat &= ~(1 << irqoffset);
147 * Set interrupt number "irq" in the GPIO as a wake-up source.
148 * While system is running, all registered GPIO interrupts need to have
149 * wake-up enabled. When system is suspended, only selected GPIO interrupts
150 * need to have wake-up enabled.
151 * @param irq interrupt source number
152 * @param enable enable as wake-up if equal to non-zero
153 * @return This function returns 0 on success.
155 static int mxs_gpio_set_wake_irq(struct irq_data *d, unsigned int enable)
157 struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d);
158 struct mxs_gpio_port *port = gc->private;
161 enable_irq_wake(port->irq);
163 disable_irq_wake(port->irq);
168 static void __init mxs_gpio_init_gc(struct mxs_gpio_port *port, int irq_base)
170 struct irq_chip_generic *gc;
171 struct irq_chip_type *ct;
173 gc = irq_alloc_generic_chip("gpio-mxs", 1, irq_base,
174 port->base, handle_level_irq);
178 ct->chip.irq_ack = irq_gc_ack_set_bit;
179 ct->chip.irq_mask = irq_gc_mask_clr_bit;
180 ct->chip.irq_unmask = irq_gc_mask_set_bit;
181 ct->chip.irq_set_type = mxs_gpio_set_irq_type;
182 ct->chip.irq_set_wake = mxs_gpio_set_wake_irq;
183 ct->regs.ack = PINCTRL_IRQSTAT(port) + MXS_CLR;
184 ct->regs.mask = PINCTRL_IRQEN(port);
186 irq_setup_generic_chip(gc, IRQ_MSK(32), 0, IRQ_NOREQUEST, 0);
189 static int mxs_gpio_to_irq(struct gpio_chip *gc, unsigned offset)
191 struct bgpio_chip *bgc = to_bgpio_chip(gc);
192 struct mxs_gpio_port *port =
193 container_of(bgc, struct mxs_gpio_port, bgc);
195 return irq_find_mapping(port->domain, offset);
198 static struct platform_device_id mxs_gpio_ids[] = {
200 .name = "imx23-gpio",
201 .driver_data = IMX23_GPIO,
203 .name = "imx28-gpio",
204 .driver_data = IMX28_GPIO,
209 MODULE_DEVICE_TABLE(platform, mxs_gpio_ids);
211 static const struct of_device_id mxs_gpio_dt_ids[] = {
212 { .compatible = "fsl,imx23-gpio", .data = (void *) IMX23_GPIO, },
213 { .compatible = "fsl,imx28-gpio", .data = (void *) IMX28_GPIO, },
216 MODULE_DEVICE_TABLE(of, mxs_gpio_dt_ids);
218 static int mxs_gpio_probe(struct platform_device *pdev)
220 const struct of_device_id *of_id =
221 of_match_device(mxs_gpio_dt_ids, &pdev->dev);
222 struct device_node *np = pdev->dev.of_node;
223 struct device_node *parent;
224 static void __iomem *base;
225 struct mxs_gpio_port *port;
226 struct resource *iores = NULL;
230 port = devm_kzalloc(&pdev->dev, sizeof(*port), GFP_KERNEL);
235 port->id = of_alias_get_id(np, "gpio");
238 port->devid = (enum mxs_gpio_id) of_id->data;
241 port->devid = pdev->id_entry->driver_data;
244 port->irq = platform_get_irq(pdev, 0);
249 * map memory region only once, as all the gpio ports
254 parent = of_get_parent(np);
255 base = of_iomap(parent, 0);
258 return -EADDRNOTAVAIL;
260 iores = platform_get_resource(pdev, IORESOURCE_MEM, 0);
261 base = devm_ioremap_resource(&pdev->dev, iores);
263 return PTR_ERR(base);
269 * select the pin interrupt functionality but initially
270 * disable the interrupts
272 writel(~0U, port->base + PINCTRL_PIN2IRQ(port));
273 writel(0, port->base + PINCTRL_IRQEN(port));
275 /* clear address has to be used to clear IRQSTAT bits */
276 writel(~0U, port->base + PINCTRL_IRQSTAT(port) + MXS_CLR);
278 irq_base = irq_alloc_descs(-1, 0, 32, numa_node_id());
282 port->domain = irq_domain_add_legacy(np, 32, irq_base, 0,
283 &irq_domain_simple_ops, NULL);
286 goto out_irqdesc_free;
289 /* gpio-mxs can be a generic irq chip */
290 mxs_gpio_init_gc(port, irq_base);
292 /* setup one handler for each entry */
293 irq_set_chained_handler(port->irq, mxs_gpio_irq_handler);
294 irq_set_handler_data(port->irq, port);
296 err = bgpio_init(&port->bgc, &pdev->dev, 4,
297 port->base + PINCTRL_DIN(port),
298 port->base + PINCTRL_DOUT(port), NULL,
299 port->base + PINCTRL_DOE(port), NULL, 0);
301 goto out_irqdesc_free;
303 port->bgc.gc.to_irq = mxs_gpio_to_irq;
304 port->bgc.gc.base = port->id * 32;
306 err = gpiochip_add(&port->bgc.gc);
308 goto out_bgpio_remove;
313 bgpio_remove(&port->bgc);
315 irq_free_descs(irq_base, 32);
319 static struct platform_driver mxs_gpio_driver = {
322 .owner = THIS_MODULE,
323 .of_match_table = mxs_gpio_dt_ids,
325 .probe = mxs_gpio_probe,
326 .id_table = mxs_gpio_ids,
329 static int __init mxs_gpio_init(void)
331 return platform_driver_register(&mxs_gpio_driver);
333 postcore_initcall(mxs_gpio_init);
335 MODULE_AUTHOR("Freescale Semiconductor, "
336 "Daniel Mack <danielncaiaq.de>, "
337 "Juergen Beisert <kernel@pengutronix.de>");
338 MODULE_DESCRIPTION("Freescale MXS GPIO");
339 MODULE_LICENSE("GPL");