drivers/gator/gator_events_scorpion.c

   1 /**
   2  * Copyright (C) ARM Limited 2011-2014. All rights reserved.
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License version 2 as
   6  * published by the Free Software Foundation.
   7  */
   8
   9 #include "gator.h"
  10
  11 /* gator_events_perf_pmu.c is used if perf is supported */
  12 #if GATOR_NO_PERF_SUPPORT
  13
  14 static const char *pmnc_name;
  15 static int pmnc_counters;
  16
  17 /* Per-CPU PMNC: config reg */
  18 #define PMNC_E          (1 << 0)        /* Enable all counters */
  19 #define PMNC_P          (1 << 1)        /* Reset all counters */
  20 #define PMNC_C          (1 << 2)        /* Cycle counter reset */
  21 #define PMNC_D          (1 << 3)        /* CCNT counts every 64th cpu cycle */
  22 #define PMNC_X          (1 << 4)        /* Export to ETM */
  23 #define PMNC_DP         (1 << 5)        /* Disable CCNT if non-invasive debug */
  24 #define PMNC_MASK       0x3f    /* Mask for writable bits */
  25
  26 /* ccnt reg */
  27 #define CCNT_REG        (1 << 31)
  28
  29 #define CCNT            0
  30 #define CNT0            1
  31 #define CNTMAX          (4+1)
  32
  33 static unsigned long pmnc_enabled[CNTMAX];
  34 static unsigned long pmnc_event[CNTMAX];
  35 static unsigned long pmnc_key[CNTMAX];
  36
  37 static DEFINE_PER_CPU(int[CNTMAX * 2], perfCnt);
  38
  39 enum scorpion_perf_types {
  40         SCORPION_ICACHE_EXPL_INV = 0x4c,
  41         SCORPION_ICACHE_MISS = 0x4d,
  42         SCORPION_ICACHE_ACCESS = 0x4e,
  43         SCORPION_ICACHE_CACHEREQ_L2 = 0x4f,
  44         SCORPION_ICACHE_NOCACHE_L2 = 0x50,
  45         SCORPION_HIQUP_NOPED = 0x51,
  46         SCORPION_DATA_ABORT = 0x52,
  47         SCORPION_IRQ = 0x53,
  48         SCORPION_FIQ = 0x54,
  49         SCORPION_ALL_EXCPT = 0x55,
  50         SCORPION_UNDEF = 0x56,
  51         SCORPION_SVC = 0x57,
  52         SCORPION_SMC = 0x58,
  53         SCORPION_PREFETCH_ABORT = 0x59,
  54         SCORPION_INDEX_CHECK = 0x5a,
  55         SCORPION_NULL_CHECK = 0x5b,
  56         SCORPION_EXPL_ICIALLU = 0x5c,
  57         SCORPION_IMPL_ICIALLU = 0x5d,
  58         SCORPION_NONICIALLU_BTAC_INV = 0x5e,
  59         SCORPION_ICIMVAU_IMPL_ICIALLU = 0x5f,
  60         SCORPION_SPIPE_ONLY_CYCLES = 0x60,
  61         SCORPION_XPIPE_ONLY_CYCLES = 0x61,
  62         SCORPION_DUAL_CYCLES = 0x62,
  63         SCORPION_DISPATCH_ANY_CYCLES = 0x63,
  64         SCORPION_FIFO_FULLBLK_CMT = 0x64,
  65         SCORPION_FAIL_COND_INST = 0x65,
  66         SCORPION_PASS_COND_INST = 0x66,
  67         SCORPION_ALLOW_VU_CLK = 0x67,
  68         SCORPION_VU_IDLE = 0x68,
  69         SCORPION_ALLOW_L2_CLK = 0x69,
  70         SCORPION_L2_IDLE = 0x6a,
  71         SCORPION_DTLB_IMPL_INV_SCTLR_DACR = 0x6b,
  72         SCORPION_DTLB_EXPL_INV = 0x6c,
  73         SCORPION_DTLB_MISS = 0x6d,
  74         SCORPION_DTLB_ACCESS = 0x6e,
  75         SCORPION_ITLB_MISS = 0x6f,
  76         SCORPION_ITLB_IMPL_INV = 0x70,
  77         SCORPION_ITLB_EXPL_INV = 0x71,
  78         SCORPION_UTLB_D_MISS = 0x72,
  79         SCORPION_UTLB_D_ACCESS = 0x73,
  80         SCORPION_UTLB_I_MISS = 0x74,
  81         SCORPION_UTLB_I_ACCESS = 0x75,
  82         SCORPION_UTLB_INV_ASID = 0x76,
  83         SCORPION_UTLB_INV_MVA = 0x77,
  84         SCORPION_UTLB_INV_ALL = 0x78,
  85         SCORPION_S2_HOLD_RDQ_UNAVAIL = 0x79,
  86         SCORPION_S2_HOLD = 0x7a,
  87         SCORPION_S2_HOLD_DEV_OP = 0x7b,
  88         SCORPION_S2_HOLD_ORDER = 0x7c,
  89         SCORPION_S2_HOLD_BARRIER = 0x7d,
  90         SCORPION_VIU_DUAL_CYCLE = 0x7e,
  91         SCORPION_VIU_SINGLE_CYCLE = 0x7f,
  92         SCORPION_VX_PIPE_WAR_STALL_CYCLES = 0x80,
  93         SCORPION_VX_PIPE_WAW_STALL_CYCLES = 0x81,
  94         SCORPION_VX_PIPE_RAW_STALL_CYCLES = 0x82,
  95         SCORPION_VX_PIPE_LOAD_USE_STALL = 0x83,
  96         SCORPION_VS_PIPE_WAR_STALL_CYCLES = 0x84,
  97         SCORPION_VS_PIPE_WAW_STALL_CYCLES = 0x85,
  98         SCORPION_VS_PIPE_RAW_STALL_CYCLES = 0x86,
  99         SCORPION_EXCEPTIONS_INV_OPERATION = 0x87,
 100         SCORPION_EXCEPTIONS_DIV_BY_ZERO = 0x88,
 101         SCORPION_COND_INST_FAIL_VX_PIPE = 0x89,
 102         SCORPION_COND_INST_FAIL_VS_PIPE = 0x8a,
 103         SCORPION_EXCEPTIONS_OVERFLOW = 0x8b,
 104         SCORPION_EXCEPTIONS_UNDERFLOW = 0x8c,
 105         SCORPION_EXCEPTIONS_DENORM = 0x8d,
 106 #ifdef CONFIG_ARCH_MSM_SCORPIONMP
 107         SCORPIONMP_NUM_BARRIERS = 0x8e,
 108         SCORPIONMP_BARRIER_CYCLES = 0x8f,
 109 #else
 110         SCORPION_BANK_AB_HIT = 0x8e,
 111         SCORPION_BANK_AB_ACCESS = 0x8f,
 112         SCORPION_BANK_CD_HIT = 0x90,
 113         SCORPION_BANK_CD_ACCESS = 0x91,
 114         SCORPION_BANK_AB_DSIDE_HIT = 0x92,
 115         SCORPION_BANK_AB_DSIDE_ACCESS = 0x93,
 116         SCORPION_BANK_CD_DSIDE_HIT = 0x94,
 117         SCORPION_BANK_CD_DSIDE_ACCESS = 0x95,
 118         SCORPION_BANK_AB_ISIDE_HIT = 0x96,
 119         SCORPION_BANK_AB_ISIDE_ACCESS = 0x97,
 120         SCORPION_BANK_CD_ISIDE_HIT = 0x98,
 121         SCORPION_BANK_CD_ISIDE_ACCESS = 0x99,
 122         SCORPION_ISIDE_RD_WAIT = 0x9a,
 123         SCORPION_DSIDE_RD_WAIT = 0x9b,
 124         SCORPION_BANK_BYPASS_WRITE = 0x9c,
 125         SCORPION_BANK_AB_NON_CASTOUT = 0x9d,
 126         SCORPION_BANK_AB_L2_CASTOUT = 0x9e,
 127         SCORPION_BANK_CD_NON_CASTOUT = 0x9f,
 128         SCORPION_BANK_CD_L2_CASTOUT = 0xa0,
 129 #endif
 130         MSM_MAX_EVT
 131 };
 132
 133 struct scorp_evt {
 134         u32 evt_type;
 135         u32 val;
 136         u8 grp;
 137         u32 evt_type_act;
 138 };
 139
 140 static const struct scorp_evt sc_evt[] = {
 141         {SCORPION_ICACHE_EXPL_INV, 0x80000500, 0, 0x4d},
 142         {SCORPION_ICACHE_MISS, 0x80050000, 0, 0x4e},
 143         {SCORPION_ICACHE_ACCESS, 0x85000000, 0, 0x4f},
 144         {SCORPION_ICACHE_CACHEREQ_L2, 0x86000000, 0, 0x4f},
 145         {SCORPION_ICACHE_NOCACHE_L2, 0x87000000, 0, 0x4f},
 146         {SCORPION_HIQUP_NOPED, 0x80080000, 0, 0x4e},
 147         {SCORPION_DATA_ABORT, 0x8000000a, 0, 0x4c},
 148         {SCORPION_IRQ, 0x80000a00, 0, 0x4d},
 149         {SCORPION_FIQ, 0x800a0000, 0, 0x4e},
 150         {SCORPION_ALL_EXCPT, 0x8a000000, 0, 0x4f},
 151         {SCORPION_UNDEF, 0x8000000b, 0, 0x4c},
 152         {SCORPION_SVC, 0x80000b00, 0, 0x4d},
 153         {SCORPION_SMC, 0x800b0000, 0, 0x4e},
 154         {SCORPION_PREFETCH_ABORT, 0x8b000000, 0, 0x4f},
 155         {SCORPION_INDEX_CHECK, 0x8000000c, 0, 0x4c},
 156         {SCORPION_NULL_CHECK, 0x80000c00, 0, 0x4d},
 157         {SCORPION_EXPL_ICIALLU, 0x8000000d, 0, 0x4c},
 158         {SCORPION_IMPL_ICIALLU, 0x80000d00, 0, 0x4d},
 159         {SCORPION_NONICIALLU_BTAC_INV, 0x800d0000, 0, 0x4e},
 160         {SCORPION_ICIMVAU_IMPL_ICIALLU, 0x8d000000, 0, 0x4f},
 161
 162         {SCORPION_SPIPE_ONLY_CYCLES, 0x80000600, 1, 0x51},
 163         {SCORPION_XPIPE_ONLY_CYCLES, 0x80060000, 1, 0x52},
 164         {SCORPION_DUAL_CYCLES, 0x86000000, 1, 0x53},
 165         {SCORPION_DISPATCH_ANY_CYCLES, 0x89000000, 1, 0x53},
 166         {SCORPION_FIFO_FULLBLK_CMT, 0x8000000d, 1, 0x50},
 167         {SCORPION_FAIL_COND_INST, 0x800d0000, 1, 0x52},
 168         {SCORPION_PASS_COND_INST, 0x8d000000, 1, 0x53},
 169         {SCORPION_ALLOW_VU_CLK, 0x8000000e, 1, 0x50},
 170         {SCORPION_VU_IDLE, 0x80000e00, 1, 0x51},
 171         {SCORPION_ALLOW_L2_CLK, 0x800e0000, 1, 0x52},
 172         {SCORPION_L2_IDLE, 0x8e000000, 1, 0x53},
 173
 174         {SCORPION_DTLB_IMPL_INV_SCTLR_DACR, 0x80000001, 2, 0x54},
 175         {SCORPION_DTLB_EXPL_INV, 0x80000100, 2, 0x55},
 176         {SCORPION_DTLB_MISS, 0x80010000, 2, 0x56},
 177         {SCORPION_DTLB_ACCESS, 0x81000000, 2, 0x57},
 178         {SCORPION_ITLB_MISS, 0x80000200, 2, 0x55},
 179         {SCORPION_ITLB_IMPL_INV, 0x80020000, 2, 0x56},
 180         {SCORPION_ITLB_EXPL_INV, 0x82000000, 2, 0x57},
 181         {SCORPION_UTLB_D_MISS, 0x80000003, 2, 0x54},
 182         {SCORPION_UTLB_D_ACCESS, 0x80000300, 2, 0x55},
 183         {SCORPION_UTLB_I_MISS, 0x80030000, 2, 0x56},
 184         {SCORPION_UTLB_I_ACCESS, 0x83000000, 2, 0x57},
 185         {SCORPION_UTLB_INV_ASID, 0x80000400, 2, 0x55},
 186         {SCORPION_UTLB_INV_MVA, 0x80040000, 2, 0x56},
 187         {SCORPION_UTLB_INV_ALL, 0x84000000, 2, 0x57},
 188         {SCORPION_S2_HOLD_RDQ_UNAVAIL, 0x80000800, 2, 0x55},
 189         {SCORPION_S2_HOLD, 0x88000000, 2, 0x57},
 190         {SCORPION_S2_HOLD_DEV_OP, 0x80000900, 2, 0x55},
 191         {SCORPION_S2_HOLD_ORDER, 0x80090000, 2, 0x56},
 192         {SCORPION_S2_HOLD_BARRIER, 0x89000000, 2, 0x57},
 193
 194         {SCORPION_VIU_DUAL_CYCLE, 0x80000001, 4, 0x5c},
 195         {SCORPION_VIU_SINGLE_CYCLE, 0x80000100, 4, 0x5d},
 196         {SCORPION_VX_PIPE_WAR_STALL_CYCLES, 0x80000005, 4, 0x5c},
 197         {SCORPION_VX_PIPE_WAW_STALL_CYCLES, 0x80000500, 4, 0x5d},
 198         {SCORPION_VX_PIPE_RAW_STALL_CYCLES, 0x80050000, 4, 0x5e},
 199         {SCORPION_VX_PIPE_LOAD_USE_STALL, 0x80000007, 4, 0x5c},
 200         {SCORPION_VS_PIPE_WAR_STALL_CYCLES, 0x80000008, 4, 0x5c},
 201         {SCORPION_VS_PIPE_WAW_STALL_CYCLES, 0x80000800, 4, 0x5d},
 202         {SCORPION_VS_PIPE_RAW_STALL_CYCLES, 0x80080000, 4, 0x5e},
 203         {SCORPION_EXCEPTIONS_INV_OPERATION, 0x8000000b, 4, 0x5c},
 204         {SCORPION_EXCEPTIONS_DIV_BY_ZERO, 0x80000b00, 4, 0x5d},
 205         {SCORPION_COND_INST_FAIL_VX_PIPE, 0x800b0000, 4, 0x5e},
 206         {SCORPION_COND_INST_FAIL_VS_PIPE, 0x8b000000, 4, 0x5f},
 207         {SCORPION_EXCEPTIONS_OVERFLOW, 0x8000000c, 4, 0x5c},
 208         {SCORPION_EXCEPTIONS_UNDERFLOW, 0x80000c00, 4, 0x5d},
 209         {SCORPION_EXCEPTIONS_DENORM, 0x8c000000, 4, 0x5f},
 210
 211 #ifdef CONFIG_ARCH_MSM_SCORPIONMP
 212         {SCORPIONMP_NUM_BARRIERS, 0x80000e00, 3, 0x59},
 213         {SCORPIONMP_BARRIER_CYCLES, 0x800e0000, 3, 0x5a},
 214 #else
 215         {SCORPION_BANK_AB_HIT, 0x80000001, 3, 0x58},
 216         {SCORPION_BANK_AB_ACCESS, 0x80000100, 3, 0x59},
 217         {SCORPION_BANK_CD_HIT, 0x80010000, 3, 0x5a},
 218         {SCORPION_BANK_CD_ACCESS, 0x81000000, 3, 0x5b},
 219         {SCORPION_BANK_AB_DSIDE_HIT, 0x80000002, 3, 0x58},
 220         {SCORPION_BANK_AB_DSIDE_ACCESS, 0x80000200, 3, 0x59},
 221         {SCORPION_BANK_CD_DSIDE_HIT, 0x80020000, 3, 0x5a},
 222         {SCORPION_BANK_CD_DSIDE_ACCESS, 0x82000000, 3, 0x5b},
 223         {SCORPION_BANK_AB_ISIDE_HIT, 0x80000003, 3, 0x58},
 224         {SCORPION_BANK_AB_ISIDE_ACCESS, 0x80000300, 3, 0x59},
 225         {SCORPION_BANK_CD_ISIDE_HIT, 0x80030000, 3, 0x5a},
 226         {SCORPION_BANK_CD_ISIDE_ACCESS, 0x83000000, 3, 0x5b},
 227         {SCORPION_ISIDE_RD_WAIT, 0x80000009, 3, 0x58},
 228         {SCORPION_DSIDE_RD_WAIT, 0x80090000, 3, 0x5a},
 229         {SCORPION_BANK_BYPASS_WRITE, 0x8000000a, 3, 0x58},
 230         {SCORPION_BANK_AB_NON_CASTOUT, 0x8000000c, 3, 0x58},
 231         {SCORPION_BANK_AB_L2_CASTOUT, 0x80000c00, 3, 0x59},
 232         {SCORPION_BANK_CD_NON_CASTOUT, 0x800c0000, 3, 0x5a},
 233         {SCORPION_BANK_CD_L2_CASTOUT, 0x8c000000, 3, 0x5b},
 234 #endif
 235 };
 236
 237 static inline void scorpion_pmnc_write(u32 val)
 238 {
 239         val &= PMNC_MASK;
 240         asm volatile("mcr p15, 0, %0, c9, c12, 0" : : "r" (val));
 241 }
 242
 243 static inline u32 scorpion_pmnc_read(void)
 244 {
 245         u32 val;
 246
 247         asm volatile("mrc p15, 0, %0, c9, c12, 0" : "=r" (val));
 248         return val;
 249 }
 250
 251 static inline u32 scorpion_ccnt_read(void)
 252 {
 253         u32 val;
 254
 255         asm volatile("mrc p15, 0, %0, c9, c13, 0" : "=r" (val));
 256         return val;
 257 }
 258
 259 static inline u32 scorpion_cntn_read(void)
 260 {
 261         u32 val;
 262
 263         asm volatile("mrc p15, 0, %0, c9, c13, 2" : "=r" (val));
 264         return val;
 265 }
 266
 267 static inline u32 scorpion_pmnc_enable_counter(unsigned int cnt)
 268 {
 269         u32 val;
 270
 271         if (cnt >= CNTMAX) {
 272                 pr_err("gator: CPU%u enabling wrong PMNC counter %d\n", smp_processor_id(), cnt);
 273                 return -1;
 274         }
 275
 276         if (cnt == CCNT)
 277                 val = CCNT_REG;
 278         else
 279                 val = (1 << (cnt - CNT0));
 280
 281         asm volatile("mcr p15, 0, %0, c9, c12, 1" : : "r" (val));
 282
 283         return cnt;
 284 }
 285
 286 static inline u32 scorpion_pmnc_disable_counter(unsigned int cnt)
 287 {
 288         u32 val;
 289
 290         if (cnt >= CNTMAX) {
 291                 pr_err("gator: CPU%u disabling wrong PMNC counter %d\n", smp_processor_id(), cnt);
 292                 return -1;
 293         }
 294
 295         if (cnt == CCNT)
 296                 val = CCNT_REG;
 297         else
 298                 val = (1 << (cnt - CNT0));
 299
 300         asm volatile("mcr p15, 0, %0, c9, c12, 2" : : "r" (val));
 301
 302         return cnt;
 303 }
 304
 305 static inline int scorpion_pmnc_select_counter(unsigned int cnt)
 306 {
 307         u32 val;
 308
 309         if ((cnt == CCNT) || (cnt >= CNTMAX)) {
 310                 pr_err("gator: CPU%u selecting wrong PMNC counter %d\n", smp_processor_id(), cnt);
 311                 return -1;
 312         }
 313
 314         val = (cnt - CNT0);
 315         asm volatile("mcr p15, 0, %0, c9, c12, 5" : : "r" (val));
 316
 317         return cnt;
 318 }
 319
 320 static u32 scorpion_read_lpm0(void)
 321 {
 322         u32 val;
 323
 324         asm volatile("mrc p15, 0, %0, c15, c0, 0" : "=r" (val));
 325         return val;
 326 }
 327
 328 static void scorpion_write_lpm0(u32 val)
 329 {
 330         asm volatile("mcr p15, 0, %0, c15, c0, 0" : : "r" (val));
 331 }
 332
 333 static u32 scorpion_read_lpm1(void)
 334 {
 335         u32 val;
 336
 337         asm volatile("mrc p15, 1, %0, c15, c0, 0" : "=r" (val));
 338         return val;
 339 }
 340
 341 static void scorpion_write_lpm1(u32 val)
 342 {
 343         asm volatile("mcr p15, 1, %0, c15, c0, 0" : : "r" (val));
 344 }
 345
 346 static u32 scorpion_read_lpm2(void)
 347 {
 348         u32 val;
 349
 350         asm volatile("mrc p15, 2, %0, c15, c0, 0" : "=r" (val));
 351         return val;
 352 }
 353
 354 static void scorpion_write_lpm2(u32 val)
 355 {
 356         asm volatile("mcr p15, 2, %0, c15, c0, 0" : : "r" (val));
 357 }
 358
 359 static u32 scorpion_read_l2lpm(void)
 360 {
 361         u32 val;
 362
 363         asm volatile("mrc p15, 3, %0, c15, c2, 0" : "=r" (val));
 364         return val;
 365 }
 366
 367 static void scorpion_write_l2lpm(u32 val)
 368 {
 369         asm volatile("mcr p15, 3, %0, c15, c2, 0" : : "r" (val));
 370 }
 371
 372 static u32 scorpion_read_vlpm(void)
 373 {
 374         u32 val;
 375
 376         asm volatile("mrc p10, 7, %0, c11, c0, 0" : "=r" (val));
 377         return val;
 378 }
 379
 380 static void scorpion_write_vlpm(u32 val)
 381 {
 382         asm volatile("mcr p10, 7, %0, c11, c0, 0" : : "r" (val));
 383 }
 384
 385 struct scorpion_access_funcs {
 386         u32 (*read)(void);
 387         void (*write)(u32);
 388 };
 389
 390 struct scorpion_access_funcs scor_func[] = {
 391         {scorpion_read_lpm0, scorpion_write_lpm0},
 392         {scorpion_read_lpm1, scorpion_write_lpm1},
 393         {scorpion_read_lpm2, scorpion_write_lpm2},
 394         {scorpion_read_l2lpm, scorpion_write_l2lpm},
 395         {scorpion_read_vlpm, scorpion_write_vlpm},
 396 };
 397
 398 u32 venum_orig_val;
 399 u32 fp_orig_val;
 400
 401 static void scorpion_pre_vlpm(void)
 402 {
 403         u32 venum_new_val;
 404         u32 fp_new_val;
 405
 406         /* CPACR Enable CP10 access */
 407         asm volatile("mrc p15, 0, %0, c1, c0, 2" : "=r" (venum_orig_val));
 408         venum_new_val = venum_orig_val | 0x00300000;
 409         asm volatile("mcr p15, 0, %0, c1, c0, 2" : : "r" (venum_new_val));
 410         /* Enable FPEXC */
 411         asm volatile("mrc p10, 7, %0, c8, c0, 0" : "=r" (fp_orig_val));
 412         fp_new_val = fp_orig_val | 0x40000000;
 413         asm volatile("mcr p10, 7, %0, c8, c0, 0" : : "r" (fp_new_val));
 414 }
 415
 416 static void scorpion_post_vlpm(void)
 417 {
 418         /* Restore FPEXC */
 419         asm volatile("mcr p10, 7, %0, c8, c0, 0" : : "r" (fp_orig_val));
 420         /* Restore CPACR */
 421         asm volatile("mcr p15, 0, %0, c1, c0, 2" : : "r" (venum_orig_val));
 422 }
 423
 424 #define COLMN0MASK 0x000000ff
 425 #define COLMN1MASK 0x0000ff00
 426 #define COLMN2MASK 0x00ff0000
 427 static u32 scorpion_get_columnmask(u32 setval)
 428 {
 429         if (setval & COLMN0MASK)
 430                 return 0xffffff00;
 431         if (setval & COLMN1MASK)
 432                 return 0xffff00ff;
 433         if (setval & COLMN2MASK)
 434                 return 0xff00ffff;
 435         return 0x80ffffff;
 436 }
 437
 438 static void scorpion_evt_setup(u32 gr, u32 setval)
 439 {
 440         u32 val;
 441
 442         if (gr == 4)
 443                 scorpion_pre_vlpm();
 444         val = scorpion_get_columnmask(setval) & scor_func[gr].read();
 445         val = val | setval;
 446         scor_func[gr].write(val);
 447         if (gr == 4)
 448                 scorpion_post_vlpm();
 449 }
 450
 451 static int get_scorpion_evtinfo(unsigned int evt_type, struct scorp_evt *evtinfo)
 452 {
 453         u32 idx;
 454
 455         if ((evt_type < 0x4c) || (evt_type >= MSM_MAX_EVT))
 456                 return 0;
 457         idx = evt_type - 0x4c;
 458         if (sc_evt[idx].evt_type == evt_type) {
 459                 evtinfo->val = sc_evt[idx].val;
 460                 evtinfo->grp = sc_evt[idx].grp;
 461                 evtinfo->evt_type_act = sc_evt[idx].evt_type_act;
 462                 return 1;
 463         }
 464         return 0;
 465 }
 466
 467 static inline void scorpion_pmnc_write_evtsel(unsigned int cnt, u32 val)
 468 {
 469         if (scorpion_pmnc_select_counter(cnt) == cnt) {
 470                 if (val < 0x40) {
 471                         asm volatile("mcr p15, 0, %0, c9, c13, 1" : : "r" (val));
 472                 } else {
 473                         u32 zero = 0;
 474                         struct scorp_evt evtinfo;
 475                         /* extract evtinfo.grp and evtinfo.tevt_type_act from val */
 476                         if (get_scorpion_evtinfo(val, &evtinfo) == 0)
 477                                 return;
 478                         asm volatile("mcr p15, 0, %0, c9, c13, 1" : : "r" (evtinfo.evt_type_act));
 479                         asm volatile("mcr p15, 0, %0, c9, c15, 0" : : "r" (zero));
 480                         scorpion_evt_setup(evtinfo.grp, val);
 481                 }
 482         }
 483 }
 484
 485 static void scorpion_pmnc_reset_counter(unsigned int cnt)
 486 {
 487         u32 val = 0;
 488
 489         if (cnt == CCNT) {
 490                 scorpion_pmnc_disable_counter(cnt);
 491
 492                 asm volatile("mcr p15, 0, %0, c9, c13, 0" : : "r" (val));
 493
 494                 if (pmnc_enabled[cnt] != 0)
 495                         scorpion_pmnc_enable_counter(cnt);
 496
 497         } else if (cnt >= CNTMAX) {
 498                 pr_err("gator: CPU%u resetting wrong PMNC counter %d\n", smp_processor_id(), cnt);
 499         } else {
 500                 scorpion_pmnc_disable_counter(cnt);
 501
 502                 if (scorpion_pmnc_select_counter(cnt) == cnt)
 503                         asm volatile("mcr p15, 0, %0, c9, c13, 2" : : "r" (val));
 504
 505                 if (pmnc_enabled[cnt] != 0)
 506                         scorpion_pmnc_enable_counter(cnt);
 507         }
 508 }
 509
 510 static int gator_events_scorpion_create_files(struct super_block *sb, struct dentry *root)
 511 {
 512         struct dentry *dir;
 513         int i;
 514
 515         for (i = 0; i < pmnc_counters; i++) {
 516                 char buf[40];
 517
 518                 if (i == 0)
 519                         snprintf(buf, sizeof(buf), "%s_ccnt", pmnc_name);
 520                 else
 521                         snprintf(buf, sizeof(buf), "%s_cnt%d", pmnc_name, i - 1);
 522                 dir = gatorfs_mkdir(sb, root, buf);
 523                 if (!dir)
 524                         return -1;
 525                 gatorfs_create_ulong(sb, dir, "enabled", &pmnc_enabled[i]);
 526                 gatorfs_create_ro_ulong(sb, dir, "key", &pmnc_key[i]);
 527                 if (i > 0)
 528                         gatorfs_create_ulong(sb, dir, "event", &pmnc_event[i]);
 529         }
 530
 531         return 0;
 532 }
 533
 534 static int gator_events_scorpion_online(int **buffer, bool migrate)
 535 {
 536         unsigned int cnt, len = 0, cpu = smp_processor_id();
 537
 538         if (scorpion_pmnc_read() & PMNC_E)
 539                 scorpion_pmnc_write(scorpion_pmnc_read() & ~PMNC_E);
 540
 541         /* Initialize & Reset PMNC: C bit and P bit */
 542         scorpion_pmnc_write(PMNC_P | PMNC_C);
 543
 544         for (cnt = CCNT; cnt < CNTMAX; cnt++) {
 545                 unsigned long event;
 546
 547                 if (!pmnc_enabled[cnt])
 548                         continue;
 549
 550                 /* disable counter */
 551                 scorpion_pmnc_disable_counter(cnt);
 552
 553                 event = pmnc_event[cnt] & 255;
 554
 555                 /* Set event (if destined for PMNx counters), We don't need to set the event if it's a cycle count */
 556                 if (cnt != CCNT)
 557                         scorpion_pmnc_write_evtsel(cnt, event);
 558
 559                 /* reset counter */
 560                 scorpion_pmnc_reset_counter(cnt);
 561
 562                 /* Enable counter, do not enable interrupt for this counter */
 563                 scorpion_pmnc_enable_counter(cnt);
 564         }
 565
 566         /* enable */
 567         scorpion_pmnc_write(scorpion_pmnc_read() | PMNC_E);
 568
 569         /* read the counters and toss the invalid data, return zero instead */
 570         for (cnt = 0; cnt < pmnc_counters; cnt++) {
 571                 if (pmnc_enabled[cnt]) {
 572                         if (cnt == CCNT)
 573                                 scorpion_ccnt_read();
 574                         else if (scorpion_pmnc_select_counter(cnt) == cnt)
 575                                 scorpion_cntn_read();
 576                         scorpion_pmnc_reset_counter(cnt);
 577
 578                         per_cpu(perfCnt, cpu)[len++] = pmnc_key[cnt];
 579                         per_cpu(perfCnt, cpu)[len++] = 0;
 580                 }
 581         }
 582
 583         if (buffer)
 584                 *buffer = per_cpu(perfCnt, cpu);
 585
 586         return len;
 587 }
 588
 589 static int gator_events_scorpion_offline(int **buffer, bool migrate)
 590 {
 591         scorpion_pmnc_write(scorpion_pmnc_read() & ~PMNC_E);
 592         return 0;
 593 }
 594
 595 static void gator_events_scorpion_stop(void)
 596 {
 597         unsigned int cnt;
 598
 599         for (cnt = CCNT; cnt < CNTMAX; cnt++) {
 600                 pmnc_enabled[cnt] = 0;
 601                 pmnc_event[cnt] = 0;
 602         }
 603 }
 604
 605 static int gator_events_scorpion_read(int **buffer, bool sched_switch)
 606 {
 607         int cnt, len = 0;
 608         int cpu = smp_processor_id();
 609
 610         /* a context switch may occur before the online hotplug event, thus need to check that the pmu is enabled */
 611         if (!(scorpion_pmnc_read() & PMNC_E))
 612                 return 0;
 613
 614         for (cnt = 0; cnt < pmnc_counters; cnt++) {
 615                 if (pmnc_enabled[cnt]) {
 616                         int value;
 617
 618                         if (cnt == CCNT)
 619                                 value = scorpion_ccnt_read();
 620                         else if (scorpion_pmnc_select_counter(cnt) == cnt)
 621                                 value = scorpion_cntn_read();
 622                         else
 623                                 value = 0;
 624                         scorpion_pmnc_reset_counter(cnt);
 625
 626                         per_cpu(perfCnt, cpu)[len++] = pmnc_key[cnt];
 627                         per_cpu(perfCnt, cpu)[len++] = value;
 628                 }
 629         }
 630
 631         if (buffer)
 632                 *buffer = per_cpu(perfCnt, cpu);
 633
 634         return len;
 635 }
 636
 637 static struct gator_interface gator_events_scorpion_interface = {
 638         .create_files = gator_events_scorpion_create_files,
 639         .stop = gator_events_scorpion_stop,
 640         .online = gator_events_scorpion_online,
 641         .offline = gator_events_scorpion_offline,
 642         .read = gator_events_scorpion_read,
 643 };
 644
 645 int gator_events_scorpion_init(void)
 646 {
 647         unsigned int cnt;
 648
 649         switch (gator_cpuid()) {
 650         case SCORPION:
 651                 pmnc_name = "Scorpion";
 652                 pmnc_counters = 4;
 653                 break;
 654         case SCORPIONMP:
 655                 pmnc_name = "ScorpionMP";
 656                 pmnc_counters = 4;
 657                 break;
 658         default:
 659                 return -1;
 660         }
 661
 662         /* CNT[n] + CCNT */
 663         pmnc_counters++;
 664
 665         for (cnt = CCNT; cnt < CNTMAX; cnt++) {
 666                 pmnc_enabled[cnt] = 0;
 667                 pmnc_event[cnt] = 0;
 668                 pmnc_key[cnt] = gator_events_get_key();
 669         }
 670
 671         return gator_events_install(&gator_events_scorpion_interface);
 672 }
 673
 674 #endif