drivers/edac/highbank_l2_edac.c

   1 /*
   2  * Copyright 2011-2012 Calxeda, Inc.
   3  *
   4  * This program is free software; you can redistribute it and/or modify it
   5  * under the terms and conditions of the GNU General Public License,
   6  * version 2, as published by the Free Software Foundation.
   7  *
   8  * This program is distributed in the hope it will be useful, but WITHOUT
   9  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  10  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  11  * more details.
  12  *
  13  * You should have received a copy of the GNU General Public License along with
  14  * this program.  If not, see <http://www.gnu.org/licenses/>.
  15  */
  16 #include <linux/types.h>
  17 #include <linux/kernel.h>
  18 #include <linux/ctype.h>
  19 #include <linux/edac.h>
  20 #include <linux/interrupt.h>
  21 #include <linux/platform_device.h>
  22 #include <linux/of_platform.h>
  23
  24 #include "edac_core.h"
  25 #include "edac_module.h"
  26
  27 #define SR_CLR_SB_ECC_INTR      0x0
  28 #define SR_CLR_DB_ECC_INTR      0x4
  29
  30 struct hb_l2_drvdata {
  31         void __iomem *base;
  32         int sb_irq;
  33         int db_irq;
  34 };
  35
  36 static irqreturn_t highbank_l2_err_handler(int irq, void *dev_id)
  37 {
  38         struct edac_device_ctl_info *dci = dev_id;
  39         struct hb_l2_drvdata *drvdata = dci->pvt_info;
  40
  41         if (irq == drvdata->sb_irq) {
  42                 writel(1, drvdata->base + SR_CLR_SB_ECC_INTR);
  43                 edac_device_handle_ce(dci, 0, 0, dci->ctl_name);
  44         }
  45         if (irq == drvdata->db_irq) {
  46                 writel(1, drvdata->base + SR_CLR_DB_ECC_INTR);
  47                 edac_device_handle_ue(dci, 0, 0, dci->ctl_name);
  48         }
  49
  50         return IRQ_HANDLED;
  51 }
  52
  53 static int highbank_l2_err_probe(struct platform_device *pdev)
  54 {
  55         struct edac_device_ctl_info *dci;
  56         struct hb_l2_drvdata *drvdata;
  57         struct resource *r;
  58         int res = 0;
  59
  60         dci = edac_device_alloc_ctl_info(sizeof(*drvdata), "cpu",
  61                 1, "L", 1, 2, NULL, 0, 0);
  62         if (!dci)
  63                 return -ENOMEM;
  64
  65         drvdata = dci->pvt_info;
  66         dci->dev = &pdev->dev;
  67         platform_set_drvdata(pdev, dci);
  68
  69         if (!devres_open_group(&pdev->dev, NULL, GFP_KERNEL))
  70                 return -ENOMEM;
  71
  72         r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  73         if (!r) {
  74                 dev_err(&pdev->dev, "Unable to get mem resource\n");
  75                 res = -ENODEV;
  76                 goto err;
  77         }
  78
  79         if (!devm_request_mem_region(&pdev->dev, r->start,
  80                                      resource_size(r), dev_name(&pdev->dev))) {
  81                 dev_err(&pdev->dev, "Error while requesting mem region\n");
  82                 res = -EBUSY;
  83                 goto err;
  84         }
  85
  86         drvdata->base = devm_ioremap(&pdev->dev, r->start, resource_size(r));
  87         if (!drvdata->base) {
  88                 dev_err(&pdev->dev, "Unable to map regs\n");
  89                 res = -ENOMEM;
  90                 goto err;
  91         }
  92
  93         dci->mod_name = dev_name(&pdev->dev);
  94         dci->dev_name = dev_name(&pdev->dev);
  95
  96         if (edac_device_add_device(dci))
  97                 goto err;
  98
  99         drvdata->db_irq = platform_get_irq(pdev, 0);
 100         res = devm_request_irq(&pdev->dev, drvdata->db_irq,
 101                                highbank_l2_err_handler,
 102                                0, dev_name(&pdev->dev), dci);
 103         if (res < 0)
 104                 goto err2;
 105
 106         drvdata->sb_irq = platform_get_irq(pdev, 1);
 107         res = devm_request_irq(&pdev->dev, drvdata->sb_irq,
 108                                highbank_l2_err_handler,
 109                                0, dev_name(&pdev->dev), dci);
 110         if (res < 0)
 111                 goto err2;
 112
 113         devres_close_group(&pdev->dev, NULL);
 114         return 0;
 115 err2:
 116         edac_device_del_device(&pdev->dev);
 117 err:
 118         devres_release_group(&pdev->dev, NULL);
 119         edac_device_free_ctl_info(dci);
 120         return res;
 121 }
 122
 123 static int highbank_l2_err_remove(struct platform_device *pdev)
 124 {
 125         struct edac_device_ctl_info *dci = platform_get_drvdata(pdev);
 126
 127         edac_device_del_device(&pdev->dev);
 128         edac_device_free_ctl_info(dci);
 129         return 0;
 130 }
 131
 132 static const struct of_device_id hb_l2_err_of_match[] = {
 133         { .compatible = "calxeda,hb-sregs-l2-ecc", },
 134         {},
 135 };
 136 MODULE_DEVICE_TABLE(of, hb_l2_err_of_match);
 137
 138 static struct platform_driver highbank_l2_edac_driver = {
 139         .probe = highbank_l2_err_probe,
 140         .remove = highbank_l2_err_remove,
 141         .driver = {
 142                 .name = "hb_l2_edac",
 143                 .of_match_table = hb_l2_err_of_match,
 144         },
 145 };
 146
 147 module_platform_driver(highbank_l2_edac_driver);
 148
 149 MODULE_LICENSE("GPL v2");
 150 MODULE_AUTHOR("Calxeda, Inc.");
 151 MODULE_DESCRIPTION("EDAC Driver for Calxeda Highbank L2 Cache");