2 * Copyright (c) 2010, NVIDIA Corporation.
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * You should have received a copy of the GNU General Public License along
15 * with this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
19 #ifndef __CRYPTODEV_TEGRA_AES_H
20 #define __CRYPTODEV_TEGRA_AES_H
22 #define ICMDQUE_WR 0x1000
23 #define CMDQUE_CONTROL 0x1008
24 #define INTR_STATUS 0x1018
25 #define INT_ENB 0x1040
27 #define IRAM_ACCESS_CFG 0x10A0
28 #define SECURE_DEST_ADDR 0x1100
29 #define SECURE_INPUT_SELECT 0x1104
30 #define SECURE_CONFIG 0x1108
31 #define SECURE_CONFIG_EXT 0x110C
32 #define SECURE_SECURITY 0x1110
33 #define SECURE_HASH_RESULT0 0x1120
34 #define SECURE_HASH_RESULT1 0x1124
35 #define SECURE_HASH_RESULT2 0x1128
36 #define SECURE_HASH_RESULT3 0x112C
37 #define SECURE_SEC_SEL0 0x1140
38 #define SECURE_SEC_SEL1 0x1144
39 #define SECURE_SEC_SEL2 0x1148
40 #define SECURE_SEC_SEL3 0x114C
41 #define SECURE_SEC_SEL4 0x1150
42 #define SECURE_SEC_SEL5 0x1154
43 #define SECURE_SEC_SEL6 0x1158
44 #define SECURE_SEC_SEL7 0x115C
46 /* interrupt status reg masks and shifts */
47 #define DMA_BUSY_SHIFT 9
48 #define DMA_BUSY_FIELD (0x1 << DMA_BUSY_SHIFT)
49 #define ICQ_EMPTY_SHIFT 3
50 #define ICQ_EMPTY_FIELD (0x1 << ICQ_EMPTY_SHIFT)
51 #define ENGINE_BUSY_SHIFT 0
52 #define ENGINE_BUSY_FIELD (0x1 << ENGINE_BUSY_SHIFT)
54 /* secure select reg masks and shifts */
55 #define SECURE_SEL0_KEYREAD_ENB0_SHIFT 0
56 #define SECURE_SEL0_KEYREAD_ENB0_FIELD (0x1 << SECURE_SEL0_KEYREAD_ENB0_SHIFT)
58 /* secure config ext masks and shifts */
59 #define SECURE_KEY_SCH_DIS_SHIFT 15
60 #define SECURE_KEY_SCH_DIS_FIELD (0x1 << SECURE_KEY_SCH_DIS_SHIFT)
62 /* secure config masks and shifts */
63 #define SECURE_KEY_INDEX_SHIFT 20
64 #define SECURE_KEY_INDEX_FIELD (0x1F << SECURE_KEY_INDEX_SHIFT)
65 #define SECURE_BLOCK_CNT_SHIFT 0
66 #define SECURE_BLOCK_CNT_FIELD (0xFFFFF << SECURE_BLOCK_CNT_SHIFT)
68 /* stream interface select masks and shifts */
69 #define CMDQ_CTRL_SRC_STM_SEL_SHIFT 4
70 #define CMDQ_CTRL_SRC_STM_SEL_FIELD (1 << CMDQ_CTRL_SRC_STM_SEL_SHIFT)
71 #define CMDQ_CTRL_DST_STM_SEL_SHIFT 5
72 #define CMDQ_CTRL_DST_STM_SEL_FIELD (1 << CMDQ_CTRL_DST_STM_SEL_SHIFT)
73 #define CMDQ_CTRL_ICMDQEN_SHIFT 1
74 #define CMDQ_CTRL_ICMDQEN_FIELD (1 << CMDQ_CTRL_SRC_STM_SEL_SHIFT)
75 #define CMDQ_CTRL_UCMDQEN_SHIFT 0
76 #define CMDQ_CTRL_UCMDQEN_FIELD (1 << CMDQ_CTRL_DST_STM_SEL_SHIFT)
78 /* config regsiter masks and shifts */
79 #define CONFIG_ENDIAN_ENB_SHIFT 10
80 #define CONFIG_ENDIAN_ENB_FIELD (0x1 << CONFIG_ENDIAN_ENB_SHIFT)
81 #define CONFIG_MODE_SEL_SHIFT 0
82 #define CONFIG_MODE_SEL_FIELD (0x1F << CONFIG_MODE_SEL_SHIFT)
85 #define SECURE_OFFSET_CNT_SHIFT 24
86 #define SECURE_OFFSET_CNT_FIELD (0xFF << SECURE_OFFSET_CNT_SHIFT)
87 #define SECURE_KEYSCHED_GEN_SHIFT 15
88 #define SECURE_KEYSCHED_GEN_FIELD (1 << SECURE_KEYSCHED_GEN_SHIFT)
90 /* init vector select */
91 #define SECURE_IV_SELECT_SHIFT 10
92 #define SECURE_IV_SELECT_FIELD (1 << SECURE_IV_SELECT_SHIFT)
94 /* secure engine input */
95 #define SECURE_INPUT_ALG_SEL_SHIFT 28
96 #define SECURE_INPUT_ALG_SEL_FIELD (0xF << SECURE_INPUT_ALG_SEL_SHIFT)
97 #define SECURE_INPUT_KEY_LEN_SHIFT 16
98 #define SECURE_INPUT_KEY_LEN_FIELD (0xFFF << SECURE_INPUT_KEY_LEN_SHIFT)
99 #define SECURE_RNG_ENB_SHIFT 11
100 #define SECURE_RNG_ENB_FIELD (0x1 << SECURE_RNG_ENB_SHIFT)
101 #define SECURE_CORE_SEL_SHIFT 9
102 #define SECURE_CORE_SEL_FIELD (0x1 << SECURE_CORE_SEL_SHIFT)
103 #define SECURE_VCTRAM_SEL_SHIFT 7
104 #define SECURE_VCTRAM_SEL_FIELD (0x3 << SECURE_VCTRAM_SEL_SHIFT)
105 #define SECURE_INPUT_SEL_SHIFT 5
106 #define SECURE_INPUT_SEL_FIELD (0x3 << SECURE_INPUT_SEL_SHIFT)
107 #define SECURE_XOR_POS_SHIFT 3
108 #define SECURE_XOR_POS_FIELD (0x3 << SECURE_XOR_POS_SHIFT)
109 #define SECURE_HASH_ENB_SHIFT 2
110 #define SECURE_HASH_ENB_FIELD (0x1 << SECURE_HASH_ENB_SHIFT)
111 #define SECURE_ON_THE_FLY_SHIFT 0
112 #define SECURE_ON_THE_FLY_FIELD (1 << SECURE_ON_THE_FLY_SHIFT)