3 bool "Hardware crypto devices"
6 Say Y here to get to see options for hardware crypto devices and
7 processors. This option alone does not add any kernel code.
9 If you say N, all options in this submenu will be skipped and disabled.
13 config CRYPTO_DEV_PADLOCK
14 tristate "Support for VIA PadLock ACE"
15 depends on X86 && !UML
17 Some VIA processors come with an integrated crypto engine
18 (so called VIA PadLock ACE, Advanced Cryptography Engine)
19 that provides instructions for very fast cryptographic
20 operations with supported algorithms.
22 The instructions are used only when the CPU supports them.
23 Otherwise software encryption is used.
25 config CRYPTO_DEV_PADLOCK_AES
26 tristate "PadLock driver for AES algorithm"
27 depends on CRYPTO_DEV_PADLOCK
28 select CRYPTO_BLKCIPHER
31 Use VIA PadLock for AES algorithm.
33 Available in VIA C3 and newer CPUs.
35 If unsure say M. The compiled module will be
38 config CRYPTO_DEV_PADLOCK_SHA
39 tristate "PadLock driver for SHA1 and SHA256 algorithms"
40 depends on CRYPTO_DEV_PADLOCK
45 Use VIA PadLock for SHA1/SHA256 algorithms.
47 Available in VIA C7 and newer processors.
49 If unsure say M. The compiled module will be
52 config CRYPTO_DEV_GEODE
53 tristate "Support for the Geode LX AES engine"
54 depends on X86_32 && PCI
56 select CRYPTO_BLKCIPHER
58 Say 'Y' here to use the AMD Geode LX processor on-board AES
59 engine for the CryptoAPI AES algorithm.
61 To compile this driver as a module, choose M here: the module
62 will be called geode-aes.
65 tristate "Support for PCI-attached cryptographic adapters"
69 Select this option if you want to use a PCI-attached cryptographic
71 + PCI Cryptographic Accelerator (PCICA)
72 + PCI Cryptographic Coprocessor (PCICC)
73 + PCI-X Cryptographic Coprocessor (PCIXCC)
74 + Crypto Express2 Coprocessor (CEX2C)
75 + Crypto Express2 Accelerator (CEX2A)
76 + Crypto Express3 Coprocessor (CEX3C)
77 + Crypto Express3 Accelerator (CEX3A)
79 config CRYPTO_SHA1_S390
80 tristate "SHA1 digest algorithm"
84 This is the s390 hardware accelerated implementation of the
85 SHA-1 secure hash standard (FIPS 180-1/DFIPS 180-2).
87 It is available as of z990.
89 config CRYPTO_SHA256_S390
90 tristate "SHA256 digest algorithm"
94 This is the s390 hardware accelerated implementation of the
95 SHA256 secure hash standard (DFIPS 180-2).
97 It is available as of z9.
99 config CRYPTO_SHA512_S390
100 tristate "SHA384 and SHA512 digest algorithm"
104 This is the s390 hardware accelerated implementation of the
105 SHA512 secure hash standard.
107 It is available as of z10.
109 config CRYPTO_DES_S390
110 tristate "DES and Triple DES cipher algorithms"
113 select CRYPTO_BLKCIPHER
116 This is the s390 hardware accelerated implementation of the
117 DES cipher algorithm (FIPS 46-2), and Triple DES EDE (FIPS 46-3).
119 As of z990 the ECB and CBC mode are hardware accelerated.
120 As of z196 the CTR mode is hardware accelerated.
122 config CRYPTO_AES_S390
123 tristate "AES cipher algorithms"
126 select CRYPTO_BLKCIPHER
128 This is the s390 hardware accelerated implementation of the
129 AES cipher algorithms (FIPS-197).
131 As of z9 the ECB and CBC modes are hardware accelerated
133 As of z10 the ECB and CBC modes are hardware accelerated
134 for all AES key sizes.
135 As of z196 the CTR mode is hardware accelerated for all AES
136 key sizes and XTS mode is hardware accelerated for 256 and
140 tristate "Pseudo random number generator device driver"
144 Select this option if you want to use the s390 pseudo random number
145 generator. The PRNG is part of the cryptographic processor functions
146 and uses triple-DES to generate secure random numbers like the
147 ANSI X9.17 standard. User-space programs access the
148 pseudo-random-number device through the char device /dev/prandom.
150 It is available as of z9.
152 config CRYPTO_GHASH_S390
153 tristate "GHASH digest algorithm"
157 This is the s390 hardware accelerated implementation of the
158 GHASH message digest algorithm for GCM (Galois/Counter Mode).
160 It is available as of z196.
162 config CRYPTO_DEV_MV_CESA
163 tristate "Marvell's Cryptographic Engine"
164 depends on PLAT_ORION
166 select CRYPTO_BLKCIPHER
169 This driver allows you to utilize the Cryptographic Engines and
170 Security Accelerator (CESA) which can be found on the Marvell Orion
171 and Kirkwood SoCs, such as QNAP's TS-209.
173 Currently the driver supports AES in ECB and CBC mode without DMA.
175 config CRYPTO_DEV_NIAGARA2
176 tristate "Niagara2 Stream Processing Unit driver"
178 select CRYPTO_BLKCIPHER
182 Each core of a Niagara2 processor contains a Stream
183 Processing Unit, which itself contains several cryptographic
184 sub-units. One set provides the Modular Arithmetic Unit,
185 used for SSL offload. The other set provides the Cipher
186 Group, which can perform encryption, decryption, hashing,
187 checksumming, and raw copies.
189 config CRYPTO_DEV_HIFN_795X
190 tristate "Driver HIFN 795x crypto accelerator chips"
192 select CRYPTO_BLKCIPHER
193 select HW_RANDOM if CRYPTO_DEV_HIFN_795X_RNG
195 depends on !ARCH_DMA_ADDR_T_64BIT
197 This option allows you to have support for HIFN 795x crypto adapters.
199 config CRYPTO_DEV_HIFN_795X_RNG
200 bool "HIFN 795x random number generator"
201 depends on CRYPTO_DEV_HIFN_795X
203 Select this option if you want to enable the random number generator
204 on the HIFN 795x crypto adapters.
206 source drivers/crypto/caam/Kconfig
208 config CRYPTO_DEV_TALITOS
209 tristate "Talitos Freescale Security Engine (SEC)"
211 select CRYPTO_AUTHENC
212 select CRYPTO_BLKCIPHER
217 Say 'Y' here to use the Freescale Security Engine (SEC)
218 to offload cryptographic algorithm computation.
220 The Freescale SEC is present on PowerQUICC 'E' processors, such
221 as the MPC8349E and MPC8548E.
223 To compile this driver as a module, choose M here: the module
224 will be called talitos.
226 config CRYPTO_DEV_TALITOS1
227 bool "SEC1 (SEC 1.0 and SEC Lite 1.2)"
228 depends on CRYPTO_DEV_TALITOS
229 depends on PPC_8xx || PPC_82xx
232 Say 'Y' here to use the Freescale Security Engine (SEC) version 1.0
233 found on MPC82xx or the Freescale Security Engine (SEC Lite)
234 version 1.2 found on MPC8xx
236 config CRYPTO_DEV_TALITOS2
237 bool "SEC2+ (SEC version 2.0 or upper)"
238 depends on CRYPTO_DEV_TALITOS
239 default y if !PPC_8xx
241 Say 'Y' here to use the Freescale Security Engine (SEC)
242 version 2 and following as found on MPC83xx, MPC85xx, etc ...
244 config CRYPTO_DEV_IXP4XX
245 tristate "Driver for IXP4xx crypto hardware acceleration"
246 depends on ARCH_IXP4XX && IXP4XX_QMGR && IXP4XX_NPE
249 select CRYPTO_AUTHENC
250 select CRYPTO_BLKCIPHER
252 Driver for the IXP4xx NPE crypto engine.
254 config CRYPTO_DEV_PPC4XX
255 tristate "Driver AMCC PPC4xx crypto accelerator"
256 depends on PPC && 4xx
258 select CRYPTO_BLKCIPHER
260 This option allows you to have support for AMCC crypto acceleration.
262 config CRYPTO_DEV_OMAP_SHAM
263 tristate "Support for OMAP MD5/SHA1/SHA2 hw accelerator"
264 depends on ARCH_OMAP2PLUS
271 OMAP processors have MD5/SHA1/SHA2 hw accelerator. Select this if you
272 want to use the OMAP module for MD5/SHA1/SHA2 algorithms.
274 config CRYPTO_DEV_OMAP_AES
275 tristate "Support for OMAP AES hw engine"
276 depends on ARCH_OMAP2 || ARCH_OMAP3 || ARCH_OMAP2PLUS
278 select CRYPTO_BLKCIPHER
280 OMAP processors have AES module accelerator. Select this if you
281 want to use the OMAP module for AES algorithms.
283 config CRYPTO_DEV_OMAP_DES
284 tristate "Support for OMAP DES3DES hw engine"
285 depends on ARCH_OMAP2PLUS
287 select CRYPTO_BLKCIPHER
289 OMAP processors have DES/3DES module accelerator. Select this if you
290 want to use the OMAP module for DES and 3DES algorithms. Currently
291 the ECB and CBC modes of operation supported by the driver. Also
292 accesses made on unaligned boundaries are also supported.
294 config CRYPTO_DEV_PICOXCELL
295 tristate "Support for picoXcell IPSEC and Layer2 crypto engines"
296 depends on ARCH_PICOXCELL && HAVE_CLK
299 select CRYPTO_AUTHENC
300 select CRYPTO_BLKCIPHER
306 This option enables support for the hardware offload engines in the
307 Picochip picoXcell SoC devices. Select this for IPSEC ESP offload
308 and for 3gpp Layer 2 ciphering support.
310 Saying m here will build a module named pipcoxcell_crypto.
312 config CRYPTO_DEV_SAHARA
313 tristate "Support for SAHARA crypto accelerator"
314 depends on ARCH_MXC && OF
315 select CRYPTO_BLKCIPHER
319 This option enables support for the SAHARA HW crypto accelerator
320 found in some Freescale i.MX chips.
322 config CRYPTO_DEV_S5P
323 tristate "Support for Samsung S5PV210/Exynos crypto accelerator"
324 depends on ARCH_S5PV210 || ARCH_EXYNOS
326 select CRYPTO_BLKCIPHER
328 This option allows you to have support for S5P crypto acceleration.
329 Select this to offload Samsung S5PV210 or S5PC110, Exynos from AES
330 algorithms execution.
333 bool "Support for IBM PowerPC Nest (NX) cryptographic acceleration"
336 This enables support for the NX hardware cryptographic accelerator
337 coprocessor that is in IBM PowerPC P7+ or later processors. This
338 does not actually enable any drivers, it only allows you to select
339 which acceleration type (encryption and/or compression) to enable.
342 source "drivers/crypto/nx/Kconfig"
345 config CRYPTO_DEV_UX500
346 tristate "Driver for ST-Ericsson UX500 crypto hardware acceleration"
347 depends on ARCH_U8500
349 Driver for ST-Ericsson UX500 crypto engine.
352 source "drivers/crypto/ux500/Kconfig"
353 endif # if CRYPTO_DEV_UX500
355 config CRYPTO_DEV_BFIN_CRC
356 tristate "Support for Blackfin CRC hardware"
359 Newer Blackfin processors have CRC hardware. Select this if you
360 want to use the Blackfin CRC module.
362 config CRYPTO_DEV_ATMEL_AES
363 tristate "Support for Atmel AES hw accelerator"
366 select CRYPTO_BLKCIPHER
369 Some Atmel processors have AES hw accelerator.
370 Select this if you want to use the Atmel module for
373 To compile this driver as a module, choose M here: the module
374 will be called atmel-aes.
376 config CRYPTO_DEV_ATMEL_TDES
377 tristate "Support for Atmel DES/TDES hw accelerator"
380 select CRYPTO_BLKCIPHER
382 Some Atmel processors have DES/TDES hw accelerator.
383 Select this if you want to use the Atmel module for
386 To compile this driver as a module, choose M here: the module
387 will be called atmel-tdes.
389 config CRYPTO_DEV_ATMEL_SHA
390 tristate "Support for Atmel SHA hw accelerator"
394 Some Atmel processors have SHA1/SHA224/SHA256/SHA384/SHA512
396 Select this if you want to use the Atmel module for
397 SHA1/SHA224/SHA256/SHA384/SHA512 algorithms.
399 To compile this driver as a module, choose M here: the module
400 will be called atmel-sha.
402 config CRYPTO_DEV_CCP
403 bool "Support for AMD Cryptographic Coprocessor"
404 depends on ((X86 && PCI) || (ARM64 && (OF_ADDRESS || ACPI))) && HAS_IOMEM
406 The AMD Cryptographic Coprocessor provides hardware support
407 for encryption, hashing and related operations.
410 source "drivers/crypto/ccp/Kconfig"
413 config CRYPTO_DEV_MXS_DCP
414 tristate "Support for Freescale MXS DCP"
419 select CRYPTO_BLKCIPHER
422 The Freescale i.MX23/i.MX28 has SHA1/SHA256 and AES128 CBC/ECB
423 co-processor on the die.
425 To compile this driver as a module, choose M here: the module
426 will be called mxs-dcp.
428 source "drivers/crypto/qat/Kconfig"
430 config CRYPTO_DEV_QCE
431 tristate "Qualcomm crypto engine accelerator"
432 depends on (ARCH_QCOM || COMPILE_TEST) && HAS_DMA && HAS_IOMEM
439 select CRYPTO_BLKCIPHER
441 This driver supports Qualcomm crypto engine accelerator
442 hardware. To compile this driver as a module, choose M here. The
443 module will be called qcrypto.
445 config CRYPTO_DEV_VMX
446 bool "Support for VMX cryptographic acceleration instructions"
449 Support for VMX cryptographic acceleration instructions.
451 source "drivers/crypto/vmx/Kconfig"
453 config CRYPTO_DEV_IMGTEC_HASH
454 tristate "Imagination Technologies hardware hash accelerator"
455 depends on MIPS || COMPILE_TEST
462 This driver interfaces with the Imagination Technologies
463 hardware hash accelerator. Supporting MD5/SHA1/SHA224/SHA256