Merge back earlier 'pm-cpufreq' material.
[firefly-linux-kernel-4.4.55.git] / drivers / cpufreq / exynos-cpufreq.c
1 /*
2  * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
3  *              http://www.samsung.com
4  *
5  * EXYNOS - CPU frequency scaling support for EXYNOS series
6  *
7  * This program is free software; you can redistribute it and/or modify
8  * it under the terms of the GNU General Public License version 2 as
9  * published by the Free Software Foundation.
10 */
11
12 #include <linux/kernel.h>
13 #include <linux/err.h>
14 #include <linux/clk.h>
15 #include <linux/io.h>
16 #include <linux/slab.h>
17 #include <linux/regulator/consumer.h>
18 #include <linux/cpufreq.h>
19 #include <linux/suspend.h>
20 #include <linux/platform_device.h>
21
22 #include <plat/cpu.h>
23
24 #include "exynos-cpufreq.h"
25
26 static struct exynos_dvfs_info *exynos_info;
27
28 static struct regulator *arm_regulator;
29
30 static unsigned int locking_frequency;
31 static bool frequency_locked;
32 static DEFINE_MUTEX(cpufreq_lock);
33
34 static unsigned int exynos_getspeed(unsigned int cpu)
35 {
36         return clk_get_rate(exynos_info->cpu_clk) / 1000;
37 }
38
39 static int exynos_cpufreq_get_index(unsigned int freq)
40 {
41         struct cpufreq_frequency_table *freq_table = exynos_info->freq_table;
42         int index;
43
44         for (index = 0;
45                 freq_table[index].frequency != CPUFREQ_TABLE_END; index++)
46                 if (freq_table[index].frequency == freq)
47                         break;
48
49         if (freq_table[index].frequency == CPUFREQ_TABLE_END)
50                 return -EINVAL;
51
52         return index;
53 }
54
55 static int exynos_cpufreq_scale(unsigned int target_freq)
56 {
57         struct cpufreq_frequency_table *freq_table = exynos_info->freq_table;
58         unsigned int *volt_table = exynos_info->volt_table;
59         struct cpufreq_policy *policy = cpufreq_cpu_get(0);
60         unsigned int arm_volt, safe_arm_volt = 0;
61         unsigned int mpll_freq_khz = exynos_info->mpll_freq_khz;
62         unsigned int old_freq;
63         int index, old_index;
64         int ret = 0;
65
66         old_freq = policy->cur;
67
68         /*
69          * The policy max have been changed so that we cannot get proper
70          * old_index with cpufreq_frequency_table_target(). Thus, ignore
71          * policy and get the index from the raw frequency table.
72          */
73         old_index = exynos_cpufreq_get_index(old_freq);
74         if (old_index < 0) {
75                 ret = old_index;
76                 goto out;
77         }
78
79         index = exynos_cpufreq_get_index(target_freq);
80         if (index < 0) {
81                 ret = index;
82                 goto out;
83         }
84
85         /*
86          * ARM clock source will be changed APLL to MPLL temporary
87          * To support this level, need to control regulator for
88          * required voltage level
89          */
90         if (exynos_info->need_apll_change != NULL) {
91                 if (exynos_info->need_apll_change(old_index, index) &&
92                    (freq_table[index].frequency < mpll_freq_khz) &&
93                    (freq_table[old_index].frequency < mpll_freq_khz))
94                         safe_arm_volt = volt_table[exynos_info->pll_safe_idx];
95         }
96         arm_volt = volt_table[index];
97
98         /* When the new frequency is higher than current frequency */
99         if ((target_freq > old_freq) && !safe_arm_volt) {
100                 /* Firstly, voltage up to increase frequency */
101                 ret = regulator_set_voltage(arm_regulator, arm_volt, arm_volt);
102                 if (ret) {
103                         pr_err("%s: failed to set cpu voltage to %d\n",
104                                 __func__, arm_volt);
105                         return ret;
106                 }
107         }
108
109         if (safe_arm_volt) {
110                 ret = regulator_set_voltage(arm_regulator, safe_arm_volt,
111                                       safe_arm_volt);
112                 if (ret) {
113                         pr_err("%s: failed to set cpu voltage to %d\n",
114                                 __func__, safe_arm_volt);
115                         return ret;
116                 }
117         }
118
119         exynos_info->set_freq(old_index, index);
120
121         /* When the new frequency is lower than current frequency */
122         if ((target_freq < old_freq) ||
123            ((target_freq > old_freq) && safe_arm_volt)) {
124                 /* down the voltage after frequency change */
125                 ret = regulator_set_voltage(arm_regulator, arm_volt,
126                                 arm_volt);
127                 if (ret) {
128                         pr_err("%s: failed to set cpu voltage to %d\n",
129                                 __func__, arm_volt);
130                         goto out;
131                 }
132         }
133
134 out:
135         cpufreq_cpu_put(policy);
136
137         return ret;
138 }
139
140 static int exynos_target(struct cpufreq_policy *policy, unsigned int index)
141 {
142         struct cpufreq_frequency_table *freq_table = exynos_info->freq_table;
143         int ret = 0;
144
145         mutex_lock(&cpufreq_lock);
146
147         if (frequency_locked)
148                 goto out;
149
150         ret = exynos_cpufreq_scale(freq_table[index].frequency);
151
152 out:
153         mutex_unlock(&cpufreq_lock);
154
155         return ret;
156 }
157
158 #ifdef CONFIG_PM
159 static int exynos_cpufreq_suspend(struct cpufreq_policy *policy)
160 {
161         return 0;
162 }
163
164 static int exynos_cpufreq_resume(struct cpufreq_policy *policy)
165 {
166         return 0;
167 }
168 #endif
169
170 /**
171  * exynos_cpufreq_pm_notifier - block CPUFREQ's activities in suspend-resume
172  *                      context
173  * @notifier
174  * @pm_event
175  * @v
176  *
177  * While frequency_locked == true, target() ignores every frequency but
178  * locking_frequency. The locking_frequency value is the initial frequency,
179  * which is set by the bootloader. In order to eliminate possible
180  * inconsistency in clock values, we save and restore frequencies during
181  * suspend and resume and block CPUFREQ activities. Note that the standard
182  * suspend/resume cannot be used as they are too deep (syscore_ops) for
183  * regulator actions.
184  */
185 static int exynos_cpufreq_pm_notifier(struct notifier_block *notifier,
186                                        unsigned long pm_event, void *v)
187 {
188         int ret;
189
190         switch (pm_event) {
191         case PM_SUSPEND_PREPARE:
192                 mutex_lock(&cpufreq_lock);
193                 frequency_locked = true;
194                 mutex_unlock(&cpufreq_lock);
195
196                 ret = exynos_cpufreq_scale(locking_frequency);
197                 if (ret < 0)
198                         return NOTIFY_BAD;
199
200                 break;
201
202         case PM_POST_SUSPEND:
203                 mutex_lock(&cpufreq_lock);
204                 frequency_locked = false;
205                 mutex_unlock(&cpufreq_lock);
206                 break;
207         }
208
209         return NOTIFY_OK;
210 }
211
212 static struct notifier_block exynos_cpufreq_nb = {
213         .notifier_call = exynos_cpufreq_pm_notifier,
214 };
215
216 static int exynos_cpufreq_cpu_init(struct cpufreq_policy *policy)
217 {
218         return cpufreq_generic_init(policy, exynos_info->freq_table, 100000);
219 }
220
221 static struct cpufreq_driver exynos_driver = {
222         .flags          = CPUFREQ_STICKY | CPUFREQ_NEED_INITIAL_FREQ_CHECK,
223         .verify         = cpufreq_generic_frequency_table_verify,
224         .target_index   = exynos_target,
225         .get            = exynos_getspeed,
226         .init           = exynos_cpufreq_cpu_init,
227         .exit           = cpufreq_generic_exit,
228         .name           = "exynos_cpufreq",
229         .attr           = cpufreq_generic_attr,
230 #ifdef CONFIG_PM
231         .suspend        = exynos_cpufreq_suspend,
232         .resume         = exynos_cpufreq_resume,
233 #endif
234 };
235
236 static int exynos_cpufreq_probe(struct platform_device *pdev)
237 {
238         int ret = -EINVAL;
239
240         exynos_info = kzalloc(sizeof(*exynos_info), GFP_KERNEL);
241         if (!exynos_info)
242                 return -ENOMEM;
243
244         if (soc_is_exynos4210())
245                 ret = exynos4210_cpufreq_init(exynos_info);
246         else if (soc_is_exynos4212() || soc_is_exynos4412())
247                 ret = exynos4x12_cpufreq_init(exynos_info);
248         else if (soc_is_exynos5250())
249                 ret = exynos5250_cpufreq_init(exynos_info);
250         else
251                 return 0;
252
253         if (ret)
254                 goto err_vdd_arm;
255
256         if (exynos_info->set_freq == NULL) {
257                 pr_err("%s: No set_freq function (ERR)\n", __func__);
258                 goto err_vdd_arm;
259         }
260
261         arm_regulator = regulator_get(NULL, "vdd_arm");
262         if (IS_ERR(arm_regulator)) {
263                 pr_err("%s: failed to get resource vdd_arm\n", __func__);
264                 goto err_vdd_arm;
265         }
266
267         locking_frequency = exynos_getspeed(0);
268
269         register_pm_notifier(&exynos_cpufreq_nb);
270
271         if (cpufreq_register_driver(&exynos_driver)) {
272                 pr_err("%s: failed to register cpufreq driver\n", __func__);
273                 goto err_cpufreq;
274         }
275
276         return 0;
277 err_cpufreq:
278         unregister_pm_notifier(&exynos_cpufreq_nb);
279
280         regulator_put(arm_regulator);
281 err_vdd_arm:
282         kfree(exynos_info);
283         return -EINVAL;
284 }
285
286 static struct platform_driver exynos_cpufreq_platdrv = {
287         .driver = {
288                 .name   = "exynos-cpufreq",
289                 .owner  = THIS_MODULE,
290         },
291         .probe = exynos_cpufreq_probe,
292 };
293 module_platform_driver(exynos_cpufreq_platdrv);