drivers/cpufreq/cpufreq-dt.c

   1 /*
   2  * Copyright (C) 2012 Freescale Semiconductor, Inc.
   3  *
   4  * Copyright (C) 2014 Linaro.
   5  * Viresh Kumar <viresh.kumar@linaro.org>
   6  *
   7  * The OPP code in function set_target() is reused from
   8  * drivers/cpufreq/omap-cpufreq.c
   9  *
  10  * This program is free software; you can redistribute it and/or modify
  11  * it under the terms of the GNU General Public License version 2 as
  12  * published by the Free Software Foundation.
  13  */
  14
  15 #define pr_fmt(fmt)     KBUILD_MODNAME ": " fmt
  16
  17 #include <linux/clk.h>
  18 #include <linux/cpu.h>
  19 #include <linux/cpu_cooling.h>
  20 #include <linux/cpufreq.h>
  21 #include <linux/cpufreq-dt.h>
  22 #include <linux/cpumask.h>
  23 #include <linux/err.h>
  24 #include <linux/module.h>
  25 #include <linux/of.h>
  26 #include <linux/pm_opp.h>
  27 #include <linux/platform_device.h>
  28 #include <linux/regulator/consumer.h>
  29 #include <linux/slab.h>
  30 #include <linux/thermal.h>
  31
  32 struct private_data {
  33         struct device *cpu_dev;
  34         struct regulator *cpu_reg;
  35         struct thermal_cooling_device *cdev;
  36         unsigned int voltage_tolerance; /* in percentage */
  37 };
  38
  39 static int set_target(struct cpufreq_policy *policy, unsigned int index)
  40 {
  41         struct dev_pm_opp *opp;
  42         struct cpufreq_frequency_table *freq_table = policy->freq_table;
  43         struct clk *cpu_clk = policy->clk;
  44         struct private_data *priv = policy->driver_data;
  45         struct device *cpu_dev = priv->cpu_dev;
  46         struct regulator *cpu_reg = priv->cpu_reg;
  47         unsigned long volt = 0, volt_old = 0, tol = 0;
  48         unsigned int old_freq, new_freq;
  49         long freq_Hz, freq_exact;
  50         int ret;
  51
  52         freq_Hz = clk_round_rate(cpu_clk, freq_table[index].frequency * 1000);
  53         if (freq_Hz <= 0)
  54                 freq_Hz = freq_table[index].frequency * 1000;
  55
  56         freq_exact = freq_Hz;
  57         new_freq = freq_Hz / 1000;
  58         old_freq = clk_get_rate(cpu_clk) / 1000;
  59
  60         if (!IS_ERR(cpu_reg)) {
  61                 unsigned long opp_freq;
  62
  63                 rcu_read_lock();
  64                 opp = dev_pm_opp_find_freq_ceil(cpu_dev, &freq_Hz);
  65                 if (IS_ERR(opp)) {
  66                         rcu_read_unlock();
  67                         dev_err(cpu_dev, "failed to find OPP for %ld\n",
  68                                 freq_Hz);
  69                         return PTR_ERR(opp);
  70                 }
  71                 volt = dev_pm_opp_get_voltage(opp);
  72                 opp_freq = dev_pm_opp_get_freq(opp);
  73                 rcu_read_unlock();
  74                 tol = volt * priv->voltage_tolerance / 100;
  75                 volt_old = regulator_get_voltage(cpu_reg);
  76                 dev_dbg(cpu_dev, "Found OPP: %ld kHz, %ld uV\n",
  77                         opp_freq / 1000, volt);
  78         }
  79
  80         dev_dbg(cpu_dev, "%u MHz, %ld mV --> %u MHz, %ld mV\n",
  81                 old_freq / 1000, (volt_old > 0) ? volt_old / 1000 : -1,
  82                 new_freq / 1000, volt ? volt / 1000 : -1);
  83
  84         /* scaling up?  scale voltage before frequency */
  85         if (!IS_ERR(cpu_reg) && new_freq > old_freq) {
  86                 ret = regulator_set_voltage_tol(cpu_reg, volt, tol);
  87                 if (ret) {
  88                         dev_err(cpu_dev, "failed to scale voltage up: %d\n",
  89                                 ret);
  90                         return ret;
  91                 }
  92         }
  93
  94         ret = clk_set_rate(cpu_clk, freq_exact);
  95         if (ret) {
  96                 dev_err(cpu_dev, "failed to set clock rate: %d\n", ret);
  97                 if (!IS_ERR(cpu_reg) && volt_old > 0)
  98                         regulator_set_voltage_tol(cpu_reg, volt_old, tol);
  99                 return ret;
 100         }
 101
 102         /* scaling down?  scale voltage after frequency */
 103         if (!IS_ERR(cpu_reg) && new_freq < old_freq) {
 104                 ret = regulator_set_voltage_tol(cpu_reg, volt, tol);
 105                 if (ret) {
 106                         dev_err(cpu_dev, "failed to scale voltage down: %d\n",
 107                                 ret);
 108                         clk_set_rate(cpu_clk, old_freq * 1000);
 109                 }
 110         }
 111
 112         return ret;
 113 }
 114
 115 static int allocate_resources(int cpu, struct device **cdev,
 116                               struct regulator **creg, struct clk **cclk)
 117 {
 118         struct device *cpu_dev;
 119         struct regulator *cpu_reg;
 120         struct clk *cpu_clk;
 121         int ret = 0;
 122         char *reg_cpu0 = "cpu0", *reg_cpu = "cpu", *reg;
 123
 124         cpu_dev = get_cpu_device(cpu);
 125         if (!cpu_dev) {
 126                 pr_err("failed to get cpu%d device\n", cpu);
 127                 return -ENODEV;
 128         }
 129
 130         /* Try "cpu0" for older DTs */
 131         if (!cpu)
 132                 reg = reg_cpu0;
 133         else
 134                 reg = reg_cpu;
 135
 136 try_again:
 137         cpu_reg = regulator_get_optional(cpu_dev, reg);
 138         if (IS_ERR(cpu_reg)) {
 139                 /*
 140                  * If cpu's regulator supply node is present, but regulator is
 141                  * not yet registered, we should try defering probe.
 142                  */
 143                 if (PTR_ERR(cpu_reg) == -EPROBE_DEFER) {
 144                         dev_dbg(cpu_dev, "cpu%d regulator not ready, retry\n",
 145                                 cpu);
 146                         return -EPROBE_DEFER;
 147                 }
 148
 149                 /* Try with "cpu-supply" */
 150                 if (reg == reg_cpu0) {
 151                         reg = reg_cpu;
 152                         goto try_again;
 153                 }
 154
 155                 dev_dbg(cpu_dev, "no regulator for cpu%d: %ld\n",
 156                         cpu, PTR_ERR(cpu_reg));
 157         }
 158
 159         cpu_clk = clk_get(cpu_dev, NULL);
 160         if (IS_ERR(cpu_clk)) {
 161                 /* put regulator */
 162                 if (!IS_ERR(cpu_reg))
 163                         regulator_put(cpu_reg);
 164
 165                 ret = PTR_ERR(cpu_clk);
 166
 167                 /*
 168                  * If cpu's clk node is present, but clock is not yet
 169                  * registered, we should try defering probe.
 170                  */
 171                 if (ret == -EPROBE_DEFER)
 172                         dev_dbg(cpu_dev, "cpu%d clock not ready, retry\n", cpu);
 173                 else
 174                         dev_err(cpu_dev, "failed to get cpu%d clock: %d\n", cpu,
 175                                 ret);
 176         } else {
 177                 *cdev = cpu_dev;
 178                 *creg = cpu_reg;
 179                 *cclk = cpu_clk;
 180         }
 181
 182         return ret;
 183 }
 184
 185 static int cpufreq_init(struct cpufreq_policy *policy)
 186 {
 187         struct cpufreq_frequency_table *freq_table;
 188         struct device_node *np;
 189         struct private_data *priv;
 190         struct device *cpu_dev;
 191         struct regulator *cpu_reg;
 192         struct clk *cpu_clk;
 193         unsigned long min_uV = ~0, max_uV = 0;
 194         unsigned int transition_latency;
 195         bool need_update = false;
 196         int ret;
 197
 198         ret = allocate_resources(policy->cpu, &cpu_dev, &cpu_reg, &cpu_clk);
 199         if (ret) {
 200                 pr_err("%s: Failed to allocate resources: %d\n", __func__, ret);
 201                 return ret;
 202         }
 203
 204         np = of_node_get(cpu_dev->of_node);
 205         if (!np) {
 206                 dev_err(cpu_dev, "failed to find cpu%d node\n", policy->cpu);
 207                 ret = -ENOENT;
 208                 goto out_put_reg_clk;
 209         }
 210
 211         /* Get OPP-sharing information from "operating-points-v2" bindings */
 212         ret = of_get_cpus_sharing_opps(cpu_dev, policy->cpus);
 213         if (ret) {
 214                 /*
 215                  * operating-points-v2 not supported, fallback to old method of
 216                  * finding shared-OPPs for backward compatibility.
 217                  */
 218                 if (ret == -ENOENT)
 219                         need_update = true;
 220                 else
 221                         goto out_node_put;
 222         }
 223
 224         /*
 225          * Initialize OPP tables for all policy->cpus. They will be shared by
 226          * all CPUs which have marked their CPUs shared with OPP bindings.
 227          *
 228          * For platforms not using operating-points-v2 bindings, we do this
 229          * before updating policy->cpus. Otherwise, we will end up creating
 230          * duplicate OPPs for policy->cpus.
 231          *
 232          * OPPs might be populated at runtime, don't check for error here
 233          */
 234         of_cpumask_init_opp_table(policy->cpus);
 235
 236         if (need_update) {
 237                 struct cpufreq_dt_platform_data *pd = cpufreq_get_driver_data();
 238
 239                 if (!pd || !pd->independent_clocks)
 240                         cpumask_setall(policy->cpus);
 241
 242                 /*
 243                  * OPP tables are initialized only for policy->cpu, do it for
 244                  * others as well.
 245                  */
 246                 set_cpus_sharing_opps(cpu_dev, policy->cpus);
 247
 248                 of_property_read_u32(np, "clock-latency", &transition_latency);
 249         } else {
 250                 transition_latency = dev_pm_opp_get_max_clock_latency(cpu_dev);
 251         }
 252
 253         /*
 254          * But we need OPP table to function so if it is not there let's
 255          * give platform code chance to provide it for us.
 256          */
 257         ret = dev_pm_opp_get_opp_count(cpu_dev);
 258         if (ret <= 0) {
 259                 pr_debug("OPP table is not ready, deferring probe\n");
 260                 ret = -EPROBE_DEFER;
 261                 goto out_free_opp;
 262         }
 263
 264         priv = kzalloc(sizeof(*priv), GFP_KERNEL);
 265         if (!priv) {
 266                 ret = -ENOMEM;
 267                 goto out_free_opp;
 268         }
 269
 270         of_property_read_u32(np, "voltage-tolerance", &priv->voltage_tolerance);
 271
 272         if (!transition_latency)
 273                 transition_latency = CPUFREQ_ETERNAL;
 274
 275         if (!IS_ERR(cpu_reg)) {
 276                 unsigned long opp_freq = 0;
 277
 278                 /*
 279                  * Disable any OPPs where the connected regulator isn't able to
 280                  * provide the specified voltage and record minimum and maximum
 281                  * voltage levels.
 282                  */
 283                 while (1) {
 284                         struct dev_pm_opp *opp;
 285                         unsigned long opp_uV, tol_uV;
 286
 287                         rcu_read_lock();
 288                         opp = dev_pm_opp_find_freq_ceil(cpu_dev, &opp_freq);
 289                         if (IS_ERR(opp)) {
 290                                 rcu_read_unlock();
 291                                 break;
 292                         }
 293                         opp_uV = dev_pm_opp_get_voltage(opp);
 294                         rcu_read_unlock();
 295
 296                         tol_uV = opp_uV * priv->voltage_tolerance / 100;
 297                         if (regulator_is_supported_voltage(cpu_reg, opp_uV,
 298                                                            opp_uV + tol_uV)) {
 299                                 if (opp_uV < min_uV)
 300                                         min_uV = opp_uV;
 301                                 if (opp_uV > max_uV)
 302                                         max_uV = opp_uV;
 303                         } else {
 304                                 dev_pm_opp_disable(cpu_dev, opp_freq);
 305                         }
 306
 307                         opp_freq++;
 308                 }
 309
 310                 ret = regulator_set_voltage_time(cpu_reg, min_uV, max_uV);
 311                 if (ret > 0)
 312                         transition_latency += ret * 1000;
 313         }
 314
 315         ret = dev_pm_opp_init_cpufreq_table(cpu_dev, &freq_table);
 316         if (ret) {
 317                 pr_err("failed to init cpufreq table: %d\n", ret);
 318                 goto out_free_priv;
 319         }
 320
 321         priv->cpu_dev = cpu_dev;
 322         priv->cpu_reg = cpu_reg;
 323         policy->driver_data = priv;
 324
 325         policy->clk = cpu_clk;
 326         ret = cpufreq_table_validate_and_show(policy, freq_table);
 327         if (ret) {
 328                 dev_err(cpu_dev, "%s: invalid frequency table: %d\n", __func__,
 329                         ret);
 330                 goto out_free_cpufreq_table;
 331         }
 332
 333         /* Support turbo/boost mode */
 334         if (policy_has_boost_freq(policy)) {
 335                 /* This gets disabled by core on driver unregister */
 336                 ret = cpufreq_enable_boost_support();
 337                 if (ret)
 338                         goto out_free_cpufreq_table;
 339         }
 340
 341         policy->cpuinfo.transition_latency = transition_latency;
 342
 343         of_node_put(np);
 344
 345         return 0;
 346
 347 out_free_cpufreq_table:
 348         dev_pm_opp_free_cpufreq_table(cpu_dev, &freq_table);
 349 out_free_priv:
 350         kfree(priv);
 351 out_free_opp:
 352         of_cpumask_free_opp_table(policy->cpus);
 353 out_node_put:
 354         of_node_put(np);
 355 out_put_reg_clk:
 356         clk_put(cpu_clk);
 357         if (!IS_ERR(cpu_reg))
 358                 regulator_put(cpu_reg);
 359
 360         return ret;
 361 }
 362
 363 static int cpufreq_exit(struct cpufreq_policy *policy)
 364 {
 365         struct private_data *priv = policy->driver_data;
 366
 367         cpufreq_cooling_unregister(priv->cdev);
 368         dev_pm_opp_free_cpufreq_table(priv->cpu_dev, &policy->freq_table);
 369         of_cpumask_free_opp_table(policy->related_cpus);
 370         clk_put(policy->clk);
 371         if (!IS_ERR(priv->cpu_reg))
 372                 regulator_put(priv->cpu_reg);
 373         kfree(priv);
 374
 375         return 0;
 376 }
 377
 378 static void cpufreq_ready(struct cpufreq_policy *policy)
 379 {
 380         struct private_data *priv = policy->driver_data;
 381         struct device_node *np = of_node_get(priv->cpu_dev->of_node);
 382
 383         if (WARN_ON(!np))
 384                 return;
 385
 386         /*
 387          * For now, just loading the cooling device;
 388          * thermal DT code takes care of matching them.
 389          */
 390         if (of_find_property(np, "#cooling-cells", NULL)) {
 391                 priv->cdev = of_cpufreq_cooling_register(np,
 392                                                          policy->related_cpus);
 393                 if (IS_ERR(priv->cdev)) {
 394                         dev_err(priv->cpu_dev,
 395                                 "running cpufreq without cooling device: %ld\n",
 396                                 PTR_ERR(priv->cdev));
 397
 398                         priv->cdev = NULL;
 399                 }
 400         }
 401
 402         of_node_put(np);
 403 }
 404
 405 static struct cpufreq_driver dt_cpufreq_driver = {
 406         .flags = CPUFREQ_STICKY | CPUFREQ_NEED_INITIAL_FREQ_CHECK,
 407         .verify = cpufreq_generic_frequency_table_verify,
 408         .target_index = set_target,
 409         .get = cpufreq_generic_get,
 410         .init = cpufreq_init,
 411         .exit = cpufreq_exit,
 412         .ready = cpufreq_ready,
 413         .name = "cpufreq-dt",
 414         .attr = cpufreq_generic_attr,
 415 };
 416
 417 static int dt_cpufreq_probe(struct platform_device *pdev)
 418 {
 419         struct device *cpu_dev;
 420         struct regulator *cpu_reg;
 421         struct clk *cpu_clk;
 422         int ret;
 423
 424         /*
 425          * All per-cluster (CPUs sharing clock/voltages) initialization is done
 426          * from ->init(). In probe(), we just need to make sure that clk and
 427          * regulators are available. Else defer probe and retry.
 428          *
 429          * FIXME: Is checking this only for CPU0 sufficient ?
 430          */
 431         ret = allocate_resources(0, &cpu_dev, &cpu_reg, &cpu_clk);
 432         if (ret)
 433                 return ret;
 434
 435         clk_put(cpu_clk);
 436         if (!IS_ERR(cpu_reg))
 437                 regulator_put(cpu_reg);
 438
 439         dt_cpufreq_driver.driver_data = dev_get_platdata(&pdev->dev);
 440
 441         ret = cpufreq_register_driver(&dt_cpufreq_driver);
 442         if (ret)
 443                 dev_err(cpu_dev, "failed register driver: %d\n", ret);
 444
 445         return ret;
 446 }
 447
 448 static int dt_cpufreq_remove(struct platform_device *pdev)
 449 {
 450         cpufreq_unregister_driver(&dt_cpufreq_driver);
 451         return 0;
 452 }
 453
 454 static struct platform_driver dt_cpufreq_platdrv = {
 455         .driver = {
 456                 .name   = "cpufreq-dt",
 457         },
 458         .probe          = dt_cpufreq_probe,
 459         .remove         = dt_cpufreq_remove,
 460 };
 461 module_platform_driver(dt_cpufreq_platdrv);
 462
 463 MODULE_ALIAS("platform:cpufreq-dt");
 464 MODULE_AUTHOR("Viresh Kumar <viresh.kumar@linaro.org>");
 465 MODULE_AUTHOR("Shawn Guo <shawn.guo@linaro.org>");
 466 MODULE_DESCRIPTION("Generic cpufreq driver");
 467 MODULE_LICENSE("GPL");