2 * Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com>
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
11 #include <linux/clk-provider.h>
12 #include <linux/clkdev.h>
13 #include <linux/clk/at91_pmc.h>
15 #include <linux/of_address.h>
17 #include <linux/interrupt.h>
18 #include <linux/irq.h>
19 #include <linux/irqchip/chained_irq.h>
20 #include <linux/irqdomain.h>
21 #include <linux/of_irq.h>
23 #include <asm/proc-fns.h>
27 void __iomem *at91_pmc_base;
28 EXPORT_SYMBOL_GPL(at91_pmc_base);
30 void at91rm9200_idle(void)
33 * Disable the processor clock. The processor will be automatically
34 * re-enabled by an interrupt or by a reset.
36 at91_pmc_write(AT91_PMC_SCDR, AT91_PMC_PCK);
39 void at91sam9_idle(void)
41 at91_pmc_write(AT91_PMC_SCDR, AT91_PMC_PCK);
45 int of_at91_get_clk_range(struct device_node *np, const char *propname,
46 struct clk_range *range)
51 ret = of_property_read_u32_index(np, propname, 0, &min);
55 ret = of_property_read_u32_index(np, propname, 1, &max);
66 EXPORT_SYMBOL_GPL(of_at91_get_clk_range);
68 static void pmc_irq_mask(struct irq_data *d)
70 struct at91_pmc *pmc = irq_data_get_irq_chip_data(d);
72 pmc_write(pmc, AT91_PMC_IDR, 1 << d->hwirq);
75 static void pmc_irq_unmask(struct irq_data *d)
77 struct at91_pmc *pmc = irq_data_get_irq_chip_data(d);
79 pmc_write(pmc, AT91_PMC_IER, 1 << d->hwirq);
82 static int pmc_irq_set_type(struct irq_data *d, unsigned type)
84 if (type != IRQ_TYPE_LEVEL_HIGH) {
85 pr_warn("PMC: type not supported (support only IRQ_TYPE_LEVEL_HIGH type)\n");
92 static void pmc_irq_suspend(struct irq_data *d)
94 struct at91_pmc *pmc = irq_data_get_irq_chip_data(d);
96 pmc->imr = pmc_read(pmc, AT91_PMC_IMR);
97 pmc_write(pmc, AT91_PMC_IDR, pmc->imr);
100 static void pmc_irq_resume(struct irq_data *d)
102 struct at91_pmc *pmc = irq_data_get_irq_chip_data(d);
104 pmc_write(pmc, AT91_PMC_IER, pmc->imr);
107 static struct irq_chip pmc_irq = {
109 .irq_disable = pmc_irq_mask,
110 .irq_mask = pmc_irq_mask,
111 .irq_unmask = pmc_irq_unmask,
112 .irq_set_type = pmc_irq_set_type,
113 .irq_suspend = pmc_irq_suspend,
114 .irq_resume = pmc_irq_resume,
117 static struct lock_class_key pmc_lock_class;
119 static int pmc_irq_map(struct irq_domain *h, unsigned int virq,
122 struct at91_pmc *pmc = h->host_data;
124 irq_set_lockdep_class(virq, &pmc_lock_class);
126 irq_set_chip_and_handler(virq, &pmc_irq,
128 irq_set_chip_data(virq, pmc);
133 static int pmc_irq_domain_xlate(struct irq_domain *d,
134 struct device_node *ctrlr,
135 const u32 *intspec, unsigned int intsize,
136 irq_hw_number_t *out_hwirq,
137 unsigned int *out_type)
139 struct at91_pmc *pmc = d->host_data;
140 const struct at91_pmc_caps *caps = pmc->caps;
142 if (WARN_ON(intsize < 1))
145 *out_hwirq = intspec[0];
147 if (!(caps->available_irqs & (1 << *out_hwirq)))
150 *out_type = IRQ_TYPE_LEVEL_HIGH;
155 static const struct irq_domain_ops pmc_irq_ops = {
157 .xlate = pmc_irq_domain_xlate,
160 static irqreturn_t pmc_irq_handler(int irq, void *data)
162 struct at91_pmc *pmc = (struct at91_pmc *)data;
166 sr = pmc_read(pmc, AT91_PMC_SR) & pmc_read(pmc, AT91_PMC_IMR);
170 for_each_set_bit(n, &sr, BITS_PER_LONG)
171 generic_handle_irq(irq_find_mapping(pmc->irqdomain, n));
176 static const struct at91_pmc_caps at91rm9200_caps = {
177 .available_irqs = AT91_PMC_MOSCS | AT91_PMC_LOCKA | AT91_PMC_LOCKB |
178 AT91_PMC_MCKRDY | AT91_PMC_PCK0RDY |
179 AT91_PMC_PCK1RDY | AT91_PMC_PCK2RDY |
183 static const struct at91_pmc_caps at91sam9260_caps = {
184 .available_irqs = AT91_PMC_MOSCS | AT91_PMC_LOCKA | AT91_PMC_LOCKB |
185 AT91_PMC_MCKRDY | AT91_PMC_PCK0RDY |
189 static const struct at91_pmc_caps at91sam9g45_caps = {
190 .available_irqs = AT91_PMC_MOSCS | AT91_PMC_LOCKA | AT91_PMC_MCKRDY |
191 AT91_PMC_LOCKU | AT91_PMC_PCK0RDY |
195 static const struct at91_pmc_caps at91sam9n12_caps = {
196 .available_irqs = AT91_PMC_MOSCS | AT91_PMC_LOCKA | AT91_PMC_LOCKB |
197 AT91_PMC_MCKRDY | AT91_PMC_PCK0RDY |
198 AT91_PMC_PCK1RDY | AT91_PMC_MOSCSELS |
199 AT91_PMC_MOSCRCS | AT91_PMC_CFDEV,
202 static const struct at91_pmc_caps at91sam9x5_caps = {
203 .available_irqs = AT91_PMC_MOSCS | AT91_PMC_LOCKA | AT91_PMC_MCKRDY |
204 AT91_PMC_LOCKU | AT91_PMC_PCK0RDY |
205 AT91_PMC_PCK1RDY | AT91_PMC_MOSCSELS |
206 AT91_PMC_MOSCRCS | AT91_PMC_CFDEV,
209 static const struct at91_pmc_caps sama5d2_caps = {
210 .available_irqs = AT91_PMC_MOSCS | AT91_PMC_LOCKA | AT91_PMC_MCKRDY |
211 AT91_PMC_LOCKU | AT91_PMC_PCK0RDY |
212 AT91_PMC_PCK1RDY | AT91_PMC_PCK2RDY |
213 AT91_PMC_MOSCSELS | AT91_PMC_MOSCRCS |
214 AT91_PMC_CFDEV | AT91_PMC_GCKRDY,
217 static const struct at91_pmc_caps sama5d3_caps = {
218 .available_irqs = AT91_PMC_MOSCS | AT91_PMC_LOCKA | AT91_PMC_MCKRDY |
219 AT91_PMC_LOCKU | AT91_PMC_PCK0RDY |
220 AT91_PMC_PCK1RDY | AT91_PMC_PCK2RDY |
221 AT91_PMC_MOSCSELS | AT91_PMC_MOSCRCS |
225 static struct at91_pmc *__init at91_pmc_init(struct device_node *np,
226 void __iomem *regbase, int virq,
227 const struct at91_pmc_caps *caps)
229 struct at91_pmc *pmc;
231 if (!regbase || !virq || !caps)
234 at91_pmc_base = regbase;
236 pmc = kzalloc(sizeof(*pmc), GFP_KERNEL);
240 spin_lock_init(&pmc->lock);
241 pmc->regbase = regbase;
245 pmc->irqdomain = irq_domain_add_linear(np, 32, &pmc_irq_ops, pmc);
250 pmc_write(pmc, AT91_PMC_IDR, 0xffffffff);
251 if (request_irq(pmc->virq, pmc_irq_handler,
252 IRQF_SHARED | IRQF_COND_SUSPEND, "pmc", pmc))
253 goto out_remove_irqdomain;
257 out_remove_irqdomain:
258 irq_domain_remove(pmc->irqdomain);
265 static const struct of_device_id pmc_clk_ids[] __initconst = {
266 /* Slow oscillator */
268 .compatible = "atmel,at91sam9260-clk-slow",
269 .data = of_at91sam9260_clk_slow_setup,
273 .compatible = "atmel,at91rm9200-clk-main-osc",
274 .data = of_at91rm9200_clk_main_osc_setup,
277 .compatible = "atmel,at91sam9x5-clk-main-rc-osc",
278 .data = of_at91sam9x5_clk_main_rc_osc_setup,
281 .compatible = "atmel,at91rm9200-clk-main",
282 .data = of_at91rm9200_clk_main_setup,
285 .compatible = "atmel,at91sam9x5-clk-main",
286 .data = of_at91sam9x5_clk_main_setup,
290 .compatible = "atmel,at91rm9200-clk-pll",
291 .data = of_at91rm9200_clk_pll_setup,
294 .compatible = "atmel,at91sam9g45-clk-pll",
295 .data = of_at91sam9g45_clk_pll_setup,
298 .compatible = "atmel,at91sam9g20-clk-pllb",
299 .data = of_at91sam9g20_clk_pllb_setup,
302 .compatible = "atmel,sama5d3-clk-pll",
303 .data = of_sama5d3_clk_pll_setup,
306 .compatible = "atmel,at91sam9x5-clk-plldiv",
307 .data = of_at91sam9x5_clk_plldiv_setup,
311 .compatible = "atmel,at91rm9200-clk-master",
312 .data = of_at91rm9200_clk_master_setup,
315 .compatible = "atmel,at91sam9x5-clk-master",
316 .data = of_at91sam9x5_clk_master_setup,
320 .compatible = "atmel,at91rm9200-clk-system",
321 .data = of_at91rm9200_clk_sys_setup,
323 /* Peripheral clocks */
325 .compatible = "atmel,at91rm9200-clk-peripheral",
326 .data = of_at91rm9200_clk_periph_setup,
329 .compatible = "atmel,at91sam9x5-clk-peripheral",
330 .data = of_at91sam9x5_clk_periph_setup,
332 /* Programmable clocks */
334 .compatible = "atmel,at91rm9200-clk-programmable",
335 .data = of_at91rm9200_clk_prog_setup,
338 .compatible = "atmel,at91sam9g45-clk-programmable",
339 .data = of_at91sam9g45_clk_prog_setup,
342 .compatible = "atmel,at91sam9x5-clk-programmable",
343 .data = of_at91sam9x5_clk_prog_setup,
346 #if defined(CONFIG_HAVE_AT91_UTMI)
348 .compatible = "atmel,at91sam9x5-clk-utmi",
349 .data = of_at91sam9x5_clk_utmi_setup,
353 #if defined(CONFIG_HAVE_AT91_USB_CLK)
355 .compatible = "atmel,at91rm9200-clk-usb",
356 .data = of_at91rm9200_clk_usb_setup,
359 .compatible = "atmel,at91sam9x5-clk-usb",
360 .data = of_at91sam9x5_clk_usb_setup,
363 .compatible = "atmel,at91sam9n12-clk-usb",
364 .data = of_at91sam9n12_clk_usb_setup,
368 #if defined(CONFIG_HAVE_AT91_SMD)
370 .compatible = "atmel,at91sam9x5-clk-smd",
371 .data = of_at91sam9x5_clk_smd_setup,
374 #if defined(CONFIG_HAVE_AT91_H32MX)
376 .compatible = "atmel,sama5d4-clk-h32mx",
377 .data = of_sama5d4_clk_h32mx_setup,
380 #if defined(CONFIG_HAVE_AT91_GENERATED_CLK)
382 .compatible = "atmel,sama5d2-clk-generated",
383 .data = of_sama5d2_clk_generated_setup,
389 static void __init of_at91_pmc_setup(struct device_node *np,
390 const struct at91_pmc_caps *caps)
392 struct at91_pmc *pmc;
393 struct device_node *childnp;
394 void (*clk_setup)(struct device_node *, struct at91_pmc *);
395 const struct of_device_id *clk_id;
396 void __iomem *regbase = of_iomap(np, 0);
402 virq = irq_of_parse_and_map(np, 0);
406 pmc = at91_pmc_init(np, regbase, virq, caps);
409 for_each_child_of_node(np, childnp) {
410 clk_id = of_match_node(pmc_clk_ids, childnp);
413 clk_setup = clk_id->data;
414 clk_setup(childnp, pmc);
418 static void __init of_at91rm9200_pmc_setup(struct device_node *np)
420 of_at91_pmc_setup(np, &at91rm9200_caps);
422 CLK_OF_DECLARE(at91rm9200_clk_pmc, "atmel,at91rm9200-pmc",
423 of_at91rm9200_pmc_setup);
425 static void __init of_at91sam9260_pmc_setup(struct device_node *np)
427 of_at91_pmc_setup(np, &at91sam9260_caps);
429 CLK_OF_DECLARE(at91sam9260_clk_pmc, "atmel,at91sam9260-pmc",
430 of_at91sam9260_pmc_setup);
432 static void __init of_at91sam9g45_pmc_setup(struct device_node *np)
434 of_at91_pmc_setup(np, &at91sam9g45_caps);
436 CLK_OF_DECLARE(at91sam9g45_clk_pmc, "atmel,at91sam9g45-pmc",
437 of_at91sam9g45_pmc_setup);
439 static void __init of_at91sam9n12_pmc_setup(struct device_node *np)
441 of_at91_pmc_setup(np, &at91sam9n12_caps);
443 CLK_OF_DECLARE(at91sam9n12_clk_pmc, "atmel,at91sam9n12-pmc",
444 of_at91sam9n12_pmc_setup);
446 static void __init of_at91sam9x5_pmc_setup(struct device_node *np)
448 of_at91_pmc_setup(np, &at91sam9x5_caps);
450 CLK_OF_DECLARE(at91sam9x5_clk_pmc, "atmel,at91sam9x5-pmc",
451 of_at91sam9x5_pmc_setup);
453 static void __init of_sama5d2_pmc_setup(struct device_node *np)
455 of_at91_pmc_setup(np, &sama5d2_caps);
457 CLK_OF_DECLARE(sama5d2_clk_pmc, "atmel,sama5d2-pmc",
458 of_sama5d2_pmc_setup);
460 static void __init of_sama5d3_pmc_setup(struct device_node *np)
462 of_at91_pmc_setup(np, &sama5d3_caps);
464 CLK_OF_DECLARE(sama5d3_clk_pmc, "atmel,sama5d3-pmc",
465 of_sama5d3_pmc_setup);