2 * drivers/clk/at91/clk-slow.c
4 * Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
13 #include <linux/clk.h>
14 #include <linux/clk-provider.h>
15 #include <linux/clkdev.h>
16 #include <linux/slab.h>
17 #include <linux/clk/at91_pmc.h>
18 #include <linux/delay.h>
20 #include <linux/of_address.h>
21 #include <linux/of_irq.h>
23 #include <linux/interrupt.h>
24 #include <linux/irq.h>
25 #include <linux/sched.h>
26 #include <linux/wait.h>
31 #define SLOW_CLOCK_FREQ 32768
32 #define SLOWCK_SW_CYCLES 5
33 #define SLOWCK_SW_TIME_USEC ((SLOWCK_SW_CYCLES * USEC_PER_SEC) / \
36 #define AT91_SCKC_CR 0x00
37 #define AT91_SCKC_RCEN (1 << 0)
38 #define AT91_SCKC_OSC32EN (1 << 1)
39 #define AT91_SCKC_OSC32BYP (1 << 2)
40 #define AT91_SCKC_OSCSEL (1 << 3)
45 unsigned long startup_usec;
48 #define to_clk_slow_osc(hw) container_of(hw, struct clk_slow_osc, hw)
50 struct clk_slow_rc_osc {
53 unsigned long frequency;
54 unsigned long accuracy;
55 unsigned long startup_usec;
58 #define to_clk_slow_rc_osc(hw) container_of(hw, struct clk_slow_rc_osc, hw)
60 struct clk_sam9260_slow {
65 #define to_clk_sam9260_slow(hw) container_of(hw, struct clk_sam9260_slow, hw)
67 struct clk_sam9x5_slow {
73 #define to_clk_sam9x5_slow(hw) container_of(hw, struct clk_sam9x5_slow, hw)
75 static struct clk *slow_clk;
77 static int clk_slow_osc_prepare(struct clk_hw *hw)
79 struct clk_slow_osc *osc = to_clk_slow_osc(hw);
80 void __iomem *sckcr = osc->sckcr;
81 u32 tmp = readl(sckcr);
83 if (tmp & AT91_SCKC_OSC32BYP)
86 writel(tmp | AT91_SCKC_OSC32EN, sckcr);
88 usleep_range(osc->startup_usec, osc->startup_usec + 1);
93 static void clk_slow_osc_unprepare(struct clk_hw *hw)
95 struct clk_slow_osc *osc = to_clk_slow_osc(hw);
96 void __iomem *sckcr = osc->sckcr;
97 u32 tmp = readl(sckcr);
99 if (tmp & AT91_SCKC_OSC32BYP)
102 writel(tmp & ~AT91_SCKC_OSC32EN, sckcr);
105 static int clk_slow_osc_is_prepared(struct clk_hw *hw)
107 struct clk_slow_osc *osc = to_clk_slow_osc(hw);
108 void __iomem *sckcr = osc->sckcr;
109 u32 tmp = readl(sckcr);
111 if (tmp & AT91_SCKC_OSC32BYP)
114 return !!(tmp & AT91_SCKC_OSC32EN);
117 static const struct clk_ops slow_osc_ops = {
118 .prepare = clk_slow_osc_prepare,
119 .unprepare = clk_slow_osc_unprepare,
120 .is_prepared = clk_slow_osc_is_prepared,
123 static struct clk * __init
124 at91_clk_register_slow_osc(void __iomem *sckcr,
126 const char *parent_name,
127 unsigned long startup,
130 struct clk_slow_osc *osc;
131 struct clk *clk = NULL;
132 struct clk_init_data init;
134 if (!sckcr || !name || !parent_name)
135 return ERR_PTR(-EINVAL);
137 osc = kzalloc(sizeof(*osc), GFP_KERNEL);
139 return ERR_PTR(-ENOMEM);
142 init.ops = &slow_osc_ops;
143 init.parent_names = &parent_name;
144 init.num_parents = 1;
145 init.flags = CLK_IGNORE_UNUSED;
147 osc->hw.init = &init;
149 osc->startup_usec = startup;
152 writel((readl(sckcr) & ~AT91_SCKC_OSC32EN) | AT91_SCKC_OSC32BYP,
155 clk = clk_register(NULL, &osc->hw);
162 void __init of_at91sam9x5_clk_slow_osc_setup(struct device_node *np,
166 const char *parent_name;
167 const char *name = np->name;
171 parent_name = of_clk_get_parent_name(np, 0);
172 of_property_read_string(np, "clock-output-names", &name);
173 of_property_read_u32(np, "atmel,startup-time-usec", &startup);
174 bypass = of_property_read_bool(np, "atmel,osc-bypass");
176 clk = at91_clk_register_slow_osc(sckcr, name, parent_name, startup,
181 of_clk_add_provider(np, of_clk_src_simple_get, clk);
184 static unsigned long clk_slow_rc_osc_recalc_rate(struct clk_hw *hw,
185 unsigned long parent_rate)
187 struct clk_slow_rc_osc *osc = to_clk_slow_rc_osc(hw);
189 return osc->frequency;
192 static unsigned long clk_slow_rc_osc_recalc_accuracy(struct clk_hw *hw,
193 unsigned long parent_acc)
195 struct clk_slow_rc_osc *osc = to_clk_slow_rc_osc(hw);
197 return osc->accuracy;
200 static int clk_slow_rc_osc_prepare(struct clk_hw *hw)
202 struct clk_slow_rc_osc *osc = to_clk_slow_rc_osc(hw);
203 void __iomem *sckcr = osc->sckcr;
205 writel(readl(sckcr) | AT91_SCKC_RCEN, sckcr);
207 usleep_range(osc->startup_usec, osc->startup_usec + 1);
212 static void clk_slow_rc_osc_unprepare(struct clk_hw *hw)
214 struct clk_slow_rc_osc *osc = to_clk_slow_rc_osc(hw);
215 void __iomem *sckcr = osc->sckcr;
217 writel(readl(sckcr) & ~AT91_SCKC_RCEN, sckcr);
220 static int clk_slow_rc_osc_is_prepared(struct clk_hw *hw)
222 struct clk_slow_rc_osc *osc = to_clk_slow_rc_osc(hw);
224 return !!(readl(osc->sckcr) & AT91_SCKC_RCEN);
227 static const struct clk_ops slow_rc_osc_ops = {
228 .prepare = clk_slow_rc_osc_prepare,
229 .unprepare = clk_slow_rc_osc_unprepare,
230 .is_prepared = clk_slow_rc_osc_is_prepared,
231 .recalc_rate = clk_slow_rc_osc_recalc_rate,
232 .recalc_accuracy = clk_slow_rc_osc_recalc_accuracy,
235 static struct clk * __init
236 at91_clk_register_slow_rc_osc(void __iomem *sckcr,
238 unsigned long frequency,
239 unsigned long accuracy,
240 unsigned long startup)
242 struct clk_slow_rc_osc *osc;
243 struct clk *clk = NULL;
244 struct clk_init_data init;
247 return ERR_PTR(-EINVAL);
249 osc = kzalloc(sizeof(*osc), GFP_KERNEL);
251 return ERR_PTR(-ENOMEM);
254 init.ops = &slow_rc_osc_ops;
255 init.parent_names = NULL;
256 init.num_parents = 0;
257 init.flags = CLK_IS_ROOT | CLK_IGNORE_UNUSED;
259 osc->hw.init = &init;
261 osc->frequency = frequency;
262 osc->accuracy = accuracy;
263 osc->startup_usec = startup;
265 clk = clk_register(NULL, &osc->hw);
272 void __init of_at91sam9x5_clk_slow_rc_osc_setup(struct device_node *np,
279 const char *name = np->name;
281 of_property_read_string(np, "clock-output-names", &name);
282 of_property_read_u32(np, "clock-frequency", &frequency);
283 of_property_read_u32(np, "clock-accuracy", &accuracy);
284 of_property_read_u32(np, "atmel,startup-time-usec", &startup);
286 clk = at91_clk_register_slow_rc_osc(sckcr, name, frequency, accuracy,
291 of_clk_add_provider(np, of_clk_src_simple_get, clk);
294 static int clk_sam9x5_slow_set_parent(struct clk_hw *hw, u8 index)
296 struct clk_sam9x5_slow *slowck = to_clk_sam9x5_slow(hw);
297 void __iomem *sckcr = slowck->sckcr;
305 if ((!index && !(tmp & AT91_SCKC_OSCSEL)) ||
306 (index && (tmp & AT91_SCKC_OSCSEL)))
310 tmp |= AT91_SCKC_OSCSEL;
312 tmp &= ~AT91_SCKC_OSCSEL;
316 usleep_range(SLOWCK_SW_TIME_USEC, SLOWCK_SW_TIME_USEC + 1);
321 static u8 clk_sam9x5_slow_get_parent(struct clk_hw *hw)
323 struct clk_sam9x5_slow *slowck = to_clk_sam9x5_slow(hw);
325 return !!(readl(slowck->sckcr) & AT91_SCKC_OSCSEL);
328 static const struct clk_ops sam9x5_slow_ops = {
329 .set_parent = clk_sam9x5_slow_set_parent,
330 .get_parent = clk_sam9x5_slow_get_parent,
333 static struct clk * __init
334 at91_clk_register_sam9x5_slow(void __iomem *sckcr,
336 const char **parent_names,
339 struct clk_sam9x5_slow *slowck;
340 struct clk *clk = NULL;
341 struct clk_init_data init;
343 if (!sckcr || !name || !parent_names || !num_parents)
344 return ERR_PTR(-EINVAL);
346 slowck = kzalloc(sizeof(*slowck), GFP_KERNEL);
348 return ERR_PTR(-ENOMEM);
351 init.ops = &sam9x5_slow_ops;
352 init.parent_names = parent_names;
353 init.num_parents = num_parents;
356 slowck->hw.init = &init;
357 slowck->sckcr = sckcr;
358 slowck->parent = !!(readl(sckcr) & AT91_SCKC_OSCSEL);
360 clk = clk_register(NULL, &slowck->hw);
369 void __init of_at91sam9x5_clk_slow_setup(struct device_node *np,
373 const char *parent_names[2];
375 const char *name = np->name;
377 num_parents = of_clk_get_parent_count(np);
378 if (num_parents <= 0 || num_parents > 2)
381 of_clk_parent_fill(np, parent_names, num_parents);
383 of_property_read_string(np, "clock-output-names", &name);
385 clk = at91_clk_register_sam9x5_slow(sckcr, name, parent_names,
390 of_clk_add_provider(np, of_clk_src_simple_get, clk);
393 static u8 clk_sam9260_slow_get_parent(struct clk_hw *hw)
395 struct clk_sam9260_slow *slowck = to_clk_sam9260_slow(hw);
397 return !!(pmc_read(slowck->pmc, AT91_PMC_SR) & AT91_PMC_OSCSEL);
400 static const struct clk_ops sam9260_slow_ops = {
401 .get_parent = clk_sam9260_slow_get_parent,
404 static struct clk * __init
405 at91_clk_register_sam9260_slow(struct at91_pmc *pmc,
407 const char **parent_names,
410 struct clk_sam9260_slow *slowck;
411 struct clk *clk = NULL;
412 struct clk_init_data init;
415 return ERR_PTR(-EINVAL);
417 if (!parent_names || !num_parents)
418 return ERR_PTR(-EINVAL);
420 slowck = kzalloc(sizeof(*slowck), GFP_KERNEL);
422 return ERR_PTR(-ENOMEM);
425 init.ops = &sam9260_slow_ops;
426 init.parent_names = parent_names;
427 init.num_parents = num_parents;
430 slowck->hw.init = &init;
433 clk = clk_register(NULL, &slowck->hw);
442 void __init of_at91sam9260_clk_slow_setup(struct device_node *np,
443 struct at91_pmc *pmc)
446 const char *parent_names[2];
448 const char *name = np->name;
450 num_parents = of_clk_get_parent_count(np);
451 if (num_parents != 2)
454 of_clk_parent_fill(np, parent_names, num_parents);
456 of_property_read_string(np, "clock-output-names", &name);
458 clk = at91_clk_register_sam9260_slow(pmc, name, parent_names,
463 of_clk_add_provider(np, of_clk_src_simple_get, clk);
467 * FIXME: All slow clk users are not properly claiming it (get + prepare +
468 * enable) before using it.
469 * If all users properly claiming this clock decide that they don't need it
470 * anymore (or are removed), it is disabled while faulty users are still
471 * requiring it, and the system hangs.
472 * Prevent this clock from being disabled until all users are properly
474 * Once this is done we should remove this function and the slow_clk variable.
476 static int __init of_at91_clk_slow_retain(void)
482 clk_prepare_enable(slow_clk);
486 arch_initcall(of_at91_clk_slow_retain);