2 * Intel & MS High Precision Event Timer Implementation.
4 * Copyright (C) 2003 Intel Corporation
6 * (c) Copyright 2004 Hewlett-Packard Development Company, L.P.
7 * Bob Picco <robert.picco@hp.com>
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
14 #include <linux/interrupt.h>
15 #include <linux/module.h>
16 #include <linux/kernel.h>
17 #include <linux/types.h>
18 #include <linux/miscdevice.h>
19 #include <linux/major.h>
20 #include <linux/ioport.h>
21 #include <linux/fcntl.h>
22 #include <linux/init.h>
23 #include <linux/poll.h>
25 #include <linux/proc_fs.h>
26 #include <linux/spinlock.h>
27 #include <linux/sysctl.h>
28 #include <linux/wait.h>
29 #include <linux/bcd.h>
30 #include <linux/seq_file.h>
31 #include <linux/bitops.h>
32 #include <linux/clocksource.h>
34 #include <asm/current.h>
35 #include <asm/uaccess.h>
36 #include <asm/system.h>
39 #include <asm/div64.h>
41 #include <linux/acpi.h>
42 #include <acpi/acpi_bus.h>
43 #include <linux/hpet.h>
46 * The High Precision Event Timer driver.
47 * This driver is closely modelled after the rtc.c driver.
48 * http://www.intel.com/hardwaredesign/hpetspec.htm
50 #define HPET_USER_FREQ (64)
51 #define HPET_DRIFT (500)
53 #define HPET_RANGE_SIZE 1024 /* from HPET spec */
55 #if BITS_PER_LONG == 64
56 #define write_counter(V, MC) writeq(V, MC)
57 #define read_counter(MC) readq(MC)
59 #define write_counter(V, MC) writel(V, MC)
60 #define read_counter(MC) readl(MC)
63 static u32 hpet_nhpet, hpet_max_freq = HPET_USER_FREQ;
65 /* This clocksource driver currently only works on ia64 */
67 static void __iomem *hpet_mctr;
69 static cycle_t read_hpet(void)
71 return (cycle_t)read_counter((void __iomem *)hpet_mctr);
74 static struct clocksource clocksource_hpet = {
78 .mask = CLOCKSOURCE_MASK(64),
79 .mult = 0, /*to be caluclated*/
81 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
83 static struct clocksource *hpet_clocksource;
86 /* A lock for concurrent access by app and isr hpet activity. */
87 static DEFINE_SPINLOCK(hpet_lock);
88 /* A lock for concurrent intermodule access to hpet and isr hpet activity. */
89 static DEFINE_SPINLOCK(hpet_task_lock);
91 #define HPET_DEV_NAME (7)
94 struct hpets *hd_hpets;
95 struct hpet __iomem *hd_hpet;
96 struct hpet_timer __iomem *hd_timer;
97 unsigned long hd_ireqfreq;
98 unsigned long hd_irqdata;
99 wait_queue_head_t hd_waitqueue;
100 struct fasync_struct *hd_async_queue;
101 struct hpet_task *hd_task;
102 unsigned int hd_flags;
104 unsigned int hd_hdwirq;
105 char hd_name[HPET_DEV_NAME];
109 struct hpets *hp_next;
110 struct hpet __iomem *hp_hpet;
111 unsigned long hp_hpet_phys;
112 struct clocksource *hp_clocksource;
113 unsigned long long hp_tick_freq;
114 unsigned long hp_delta;
115 unsigned int hp_ntimer;
116 unsigned int hp_which;
117 struct hpet_dev hp_dev[1];
120 static struct hpets *hpets;
122 #define HPET_OPEN 0x0001
123 #define HPET_IE 0x0002 /* interrupt enabled */
124 #define HPET_PERIODIC 0x0004
125 #define HPET_SHARED_IRQ 0x0008
129 static inline unsigned long long readq(void __iomem *addr)
131 return readl(addr) | (((unsigned long long)readl(addr + 4)) << 32LL);
136 static inline void writeq(unsigned long long v, void __iomem *addr)
138 writel(v & 0xffffffff, addr);
139 writel(v >> 32, addr + 4);
143 static irqreturn_t hpet_interrupt(int irq, void *data)
145 struct hpet_dev *devp;
149 isr = 1 << (devp - devp->hd_hpets->hp_dev);
151 if ((devp->hd_flags & HPET_SHARED_IRQ) &&
152 !(isr & readl(&devp->hd_hpet->hpet_isr)))
155 spin_lock(&hpet_lock);
159 * For non-periodic timers, increment the accumulator.
160 * This has the effect of treating non-periodic like periodic.
162 if ((devp->hd_flags & (HPET_IE | HPET_PERIODIC)) == HPET_IE) {
165 t = devp->hd_ireqfreq;
166 m = read_counter(&devp->hd_hpet->hpet_mc);
167 write_counter(t + m + devp->hd_hpets->hp_delta,
168 &devp->hd_timer->hpet_compare);
171 if (devp->hd_flags & HPET_SHARED_IRQ)
172 writel(isr, &devp->hd_hpet->hpet_isr);
173 spin_unlock(&hpet_lock);
175 spin_lock(&hpet_task_lock);
177 devp->hd_task->ht_func(devp->hd_task->ht_data);
178 spin_unlock(&hpet_task_lock);
180 wake_up_interruptible(&devp->hd_waitqueue);
182 kill_fasync(&devp->hd_async_queue, SIGIO, POLL_IN);
187 static void hpet_timer_set_irq(struct hpet_dev *devp)
191 struct hpet_timer __iomem *timer;
193 spin_lock_irq(&hpet_lock);
194 if (devp->hd_hdwirq) {
195 spin_unlock_irq(&hpet_lock);
199 timer = devp->hd_timer;
201 /* we prefer level triggered mode */
202 v = readl(&timer->hpet_config);
203 if (!(v & Tn_INT_TYPE_CNF_MASK)) {
204 v |= Tn_INT_TYPE_CNF_MASK;
205 writel(v, &timer->hpet_config);
207 spin_unlock_irq(&hpet_lock);
209 v = (readq(&timer->hpet_config) & Tn_INT_ROUTE_CAP_MASK) >>
210 Tn_INT_ROUTE_CAP_SHIFT;
213 * In PIC mode, skip IRQ0-4, IRQ6-9, IRQ12-15 which is always used by
214 * legacy device. In IO APIC mode, we skip all the legacy IRQS.
216 if (acpi_irq_model == ACPI_IRQ_MODEL_PIC)
221 for (irq = find_first_bit(&v, HPET_MAX_IRQ); irq < HPET_MAX_IRQ;
222 irq = find_next_bit(&v, HPET_MAX_IRQ, 1 + irq)) {
224 if (irq >= NR_IRQS) {
229 gsi = acpi_register_gsi(irq, ACPI_LEVEL_SENSITIVE,
234 /* FIXME: Setup interrupt source table */
237 if (irq < HPET_MAX_IRQ) {
238 spin_lock_irq(&hpet_lock);
239 v = readl(&timer->hpet_config);
240 v |= irq << Tn_INT_ROUTE_CNF_SHIFT;
241 writel(v, &timer->hpet_config);
242 devp->hd_hdwirq = gsi;
243 spin_unlock_irq(&hpet_lock);
248 static int hpet_open(struct inode *inode, struct file *file)
250 struct hpet_dev *devp;
254 if (file->f_mode & FMODE_WRITE)
257 spin_lock_irq(&hpet_lock);
259 for (devp = NULL, hpetp = hpets; hpetp && !devp; hpetp = hpetp->hp_next)
260 for (i = 0; i < hpetp->hp_ntimer; i++)
261 if (hpetp->hp_dev[i].hd_flags & HPET_OPEN
262 || hpetp->hp_dev[i].hd_task)
265 devp = &hpetp->hp_dev[i];
270 spin_unlock_irq(&hpet_lock);
274 file->private_data = devp;
275 devp->hd_irqdata = 0;
276 devp->hd_flags |= HPET_OPEN;
277 spin_unlock_irq(&hpet_lock);
279 hpet_timer_set_irq(devp);
285 hpet_read(struct file *file, char __user *buf, size_t count, loff_t * ppos)
287 DECLARE_WAITQUEUE(wait, current);
290 struct hpet_dev *devp;
292 devp = file->private_data;
293 if (!devp->hd_ireqfreq)
296 if (count < sizeof(unsigned long))
299 add_wait_queue(&devp->hd_waitqueue, &wait);
302 set_current_state(TASK_INTERRUPTIBLE);
304 spin_lock_irq(&hpet_lock);
305 data = devp->hd_irqdata;
306 devp->hd_irqdata = 0;
307 spin_unlock_irq(&hpet_lock);
311 else if (file->f_flags & O_NONBLOCK) {
314 } else if (signal_pending(current)) {
315 retval = -ERESTARTSYS;
321 retval = put_user(data, (unsigned long __user *)buf);
323 retval = sizeof(unsigned long);
325 __set_current_state(TASK_RUNNING);
326 remove_wait_queue(&devp->hd_waitqueue, &wait);
331 static unsigned int hpet_poll(struct file *file, poll_table * wait)
334 struct hpet_dev *devp;
336 devp = file->private_data;
338 if (!devp->hd_ireqfreq)
341 poll_wait(file, &devp->hd_waitqueue, wait);
343 spin_lock_irq(&hpet_lock);
344 v = devp->hd_irqdata;
345 spin_unlock_irq(&hpet_lock);
348 return POLLIN | POLLRDNORM;
353 static int hpet_mmap(struct file *file, struct vm_area_struct *vma)
355 #ifdef CONFIG_HPET_MMAP
356 struct hpet_dev *devp;
359 if (((vma->vm_end - vma->vm_start) != PAGE_SIZE) || vma->vm_pgoff)
362 devp = file->private_data;
363 addr = devp->hd_hpets->hp_hpet_phys;
365 if (addr & (PAGE_SIZE - 1))
368 vma->vm_flags |= VM_IO;
369 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
371 if (io_remap_pfn_range(vma, vma->vm_start, addr >> PAGE_SHIFT,
372 PAGE_SIZE, vma->vm_page_prot)) {
373 printk(KERN_ERR "%s: io_remap_pfn_range failed\n",
384 static int hpet_fasync(int fd, struct file *file, int on)
386 struct hpet_dev *devp;
388 devp = file->private_data;
390 if (fasync_helper(fd, file, on, &devp->hd_async_queue) >= 0)
396 static int hpet_release(struct inode *inode, struct file *file)
398 struct hpet_dev *devp;
399 struct hpet_timer __iomem *timer;
402 devp = file->private_data;
403 timer = devp->hd_timer;
405 spin_lock_irq(&hpet_lock);
407 writeq((readq(&timer->hpet_config) & ~Tn_INT_ENB_CNF_MASK),
408 &timer->hpet_config);
413 devp->hd_ireqfreq = 0;
415 if (devp->hd_flags & HPET_PERIODIC
416 && readq(&timer->hpet_config) & Tn_TYPE_CNF_MASK) {
419 v = readq(&timer->hpet_config);
420 v ^= Tn_TYPE_CNF_MASK;
421 writeq(v, &timer->hpet_config);
424 devp->hd_flags &= ~(HPET_OPEN | HPET_IE | HPET_PERIODIC);
425 spin_unlock_irq(&hpet_lock);
430 if (file->f_flags & FASYNC)
431 hpet_fasync(-1, file, 0);
433 file->private_data = NULL;
437 static int hpet_ioctl_common(struct hpet_dev *, int, unsigned long, int);
440 hpet_ioctl(struct inode *inode, struct file *file, unsigned int cmd,
443 struct hpet_dev *devp;
445 devp = file->private_data;
446 return hpet_ioctl_common(devp, cmd, arg, 0);
449 static int hpet_ioctl_ieon(struct hpet_dev *devp)
451 struct hpet_timer __iomem *timer;
452 struct hpet __iomem *hpet;
455 unsigned long g, v, t, m;
456 unsigned long flags, isr;
458 timer = devp->hd_timer;
459 hpet = devp->hd_hpet;
460 hpetp = devp->hd_hpets;
462 if (!devp->hd_ireqfreq)
465 spin_lock_irq(&hpet_lock);
467 if (devp->hd_flags & HPET_IE) {
468 spin_unlock_irq(&hpet_lock);
472 devp->hd_flags |= HPET_IE;
474 if (readl(&timer->hpet_config) & Tn_INT_TYPE_CNF_MASK)
475 devp->hd_flags |= HPET_SHARED_IRQ;
476 spin_unlock_irq(&hpet_lock);
478 irq = devp->hd_hdwirq;
481 unsigned long irq_flags;
483 sprintf(devp->hd_name, "hpet%d", (int)(devp - hpetp->hp_dev));
484 irq_flags = devp->hd_flags & HPET_SHARED_IRQ
485 ? IRQF_SHARED : IRQF_DISABLED;
486 if (request_irq(irq, hpet_interrupt, irq_flags,
487 devp->hd_name, (void *)devp)) {
488 printk(KERN_ERR "hpet: IRQ %d is not free\n", irq);
494 spin_lock_irq(&hpet_lock);
495 devp->hd_flags ^= HPET_IE;
496 spin_unlock_irq(&hpet_lock);
501 t = devp->hd_ireqfreq;
502 v = readq(&timer->hpet_config);
503 g = v | Tn_INT_ENB_CNF_MASK;
505 if (devp->hd_flags & HPET_PERIODIC) {
506 write_counter(t, &timer->hpet_compare);
507 g |= Tn_TYPE_CNF_MASK;
508 v |= Tn_TYPE_CNF_MASK;
509 writeq(v, &timer->hpet_config);
510 v |= Tn_VAL_SET_CNF_MASK;
511 writeq(v, &timer->hpet_config);
512 local_irq_save(flags);
513 m = read_counter(&hpet->hpet_mc);
514 write_counter(t + m + hpetp->hp_delta, &timer->hpet_compare);
516 local_irq_save(flags);
517 m = read_counter(&hpet->hpet_mc);
518 write_counter(t + m + hpetp->hp_delta, &timer->hpet_compare);
521 if (devp->hd_flags & HPET_SHARED_IRQ) {
522 isr = 1 << (devp - devp->hd_hpets->hp_dev);
523 writel(isr, &hpet->hpet_isr);
525 writeq(g, &timer->hpet_config);
526 local_irq_restore(flags);
531 /* converts Hz to number of timer ticks */
532 static inline unsigned long hpet_time_div(struct hpets *hpets,
535 unsigned long long m;
537 m = hpets->hp_tick_freq + (dis >> 1);
539 return (unsigned long)m;
543 hpet_ioctl_common(struct hpet_dev *devp, int cmd, unsigned long arg, int kernel)
545 struct hpet_timer __iomem *timer;
546 struct hpet __iomem *hpet;
557 timer = devp->hd_timer;
558 hpet = devp->hd_hpet;
559 hpetp = devp->hd_hpets;
562 return hpet_ioctl_ieon(devp);
571 if ((devp->hd_flags & HPET_IE) == 0)
573 v = readq(&timer->hpet_config);
574 v &= ~Tn_INT_ENB_CNF_MASK;
575 writeq(v, &timer->hpet_config);
577 free_irq(devp->hd_irq, devp);
580 devp->hd_flags ^= HPET_IE;
584 struct hpet_info info;
586 if (devp->hd_ireqfreq)
588 hpet_time_div(hpetp, devp->hd_ireqfreq);
590 info.hi_ireqfreq = 0;
592 readq(&timer->hpet_config) & Tn_PER_INT_CAP_MASK;
593 info.hi_hpet = hpetp->hp_which;
594 info.hi_timer = devp - hpetp->hp_dev;
596 memcpy((void *)arg, &info, sizeof(info));
598 if (copy_to_user((void __user *)arg, &info,
604 v = readq(&timer->hpet_config);
605 if ((v & Tn_PER_INT_CAP_MASK) == 0) {
609 devp->hd_flags |= HPET_PERIODIC;
612 v = readq(&timer->hpet_config);
613 if ((v & Tn_PER_INT_CAP_MASK) == 0) {
617 if (devp->hd_flags & HPET_PERIODIC &&
618 readq(&timer->hpet_config) & Tn_TYPE_CNF_MASK) {
619 v = readq(&timer->hpet_config);
620 v ^= Tn_TYPE_CNF_MASK;
621 writeq(v, &timer->hpet_config);
623 devp->hd_flags &= ~HPET_PERIODIC;
626 if (!kernel && (arg > hpet_max_freq) &&
627 !capable(CAP_SYS_RESOURCE)) {
637 devp->hd_ireqfreq = hpet_time_div(hpetp, arg);
643 static const struct file_operations hpet_fops = {
644 .owner = THIS_MODULE,
650 .release = hpet_release,
651 .fasync = hpet_fasync,
655 static int hpet_is_known(struct hpet_data *hdp)
659 for (hpetp = hpets; hpetp; hpetp = hpetp->hp_next)
660 if (hpetp->hp_hpet_phys == hdp->hd_phys_address)
666 static inline int hpet_tpcheck(struct hpet_task *tp)
668 struct hpet_dev *devp;
671 devp = tp->ht_opaque;
676 for (hpetp = hpets; hpetp; hpetp = hpetp->hp_next)
677 if (devp >= hpetp->hp_dev
678 && devp < (hpetp->hp_dev + hpetp->hp_ntimer)
679 && devp->hd_hpet == hpetp->hp_hpet)
685 int hpet_unregister(struct hpet_task *tp)
687 struct hpet_dev *devp;
688 struct hpet_timer __iomem *timer;
691 if ((err = hpet_tpcheck(tp)))
694 spin_lock_irq(&hpet_task_lock);
695 spin_lock(&hpet_lock);
697 devp = tp->ht_opaque;
698 if (devp->hd_task != tp) {
699 spin_unlock(&hpet_lock);
700 spin_unlock_irq(&hpet_task_lock);
704 timer = devp->hd_timer;
705 writeq((readq(&timer->hpet_config) & ~Tn_INT_ENB_CNF_MASK),
706 &timer->hpet_config);
707 devp->hd_flags &= ~(HPET_IE | HPET_PERIODIC);
708 devp->hd_task = NULL;
709 spin_unlock(&hpet_lock);
710 spin_unlock_irq(&hpet_task_lock);
715 static ctl_table hpet_table[] = {
717 .ctl_name = CTL_UNNUMBERED,
718 .procname = "max-user-freq",
719 .data = &hpet_max_freq,
720 .maxlen = sizeof(int),
722 .proc_handler = &proc_dointvec,
727 static ctl_table hpet_root[] = {
729 .ctl_name = CTL_UNNUMBERED,
738 static ctl_table dev_root[] = {
749 static struct ctl_table_header *sysctl_header;
752 * Adjustment for when arming the timer with
753 * initial conditions. That is, main counter
754 * ticks expired before interrupts are enabled.
756 #define TICK_CALIBRATE (1000UL)
758 static unsigned long hpet_calibrate(struct hpets *hpetp)
760 struct hpet_timer __iomem *timer = NULL;
761 unsigned long t, m, count, i, flags, start;
762 struct hpet_dev *devp;
764 struct hpet __iomem *hpet;
766 for (j = 0, devp = hpetp->hp_dev; j < hpetp->hp_ntimer; j++, devp++)
767 if ((devp->hd_flags & HPET_OPEN) == 0) {
768 timer = devp->hd_timer;
775 hpet = hpetp->hp_hpet;
776 t = read_counter(&timer->hpet_compare);
779 count = hpet_time_div(hpetp, TICK_CALIBRATE);
781 local_irq_save(flags);
783 start = read_counter(&hpet->hpet_mc);
786 m = read_counter(&hpet->hpet_mc);
787 write_counter(t + m + hpetp->hp_delta, &timer->hpet_compare);
788 } while (i++, (m - start) < count);
790 local_irq_restore(flags);
792 return (m - start) / i;
795 int hpet_alloc(struct hpet_data *hdp)
798 struct hpet_dev *devp;
802 struct hpet __iomem *hpet;
803 static struct hpets *last = NULL;
804 unsigned long period;
805 unsigned long long temp;
808 * hpet_alloc can be called by platform dependent code.
809 * If platform dependent code has allocated the hpet that
810 * ACPI has also reported, then we catch it here.
812 if (hpet_is_known(hdp)) {
813 printk(KERN_DEBUG "%s: duplicate HPET ignored\n",
818 siz = sizeof(struct hpets) + ((hdp->hd_nirqs - 1) *
819 sizeof(struct hpet_dev));
821 hpetp = kzalloc(siz, GFP_KERNEL);
826 hpetp->hp_which = hpet_nhpet++;
827 hpetp->hp_hpet = hdp->hd_address;
828 hpetp->hp_hpet_phys = hdp->hd_phys_address;
830 hpetp->hp_ntimer = hdp->hd_nirqs;
832 for (i = 0; i < hdp->hd_nirqs; i++)
833 hpetp->hp_dev[i].hd_hdwirq = hdp->hd_irq[i];
835 hpet = hpetp->hp_hpet;
837 cap = readq(&hpet->hpet_cap);
839 ntimer = ((cap & HPET_NUM_TIM_CAP_MASK) >> HPET_NUM_TIM_CAP_SHIFT) + 1;
841 if (hpetp->hp_ntimer != ntimer) {
842 printk(KERN_WARNING "hpet: number irqs doesn't agree"
843 " with number of timers\n");
849 last->hp_next = hpetp;
855 period = (cap & HPET_COUNTER_CLK_PERIOD_MASK) >>
856 HPET_COUNTER_CLK_PERIOD_SHIFT; /* fs, 10^-15 */
857 temp = 1000000000000000uLL; /* 10^15 femtoseconds per second */
858 temp += period >> 1; /* round */
859 do_div(temp, period);
860 hpetp->hp_tick_freq = temp; /* ticks per second */
862 printk(KERN_INFO "hpet%d: at MMIO 0x%lx, IRQ%s",
863 hpetp->hp_which, hdp->hd_phys_address,
864 hpetp->hp_ntimer > 1 ? "s" : "");
865 for (i = 0; i < hpetp->hp_ntimer; i++)
866 printk("%s %d", i > 0 ? "," : "", hdp->hd_irq[i]);
869 printk(KERN_INFO "hpet%u: %u %d-bit timers, %Lu Hz\n",
870 hpetp->hp_which, hpetp->hp_ntimer,
871 cap & HPET_COUNTER_SIZE_MASK ? 64 : 32, hpetp->hp_tick_freq);
873 mcfg = readq(&hpet->hpet_config);
874 if ((mcfg & HPET_ENABLE_CNF_MASK) == 0) {
875 write_counter(0L, &hpet->hpet_mc);
876 mcfg |= HPET_ENABLE_CNF_MASK;
877 writeq(mcfg, &hpet->hpet_config);
880 for (i = 0, devp = hpetp->hp_dev; i < hpetp->hp_ntimer; i++, devp++) {
881 struct hpet_timer __iomem *timer;
883 timer = &hpet->hpet_timers[devp - hpetp->hp_dev];
885 devp->hd_hpets = hpetp;
886 devp->hd_hpet = hpet;
887 devp->hd_timer = timer;
890 * If the timer was reserved by platform code,
891 * then make timer unavailable for opens.
893 if (hdp->hd_state & (1 << i)) {
894 devp->hd_flags = HPET_OPEN;
898 init_waitqueue_head(&devp->hd_waitqueue);
901 hpetp->hp_delta = hpet_calibrate(hpetp);
903 /* This clocksource driver currently only works on ia64 */
905 if (!hpet_clocksource) {
906 hpet_mctr = (void __iomem *)&hpetp->hp_hpet->hpet_mc;
907 CLKSRC_FSYS_MMIO_SET(clocksource_hpet.fsys_mmio, hpet_mctr);
908 clocksource_hpet.mult = clocksource_hz2mult(hpetp->hp_tick_freq,
909 clocksource_hpet.shift);
910 clocksource_register(&clocksource_hpet);
911 hpetp->hp_clocksource = &clocksource_hpet;
912 hpet_clocksource = &clocksource_hpet;
919 static acpi_status hpet_resources(struct acpi_resource *res, void *data)
921 struct hpet_data *hdp;
923 struct acpi_resource_address64 addr;
927 status = acpi_resource_to_address64(res, &addr);
929 if (ACPI_SUCCESS(status)) {
930 hdp->hd_phys_address = addr.minimum;
931 hdp->hd_address = ioremap(addr.minimum, addr.address_length);
933 if (hpet_is_known(hdp)) {
934 printk(KERN_DEBUG "%s: 0x%lx is busy\n",
935 __func__, hdp->hd_phys_address);
936 iounmap(hdp->hd_address);
937 return AE_ALREADY_EXISTS;
939 } else if (res->type == ACPI_RESOURCE_TYPE_FIXED_MEMORY32) {
940 struct acpi_resource_fixed_memory32 *fixmem32;
942 fixmem32 = &res->data.fixed_memory32;
946 hdp->hd_phys_address = fixmem32->address;
947 hdp->hd_address = ioremap(fixmem32->address,
950 if (hpet_is_known(hdp)) {
951 printk(KERN_DEBUG "%s: 0x%lx is busy\n",
952 __func__, hdp->hd_phys_address);
953 iounmap(hdp->hd_address);
954 return AE_ALREADY_EXISTS;
956 } else if (res->type == ACPI_RESOURCE_TYPE_EXTENDED_IRQ) {
957 struct acpi_resource_extended_irq *irqp;
960 irqp = &res->data.extended_irq;
962 for (i = 0; i < irqp->interrupt_count; i++) {
963 irq = acpi_register_gsi(irqp->interrupts[i],
964 irqp->triggering, irqp->polarity);
968 hdp->hd_irq[hdp->hd_nirqs] = irq;
976 static int hpet_acpi_add(struct acpi_device *device)
979 struct hpet_data data;
981 memset(&data, 0, sizeof(data));
984 acpi_walk_resources(device->handle, METHOD_NAME__CRS,
985 hpet_resources, &data);
987 if (ACPI_FAILURE(result))
990 if (!data.hd_address || !data.hd_nirqs) {
991 printk("%s: no address or irqs in _CRS\n", __func__);
995 return hpet_alloc(&data);
998 static int hpet_acpi_remove(struct acpi_device *device, int type)
1000 /* XXX need to unregister clocksource, dealloc mem, etc */
1004 static const struct acpi_device_id hpet_device_ids[] = {
1008 MODULE_DEVICE_TABLE(acpi, hpet_device_ids);
1010 static struct acpi_driver hpet_acpi_driver = {
1012 .ids = hpet_device_ids,
1014 .add = hpet_acpi_add,
1015 .remove = hpet_acpi_remove,
1019 static struct miscdevice hpet_misc = { HPET_MINOR, "hpet", &hpet_fops };
1021 static int __init hpet_init(void)
1025 result = misc_register(&hpet_misc);
1029 sysctl_header = register_sysctl_table(dev_root);
1031 result = acpi_bus_register_driver(&hpet_acpi_driver);
1034 unregister_sysctl_table(sysctl_header);
1035 misc_deregister(&hpet_misc);
1042 static void __exit hpet_exit(void)
1044 acpi_bus_unregister_driver(&hpet_acpi_driver);
1047 unregister_sysctl_table(sysctl_header);
1048 misc_deregister(&hpet_misc);
1053 module_init(hpet_init);
1054 module_exit(hpet_exit);
1055 MODULE_AUTHOR("Bob Picco <Robert.Picco@hp.com>");
1056 MODULE_LICENSE("GPL");