2 Madge Ambassador ATM Adapter driver.
3 Copyright (C) 1995-1999 Madge Networks Ltd.
5 This program is free software; you can redistribute it and/or modify
6 it under the terms of the GNU General Public License as published by
7 the Free Software Foundation; either version 2 of the License, or
8 (at your option) any later version.
10 This program is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 GNU General Public License for more details.
15 You should have received a copy of the GNU General Public License
16 along with this program; if not, write to the Free Software
17 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 The GNU GPL is contained in /usr/doc/copyright/GPL on a Debian
20 system and in the file COPYING in the Linux kernel source.
23 /* * dedicated to the memory of Graham Gordon 1971-1998 * */
25 #include <linux/module.h>
26 #include <linux/types.h>
27 #include <linux/pci.h>
28 #include <linux/kernel.h>
29 #include <linux/init.h>
30 #include <linux/ioport.h>
31 #include <linux/atmdev.h>
32 #include <linux/delay.h>
33 #include <linux/interrupt.h>
34 #include <linux/poison.h>
35 #include <linux/bitrev.h>
36 #include <linux/mutex.h>
37 #include <linux/firmware.h>
38 #include <linux/ihex.h>
39 #include <linux/slab.h>
41 #include <linux/atomic.h>
43 #include <asm/byteorder.h>
45 #include "ambassador.h"
47 #define maintainer_string "Giuliano Procida at Madge Networks <gprocida@madge.com>"
48 #define description_string "Madge ATM Ambassador driver"
49 #define version_string "1.2.4"
51 static inline void __init show_version (void) {
52 printk ("%s version %s\n", description_string, version_string);
59 I Hardware, detection, initialisation and shutdown.
63 This driver is for the PCI ATMizer-based Ambassador card (except
64 very early versions). It is not suitable for the similar EISA "TR7"
65 card. Commercially, both cards are known as Collage Server ATM
68 The loader supports image transfer to the card, image start and few
69 other miscellaneous commands.
71 Only AAL5 is supported with vpi = 0 and vci in the range 0 to 1023.
73 The cards are big-endian.
77 Standard PCI stuff, the early cards are detected and rejected.
81 The cards are reset and the self-test results are checked. The
82 microcode image is then transferred and started. This waits for a
83 pointer to a descriptor containing details of the host-based queues
84 and buffers and various parameters etc. Once they are processed
85 normal operations may begin. The BIA is read using a microcode
90 This may be accomplished either by a card reset or via the microcode
91 shutdown command. Further investigation required.
95 The card reset does not affect PCI configuration (good) or the
96 contents of several other "shared run-time registers" (bad) which
97 include doorbell and interrupt control as well as EEPROM and PCI
98 control. The driver must be careful when modifying these registers
99 not to touch bits it does not use and to undo any changes at exit.
105 The adapter is quite intelligent (fast) and has a simple interface
106 (few features). VPI is always zero, 1024 VCIs are supported. There
107 is limited cell rate support. UBR channels can be capped and ABR
108 (explicit rate, but not EFCI) is supported. There is no CBR or VBR
111 1. Driver <-> Adapter Communication
113 Apart from the basic loader commands, the driver communicates
114 through three entities: the command queue (CQ), the transmit queue
115 pair (TXQ) and the receive queue pairs (RXQ). These three entities
116 are set up by the host and passed to the microcode just after it has
119 All queues are host-based circular queues. They are contiguous and
120 (due to hardware limitations) have some restrictions as to their
121 locations in (bus) memory. They are of the "full means the same as
122 empty so don't do that" variety since the adapter uses pointers
125 The queue pairs work as follows: one queue is for supply to the
126 adapter, items in it are pending and are owned by the adapter; the
127 other is the queue for return from the adapter, items in it have
128 been dealt with by the adapter. The host adds items to the supply
129 (TX descriptors and free RX buffer descriptors) and removes items
130 from the return (TX and RX completions). The adapter deals with out
131 of order completions.
133 Interrupts (card to host) and the doorbell (host to card) are used
138 This is to communicate "open VC", "close VC", "get stats" etc. to
139 the adapter. At most one command is retired every millisecond by the
140 card. There is no out of order completion or notification. The
141 driver needs to check the return code of the command, waiting as
146 TX supply items are of variable length (scatter gather support) and
147 so the queue items are (more or less) pointers to the real thing.
148 Each TX supply item contains a unique, host-supplied handle (the skb
149 bus address seems most sensible as this works for Alphas as well,
150 there is no need to do any endian conversions on the handles).
152 TX return items consist of just the handles above.
154 3. RXQ (up to 4 of these with different lengths and buffer sizes)
156 RX supply items consist of a unique, host-supplied handle (the skb
157 bus address again) and a pointer to the buffer data area.
159 RX return items consist of the handle above, the VC, length and a
160 status word. This just screams "oh so easy" doesn't it?
162 Note on RX pool sizes:
164 Each pool should have enough buffers to handle a back-to-back stream
165 of minimum sized frames on a single VC. For example:
167 frame spacing = 3us (about right)
169 delay = IRQ lat + RX handling + RX buffer replenish = 20 (us) (a guess)
171 min number of buffers for one VC = 1 + delay/spacing (buffers)
173 delay/spacing = latency = (20+2)/3 = 7 (buffers) (rounding up)
175 The 20us delay assumes that there is no need to sleep; if we need to
176 sleep to get buffers we are going to drop frames anyway.
178 In fact, each pool should have enough buffers to support the
179 simultaneous reassembly of a separate frame on each VC and cope with
180 the case in which frames complete in round robin cell fashion on
183 Only one frame can complete at each cell arrival, so if "n" VCs are
184 open, the worst case is to have them all complete frames together
185 followed by all starting new frames together.
187 desired number of buffers = n + delay/spacing
189 These are the extreme requirements, however, they are "n+k" for some
190 "k" so we have only the constant to choose. This is the argument
191 rx_lats which current defaults to 7.
193 Actually, "n ? n+k : 0" is better and this is what is implemented,
194 subject to the limit given by the pool size.
198 Simple spinlocks are used around the TX and RX queue mechanisms.
199 Anyone with a faster, working method is welcome to implement it.
201 The adapter command queue is protected with a spinlock. We always
202 wait for commands to complete.
204 A more complex form of locking is used around parts of the VC open
205 and close functions. There are three reasons for a lock: 1. we need
206 to do atomic rate reservation and release (not used yet), 2. Opening
207 sometimes involves two adapter commands which must not be separated
208 by another command on the same VC, 3. the changes to RX pool size
209 must be atomic. The lock needs to work over context switches, so we
212 III Hardware Features and Microcode Bugs
216 *%^"$&%^$*&^"$(%^$#&^%$(&#%$*(&^#%!"!"!*!
220 All structures that are not accessed using DMA must be 4-byte
221 aligned (not a problem) and must not cross 4MB boundaries.
223 There is a DMA memory hole at E0000000-E00000FF (groan).
225 TX fragments (DMA read) must not cross 4MB boundaries (would be 16MB
226 but for a hardware bug).
228 RX buffers (DMA write) must not cross 16MB boundaries and must
229 include spare trailing bytes up to the next 4-byte boundary; they
230 will be written with rubbish.
232 The PLX likes to prefetch; if reading up to 4 u32 past the end of
233 each TX fragment is not a problem, then TX can be made to go a
234 little faster by passing a flag at init that disables a prefetch
235 workaround. We do not pass this flag. (new microcode only)
238 . Note that alloc_skb rounds up size to a 16byte boundary.
239 . Ensure all areas do not traverse 4MB boundaries.
240 . Ensure all areas do not start at a E00000xx bus address.
241 (I cannot be certain, but this may always hold with Linux)
242 . Make all failures cause a loud message.
243 . Discard non-conforming SKBs (causes TX failure or RX fill delay).
244 . Discard non-conforming TX fragment descriptors (the TX fails).
245 In the future we could:
246 . Allow RX areas that traverse 4MB (but not 16MB) boundaries.
247 . Segment TX areas into some/more fragments, when necessary.
248 . Relax checks for non-DMA items (ignore hole).
249 . Give scatter-gather (iovec) requirements using ???. (?)
251 3. VC close is broken (only for new microcode)
253 The VC close adapter microcode command fails to do anything if any
254 frames have been received on the VC but none have been transmitted.
255 Frames continue to be reassembled and passed (with IRQ) to the
262 . Timer code may be broken.
264 . Deal with buggy VC close (somehow) in microcode 12.
266 . Handle interrupted and/or non-blocking writes - is this a job for
269 . Add code to break up TX fragments when they span 4MB boundaries.
271 . Add SUNI phy layer (need to know where SUNI lives on card).
273 . Implement a tx_alloc fn to (a) satisfy TX alignment etc. and (b)
274 leave extra headroom space for Ambassador TX descriptors.
276 . Understand these elements of struct atm_vcc: recvq (proto?),
277 sleep, callback, listenq, backlog_quota, reply and user_back.
279 . Adjust TX/RX skb allocation to favour IP with LANE/CLIP (configurable).
281 . Impose a TX-pending limit (2?) on each VC, help avoid TX q overflow.
283 . Decide whether RX buffer recycling is or can be made completely safe;
284 turn it back on. It looks like Werner is going to axe this.
286 . Implement QoS changes on open VCs (involves extracting parts of VC open
287 and close into separate functions and using them to make changes).
289 . Hack on command queue so that someone can issue multiple commands and wait
290 on the last one (OR only "no-op" or "wait" commands are waited for).
292 . Eliminate need for while-schedule around do_command.
296 static void do_housekeeping (unsigned long arg);
297 /********** globals **********/
299 static unsigned short debug = 0;
300 static unsigned int cmds = 8;
301 static unsigned int txs = 32;
302 static unsigned int rxs[NUM_RX_POOLS] = { 64, 64, 64, 64 };
303 static unsigned int rxs_bs[NUM_RX_POOLS] = { 4080, 12240, 36720, 65535 };
304 static unsigned int rx_lats = 7;
305 static unsigned char pci_lat = 0;
307 static const unsigned long onegigmask = -1 << 30;
309 /********** access to adapter **********/
311 static inline void wr_plain (const amb_dev * dev, size_t addr, u32 data) {
312 PRINTD (DBG_FLOW|DBG_REGS, "wr: %08zx <- %08x", addr, data);
314 dev->membase[addr / sizeof(u32)] = data;
316 outl (data, dev->iobase + addr);
320 static inline u32 rd_plain (const amb_dev * dev, size_t addr) {
322 u32 data = dev->membase[addr / sizeof(u32)];
324 u32 data = inl (dev->iobase + addr);
326 PRINTD (DBG_FLOW|DBG_REGS, "rd: %08zx -> %08x", addr, data);
330 static inline void wr_mem (const amb_dev * dev, size_t addr, u32 data) {
331 __be32 be = cpu_to_be32 (data);
332 PRINTD (DBG_FLOW|DBG_REGS, "wr: %08zx <- %08x b[%08x]", addr, data, be);
334 dev->membase[addr / sizeof(u32)] = be;
336 outl (be, dev->iobase + addr);
340 static inline u32 rd_mem (const amb_dev * dev, size_t addr) {
342 __be32 be = dev->membase[addr / sizeof(u32)];
344 __be32 be = inl (dev->iobase + addr);
346 u32 data = be32_to_cpu (be);
347 PRINTD (DBG_FLOW|DBG_REGS, "rd: %08zx -> %08x b[%08x]", addr, data, be);
351 /********** dump routines **********/
353 static inline void dump_registers (const amb_dev * dev) {
354 #ifdef DEBUG_AMBASSADOR
355 if (debug & DBG_REGS) {
357 PRINTD (DBG_REGS, "reading PLX control: ");
358 for (i = 0x00; i < 0x30; i += sizeof(u32))
360 PRINTD (DBG_REGS, "reading mailboxes: ");
361 for (i = 0x40; i < 0x60; i += sizeof(u32))
363 PRINTD (DBG_REGS, "reading doorb irqev irqen reset:");
364 for (i = 0x60; i < 0x70; i += sizeof(u32))
373 static inline void dump_loader_block (volatile loader_block * lb) {
374 #ifdef DEBUG_AMBASSADOR
376 PRINTDB (DBG_LOAD, "lb @ %p; res: %d, cmd: %d, pay:",
377 lb, be32_to_cpu (lb->result), be32_to_cpu (lb->command));
378 for (i = 0; i < MAX_COMMAND_DATA; ++i)
379 PRINTDM (DBG_LOAD, " %08x", be32_to_cpu (lb->payload.data[i]));
380 PRINTDE (DBG_LOAD, ", vld: %08x", be32_to_cpu (lb->valid));
387 static inline void dump_command (command * cmd) {
388 #ifdef DEBUG_AMBASSADOR
390 PRINTDB (DBG_CMD, "cmd @ %p, req: %08x, pars:",
391 cmd, /*be32_to_cpu*/ (cmd->request));
392 for (i = 0; i < 3; ++i)
393 PRINTDM (DBG_CMD, " %08x", /*be32_to_cpu*/ (cmd->args.par[i]));
394 PRINTDE (DBG_CMD, "");
401 static inline void dump_skb (char * prefix, unsigned int vc, struct sk_buff * skb) {
402 #ifdef DEBUG_AMBASSADOR
404 unsigned char * data = skb->data;
405 PRINTDB (DBG_DATA, "%s(%u) ", prefix, vc);
406 for (i=0; i<skb->len && i < 256;i++)
407 PRINTDM (DBG_DATA, "%02x ", data[i]);
408 PRINTDE (DBG_DATA,"");
417 /********** check memory areas for use by Ambassador **********/
419 /* see limitations under Hardware Features */
421 static int check_area (void * start, size_t length) {
422 // assumes length > 0
423 const u32 fourmegmask = -1 << 22;
424 const u32 twofivesixmask = -1 << 8;
425 const u32 starthole = 0xE0000000;
426 u32 startaddress = virt_to_bus (start);
427 u32 lastaddress = startaddress+length-1;
428 if ((startaddress ^ lastaddress) & fourmegmask ||
429 (startaddress & twofivesixmask) == starthole) {
430 PRINTK (KERN_ERR, "check_area failure: [%x,%x] - mail maintainer!",
431 startaddress, lastaddress);
438 /********** free an skb (as per ATM device driver documentation) **********/
440 static void amb_kfree_skb (struct sk_buff * skb) {
441 if (ATM_SKB(skb)->vcc->pop) {
442 ATM_SKB(skb)->vcc->pop (ATM_SKB(skb)->vcc, skb);
444 dev_kfree_skb_any (skb);
448 /********** TX completion **********/
450 static void tx_complete (amb_dev * dev, tx_out * tx) {
451 tx_simple * tx_descr = bus_to_virt (tx->handle);
452 struct sk_buff * skb = tx_descr->skb;
454 PRINTD (DBG_FLOW|DBG_TX, "tx_complete %p %p", dev, tx);
457 atomic_inc(&ATM_SKB(skb)->vcc->stats->tx);
459 // free the descriptor
469 /********** RX completion **********/
471 static void rx_complete (amb_dev * dev, rx_out * rx) {
472 struct sk_buff * skb = bus_to_virt (rx->handle);
473 u16 vc = be16_to_cpu (rx->vc);
474 // unused: u16 lec_id = be16_to_cpu (rx->lec_id);
475 u16 status = be16_to_cpu (rx->status);
476 u16 rx_len = be16_to_cpu (rx->length);
478 PRINTD (DBG_FLOW|DBG_RX, "rx_complete %p %p (len=%hu)", dev, rx, rx_len);
480 // XXX move this in and add to VC stats ???
482 struct atm_vcc * atm_vcc = dev->rxer[vc];
487 if (rx_len <= atm_vcc->qos.rxtp.max_sdu) {
489 if (atm_charge (atm_vcc, skb->truesize)) {
491 // prepare socket buffer
492 ATM_SKB(skb)->vcc = atm_vcc;
493 skb_put (skb, rx_len);
495 dump_skb ("<<<", vc, skb);
498 atomic_inc(&atm_vcc->stats->rx);
499 __net_timestamp(skb);
500 // end of our responsibility
501 atm_vcc->push (atm_vcc, skb);
505 // someone fix this (message), please!
506 PRINTD (DBG_INFO|DBG_RX, "dropped thanks to atm_charge (vc %hu, truesize %u)", vc, skb->truesize);
507 // drop stats incremented in atm_charge
511 PRINTK (KERN_INFO, "dropped over-size frame");
512 // should we count this?
513 atomic_inc(&atm_vcc->stats->rx_drop);
517 PRINTD (DBG_WARN|DBG_RX, "got frame but RX closed for channel %hu", vc);
518 // this is an adapter bug, only in new version of microcode
522 dev->stats.rx.error++;
523 if (status & CRC_ERR)
524 dev->stats.rx.badcrc++;
525 if (status & LEN_ERR)
526 dev->stats.rx.toolong++;
527 if (status & ABORT_ERR)
528 dev->stats.rx.aborted++;
529 if (status & UNUSED_ERR)
530 dev->stats.rx.unused++;
533 dev_kfree_skb_any (skb);
539 Note on queue handling.
541 Here "give" and "take" refer to queue entries and a queue (pair)
542 rather than frames to or from the host or adapter. Empty frame
543 buffers are given to the RX queue pair and returned unused or
544 containing RX frames. TX frames (well, pointers to TX fragment
545 lists) are given to the TX queue pair, completions are returned.
549 /********** command queue **********/
551 // I really don't like this, but it's the best I can do at the moment
553 // also, the callers are responsible for byte order as the microcode
554 // sometimes does 16-bit accesses (yuk yuk yuk)
556 static int command_do (amb_dev * dev, command * cmd) {
557 amb_cq * cq = &dev->cq;
558 volatile amb_cq_ptrs * ptrs = &cq->ptrs;
561 PRINTD (DBG_FLOW|DBG_CMD, "command_do %p", dev);
563 if (test_bit (dead, &dev->flags))
566 spin_lock (&cq->lock);
569 if (cq->pending < cq->maximum) {
570 // remember my slot for later
572 PRINTD (DBG_CMD, "command in slot %p", my_slot);
579 ptrs->in = NEXTQ (ptrs->in, ptrs->start, ptrs->limit);
582 wr_mem (dev, offsetof(amb_mem, mb.adapter.cmd_address), virt_to_bus (ptrs->in));
584 if (cq->pending > cq->high)
585 cq->high = cq->pending;
586 spin_unlock (&cq->lock);
588 // these comments were in a while-loop before, msleep removes the loop
590 // PRINTD (DBG_CMD, "wait: sleeping %lu for command", timeout);
593 // wait for my slot to be reached (all waiters are here or above, until...)
594 while (ptrs->out != my_slot) {
595 PRINTD (DBG_CMD, "wait: command slot (now at %p)", ptrs->out);
596 set_current_state(TASK_UNINTERRUPTIBLE);
600 // wait on my slot (... one gets to its slot, and... )
601 while (ptrs->out->request != cpu_to_be32 (SRB_COMPLETE)) {
602 PRINTD (DBG_CMD, "wait: command slot completion");
603 set_current_state(TASK_UNINTERRUPTIBLE);
607 PRINTD (DBG_CMD, "command complete");
608 // update queue (... moves the queue along to the next slot)
609 spin_lock (&cq->lock);
613 ptrs->out = NEXTQ (ptrs->out, ptrs->start, ptrs->limit);
614 spin_unlock (&cq->lock);
619 spin_unlock (&cq->lock);
625 /********** TX queue pair **********/
627 static int tx_give (amb_dev * dev, tx_in * tx) {
628 amb_txq * txq = &dev->txq;
631 PRINTD (DBG_FLOW|DBG_TX, "tx_give %p", dev);
633 if (test_bit (dead, &dev->flags))
636 spin_lock_irqsave (&txq->lock, flags);
638 if (txq->pending < txq->maximum) {
639 PRINTD (DBG_TX, "TX in slot %p", txq->in.ptr);
643 txq->in.ptr = NEXTQ (txq->in.ptr, txq->in.start, txq->in.limit);
644 // hand over the TX and ring the bell
645 wr_mem (dev, offsetof(amb_mem, mb.adapter.tx_address), virt_to_bus (txq->in.ptr));
646 wr_mem (dev, offsetof(amb_mem, doorbell), TX_FRAME);
648 if (txq->pending > txq->high)
649 txq->high = txq->pending;
650 spin_unlock_irqrestore (&txq->lock, flags);
654 spin_unlock_irqrestore (&txq->lock, flags);
659 static int tx_take (amb_dev * dev) {
660 amb_txq * txq = &dev->txq;
663 PRINTD (DBG_FLOW|DBG_TX, "tx_take %p", dev);
665 spin_lock_irqsave (&txq->lock, flags);
667 if (txq->pending && txq->out.ptr->handle) {
668 // deal with TX completion
669 tx_complete (dev, txq->out.ptr);
671 txq->out.ptr->handle = 0;
674 txq->out.ptr = NEXTQ (txq->out.ptr, txq->out.start, txq->out.limit);
676 spin_unlock_irqrestore (&txq->lock, flags);
680 spin_unlock_irqrestore (&txq->lock, flags);
685 /********** RX queue pairs **********/
687 static int rx_give (amb_dev * dev, rx_in * rx, unsigned char pool) {
688 amb_rxq * rxq = &dev->rxq[pool];
691 PRINTD (DBG_FLOW|DBG_RX, "rx_give %p[%hu]", dev, pool);
693 spin_lock_irqsave (&rxq->lock, flags);
695 if (rxq->pending < rxq->maximum) {
696 PRINTD (DBG_RX, "RX in slot %p", rxq->in.ptr);
700 rxq->in.ptr = NEXTQ (rxq->in.ptr, rxq->in.start, rxq->in.limit);
701 // hand over the RX buffer
702 wr_mem (dev, offsetof(amb_mem, mb.adapter.rx_address[pool]), virt_to_bus (rxq->in.ptr));
704 spin_unlock_irqrestore (&rxq->lock, flags);
707 spin_unlock_irqrestore (&rxq->lock, flags);
712 static int rx_take (amb_dev * dev, unsigned char pool) {
713 amb_rxq * rxq = &dev->rxq[pool];
716 PRINTD (DBG_FLOW|DBG_RX, "rx_take %p[%hu]", dev, pool);
718 spin_lock_irqsave (&rxq->lock, flags);
720 if (rxq->pending && (rxq->out.ptr->status || rxq->out.ptr->length)) {
721 // deal with RX completion
722 rx_complete (dev, rxq->out.ptr);
724 rxq->out.ptr->status = 0;
725 rxq->out.ptr->length = 0;
728 rxq->out.ptr = NEXTQ (rxq->out.ptr, rxq->out.start, rxq->out.limit);
730 if (rxq->pending < rxq->low)
731 rxq->low = rxq->pending;
732 spin_unlock_irqrestore (&rxq->lock, flags);
735 if (!rxq->pending && rxq->buffers_wanted)
737 spin_unlock_irqrestore (&rxq->lock, flags);
742 /********** RX Pool handling **********/
744 /* pre: buffers_wanted = 0, post: pending = 0 */
745 static void drain_rx_pool (amb_dev * dev, unsigned char pool) {
746 amb_rxq * rxq = &dev->rxq[pool];
748 PRINTD (DBG_FLOW|DBG_POOL, "drain_rx_pool %p %hu", dev, pool);
750 if (test_bit (dead, &dev->flags))
753 /* we are not quite like the fill pool routines as we cannot just
754 remove one buffer, we have to remove all of them, but we might as
756 if (rxq->pending > rxq->buffers_wanted) {
758 cmd.request = cpu_to_be32 (SRB_FLUSH_BUFFER_Q);
759 cmd.args.flush.flags = cpu_to_be32 (pool << SRB_POOL_SHIFT);
760 while (command_do (dev, &cmd))
762 /* the pool may also be emptied via the interrupt handler */
763 while (rxq->pending > rxq->buffers_wanted)
764 if (rx_take (dev, pool))
771 static void drain_rx_pools (amb_dev * dev) {
774 PRINTD (DBG_FLOW|DBG_POOL, "drain_rx_pools %p", dev);
776 for (pool = 0; pool < NUM_RX_POOLS; ++pool)
777 drain_rx_pool (dev, pool);
780 static void fill_rx_pool (amb_dev * dev, unsigned char pool,
786 PRINTD (DBG_FLOW|DBG_POOL, "fill_rx_pool %p %hu %x", dev, pool, priority);
788 if (test_bit (dead, &dev->flags))
791 rxq = &dev->rxq[pool];
792 while (rxq->pending < rxq->maximum && rxq->pending < rxq->buffers_wanted) {
794 struct sk_buff * skb = alloc_skb (rxq->buffer_size, priority);
796 PRINTD (DBG_SKB|DBG_POOL, "failed to allocate skb for RX pool %hu", pool);
799 if (check_area (skb->data, skb->truesize)) {
800 dev_kfree_skb_any (skb);
803 // cast needed as there is no %? for pointer differences
804 PRINTD (DBG_SKB, "allocated skb at %p, head %p, area %li",
805 skb, skb->head, (long) skb_end_offset(skb));
806 rx.handle = virt_to_bus (skb);
807 rx.host_address = cpu_to_be32 (virt_to_bus (skb->data));
808 if (rx_give (dev, &rx, pool))
809 dev_kfree_skb_any (skb);
816 // top up all RX pools
817 static void fill_rx_pools (amb_dev * dev) {
820 PRINTD (DBG_FLOW|DBG_POOL, "fill_rx_pools %p", dev);
822 for (pool = 0; pool < NUM_RX_POOLS; ++pool)
823 fill_rx_pool (dev, pool, GFP_ATOMIC);
828 /********** enable host interrupts **********/
830 static void interrupts_on (amb_dev * dev) {
831 wr_plain (dev, offsetof(amb_mem, interrupt_control),
832 rd_plain (dev, offsetof(amb_mem, interrupt_control))
833 | AMB_INTERRUPT_BITS);
836 /********** disable host interrupts **********/
838 static void interrupts_off (amb_dev * dev) {
839 wr_plain (dev, offsetof(amb_mem, interrupt_control),
840 rd_plain (dev, offsetof(amb_mem, interrupt_control))
841 &~ AMB_INTERRUPT_BITS);
844 /********** interrupt handling **********/
846 static irqreturn_t interrupt_handler(int irq, void *dev_id) {
847 amb_dev * dev = dev_id;
849 PRINTD (DBG_IRQ|DBG_FLOW, "interrupt_handler: %p", dev_id);
852 u32 interrupt = rd_plain (dev, offsetof(amb_mem, interrupt));
854 // for us or someone else sharing the same interrupt
856 PRINTD (DBG_IRQ, "irq not for me: %d", irq);
861 PRINTD (DBG_IRQ, "FYI: interrupt was %08x", interrupt);
862 wr_plain (dev, offsetof(amb_mem, interrupt), -1);
866 unsigned int irq_work = 0;
868 for (pool = 0; pool < NUM_RX_POOLS; ++pool)
869 while (!rx_take (dev, pool))
871 while (!tx_take (dev))
877 PRINTD (DBG_IRQ, "work done: %u", irq_work);
879 PRINTD (DBG_IRQ|DBG_WARN, "no work done");
883 PRINTD (DBG_IRQ|DBG_FLOW, "interrupt_handler done: %p", dev_id);
887 /********** make rate (not quite as much fun as Horizon) **********/
889 static int make_rate (unsigned int rate, rounding r,
890 u16 * bits, unsigned int * actual) {
891 unsigned char exp = -1; // hush gcc
892 unsigned int man = -1; // hush gcc
894 PRINTD (DBG_FLOW|DBG_QOS, "make_rate %u", rate);
896 // rates in cells per second, ITU format (nasty 16-bit floating-point)
897 // given 5-bit e and 9-bit m:
898 // rate = EITHER (1+m/2^9)*2^e OR 0
899 // bits = EITHER 1<<14 | e<<9 | m OR 0
900 // (bit 15 is "reserved", bit 14 "non-zero")
901 // smallest rate is 0 (special representation)
902 // largest rate is (1+511/512)*2^31 = 4290772992 (< 2^32-1)
903 // smallest non-zero rate is (1+0/512)*2^0 = 1 (> 0)
905 // find position of top bit, this gives e
906 // remove top bit and shift (rounding if feeling clever) by 9-e
908 // ucode bug: please don't set bit 14! so 0 rate not representable
910 if (rate > 0xffc00000U) {
911 // larger than largest representable rate
921 // representable rate
926 // invariant: rate = man*2^(exp-31)
927 while (!(man & (1<<31))) {
932 // man has top bit set
933 // rate = (2^31+(man-2^31))*2^(exp-31)
934 // rate = (1+(man-2^31)/2^31)*2^exp
936 man &= 0xffffffffU; // a nop on 32-bit systems
937 // rate = (1+man/2^32)*2^exp
939 // exp is in the range 0 to 31, man is in the range 0 to 2^32-1
940 // time to lose significance... we want m in the range 0 to 2^9-1
941 // rounding presents a minor problem... we first decide which way
942 // we are rounding (based on given rounding direction and possibly
943 // the bits of the mantissa that are to be discarded).
952 // check all bits that we are discarding
953 if (man & (~0U>>9)) {
954 man = (man>>(32-9)) + 1;
956 // no need to check for round up outside of range
965 case round_nearest: {
966 // check msb that we are discarding
967 if (man & (1<<(32-9-1))) {
968 man = (man>>(32-9)) + 1;
970 // no need to check for round up outside of range
982 // zero rate - not representable
984 if (r == round_down) {
993 PRINTD (DBG_QOS, "rate: man=%u, exp=%hu", man, exp);
996 *bits = /* (1<<14) | */ (exp<<9) | man;
1000 ? (1 << exp) + (man << (exp-9))
1001 : (1 << exp) + ((man + (1<<(9-exp-1))) >> (9-exp));
1006 /********** Linux ATM Operations **********/
1008 // some are not yet implemented while others do not make sense for
1011 /********** Open a VC **********/
1013 static int amb_open (struct atm_vcc * atm_vcc)
1017 struct atm_qos * qos;
1018 struct atm_trafprm * txtp;
1019 struct atm_trafprm * rxtp;
1020 u16 tx_rate_bits = -1; // hush gcc
1021 u16 tx_vc_bits = -1; // hush gcc
1022 u16 tx_frame_bits = -1; // hush gcc
1024 amb_dev * dev = AMB_DEV(atm_vcc->dev);
1026 unsigned char pool = -1; // hush gcc
1027 short vpi = atm_vcc->vpi;
1028 int vci = atm_vcc->vci;
1030 PRINTD (DBG_FLOW|DBG_VCC, "amb_open %x %x", vpi, vci);
1032 #ifdef ATM_VPI_UNSPEC
1033 // UNSPEC is deprecated, remove this code eventually
1034 if (vpi == ATM_VPI_UNSPEC || vci == ATM_VCI_UNSPEC) {
1035 PRINTK (KERN_WARNING, "rejecting open with unspecified VPI/VCI (deprecated)");
1040 if (!(0 <= vpi && vpi < (1<<NUM_VPI_BITS) &&
1041 0 <= vci && vci < (1<<NUM_VCI_BITS))) {
1042 PRINTD (DBG_WARN|DBG_VCC, "VPI/VCI out of range: %hd/%d", vpi, vci);
1046 qos = &atm_vcc->qos;
1048 if (qos->aal != ATM_AAL5) {
1049 PRINTD (DBG_QOS, "AAL not supported");
1053 // traffic parameters
1055 PRINTD (DBG_QOS, "TX:");
1057 if (txtp->traffic_class != ATM_NONE) {
1058 switch (txtp->traffic_class) {
1060 // we take "the PCR" as a rate-cap
1061 int pcr = atm_pcr_goal (txtp);
1065 tx_vc_bits = TX_UBR;
1066 tx_frame_bits = TX_FRAME_NOTCAP;
1075 error = make_rate (pcr, r, &tx_rate_bits, NULL);
1078 tx_vc_bits = TX_UBR_CAPPED;
1079 tx_frame_bits = TX_FRAME_CAPPED;
1085 pcr = atm_pcr_goal (txtp);
1086 PRINTD (DBG_QOS, "pcr goal = %d", pcr);
1091 // PRINTD (DBG_QOS, "request for non-UBR/ABR denied");
1092 PRINTD (DBG_QOS, "request for non-UBR denied");
1096 PRINTD (DBG_QOS, "tx_rate_bits=%hx, tx_vc_bits=%hx",
1097 tx_rate_bits, tx_vc_bits);
1100 PRINTD (DBG_QOS, "RX:");
1102 if (rxtp->traffic_class == ATM_NONE) {
1105 // choose an RX pool (arranged in increasing size)
1106 for (pool = 0; pool < NUM_RX_POOLS; ++pool)
1107 if ((unsigned int) rxtp->max_sdu <= dev->rxq[pool].buffer_size) {
1108 PRINTD (DBG_VCC|DBG_QOS|DBG_POOL, "chose pool %hu (max_sdu %u <= %u)",
1109 pool, rxtp->max_sdu, dev->rxq[pool].buffer_size);
1112 if (pool == NUM_RX_POOLS) {
1113 PRINTD (DBG_WARN|DBG_VCC|DBG_QOS|DBG_POOL,
1114 "no pool suitable for VC (RX max_sdu %d is too large)",
1119 switch (rxtp->traffic_class) {
1125 pcr = atm_pcr_goal (rxtp);
1126 PRINTD (DBG_QOS, "pcr goal = %d", pcr);
1131 // PRINTD (DBG_QOS, "request for non-UBR/ABR denied");
1132 PRINTD (DBG_QOS, "request for non-UBR denied");
1138 // get space for our vcc stuff
1139 vcc = kmalloc (sizeof(amb_vcc), GFP_KERNEL);
1141 PRINTK (KERN_ERR, "out of memory!");
1144 atm_vcc->dev_data = (void *) vcc;
1146 // no failures beyond this point
1148 // we are not really "immediately before allocating the connection
1149 // identifier in hardware", but it will just have to do!
1150 set_bit(ATM_VF_ADDR,&atm_vcc->flags);
1152 if (txtp->traffic_class != ATM_NONE) {
1155 vcc->tx_frame_bits = tx_frame_bits;
1157 mutex_lock(&dev->vcc_sf);
1158 if (dev->rxer[vci]) {
1159 // RXer on the channel already, just modify rate...
1160 cmd.request = cpu_to_be32 (SRB_MODIFY_VC_RATE);
1161 cmd.args.modify_rate.vc = cpu_to_be32 (vci); // vpi 0
1162 cmd.args.modify_rate.rate = cpu_to_be32 (tx_rate_bits << SRB_RATE_SHIFT);
1163 while (command_do (dev, &cmd))
1165 // ... and TX flags, preserving the RX pool
1166 cmd.request = cpu_to_be32 (SRB_MODIFY_VC_FLAGS);
1167 cmd.args.modify_flags.vc = cpu_to_be32 (vci); // vpi 0
1168 cmd.args.modify_flags.flags = cpu_to_be32
1169 ( (AMB_VCC(dev->rxer[vci])->rx_info.pool << SRB_POOL_SHIFT)
1170 | (tx_vc_bits << SRB_FLAGS_SHIFT) );
1171 while (command_do (dev, &cmd))
1174 // no RXer on the channel, just open (with pool zero)
1175 cmd.request = cpu_to_be32 (SRB_OPEN_VC);
1176 cmd.args.open.vc = cpu_to_be32 (vci); // vpi 0
1177 cmd.args.open.flags = cpu_to_be32 (tx_vc_bits << SRB_FLAGS_SHIFT);
1178 cmd.args.open.rate = cpu_to_be32 (tx_rate_bits << SRB_RATE_SHIFT);
1179 while (command_do (dev, &cmd))
1182 dev->txer[vci].tx_present = 1;
1183 mutex_unlock(&dev->vcc_sf);
1186 if (rxtp->traffic_class != ATM_NONE) {
1189 vcc->rx_info.pool = pool;
1191 mutex_lock(&dev->vcc_sf);
1192 /* grow RX buffer pool */
1193 if (!dev->rxq[pool].buffers_wanted)
1194 dev->rxq[pool].buffers_wanted = rx_lats;
1195 dev->rxq[pool].buffers_wanted += 1;
1196 fill_rx_pool (dev, pool, GFP_KERNEL);
1198 if (dev->txer[vci].tx_present) {
1199 // TXer on the channel already
1200 // switch (from pool zero) to this pool, preserving the TX bits
1201 cmd.request = cpu_to_be32 (SRB_MODIFY_VC_FLAGS);
1202 cmd.args.modify_flags.vc = cpu_to_be32 (vci); // vpi 0
1203 cmd.args.modify_flags.flags = cpu_to_be32
1204 ( (pool << SRB_POOL_SHIFT)
1205 | (dev->txer[vci].tx_vc_bits << SRB_FLAGS_SHIFT) );
1207 // no TXer on the channel, open the VC (with no rate info)
1208 cmd.request = cpu_to_be32 (SRB_OPEN_VC);
1209 cmd.args.open.vc = cpu_to_be32 (vci); // vpi 0
1210 cmd.args.open.flags = cpu_to_be32 (pool << SRB_POOL_SHIFT);
1211 cmd.args.open.rate = cpu_to_be32 (0);
1213 while (command_do (dev, &cmd))
1215 // this link allows RX frames through
1216 dev->rxer[vci] = atm_vcc;
1217 mutex_unlock(&dev->vcc_sf);
1220 // indicate readiness
1221 set_bit(ATM_VF_READY,&atm_vcc->flags);
1226 /********** Close a VC **********/
1228 static void amb_close (struct atm_vcc * atm_vcc) {
1229 amb_dev * dev = AMB_DEV (atm_vcc->dev);
1230 amb_vcc * vcc = AMB_VCC (atm_vcc);
1231 u16 vci = atm_vcc->vci;
1233 PRINTD (DBG_VCC|DBG_FLOW, "amb_close");
1235 // indicate unreadiness
1236 clear_bit(ATM_VF_READY,&atm_vcc->flags);
1239 if (atm_vcc->qos.txtp.traffic_class != ATM_NONE) {
1242 mutex_lock(&dev->vcc_sf);
1243 if (dev->rxer[vci]) {
1244 // RXer still on the channel, just modify rate... XXX not really needed
1245 cmd.request = cpu_to_be32 (SRB_MODIFY_VC_RATE);
1246 cmd.args.modify_rate.vc = cpu_to_be32 (vci); // vpi 0
1247 cmd.args.modify_rate.rate = cpu_to_be32 (0);
1248 // ... and clear TX rate flags (XXX to stop RM cell output?), preserving RX pool
1250 // no RXer on the channel, close channel
1251 cmd.request = cpu_to_be32 (SRB_CLOSE_VC);
1252 cmd.args.close.vc = cpu_to_be32 (vci); // vpi 0
1254 dev->txer[vci].tx_present = 0;
1255 while (command_do (dev, &cmd))
1257 mutex_unlock(&dev->vcc_sf);
1261 if (atm_vcc->qos.rxtp.traffic_class != ATM_NONE) {
1264 // this is (the?) one reason why we need the amb_vcc struct
1265 unsigned char pool = vcc->rx_info.pool;
1267 mutex_lock(&dev->vcc_sf);
1268 if (dev->txer[vci].tx_present) {
1269 // TXer still on the channel, just go to pool zero XXX not really needed
1270 cmd.request = cpu_to_be32 (SRB_MODIFY_VC_FLAGS);
1271 cmd.args.modify_flags.vc = cpu_to_be32 (vci); // vpi 0
1272 cmd.args.modify_flags.flags = cpu_to_be32
1273 (dev->txer[vci].tx_vc_bits << SRB_FLAGS_SHIFT);
1275 // no TXer on the channel, close the VC
1276 cmd.request = cpu_to_be32 (SRB_CLOSE_VC);
1277 cmd.args.close.vc = cpu_to_be32 (vci); // vpi 0
1279 // forget the rxer - no more skbs will be pushed
1280 if (atm_vcc != dev->rxer[vci])
1281 PRINTK (KERN_ERR, "%s vcc=%p rxer[vci]=%p",
1282 "arghhh! we're going to die!",
1283 vcc, dev->rxer[vci]);
1284 dev->rxer[vci] = NULL;
1285 while (command_do (dev, &cmd))
1288 /* shrink RX buffer pool */
1289 dev->rxq[pool].buffers_wanted -= 1;
1290 if (dev->rxq[pool].buffers_wanted == rx_lats) {
1291 dev->rxq[pool].buffers_wanted = 0;
1292 drain_rx_pool (dev, pool);
1294 mutex_unlock(&dev->vcc_sf);
1297 // free our structure
1300 // say the VPI/VCI is free again
1301 clear_bit(ATM_VF_ADDR,&atm_vcc->flags);
1306 /********** Send **********/
1308 static int amb_send (struct atm_vcc * atm_vcc, struct sk_buff * skb) {
1309 amb_dev * dev = AMB_DEV(atm_vcc->dev);
1310 amb_vcc * vcc = AMB_VCC(atm_vcc);
1311 u16 vc = atm_vcc->vci;
1312 unsigned int tx_len = skb->len;
1313 unsigned char * tx_data = skb->data;
1314 tx_simple * tx_descr;
1317 if (test_bit (dead, &dev->flags))
1320 PRINTD (DBG_FLOW|DBG_TX, "amb_send vc %x data %p len %u",
1321 vc, tx_data, tx_len);
1323 dump_skb (">>>", vc, skb);
1325 if (!dev->txer[vc].tx_present) {
1326 PRINTK (KERN_ERR, "attempt to send on RX-only VC %x", vc);
1330 // this is a driver private field so we have to set it ourselves,
1331 // despite the fact that we are _required_ to use it to check for a
1333 ATM_SKB(skb)->vcc = atm_vcc;
1335 if (skb->len > (size_t) atm_vcc->qos.txtp.max_sdu) {
1336 PRINTK (KERN_ERR, "sk_buff length greater than agreed max_sdu, dropping...");
1340 if (check_area (skb->data, skb->len)) {
1341 atomic_inc(&atm_vcc->stats->tx_err);
1342 return -ENOMEM; // ?
1345 // allocate memory for fragments
1346 tx_descr = kmalloc (sizeof(tx_simple), GFP_KERNEL);
1348 PRINTK (KERN_ERR, "could not allocate TX descriptor");
1351 if (check_area (tx_descr, sizeof(tx_simple))) {
1355 PRINTD (DBG_TX, "fragment list allocated at %p", tx_descr);
1357 tx_descr->skb = skb;
1359 tx_descr->tx_frag.bytes = cpu_to_be32 (tx_len);
1360 tx_descr->tx_frag.address = cpu_to_be32 (virt_to_bus (tx_data));
1362 tx_descr->tx_frag_end.handle = virt_to_bus (tx_descr);
1363 tx_descr->tx_frag_end.vc = 0;
1364 tx_descr->tx_frag_end.next_descriptor_length = 0;
1365 tx_descr->tx_frag_end.next_descriptor = 0;
1366 #ifdef AMB_NEW_MICROCODE
1367 tx_descr->tx_frag_end.cpcs_uu = 0;
1368 tx_descr->tx_frag_end.cpi = 0;
1369 tx_descr->tx_frag_end.pad = 0;
1372 tx.vc = cpu_to_be16 (vcc->tx_frame_bits | vc);
1373 tx.tx_descr_length = cpu_to_be16 (sizeof(tx_frag)+sizeof(tx_frag_end));
1374 tx.tx_descr_addr = cpu_to_be32 (virt_to_bus (&tx_descr->tx_frag));
1376 while (tx_give (dev, &tx))
1381 /********** Change QoS on a VC **********/
1383 // int amb_change_qos (struct atm_vcc * atm_vcc, struct atm_qos * qos, int flags);
1385 /********** Free RX Socket Buffer **********/
1388 static void amb_free_rx_skb (struct atm_vcc * atm_vcc, struct sk_buff * skb) {
1389 amb_dev * dev = AMB_DEV (atm_vcc->dev);
1390 amb_vcc * vcc = AMB_VCC (atm_vcc);
1391 unsigned char pool = vcc->rx_info.pool;
1394 // This may be unsafe for various reasons that I cannot really guess
1395 // at. However, I note that the ATM layer calls kfree_skb rather
1396 // than dev_kfree_skb at this point so we are least covered as far
1397 // as buffer locking goes. There may be bugs if pcap clones RX skbs.
1399 PRINTD (DBG_FLOW|DBG_SKB, "amb_rx_free skb %p (atm_vcc %p, vcc %p)",
1402 rx.handle = virt_to_bus (skb);
1403 rx.host_address = cpu_to_be32 (virt_to_bus (skb->data));
1405 skb->data = skb->head;
1406 skb_reset_tail_pointer(skb);
1409 if (!rx_give (dev, &rx, pool)) {
1411 PRINTD (DBG_SKB|DBG_POOL, "recycled skb for pool %hu", pool);
1415 // just do what the ATM layer would have done
1416 dev_kfree_skb_any (skb);
1422 /********** Proc File Output **********/
1424 static int amb_proc_read (struct atm_dev * atm_dev, loff_t * pos, char * page) {
1425 amb_dev * dev = AMB_DEV (atm_dev);
1429 PRINTD (DBG_FLOW, "amb_proc_read");
1431 /* more diagnostics here? */
1434 amb_stats * s = &dev->stats;
1435 return sprintf (page,
1436 "frames: TX OK %lu, RX OK %lu, RX bad %lu "
1437 "(CRC %lu, long %lu, aborted %lu, unused %lu).\n",
1438 s->tx_ok, s->rx.ok, s->rx.error,
1439 s->rx.badcrc, s->rx.toolong,
1440 s->rx.aborted, s->rx.unused);
1444 amb_cq * c = &dev->cq;
1445 return sprintf (page, "cmd queue [cur/hi/max]: %u/%u/%u. ",
1446 c->pending, c->high, c->maximum);
1450 amb_txq * t = &dev->txq;
1451 return sprintf (page, "TX queue [cur/max high full]: %u/%u %u %u.\n",
1452 t->pending, t->maximum, t->high, t->filled);
1456 unsigned int count = sprintf (page, "RX queues [cur/max/req low empty]:");
1457 for (pool = 0; pool < NUM_RX_POOLS; ++pool) {
1458 amb_rxq * r = &dev->rxq[pool];
1459 count += sprintf (page+count, " %u/%u/%u %u %u",
1460 r->pending, r->maximum, r->buffers_wanted, r->low, r->emptied);
1462 count += sprintf (page+count, ".\n");
1467 unsigned int count = sprintf (page, "RX buffer sizes:");
1468 for (pool = 0; pool < NUM_RX_POOLS; ++pool) {
1469 amb_rxq * r = &dev->rxq[pool];
1470 count += sprintf (page+count, " %u", r->buffer_size);
1472 count += sprintf (page+count, ".\n");
1485 /********** Operation Structure **********/
1487 static const struct atmdev_ops amb_ops = {
1491 .proc_read = amb_proc_read,
1492 .owner = THIS_MODULE,
1495 /********** housekeeping **********/
1496 static void do_housekeeping (unsigned long arg) {
1497 amb_dev * dev = (amb_dev *) arg;
1499 // could collect device-specific (not driver/atm-linux) stats here
1501 // last resort refill once every ten seconds
1502 fill_rx_pools (dev);
1503 mod_timer(&dev->housekeeping, jiffies + 10*HZ);
1508 /********** creation of communication queues **********/
1510 static int create_queues(amb_dev *dev, unsigned int cmds, unsigned int txs,
1511 unsigned int *rxs, unsigned int *rx_buffer_sizes)
1518 PRINTD (DBG_FLOW, "create_queues %p", dev);
1520 total += cmds * sizeof(command);
1522 total += txs * (sizeof(tx_in) + sizeof(tx_out));
1524 for (pool = 0; pool < NUM_RX_POOLS; ++pool)
1525 total += rxs[pool] * (sizeof(rx_in) + sizeof(rx_out));
1527 memory = kmalloc (total, GFP_KERNEL);
1529 PRINTK (KERN_ERR, "could not allocate queues");
1532 if (check_area (memory, total)) {
1533 PRINTK (KERN_ERR, "queues allocated in nasty area");
1538 limit = memory + total;
1539 PRINTD (DBG_INIT, "queues from %p to %p", memory, limit);
1541 PRINTD (DBG_CMD, "command queue at %p", memory);
1544 command * cmd = memory;
1545 amb_cq * cq = &dev->cq;
1549 cq->maximum = cmds - 1;
1551 cq->ptrs.start = cmd;
1554 cq->ptrs.limit = cmd + cmds;
1556 memory = cq->ptrs.limit;
1559 PRINTD (DBG_TX, "TX queue pair at %p", memory);
1562 tx_in * in = memory;
1564 amb_txq * txq = &dev->txq;
1569 txq->maximum = txs - 1;
1573 txq->in.limit = in + txs;
1575 memory = txq->in.limit;
1578 txq->out.start = out;
1580 txq->out.limit = out + txs;
1582 memory = txq->out.limit;
1585 PRINTD (DBG_RX, "RX queue pairs at %p", memory);
1587 for (pool = 0; pool < NUM_RX_POOLS; ++pool) {
1588 rx_in * in = memory;
1590 amb_rxq * rxq = &dev->rxq[pool];
1592 rxq->buffer_size = rx_buffer_sizes[pool];
1593 rxq->buffers_wanted = 0;
1596 rxq->low = rxs[pool] - 1;
1598 rxq->maximum = rxs[pool] - 1;
1602 rxq->in.limit = in + rxs[pool];
1604 memory = rxq->in.limit;
1607 rxq->out.start = out;
1609 rxq->out.limit = out + rxs[pool];
1611 memory = rxq->out.limit;
1614 if (memory == limit) {
1617 PRINTK (KERN_ERR, "bad queue alloc %p != %p (tell maintainer)", memory, limit);
1618 kfree (limit - total);
1624 /********** destruction of communication queues **********/
1626 static void destroy_queues (amb_dev * dev) {
1627 // all queues assumed empty
1628 void * memory = dev->cq.ptrs.start;
1629 // includes txq.in, txq.out, rxq[].in and rxq[].out
1631 PRINTD (DBG_FLOW, "destroy_queues %p", dev);
1633 PRINTD (DBG_INIT, "freeing queues at %p", memory);
1639 /********** basic loader commands and error handling **********/
1640 // centisecond timeouts - guessing away here
1641 static unsigned int command_timeouts [] = {
1642 [host_memory_test] = 15,
1643 [read_adapter_memory] = 2,
1644 [write_adapter_memory] = 2,
1645 [adapter_start] = 50,
1646 [get_version_number] = 10,
1647 [interrupt_host] = 1,
1648 [flash_erase_sector] = 1,
1649 [adap_download_block] = 1,
1650 [adap_erase_flash] = 1,
1651 [adap_run_in_iram] = 1,
1652 [adap_end_download] = 1
1656 static unsigned int command_successes [] = {
1657 [host_memory_test] = COMMAND_PASSED_TEST,
1658 [read_adapter_memory] = COMMAND_READ_DATA_OK,
1659 [write_adapter_memory] = COMMAND_WRITE_DATA_OK,
1660 [adapter_start] = COMMAND_COMPLETE,
1661 [get_version_number] = COMMAND_COMPLETE,
1662 [interrupt_host] = COMMAND_COMPLETE,
1663 [flash_erase_sector] = COMMAND_COMPLETE,
1664 [adap_download_block] = COMMAND_COMPLETE,
1665 [adap_erase_flash] = COMMAND_COMPLETE,
1666 [adap_run_in_iram] = COMMAND_COMPLETE,
1667 [adap_end_download] = COMMAND_COMPLETE
1670 static int decode_loader_result (loader_command cmd, u32 result)
1675 if (result == command_successes[cmd])
1681 msg = "bad command";
1683 case COMMAND_IN_PROGRESS:
1685 msg = "command in progress";
1687 case COMMAND_PASSED_TEST:
1689 msg = "command passed test";
1691 case COMMAND_FAILED_TEST:
1693 msg = "command failed test";
1695 case COMMAND_READ_DATA_OK:
1697 msg = "command read data ok";
1699 case COMMAND_READ_BAD_ADDRESS:
1701 msg = "command read bad address";
1703 case COMMAND_WRITE_DATA_OK:
1705 msg = "command write data ok";
1707 case COMMAND_WRITE_BAD_ADDRESS:
1709 msg = "command write bad address";
1711 case COMMAND_WRITE_FLASH_FAILURE:
1713 msg = "command write flash failure";
1715 case COMMAND_COMPLETE:
1717 msg = "command complete";
1719 case COMMAND_FLASH_ERASE_FAILURE:
1721 msg = "command flash erase failure";
1723 case COMMAND_WRITE_BAD_DATA:
1725 msg = "command write bad data";
1729 msg = "unknown error";
1730 PRINTD (DBG_LOAD|DBG_ERR,
1731 "decode_loader_result got %d=%x !",
1736 PRINTK (KERN_ERR, "%s", msg);
1740 static int do_loader_command(volatile loader_block *lb, const amb_dev *dev,
1744 unsigned long timeout;
1746 PRINTD (DBG_FLOW|DBG_LOAD, "do_loader_command");
1750 Set the return value to zero, set the command type and set the
1751 valid entry to the right magic value. The payload is already
1752 correctly byte-ordered so we leave it alone. Hit the doorbell
1753 with the bus address of this structure.
1758 lb->command = cpu_to_be32 (cmd);
1759 lb->valid = cpu_to_be32 (DMA_VALID);
1760 // dump_registers (dev);
1761 // dump_loader_block (lb);
1762 wr_mem (dev, offsetof(amb_mem, doorbell), virt_to_bus (lb) & ~onegigmask);
1764 timeout = command_timeouts[cmd] * 10;
1766 while (!lb->result || lb->result == cpu_to_be32 (COMMAND_IN_PROGRESS))
1768 timeout = msleep_interruptible(timeout);
1770 PRINTD (DBG_LOAD|DBG_ERR, "command %d timed out", cmd);
1771 dump_registers (dev);
1772 dump_loader_block (lb);
1776 if (cmd == adapter_start) {
1777 // wait for start command to acknowledge...
1779 while (rd_plain (dev, offsetof(amb_mem, doorbell)))
1781 timeout = msleep_interruptible(timeout);
1783 PRINTD (DBG_LOAD|DBG_ERR, "start command did not clear doorbell, res=%08x",
1784 be32_to_cpu (lb->result));
1785 dump_registers (dev);
1790 return decode_loader_result (cmd, be32_to_cpu (lb->result));
1795 /* loader: determine loader version */
1797 static int get_loader_version(loader_block *lb, const amb_dev *dev,
1802 PRINTD (DBG_FLOW|DBG_LOAD, "get_loader_version");
1804 res = do_loader_command (lb, dev, get_version_number);
1808 *version = be32_to_cpu (lb->payload.version);
1812 /* loader: write memory data blocks */
1814 static int loader_write(loader_block *lb, const amb_dev *dev,
1815 const struct ihex_binrec *rec)
1817 transfer_block * tb = &lb->payload.transfer;
1819 PRINTD (DBG_FLOW|DBG_LOAD, "loader_write");
1821 tb->address = rec->addr;
1822 tb->count = cpu_to_be32(be16_to_cpu(rec->len) / 4);
1823 memcpy(tb->data, rec->data, be16_to_cpu(rec->len));
1824 return do_loader_command (lb, dev, write_adapter_memory);
1827 /* loader: verify memory data blocks */
1829 static int loader_verify(loader_block *lb, const amb_dev *dev,
1830 const struct ihex_binrec *rec)
1832 transfer_block * tb = &lb->payload.transfer;
1835 PRINTD (DBG_FLOW|DBG_LOAD, "loader_verify");
1837 tb->address = rec->addr;
1838 tb->count = cpu_to_be32(be16_to_cpu(rec->len) / 4);
1839 res = do_loader_command (lb, dev, read_adapter_memory);
1840 if (!res && memcmp(tb->data, rec->data, be16_to_cpu(rec->len)))
1845 /* loader: start microcode */
1847 static int loader_start(loader_block *lb, const amb_dev *dev, u32 address)
1849 PRINTD (DBG_FLOW|DBG_LOAD, "loader_start");
1851 lb->payload.start = cpu_to_be32 (address);
1852 return do_loader_command (lb, dev, adapter_start);
1855 /********** reset card **********/
1857 static inline void sf (const char * msg)
1859 PRINTK (KERN_ERR, "self-test failed: %s", msg);
1862 static int amb_reset (amb_dev * dev, int diags) {
1865 PRINTD (DBG_FLOW|DBG_LOAD, "amb_reset");
1867 word = rd_plain (dev, offsetof(amb_mem, reset_control));
1868 // put card into reset state
1869 wr_plain (dev, offsetof(amb_mem, reset_control), word | AMB_RESET_BITS);
1870 // wait a short while
1873 // put card into known good state
1874 wr_plain (dev, offsetof(amb_mem, interrupt_control), AMB_DOORBELL_BITS);
1875 // clear all interrupts just in case
1876 wr_plain (dev, offsetof(amb_mem, interrupt), -1);
1878 // clear self-test done flag
1879 wr_plain (dev, offsetof(amb_mem, mb.loader.ready), 0);
1880 // take card out of reset state
1881 wr_plain (dev, offsetof(amb_mem, reset_control), word &~ AMB_RESET_BITS);
1884 unsigned long timeout;
1887 // half second time-out
1889 while (!rd_plain (dev, offsetof(amb_mem, mb.loader.ready)))
1891 timeout = msleep_interruptible(timeout);
1893 PRINTD (DBG_LOAD|DBG_ERR, "reset timed out");
1897 // get results of self-test
1898 // XXX double check byte-order
1899 word = rd_mem (dev, offsetof(amb_mem, mb.loader.result));
1900 if (word & SELF_TEST_FAILURE) {
1901 if (word & GPINT_TST_FAILURE)
1903 if (word & SUNI_DATA_PATTERN_FAILURE)
1904 sf ("SUNI data pattern");
1905 if (word & SUNI_DATA_BITS_FAILURE)
1906 sf ("SUNI data bits");
1907 if (word & SUNI_UTOPIA_FAILURE)
1908 sf ("SUNI UTOPIA interface");
1909 if (word & SUNI_FIFO_FAILURE)
1910 sf ("SUNI cell buffer FIFO");
1911 if (word & SRAM_FAILURE)
1913 // better return value?
1921 /********** transfer and start the microcode **********/
1923 static int ucode_init(loader_block *lb, amb_dev *dev)
1925 const struct firmware *fw;
1926 unsigned long start_address;
1927 const struct ihex_binrec *rec;
1928 const char *errmsg = NULL;
1931 res = request_ihex_firmware(&fw, "atmsar11.fw", &dev->pci_dev->dev);
1933 PRINTK (KERN_ERR, "Cannot load microcode data");
1937 /* First record contains just the start address */
1938 rec = (const struct ihex_binrec *)fw->data;
1939 if (be16_to_cpu(rec->len) != sizeof(__be32) || be32_to_cpu(rec->addr)) {
1940 errmsg = "no start record";
1943 start_address = be32_to_cpup((__be32 *)rec->data);
1945 rec = ihex_next_binrec(rec);
1947 PRINTD (DBG_FLOW|DBG_LOAD, "ucode_init");
1950 PRINTD (DBG_LOAD, "starting region (%x, %u)", be32_to_cpu(rec->addr),
1951 be16_to_cpu(rec->len));
1952 if (be16_to_cpu(rec->len) > 4 * MAX_TRANSFER_DATA) {
1953 errmsg = "record too long";
1956 if (be16_to_cpu(rec->len) & 3) {
1957 errmsg = "odd number of bytes";
1960 res = loader_write(lb, dev, rec);
1964 res = loader_verify(lb, dev, rec);
1967 rec = ihex_next_binrec(rec);
1969 release_firmware(fw);
1971 res = loader_start(lb, dev, start_address);
1975 release_firmware(fw);
1976 PRINTK(KERN_ERR, "Bad microcode data (%s)", errmsg);
1980 /********** give adapter parameters **********/
1982 static inline __be32 bus_addr(void * addr) {
1983 return cpu_to_be32 (virt_to_bus (addr));
1986 static int amb_talk(amb_dev *dev)
1990 unsigned long timeout;
1992 PRINTD (DBG_FLOW, "amb_talk %p", dev);
1994 a.command_start = bus_addr (dev->cq.ptrs.start);
1995 a.command_end = bus_addr (dev->cq.ptrs.limit);
1996 a.tx_start = bus_addr (dev->txq.in.start);
1997 a.tx_end = bus_addr (dev->txq.in.limit);
1998 a.txcom_start = bus_addr (dev->txq.out.start);
1999 a.txcom_end = bus_addr (dev->txq.out.limit);
2001 for (pool = 0; pool < NUM_RX_POOLS; ++pool) {
2002 // the other "a" items are set up by the adapter
2003 a.rec_struct[pool].buffer_start = bus_addr (dev->rxq[pool].in.start);
2004 a.rec_struct[pool].buffer_end = bus_addr (dev->rxq[pool].in.limit);
2005 a.rec_struct[pool].rx_start = bus_addr (dev->rxq[pool].out.start);
2006 a.rec_struct[pool].rx_end = bus_addr (dev->rxq[pool].out.limit);
2007 a.rec_struct[pool].buffer_size = cpu_to_be32 (dev->rxq[pool].buffer_size);
2010 #ifdef AMB_NEW_MICROCODE
2011 // disable fast PLX prefetching
2015 // pass the structure
2016 wr_mem (dev, offsetof(amb_mem, doorbell), virt_to_bus (&a));
2018 // 2.2 second wait (must not touch doorbell during 2 second DMA test)
2020 // give the adapter another half second?
2022 while (rd_plain (dev, offsetof(amb_mem, doorbell)))
2024 timeout = msleep_interruptible(timeout);
2026 PRINTD (DBG_INIT|DBG_ERR, "adapter init timed out");
2033 // get microcode version
2034 static void amb_ucode_version(amb_dev *dev)
2039 cmd.request = cpu_to_be32 (SRB_GET_VERSION);
2040 while (command_do (dev, &cmd)) {
2041 set_current_state(TASK_UNINTERRUPTIBLE);
2044 major = be32_to_cpu (cmd.args.version.major);
2045 minor = be32_to_cpu (cmd.args.version.minor);
2046 PRINTK (KERN_INFO, "microcode version is %u.%u", major, minor);
2049 // get end station address
2050 static void amb_esi(amb_dev *dev, u8 *esi)
2056 cmd.request = cpu_to_be32 (SRB_GET_BIA);
2057 while (command_do (dev, &cmd)) {
2058 set_current_state(TASK_UNINTERRUPTIBLE);
2061 lower4 = be32_to_cpu (cmd.args.bia.lower4);
2062 upper2 = be32_to_cpu (cmd.args.bia.upper2);
2063 PRINTD (DBG_LOAD, "BIA: lower4: %08x, upper2 %04x", lower4, upper2);
2068 PRINTDB (DBG_INIT, "ESI:");
2069 for (i = 0; i < ESI_LEN; ++i) {
2071 esi[i] = bitrev8(lower4>>(8*i));
2073 esi[i] = bitrev8(upper2>>(8*(i-4)));
2074 PRINTDM (DBG_INIT, " %02x", esi[i]);
2077 PRINTDE (DBG_INIT, "");
2083 static void fixup_plx_window (amb_dev *dev, loader_block *lb)
2085 // fix up the PLX-mapped window base address to match the block
2088 blb = virt_to_bus(lb);
2089 // the kernel stack had better not ever cross a 1Gb boundary!
2090 mapreg = rd_plain (dev, offsetof(amb_mem, stuff[10]));
2091 mapreg &= ~onegigmask;
2092 mapreg |= blb & onegigmask;
2093 wr_plain (dev, offsetof(amb_mem, stuff[10]), mapreg);
2097 static int amb_init(amb_dev *dev)
2103 if (amb_reset (dev, 1)) {
2104 PRINTK (KERN_ERR, "card reset failed!");
2106 fixup_plx_window (dev, &lb);
2108 if (get_loader_version (&lb, dev, &version)) {
2109 PRINTK (KERN_INFO, "failed to get loader version");
2111 PRINTK (KERN_INFO, "loader version is %08x", version);
2113 if (ucode_init (&lb, dev)) {
2114 PRINTK (KERN_ERR, "microcode failure");
2115 } else if (create_queues (dev, cmds, txs, rxs, rxs_bs)) {
2116 PRINTK (KERN_ERR, "failed to get memory for queues");
2119 if (amb_talk (dev)) {
2120 PRINTK (KERN_ERR, "adapter did not accept queues");
2123 amb_ucode_version (dev);
2128 destroy_queues (dev);
2129 } /* create_queues, ucode_init */
2132 } /* get_loader_version */
2139 static void setup_dev(amb_dev *dev, struct pci_dev *pci_dev)
2143 // set up known dev items straight away
2144 dev->pci_dev = pci_dev;
2145 pci_set_drvdata(pci_dev, dev);
2147 dev->iobase = pci_resource_start (pci_dev, 1);
2148 dev->irq = pci_dev->irq;
2149 dev->membase = bus_to_virt(pci_resource_start(pci_dev, 0));
2151 // flags (currently only dead)
2154 // Allocate cell rates (fibre)
2155 // ATM_OC3_PCR = 1555200000/8/270*260/53 - 29/53
2156 // to be really pedantic, this should be ATM_OC3c_PCR
2157 dev->tx_avail = ATM_OC3_PCR;
2158 dev->rx_avail = ATM_OC3_PCR;
2160 // semaphore for txer/rxer modifications - we cannot use a
2161 // spinlock as the critical region needs to switch processes
2162 mutex_init(&dev->vcc_sf);
2163 // queue manipulation spinlocks; we want atomic reads and
2164 // writes to the queue descriptors (handles IRQ and SMP)
2165 // consider replacing "int pending" -> "atomic_t available"
2166 // => problem related to who gets to move queue pointers
2167 spin_lock_init (&dev->cq.lock);
2168 spin_lock_init (&dev->txq.lock);
2169 for (pool = 0; pool < NUM_RX_POOLS; ++pool)
2170 spin_lock_init (&dev->rxq[pool].lock);
2173 static void setup_pci_dev(struct pci_dev *pci_dev)
2177 // enable bus master accesses
2178 pci_set_master(pci_dev);
2180 // frobnicate latency (upwards, usually)
2181 pci_read_config_byte (pci_dev, PCI_LATENCY_TIMER, &lat);
2184 pci_lat = (lat < MIN_PCI_LATENCY) ? MIN_PCI_LATENCY : lat;
2186 if (lat != pci_lat) {
2187 PRINTK (KERN_INFO, "Changing PCI latency timer from %hu to %hu",
2189 pci_write_config_byte(pci_dev, PCI_LATENCY_TIMER, pci_lat);
2193 static int amb_probe(struct pci_dev *pci_dev,
2194 const struct pci_device_id *pci_ent)
2200 err = pci_enable_device(pci_dev);
2202 PRINTK (KERN_ERR, "skipped broken (PLX rev 2) card");
2206 // read resources from PCI configuration space
2209 if (pci_dev->device == PCI_DEVICE_ID_MADGE_AMBASSADOR_BAD) {
2210 PRINTK (KERN_ERR, "skipped broken (PLX rev 2) card");
2215 PRINTD (DBG_INFO, "found Madge ATM adapter (amb) at"
2216 " IO %llx, IRQ %u, MEM %p",
2217 (unsigned long long)pci_resource_start(pci_dev, 1),
2218 irq, bus_to_virt(pci_resource_start(pci_dev, 0)));
2221 err = pci_request_region(pci_dev, 1, DEV_LABEL);
2223 PRINTK (KERN_ERR, "IO range already in use!");
2227 dev = kzalloc(sizeof(amb_dev), GFP_KERNEL);
2229 PRINTK (KERN_ERR, "out of memory!");
2234 setup_dev(dev, pci_dev);
2236 err = amb_init(dev);
2238 PRINTK (KERN_ERR, "adapter initialisation failure");
2242 setup_pci_dev(pci_dev);
2244 // grab (but share) IRQ and install handler
2245 err = request_irq(irq, interrupt_handler, IRQF_SHARED, DEV_LABEL, dev);
2247 PRINTK (KERN_ERR, "request IRQ failed!");
2251 dev->atm_dev = atm_dev_register (DEV_LABEL, &pci_dev->dev, &amb_ops, -1,
2253 if (!dev->atm_dev) {
2254 PRINTD (DBG_ERR, "failed to register Madge ATM adapter");
2259 PRINTD (DBG_INFO, "registered Madge ATM adapter (no. %d) (%p) at %p",
2260 dev->atm_dev->number, dev, dev->atm_dev);
2261 dev->atm_dev->dev_data = (void *) dev;
2263 // register our address
2264 amb_esi (dev, dev->atm_dev->esi);
2266 // 0 bits for vpi, 10 bits for vci
2267 dev->atm_dev->ci_range.vpi_bits = NUM_VPI_BITS;
2268 dev->atm_dev->ci_range.vci_bits = NUM_VCI_BITS;
2270 init_timer(&dev->housekeeping);
2271 dev->housekeeping.function = do_housekeeping;
2272 dev->housekeeping.data = (unsigned long) dev;
2273 mod_timer(&dev->housekeeping, jiffies);
2275 // enable host interrupts
2276 interrupts_on (dev);
2288 pci_release_region(pci_dev, 1);
2290 pci_disable_device(pci_dev);
2295 static void amb_remove_one(struct pci_dev *pci_dev)
2297 struct amb_dev *dev;
2299 dev = pci_get_drvdata(pci_dev);
2301 PRINTD(DBG_INFO|DBG_INIT, "closing %p (atm_dev = %p)", dev, dev->atm_dev);
2302 del_timer_sync(&dev->housekeeping);
2303 // the drain should not be necessary
2304 drain_rx_pools(dev);
2305 interrupts_off(dev);
2307 free_irq(dev->irq, dev);
2308 pci_disable_device(pci_dev);
2309 destroy_queues(dev);
2310 atm_dev_deregister(dev->atm_dev);
2312 pci_release_region(pci_dev, 1);
2315 static void __init amb_check_args (void) {
2317 unsigned int max_rx_size;
2319 #ifdef DEBUG_AMBASSADOR
2320 PRINTK (KERN_NOTICE, "debug bitmap is %hx", debug &= DBG_MASK);
2323 PRINTK (KERN_NOTICE, "no debugging support");
2326 if (cmds < MIN_QUEUE_SIZE)
2327 PRINTK (KERN_NOTICE, "cmds has been raised to %u",
2328 cmds = MIN_QUEUE_SIZE);
2330 if (txs < MIN_QUEUE_SIZE)
2331 PRINTK (KERN_NOTICE, "txs has been raised to %u",
2332 txs = MIN_QUEUE_SIZE);
2334 for (pool = 0; pool < NUM_RX_POOLS; ++pool)
2335 if (rxs[pool] < MIN_QUEUE_SIZE)
2336 PRINTK (KERN_NOTICE, "rxs[%hu] has been raised to %u",
2337 pool, rxs[pool] = MIN_QUEUE_SIZE);
2339 // buffers sizes should be greater than zero and strictly increasing
2341 for (pool = 0; pool < NUM_RX_POOLS; ++pool)
2342 if (rxs_bs[pool] <= max_rx_size)
2343 PRINTK (KERN_NOTICE, "useless pool (rxs_bs[%hu] = %u)",
2344 pool, rxs_bs[pool]);
2346 max_rx_size = rxs_bs[pool];
2348 if (rx_lats < MIN_RX_BUFFERS)
2349 PRINTK (KERN_NOTICE, "rx_lats has been raised to %u",
2350 rx_lats = MIN_RX_BUFFERS);
2355 /********** module stuff **********/
2357 MODULE_AUTHOR(maintainer_string);
2358 MODULE_DESCRIPTION(description_string);
2359 MODULE_LICENSE("GPL");
2360 MODULE_FIRMWARE("atmsar11.fw");
2361 module_param(debug, ushort, 0644);
2362 module_param(cmds, uint, 0);
2363 module_param(txs, uint, 0);
2364 module_param_array(rxs, uint, NULL, 0);
2365 module_param_array(rxs_bs, uint, NULL, 0);
2366 module_param(rx_lats, uint, 0);
2367 module_param(pci_lat, byte, 0);
2368 MODULE_PARM_DESC(debug, "debug bitmap, see .h file");
2369 MODULE_PARM_DESC(cmds, "number of command queue entries");
2370 MODULE_PARM_DESC(txs, "number of TX queue entries");
2371 MODULE_PARM_DESC(rxs, "number of RX queue entries [" __MODULE_STRING(NUM_RX_POOLS) "]");
2372 MODULE_PARM_DESC(rxs_bs, "size of RX buffers [" __MODULE_STRING(NUM_RX_POOLS) "]");
2373 MODULE_PARM_DESC(rx_lats, "number of extra buffers to cope with RX latencies");
2374 MODULE_PARM_DESC(pci_lat, "PCI latency in bus cycles");
2376 /********** module entry **********/
2378 static struct pci_device_id amb_pci_tbl[] = {
2379 { PCI_VDEVICE(MADGE, PCI_DEVICE_ID_MADGE_AMBASSADOR), 0 },
2380 { PCI_VDEVICE(MADGE, PCI_DEVICE_ID_MADGE_AMBASSADOR_BAD), 0 },
2384 MODULE_DEVICE_TABLE(pci, amb_pci_tbl);
2386 static struct pci_driver amb_driver = {
2389 .remove = amb_remove_one,
2390 .id_table = amb_pci_tbl,
2393 static int __init amb_module_init (void)
2395 PRINTD (DBG_FLOW|DBG_INIT, "init_module");
2397 // sanity check - cast needed as printk does not support %Zu
2398 if (sizeof(amb_mem) != 4*16 + 4*12) {
2399 PRINTK (KERN_ERR, "Fix amb_mem (is %lu words).",
2400 (unsigned long) sizeof(amb_mem));
2409 return pci_register_driver(&amb_driver);
2412 /********** module exit **********/
2414 static void __exit amb_module_exit (void)
2416 PRINTD (DBG_FLOW|DBG_INIT, "cleanup_module");
2418 pci_unregister_driver(&amb_driver);
2421 module_init(amb_module_init);
2422 module_exit(amb_module_exit);