9 #include "snapshot-interface.h"
10 #include "threads-model.h"
13 memory_order orders[7] = {
14 memory_order_relaxed, memory_order_consume, memory_order_acquire,
15 memory_order_release, memory_order_acq_rel, memory_order_seq_cst,
18 static void ensureModel() {
20 snapshot_system_init(10000, 1024, 1024, 40000);
21 model = new ModelChecker();
22 model->startChecker();
26 /** Performs a read action.*/
27 uint64_t model_read_action(void * obj, memory_order ord) {
28 return model->switch_to_master(new ModelAction(ATOMIC_READ, ord, obj));
31 /** Performs a write action.*/
32 void model_write_action(void * obj, memory_order ord, uint64_t val) {
33 model->switch_to_master(new ModelAction(ATOMIC_WRITE, ord, obj, val));
36 /** Performs an init action. */
37 void model_init_action(void * obj, uint64_t val) {
38 model->switch_to_master(new ModelAction(ATOMIC_INIT, memory_order_relaxed, obj, val));
42 * Performs the read part of a RMW action. The next action must either be the
43 * write part of the RMW action or an explicit close out of the RMW action w/o
46 uint64_t model_rmwr_action(void *obj, memory_order ord) {
47 return model->switch_to_master(new ModelAction(ATOMIC_RMWR, ord, obj));
51 * Performs the read part of a RMW CAS action. The next action must
52 * either be the write part of the RMW action or an explicit close out
53 * of the RMW action w/o a write.
55 uint64_t model_rmwrcas_action(void *obj, memory_order ord, uint64_t oldval, int size) {
56 return model->switch_to_master(new ModelAction(ATOMIC_RMWRCAS, ord, obj, oldval, size));
60 /** Performs the write part of a RMW action. */
61 void model_rmw_action(void *obj, memory_order ord, uint64_t val) {
62 model->switch_to_master(new ModelAction(ATOMIC_RMW, ord, obj, val));
65 /** Closes out a RMW action without doing a write. */
66 void model_rmwc_action(void *obj, memory_order ord) {
67 model->switch_to_master(new ModelAction(ATOMIC_RMWC, ord, obj));
70 /** Issues a fence operation. */
71 void model_fence_action(memory_order ord) {
72 model->switch_to_master(new ModelAction(ATOMIC_FENCE, ord, FENCE_LOCATION));
75 /* --- helper functions --- */
76 uint64_t model_rmwrcas_action_helper(void *obj, int atomic_index, uint64_t oldval, int size, const char *position) {
78 return model->switch_to_master(new ModelAction(ATOMIC_RMWRCAS, position, orders[atomic_index], obj, oldval, size));
81 uint64_t model_rmwr_action_helper(void *obj, int atomic_index, const char *position) {
83 return model->switch_to_master(new ModelAction(ATOMIC_RMWR, position, orders[atomic_index], obj));
86 void model_rmw_action_helper(void *obj, uint64_t val, int atomic_index, const char * position) {
88 model->switch_to_master(new ModelAction(ATOMIC_RMW, position, orders[atomic_index], obj, val));
91 void model_rmwc_action_helper(void *obj, int atomic_index, const char *position) {
93 model->switch_to_master(new ModelAction(ATOMIC_RMWC, position, orders[atomic_index], obj));
97 #define VOLATILELOAD(size) \
98 uint ## size ## _t cds_volatile_load ## size(void * obj, const char * position) { \
100 return (uint ## size ## _t)model->switch_to_master(new ModelAction(ATOMIC_READ, position, memory_order_relaxed, obj)); \
108 // cds volatile stores
109 #define VOLATILESTORE(size) \
110 void cds_volatile_store ## size (void * obj, uint ## size ## _t val, const char * position) { \
112 model->switch_to_master(new ModelAction(ATOMIC_WRITE, position, memory_order_relaxed, obj, (uint64_t) val)); \
113 *((volatile uint ## size ## _t *)obj) = val; \
114 thread_id_t tid = thread_current()->get_id(); \
115 for(int i=0;i < size / 8;i++) { \
116 atomraceCheckWrite(tid, (void *)(((char *)obj)+i)); \
126 #define CDSATOMICINT(size) \
127 void cds_atomic_init ## size (void * obj, uint ## size ## _t val, const char * position) { \
129 model->switch_to_master(new ModelAction(ATOMIC_INIT, position, memory_order_relaxed, obj, (uint64_t) val)); \
130 *((volatile uint ## size ## _t *)obj) = val; \
131 thread_id_t tid = thread_current()->get_id(); \
132 for(int i=0;i < size / 8;i++) { \
133 atomraceCheckWrite(tid, (void *)(((char *)obj)+i)); \
143 #define CDSATOMICLOAD(size) \
144 uint ## size ## _t cds_atomic_load ## size(void * obj, int atomic_index, const char * position) { \
146 uint ## size ## _t val = (uint ## size ## _t)model->switch_to_master( \
147 new ModelAction(ATOMIC_READ, position, orders[atomic_index], obj)); \
148 thread_id_t tid = thread_current()->get_id(); \
149 for(int i=0;i < size / 8;i++) { \
150 atomraceCheckRead(tid, (void *)(((char *)obj)+i)); \
161 #define CDSATOMICSTORE(size) \
162 void cds_atomic_store ## size(void * obj, uint ## size ## _t val, int atomic_index, const char * position) { \
164 model->switch_to_master(new ModelAction(ATOMIC_WRITE, position, orders[atomic_index], obj, (uint64_t) val)); \
165 *((volatile uint ## size ## _t *)obj) = val; \
166 thread_id_t tid = thread_current()->get_id(); \
167 for(int i=0;i < size / 8;i++) { \
168 atomraceCheckWrite(tid, (void *)(((char *)obj)+i)); \
178 #define _ATOMIC_RMW_(__op__, size, addr, val, atomic_index, position) \
180 uint ## size ## _t _old = model_rmwr_action_helper(addr, atomic_index, position); \
181 uint ## size ## _t _copy = _old; \
182 uint ## size ## _t _val = val; \
184 model_rmw_action_helper(addr, (uint64_t) _copy, atomic_index, position); \
185 *((volatile uint ## size ## _t *)addr) = _copy; \
186 thread_id_t tid = thread_current()->get_id(); \
187 for(int i=0;i < size / 8;i++) { \
188 atomraceCheckRead(tid, (void *)(((char *)addr)+i)); \
189 recordWrite(tid, (void *)(((char *)addr)+i)); \
194 // cds atomic exchange
195 #define CDSATOMICEXCHANGE(size) \
196 uint ## size ## _t cds_atomic_exchange ## size(void* addr, uint ## size ## _t val, int atomic_index, const char * position) { \
197 _ATOMIC_RMW_( =, size, addr, val, atomic_index, position); \
201 CDSATOMICEXCHANGE(16)
202 CDSATOMICEXCHANGE(32)
203 CDSATOMICEXCHANGE(64)
205 // cds atomic fetch add
206 #define CDSATOMICADD(size) \
207 uint ## size ## _t cds_atomic_fetch_add ## size(void* addr, uint ## size ## _t val, int atomic_index, const char * position) { \
208 _ATOMIC_RMW_( +=, size, addr, val, atomic_index, position); \
216 // cds atomic fetch sub
217 #define CDSATOMICSUB(size) \
218 uint ## size ## _t cds_atomic_fetch_sub ## size(void* addr, uint ## size ## _t val, int atomic_index, const char * position) { \
219 _ATOMIC_RMW_( -=, size, addr, val, atomic_index, position); \
227 // cds atomic fetch and
228 #define CDSATOMICAND(size) \
229 uint ## size ## _t cds_atomic_fetch_and ## size(void* addr, uint ## size ## _t val, int atomic_index, const char * position) { \
230 _ATOMIC_RMW_( &=, size, addr, val, atomic_index, position); \
238 // cds atomic fetch or
239 #define CDSATOMICOR(size) \
240 uint ## size ## _t cds_atomic_fetch_or ## size(void* addr, uint ## size ## _t val, int atomic_index, const char * position) { \
241 _ATOMIC_RMW_( |=, size, addr, val, atomic_index, position); \
249 // cds atomic fetch xor
250 #define CDSATOMICXOR(size) \
251 uint ## size ## _t cds_atomic_fetch_xor ## size(void* addr, uint ## size ## _t val, int atomic_index, const char * position) { \
252 _ATOMIC_RMW_( ^=, size, addr, val, atomic_index, position); \
260 // cds atomic compare and exchange
261 // In order to accomodate the LLVM PASS, the return values are not true or false.
263 #define _ATOMIC_CMPSWP_WEAK_ _ATOMIC_CMPSWP_
264 #define _ATOMIC_CMPSWP_(size, addr, expected, desired, atomic_index, position) \
266 uint ## size ## _t _desired = desired; \
267 uint ## size ## _t _expected = expected; \
268 uint ## size ## _t _old = model_rmwrcas_action_helper(addr, atomic_index, _expected, sizeof(_expected), position); \
269 if (_old == _expected) { \
270 model_rmw_action_helper(addr, (uint64_t) _desired, atomic_index, position); \
271 *((volatile uint ## size ## _t *)addr) = desired; \
272 thread_id_t tid = thread_current()->get_id(); \
273 for(int i=0;i < size / 8;i++) { \
274 recordWrite(tid, (void *)(((char *)addr)+i)); \
276 return _expected; } \
278 model_rmwc_action_helper(addr, atomic_index, position); _expected = _old; return _old; } \
281 // atomic_compare_exchange version 1: the CmpOperand (corresponds to expected)
282 // extracted from LLVM IR is an integer type.
283 #define CDSATOMICCASV1(size) \
284 uint ## size ## _t cds_atomic_compare_exchange ## size ## _v1(void* addr, uint ## size ## _t expected, uint ## size ## _t desired, int atomic_index_succ, int atomic_index_fail, const char *position) { \
285 _ATOMIC_CMPSWP_(size, addr, expected, desired, atomic_index_succ, position); \
293 // atomic_compare_exchange version 2
294 #define CDSATOMICCASV2(size) \
295 bool cds_atomic_compare_exchange ## size ## _v2(void* addr, uint ## size ## _t* expected, uint ## size ## _t desired, int atomic_index_succ, int atomic_index_fail, const char *position) { \
296 uint ## size ## _t ret = cds_atomic_compare_exchange ## size ## _v1(addr, *expected, desired, atomic_index_succ, atomic_index_fail, position); \
297 if (ret == *expected) {return true;} else {return false;} \
305 // cds atomic thread fence
307 void cds_atomic_thread_fence(int atomic_index, const char * position) {
308 model->switch_to_master(
309 new ModelAction(ATOMIC_FENCE, position, orders[atomic_index], FENCE_LOCATION)
314 #define _ATOMIC_CMPSWP_( __a__, __e__, __m__, __x__ ) \
315 ({ volatile __typeof__((__a__)->__f__)* __p__ = & ((__a__)->__f__); \
316 __typeof__(__e__) __q__ = (__e__); \
317 __typeof__(__m__) __v__ = (__m__); \
319 __typeof__((__a__)->__f__) __t__=(__typeof__((__a__)->__f__)) model_rmwr_action((void *)__p__, __x__); \
320 if (__t__ == * __q__ ) { \
321 model_rmw_action((void *)__p__, __x__, (uint64_t) __v__); __r__ = true; } \
322 else { model_rmwc_action((void *)__p__, __x__); *__q__ = __t__; __r__ = false;} \
325 #define _ATOMIC_FENCE_( __x__ ) \
326 ({ model_fence_action(__x__);})
331 #define _ATOMIC_MODIFY_( __a__, __o__, __m__, __x__ ) \
332 ({ volatile __typeof__((__a__)->__f__)* __p__ = & ((__a__)->__f__); \
333 __typeof__((__a__)->__f__) __old__=(__typeof__((__a__)->__f__)) model_rmwr_action((void *)__p__, __x__); \
334 __typeof__(__m__) __v__ = (__m__); \
335 __typeof__((__a__)->__f__) __copy__= __old__; \
336 __copy__ __o__ __v__; \
337 model_rmw_action((void *)__p__, __x__, (uint64_t) __copy__); \
338 __old__ = __old__; Silence clang (-Wunused-value) \
342 void cds_func_entry(const char * funcName) {
345 Thread * th = thread_current();
348 ModelHistory *history = model->get_history();
349 if ( !history->getFuncMap()->contains(funcName) ) {
350 // add func id to func map
351 func_id = history->get_func_counter();
352 history->incr_func_counter();
353 history->getFuncMap()->put(funcName, func_id);
355 // add func id to reverse func map
356 ModelVector<const char *> * func_map_rev = history->getFuncMapRev();
357 if ( func_map_rev->size() <= func_id )
358 func_map_rev->resize( func_id + 1 );
359 func_map_rev->at(func_id) = funcName;
361 func_id = history->getFuncMap()->get(funcName);
364 history->enter_function(func_id, th->get_id());
368 void cds_func_exit(const char * funcName) {
371 /* Thread * th = thread_current();
374 ModelHistory *history = model->get_history();
375 func_id = history->getFuncMap()->get(funcName);
377 * func_id not found; this could happen in the case where a function calls cds_func_entry
378 * when the model has been defined yet, but then an atomic inside the function initializes
379 * the model. And then cds_func_exit is called upon the function exiting.
384 history->exit_function(func_id, th->get_id());