ACPI / dock: fix error return code in dock_add()
[firefly-linux-kernel-4.4.55.git] / arch / xtensa / kernel / time.c
1 /*
2  * arch/xtensa/kernel/time.c
3  *
4  * Timer and clock support.
5  *
6  * This file is subject to the terms and conditions of the GNU General Public
7  * License.  See the file "COPYING" in the main directory of this archive
8  * for more details.
9  *
10  * Copyright (C) 2005 Tensilica Inc.
11  *
12  * Chris Zankel <chris@zankel.net>
13  */
14
15 #include <linux/errno.h>
16 #include <linux/sched.h>
17 #include <linux/time.h>
18 #include <linux/clocksource.h>
19 #include <linux/clockchips.h>
20 #include <linux/interrupt.h>
21 #include <linux/module.h>
22 #include <linux/init.h>
23 #include <linux/irq.h>
24 #include <linux/profile.h>
25 #include <linux/delay.h>
26 #include <linux/irqdomain.h>
27 #include <linux/sched_clock.h>
28
29 #include <asm/timex.h>
30 #include <asm/platform.h>
31
32 #ifdef CONFIG_XTENSA_CALIBRATE_CCOUNT
33 unsigned long ccount_freq;              /* ccount Hz */
34 #endif
35
36 static cycle_t ccount_read(struct clocksource *cs)
37 {
38         return (cycle_t)get_ccount();
39 }
40
41 static u32 notrace ccount_sched_clock_read(void)
42 {
43         return get_ccount();
44 }
45
46 static struct clocksource ccount_clocksource = {
47         .name = "ccount",
48         .rating = 200,
49         .read = ccount_read,
50         .mask = CLOCKSOURCE_MASK(32),
51 };
52
53 static int ccount_timer_set_next_event(unsigned long delta,
54                 struct clock_event_device *dev);
55 static void ccount_timer_set_mode(enum clock_event_mode mode,
56                 struct clock_event_device *evt);
57 static struct ccount_timer_t {
58         struct clock_event_device evt;
59         int irq_enabled;
60 } ccount_timer = {
61         .evt = {
62                 .name           = "ccount_clockevent",
63                 .features       = CLOCK_EVT_FEAT_ONESHOT,
64                 .rating         = 300,
65                 .set_next_event = ccount_timer_set_next_event,
66                 .set_mode       = ccount_timer_set_mode,
67         },
68 };
69
70 static int ccount_timer_set_next_event(unsigned long delta,
71                 struct clock_event_device *dev)
72 {
73         unsigned long flags, next;
74         int ret = 0;
75
76         local_irq_save(flags);
77         next = get_ccount() + delta;
78         set_linux_timer(next);
79         if (next - get_ccount() > delta)
80                 ret = -ETIME;
81         local_irq_restore(flags);
82
83         return ret;
84 }
85
86 static void ccount_timer_set_mode(enum clock_event_mode mode,
87                 struct clock_event_device *evt)
88 {
89         struct ccount_timer_t *timer =
90                 container_of(evt, struct ccount_timer_t, evt);
91
92         /*
93          * There is no way to disable the timer interrupt at the device level,
94          * only at the intenable register itself. Since enable_irq/disable_irq
95          * calls are nested, we need to make sure that these calls are
96          * balanced.
97          */
98         switch (mode) {
99         case CLOCK_EVT_MODE_SHUTDOWN:
100         case CLOCK_EVT_MODE_UNUSED:
101                 if (timer->irq_enabled) {
102                         disable_irq(evt->irq);
103                         timer->irq_enabled = 0;
104                 }
105                 break;
106         case CLOCK_EVT_MODE_RESUME:
107         case CLOCK_EVT_MODE_ONESHOT:
108                 if (!timer->irq_enabled) {
109                         enable_irq(evt->irq);
110                         timer->irq_enabled = 1;
111                 }
112         default:
113                 break;
114         }
115 }
116
117 static irqreturn_t timer_interrupt(int irq, void *dev_id);
118 static struct irqaction timer_irqaction = {
119         .handler =      timer_interrupt,
120         .flags =        IRQF_TIMER,
121         .name =         "timer",
122         .dev_id =       &ccount_timer,
123 };
124
125 void __init time_init(void)
126 {
127 #ifdef CONFIG_XTENSA_CALIBRATE_CCOUNT
128         printk("Calibrating CPU frequency ");
129         platform_calibrate_ccount();
130         printk("%d.%02d MHz\n", (int)ccount_freq/1000000,
131                         (int)(ccount_freq/10000)%100);
132 #endif
133         clocksource_register_hz(&ccount_clocksource, CCOUNT_PER_JIFFY * HZ);
134
135         ccount_timer.evt.cpumask = cpumask_of(0);
136         ccount_timer.evt.irq = irq_create_mapping(NULL, LINUX_TIMER_INT);
137         if (WARN(!ccount_timer.evt.irq, "error: can't map timer irq"))
138                 return;
139         clockevents_config_and_register(&ccount_timer.evt, ccount_freq, 0xf,
140                         0xffffffff);
141         setup_irq(ccount_timer.evt.irq, &timer_irqaction);
142         ccount_timer.irq_enabled = 1;
143
144         setup_sched_clock(ccount_sched_clock_read, 32, ccount_freq);
145 }
146
147 /*
148  * The timer interrupt is called HZ times per second.
149  */
150
151 irqreturn_t timer_interrupt (int irq, void *dev_id)
152 {
153         struct ccount_timer_t *timer = dev_id;
154         struct clock_event_device *evt = &timer->evt;
155
156         evt->event_handler(evt);
157
158         /* Allow platform to do something useful (Wdog). */
159         platform_heartbeat();
160
161         return IRQ_HANDLED;
162 }
163
164 #ifndef CONFIG_GENERIC_CALIBRATE_DELAY
165 void __cpuinit calibrate_delay(void)
166 {
167         loops_per_jiffy = CCOUNT_PER_JIFFY;
168         printk("Calibrating delay loop (skipped)... "
169                "%lu.%02lu BogoMIPS preset\n",
170                loops_per_jiffy/(1000000/HZ),
171                (loops_per_jiffy/(10000/HZ)) % 100);
172 }
173 #endif