2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
6 * Copyright (C) 2001 - 2013 Tensilica Inc.
9 #ifndef _XTENSA_TLBFLUSH_H
10 #define _XTENSA_TLBFLUSH_H
12 #include <linux/stringify.h>
13 #include <asm/processor.h>
15 #define DTLB_WAY_PGD 7
17 #define ITLB_ARF_WAYS 4
18 #define DTLB_ARF_WAYS 4
20 #define ITLB_HIT_BIT 3
21 #define DTLB_HIT_BIT 4
27 * - flush_tlb_all() flushes all processes TLB entries
28 * - flush_tlb_mm(mm) flushes the specified mm context TLB entries
29 * - flush_tlb_page(mm, vmaddr) flushes a single page
30 * - flush_tlb_range(mm, start, end) flushes a range of pages
33 void local_flush_tlb_all(void);
34 void local_flush_tlb_mm(struct mm_struct *mm);
35 void local_flush_tlb_page(struct vm_area_struct *vma,
37 void local_flush_tlb_range(struct vm_area_struct *vma,
38 unsigned long start, unsigned long end);
42 void flush_tlb_all(void);
43 void flush_tlb_mm(struct mm_struct *);
44 void flush_tlb_page(struct vm_area_struct *, unsigned long);
45 void flush_tlb_range(struct vm_area_struct *, unsigned long,
48 static inline void flush_tlb_kernel_range(unsigned long start,
54 #else /* !CONFIG_SMP */
56 #define flush_tlb_all() local_flush_tlb_all()
57 #define flush_tlb_mm(mm) local_flush_tlb_mm(mm)
58 #define flush_tlb_page(vma, page) local_flush_tlb_page(vma, page)
59 #define flush_tlb_range(vma, vmaddr, end) local_flush_tlb_range(vma, vmaddr, \
61 #define flush_tlb_kernel_range(start, end) local_flush_tlb_all()
63 #endif /* CONFIG_SMP */
67 static inline unsigned long itlb_probe(unsigned long addr)
70 __asm__ __volatile__("pitlb %0, %1\n\t" : "=a" (tmp) : "a" (addr));
74 static inline unsigned long dtlb_probe(unsigned long addr)
77 __asm__ __volatile__("pdtlb %0, %1\n\t" : "=a" (tmp) : "a" (addr));
81 static inline void invalidate_itlb_entry (unsigned long probe)
83 __asm__ __volatile__("iitlb %0; isync\n\t" : : "a" (probe));
86 static inline void invalidate_dtlb_entry (unsigned long probe)
88 __asm__ __volatile__("idtlb %0; dsync\n\t" : : "a" (probe));
91 /* Use the .._no_isync functions with caution. Generally, these are
92 * handy for bulk invalidates followed by a single 'isync'. The
93 * caller must follow up with an 'isync', which can be relatively
94 * expensive on some Xtensa implementations.
96 static inline void invalidate_itlb_entry_no_isync (unsigned entry)
98 /* Caller must follow up with 'isync'. */
99 __asm__ __volatile__ ("iitlb %0\n" : : "a" (entry) );
102 static inline void invalidate_dtlb_entry_no_isync (unsigned entry)
104 /* Caller must follow up with 'isync'. */
105 __asm__ __volatile__ ("idtlb %0\n" : : "a" (entry) );
108 static inline void set_itlbcfg_register (unsigned long val)
110 __asm__ __volatile__("wsr %0, itlbcfg\n\t" "isync\n\t"
114 static inline void set_dtlbcfg_register (unsigned long val)
116 __asm__ __volatile__("wsr %0, dtlbcfg; dsync\n\t"
120 static inline void set_ptevaddr_register (unsigned long val)
122 __asm__ __volatile__(" wsr %0, ptevaddr; isync\n"
126 static inline unsigned long read_ptevaddr_register (void)
129 __asm__ __volatile__("rsr %0, ptevaddr\n\t" : "=a" (tmp));
133 static inline void write_dtlb_entry (pte_t entry, int way)
135 __asm__ __volatile__("wdtlb %1, %0; dsync\n\t"
136 : : "r" (way), "r" (entry) );
139 static inline void write_itlb_entry (pte_t entry, int way)
141 __asm__ __volatile__("witlb %1, %0; isync\n\t"
142 : : "r" (way), "r" (entry) );
145 static inline void invalidate_page_directory (void)
147 invalidate_dtlb_entry (DTLB_WAY_PGD);
148 invalidate_dtlb_entry (DTLB_WAY_PGD+1);
149 invalidate_dtlb_entry (DTLB_WAY_PGD+2);
152 static inline void invalidate_itlb_mapping (unsigned address)
154 unsigned long tlb_entry;
155 if (((tlb_entry = itlb_probe(address)) & (1 << ITLB_HIT_BIT)) != 0)
156 invalidate_itlb_entry(tlb_entry);
159 static inline void invalidate_dtlb_mapping (unsigned address)
161 unsigned long tlb_entry;
162 if (((tlb_entry = dtlb_probe(address)) & (1 << DTLB_HIT_BIT)) != 0)
163 invalidate_dtlb_entry(tlb_entry);
166 #define check_pgt_cache() do { } while (0)
170 * DO NOT USE THESE FUNCTIONS. These instructions aren't part of the Xtensa
171 * ISA and exist only for test purposes..
172 * You may find it helpful for MMU debugging, however.
174 * 'at' is the unmodified input register
175 * 'as' is the output register, as follows (specific to the Linux config):
177 * as[31..12] contain the virtual address
178 * as[11..08] are meaningless
179 * as[07..00] contain the asid
182 static inline unsigned long read_dtlb_virtual (int way)
185 __asm__ __volatile__("rdtlb0 %0, %1\n\t" : "=a" (tmp), "+a" (way));
189 static inline unsigned long read_dtlb_translation (int way)
192 __asm__ __volatile__("rdtlb1 %0, %1\n\t" : "=a" (tmp), "+a" (way));
196 static inline unsigned long read_itlb_virtual (int way)
199 __asm__ __volatile__("ritlb0 %0, %1\n\t" : "=a" (tmp), "+a" (way));
203 static inline unsigned long read_itlb_translation (int way)
206 __asm__ __volatile__("ritlb1 %0, %1\n\t" : "=a" (tmp), "+a" (way));
210 #endif /* __ASSEMBLY__ */
211 #endif /* _XTENSA_TLBFLUSH_H */