2 * Handle caching attributes in page tables (PAT)
4 * Authors: Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
5 * Suresh B Siddha <suresh.b.siddha@intel.com>
7 * Loosely based on earlier PAT patchset from Eric Biederman and Andi Kleen.
10 #include <linux/seq_file.h>
11 #include <linux/bootmem.h>
12 #include <linux/debugfs.h>
13 #include <linux/kernel.h>
14 #include <linux/module.h>
15 #include <linux/slab.h>
18 #include <linux/rbtree.h>
20 #include <asm/cacheflush.h>
21 #include <asm/processor.h>
22 #include <asm/tlbflush.h>
23 #include <asm/x86_init.h>
24 #include <asm/pgtable.h>
25 #include <asm/fcntl.h>
33 #include "pat_internal.h"
34 #include "mm_internal.h"
37 #define pr_fmt(fmt) "" fmt
39 static bool boot_cpu_done;
41 static int __read_mostly __pat_enabled = IS_ENABLED(CONFIG_X86_PAT);
43 static inline void pat_disable(const char *reason)
46 pr_info("x86/PAT: %s\n", reason);
49 static int __init nopat(char *str)
51 pat_disable("PAT support disabled.");
54 early_param("nopat", nopat);
56 bool pat_enabled(void)
58 return !!__pat_enabled;
60 EXPORT_SYMBOL_GPL(pat_enabled);
64 static int __init pat_debug_setup(char *str)
69 __setup("debugpat", pat_debug_setup);
73 * X86 PAT uses page flags arch_1 and uncached together to keep track of
74 * memory type of pages that have backing page struct.
76 * X86 PAT supports 4 different memory types:
77 * - _PAGE_CACHE_MODE_WB
78 * - _PAGE_CACHE_MODE_WC
79 * - _PAGE_CACHE_MODE_UC_MINUS
80 * - _PAGE_CACHE_MODE_WT
82 * _PAGE_CACHE_MODE_WB is the default type.
86 #define _PGMT_WC (1UL << PG_arch_1)
87 #define _PGMT_UC_MINUS (1UL << PG_uncached)
88 #define _PGMT_WT (1UL << PG_uncached | 1UL << PG_arch_1)
89 #define _PGMT_MASK (1UL << PG_uncached | 1UL << PG_arch_1)
90 #define _PGMT_CLEAR_MASK (~_PGMT_MASK)
92 static inline enum page_cache_mode get_page_memtype(struct page *pg)
94 unsigned long pg_flags = pg->flags & _PGMT_MASK;
96 if (pg_flags == _PGMT_WB)
97 return _PAGE_CACHE_MODE_WB;
98 else if (pg_flags == _PGMT_WC)
99 return _PAGE_CACHE_MODE_WC;
100 else if (pg_flags == _PGMT_UC_MINUS)
101 return _PAGE_CACHE_MODE_UC_MINUS;
103 return _PAGE_CACHE_MODE_WT;
106 static inline void set_page_memtype(struct page *pg,
107 enum page_cache_mode memtype)
109 unsigned long memtype_flags;
110 unsigned long old_flags;
111 unsigned long new_flags;
114 case _PAGE_CACHE_MODE_WC:
115 memtype_flags = _PGMT_WC;
117 case _PAGE_CACHE_MODE_UC_MINUS:
118 memtype_flags = _PGMT_UC_MINUS;
120 case _PAGE_CACHE_MODE_WT:
121 memtype_flags = _PGMT_WT;
123 case _PAGE_CACHE_MODE_WB:
125 memtype_flags = _PGMT_WB;
130 old_flags = pg->flags;
131 new_flags = (old_flags & _PGMT_CLEAR_MASK) | memtype_flags;
132 } while (cmpxchg(&pg->flags, old_flags, new_flags) != old_flags);
135 static inline enum page_cache_mode get_page_memtype(struct page *pg)
139 static inline void set_page_memtype(struct page *pg,
140 enum page_cache_mode memtype)
146 PAT_UC = 0, /* uncached */
147 PAT_WC = 1, /* Write combining */
148 PAT_WT = 4, /* Write Through */
149 PAT_WP = 5, /* Write Protected */
150 PAT_WB = 6, /* Write Back (default) */
151 PAT_UC_MINUS = 7, /* UC, but can be overriden by MTRR */
154 #define CM(c) (_PAGE_CACHE_MODE_ ## c)
156 static enum page_cache_mode pat_get_cache_mode(unsigned pat_val, char *msg)
158 enum page_cache_mode cache;
162 case PAT_UC: cache = CM(UC); cache_mode = "UC "; break;
163 case PAT_WC: cache = CM(WC); cache_mode = "WC "; break;
164 case PAT_WT: cache = CM(WT); cache_mode = "WT "; break;
165 case PAT_WP: cache = CM(WP); cache_mode = "WP "; break;
166 case PAT_WB: cache = CM(WB); cache_mode = "WB "; break;
167 case PAT_UC_MINUS: cache = CM(UC_MINUS); cache_mode = "UC- "; break;
168 default: cache = CM(WB); cache_mode = "WB "; break;
171 memcpy(msg, cache_mode, 4);
179 * Update the cache mode to pgprot translation tables according to PAT
181 * Using lower indices is preferred, so we start with highest index.
183 void __init_cache_modes(u64 pat)
185 enum page_cache_mode cache;
190 for (i = 7; i >= 0; i--) {
191 cache = pat_get_cache_mode((pat >> (i * 8)) & 7,
193 update_cache_mode_entry(i, cache);
195 pr_info("x86/PAT: Configuration [0-7]: %s\n", pat_msg);
198 #define PAT(x, y) ((u64)PAT_ ## y << ((x)*8))
200 static void pat_bsp_init(u64 pat)
205 pat_disable("PAT not supported by CPU.");
209 rdmsrl(MSR_IA32_CR_PAT, tmp_pat);
211 pat_disable("PAT MSR is 0, disabled.");
215 wrmsrl(MSR_IA32_CR_PAT, pat);
217 __init_cache_modes(pat);
220 static void pat_ap_init(u64 pat)
224 * If this happens we are on a secondary CPU, but switched to
225 * PAT on the boot CPU. We have no way to undo PAT.
227 panic("x86/PAT: PAT enabled, but not supported by secondary CPU\n");
230 wrmsrl(MSR_IA32_CR_PAT, pat);
233 static void init_cache_modes(void)
236 static int init_cm_done;
241 if (boot_cpu_has(X86_FEATURE_PAT)) {
243 * CPU supports PAT. Set PAT table to be consistent with
244 * PAT MSR. This case supports "nopat" boot option, and
245 * virtual machine environments which support PAT without
246 * MTRRs. In specific, Xen has unique setup to PAT MSR.
248 * If PAT MSR returns 0, it is considered invalid and emulates
251 rdmsrl(MSR_IA32_CR_PAT, pat);
256 * No PAT. Emulate the PAT table that corresponds to the two
257 * cache bits, PWT (Write Through) and PCD (Cache Disable).
258 * This setup is also the same as the BIOS default setup.
265 * 00 0 WB : _PAGE_CACHE_MODE_WB
266 * 01 1 WT : _PAGE_CACHE_MODE_WT
267 * 10 2 UC-: _PAGE_CACHE_MODE_UC_MINUS
268 * 11 3 UC : _PAGE_CACHE_MODE_UC
270 * NOTE: When WC or WP is used, it is redirected to UC- per
271 * the default setup in __cachemode2pte_tbl[].
273 pat = PAT(0, WB) | PAT(1, WT) | PAT(2, UC_MINUS) | PAT(3, UC) |
274 PAT(4, WB) | PAT(5, WT) | PAT(6, UC_MINUS) | PAT(7, UC);
277 __init_cache_modes(pat);
283 * pat_init - Initialize PAT MSR and PAT table
285 * This function initializes PAT MSR and PAT table with an OS-defined value
286 * to enable additional cache attributes, WC and WT.
288 * This function must be called on all CPUs using the specific sequence of
289 * operations defined in Intel SDM. mtrr_rendezvous_handler() provides this
295 struct cpuinfo_x86 *c = &boot_cpu_data;
297 if (!pat_enabled()) {
302 if ((c->x86_vendor == X86_VENDOR_INTEL) &&
303 (((c->x86 == 0x6) && (c->x86_model <= 0xd)) ||
304 ((c->x86 == 0xf) && (c->x86_model <= 0x6)))) {
306 * PAT support with the lower four entries. Intel Pentium 2,
307 * 3, M, and 4 are affected by PAT errata, which makes the
308 * upper four entries unusable. To be on the safe side, we don't
316 * 000 0 WB : _PAGE_CACHE_MODE_WB
317 * 001 1 WC : _PAGE_CACHE_MODE_WC
318 * 010 2 UC-: _PAGE_CACHE_MODE_UC_MINUS
319 * 011 3 UC : _PAGE_CACHE_MODE_UC
322 * NOTE: When WT or WP is used, it is redirected to UC- per
323 * the default setup in __cachemode2pte_tbl[].
325 pat = PAT(0, WB) | PAT(1, WC) | PAT(2, UC_MINUS) | PAT(3, UC) |
326 PAT(4, WB) | PAT(5, WC) | PAT(6, UC_MINUS) | PAT(7, UC);
329 * Full PAT support. We put WT in slot 7 to improve
330 * robustness in the presence of errata that might cause
331 * the high PAT bit to be ignored. This way, a buggy slot 7
332 * access will hit slot 3, and slot 3 is UC, so at worst
333 * we lose performance without causing a correctness issue.
334 * Pentium 4 erratum N46 is an example for such an erratum,
335 * although we try not to use PAT at all on affected CPUs.
342 * 000 0 WB : _PAGE_CACHE_MODE_WB
343 * 001 1 WC : _PAGE_CACHE_MODE_WC
344 * 010 2 UC-: _PAGE_CACHE_MODE_UC_MINUS
345 * 011 3 UC : _PAGE_CACHE_MODE_UC
346 * 100 4 WB : Reserved
347 * 101 5 WC : Reserved
348 * 110 6 UC-: Reserved
349 * 111 7 WT : _PAGE_CACHE_MODE_WT
351 * The reserved slots are unused, but mapped to their
352 * corresponding types in the presence of PAT errata.
354 pat = PAT(0, WB) | PAT(1, WC) | PAT(2, UC_MINUS) | PAT(3, UC) |
355 PAT(4, WB) | PAT(5, WC) | PAT(6, UC_MINUS) | PAT(7, WT);
358 if (!boot_cpu_done) {
360 boot_cpu_done = true;
368 static DEFINE_SPINLOCK(memtype_lock); /* protects memtype accesses */
371 * Does intersection of PAT memory type and MTRR memory type and returns
372 * the resulting memory type as PAT understands it.
373 * (Type in pat and mtrr will not have same value)
374 * The intersection is based on "Effective Memory Type" tables in IA-32
377 static unsigned long pat_x_mtrr_type(u64 start, u64 end,
378 enum page_cache_mode req_type)
381 * Look for MTRR hint to get the effective type in case where PAT
384 if (req_type == _PAGE_CACHE_MODE_WB) {
385 u8 mtrr_type, uniform;
387 mtrr_type = mtrr_type_lookup(start, end, &uniform);
388 if (mtrr_type != MTRR_TYPE_WRBACK)
389 return _PAGE_CACHE_MODE_UC_MINUS;
391 return _PAGE_CACHE_MODE_WB;
397 struct pagerange_state {
398 unsigned long cur_pfn;
404 pagerange_is_ram_callback(unsigned long initial_pfn, unsigned long total_nr_pages, void *arg)
406 struct pagerange_state *state = arg;
408 state->not_ram |= initial_pfn > state->cur_pfn;
409 state->ram |= total_nr_pages > 0;
410 state->cur_pfn = initial_pfn + total_nr_pages;
412 return state->ram && state->not_ram;
415 static int pat_pagerange_is_ram(resource_size_t start, resource_size_t end)
418 unsigned long start_pfn = start >> PAGE_SHIFT;
419 unsigned long end_pfn = (end + PAGE_SIZE - 1) >> PAGE_SHIFT;
420 struct pagerange_state state = {start_pfn, 0, 0};
423 * For legacy reasons, physical address range in the legacy ISA
424 * region is tracked as non-RAM. This will allow users of
425 * /dev/mem to map portions of legacy ISA region, even when
426 * some of those portions are listed(or not even listed) with
427 * different e820 types(RAM/reserved/..)
429 if (start_pfn < ISA_END_ADDRESS >> PAGE_SHIFT)
430 start_pfn = ISA_END_ADDRESS >> PAGE_SHIFT;
432 if (start_pfn < end_pfn) {
433 ret = walk_system_ram_range(start_pfn, end_pfn - start_pfn,
434 &state, pagerange_is_ram_callback);
437 return (ret > 0) ? -1 : (state.ram ? 1 : 0);
441 * For RAM pages, we use page flags to mark the pages with appropriate type.
442 * The page flags are limited to four types, WB (default), WC, WT and UC-.
443 * WP request fails with -EINVAL, and UC gets redirected to UC-. Setting
444 * a new memory type is only allowed for a page mapped with the default WB
447 * Here we do two passes:
448 * - Find the memtype of all the pages in the range, look for any conflicts.
449 * - In case of no conflicts, set the new memtype for pages in the range.
451 static int reserve_ram_pages_type(u64 start, u64 end,
452 enum page_cache_mode req_type,
453 enum page_cache_mode *new_type)
458 if (req_type == _PAGE_CACHE_MODE_WP) {
460 *new_type = _PAGE_CACHE_MODE_UC_MINUS;
464 if (req_type == _PAGE_CACHE_MODE_UC) {
465 /* We do not support strong UC */
467 req_type = _PAGE_CACHE_MODE_UC_MINUS;
470 for (pfn = (start >> PAGE_SHIFT); pfn < (end >> PAGE_SHIFT); ++pfn) {
471 enum page_cache_mode type;
473 page = pfn_to_page(pfn);
474 type = get_page_memtype(page);
475 if (type != _PAGE_CACHE_MODE_WB) {
476 pr_info("x86/PAT: reserve_ram_pages_type failed [mem %#010Lx-%#010Lx], track 0x%x, req 0x%x\n",
477 start, end - 1, type, req_type);
486 *new_type = req_type;
488 for (pfn = (start >> PAGE_SHIFT); pfn < (end >> PAGE_SHIFT); ++pfn) {
489 page = pfn_to_page(pfn);
490 set_page_memtype(page, req_type);
495 static int free_ram_pages_type(u64 start, u64 end)
500 for (pfn = (start >> PAGE_SHIFT); pfn < (end >> PAGE_SHIFT); ++pfn) {
501 page = pfn_to_page(pfn);
502 set_page_memtype(page, _PAGE_CACHE_MODE_WB);
508 * req_type typically has one of the:
509 * - _PAGE_CACHE_MODE_WB
510 * - _PAGE_CACHE_MODE_WC
511 * - _PAGE_CACHE_MODE_UC_MINUS
512 * - _PAGE_CACHE_MODE_UC
513 * - _PAGE_CACHE_MODE_WT
515 * If new_type is NULL, function will return an error if it cannot reserve the
516 * region with req_type. If new_type is non-NULL, function will return
517 * available type in new_type in case of no error. In case of any error
518 * it will return a negative return value.
520 int reserve_memtype(u64 start, u64 end, enum page_cache_mode req_type,
521 enum page_cache_mode *new_type)
524 enum page_cache_mode actual_type;
528 BUG_ON(start >= end); /* end is exclusive */
530 if (!pat_enabled()) {
531 /* This is identical to page table setting without PAT */
533 *new_type = req_type;
537 /* Low ISA region is always mapped WB in page table. No need to track */
538 if (x86_platform.is_untracked_pat_range(start, end)) {
540 *new_type = _PAGE_CACHE_MODE_WB;
545 * Call mtrr_lookup to get the type hint. This is an
546 * optimization for /dev/mem mmap'ers into WB memory (BIOS
547 * tools and ACPI tools). Use WB request for WB memory and use
548 * UC_MINUS otherwise.
550 actual_type = pat_x_mtrr_type(start, end, req_type);
553 *new_type = actual_type;
555 is_range_ram = pat_pagerange_is_ram(start, end);
556 if (is_range_ram == 1) {
558 err = reserve_ram_pages_type(start, end, req_type, new_type);
561 } else if (is_range_ram < 0) {
565 new = kzalloc(sizeof(struct memtype), GFP_KERNEL);
571 new->type = actual_type;
573 spin_lock(&memtype_lock);
575 err = rbt_memtype_check_insert(new, new_type);
577 pr_info("x86/PAT: reserve_memtype failed [mem %#010Lx-%#010Lx], track %s, req %s\n",
579 cattr_name(new->type), cattr_name(req_type));
581 spin_unlock(&memtype_lock);
586 spin_unlock(&memtype_lock);
588 dprintk("reserve_memtype added [mem %#010Lx-%#010Lx], track %s, req %s, ret %s\n",
589 start, end - 1, cattr_name(new->type), cattr_name(req_type),
590 new_type ? cattr_name(*new_type) : "-");
595 int free_memtype(u64 start, u64 end)
599 struct memtype *entry;
604 /* Low ISA region is always mapped WB. No need to track */
605 if (x86_platform.is_untracked_pat_range(start, end))
608 is_range_ram = pat_pagerange_is_ram(start, end);
609 if (is_range_ram == 1) {
611 err = free_ram_pages_type(start, end);
614 } else if (is_range_ram < 0) {
618 spin_lock(&memtype_lock);
619 entry = rbt_memtype_erase(start, end);
620 spin_unlock(&memtype_lock);
623 pr_info("x86/PAT: %s:%d freeing invalid memtype [mem %#010Lx-%#010Lx]\n",
624 current->comm, current->pid, start, end - 1);
630 dprintk("free_memtype request [mem %#010Lx-%#010Lx]\n", start, end - 1);
637 * lookup_memtype - Looksup the memory type for a physical address
638 * @paddr: physical address of which memory type needs to be looked up
640 * Only to be called when PAT is enabled
642 * Returns _PAGE_CACHE_MODE_WB, _PAGE_CACHE_MODE_WC, _PAGE_CACHE_MODE_UC_MINUS
643 * or _PAGE_CACHE_MODE_WT.
645 static enum page_cache_mode lookup_memtype(u64 paddr)
647 enum page_cache_mode rettype = _PAGE_CACHE_MODE_WB;
648 struct memtype *entry;
650 if (x86_platform.is_untracked_pat_range(paddr, paddr + PAGE_SIZE))
653 if (pat_pagerange_is_ram(paddr, paddr + PAGE_SIZE)) {
656 page = pfn_to_page(paddr >> PAGE_SHIFT);
657 return get_page_memtype(page);
660 spin_lock(&memtype_lock);
662 entry = rbt_memtype_lookup(paddr);
664 rettype = entry->type;
666 rettype = _PAGE_CACHE_MODE_UC_MINUS;
668 spin_unlock(&memtype_lock);
673 * io_reserve_memtype - Request a memory type mapping for a region of memory
674 * @start: start (physical address) of the region
675 * @end: end (physical address) of the region
676 * @type: A pointer to memtype, with requested type. On success, requested
677 * or any other compatible type that was available for the region is returned
679 * On success, returns 0
680 * On failure, returns non-zero
682 int io_reserve_memtype(resource_size_t start, resource_size_t end,
683 enum page_cache_mode *type)
685 resource_size_t size = end - start;
686 enum page_cache_mode req_type = *type;
687 enum page_cache_mode new_type;
690 WARN_ON_ONCE(iomem_map_sanity_check(start, size));
692 ret = reserve_memtype(start, end, req_type, &new_type);
696 if (!is_new_memtype_allowed(start, size, req_type, new_type))
699 if (kernel_map_sync_memtype(start, size, new_type) < 0)
706 free_memtype(start, end);
713 * io_free_memtype - Release a memory type mapping for a region of memory
714 * @start: start (physical address) of the region
715 * @end: end (physical address) of the region
717 void io_free_memtype(resource_size_t start, resource_size_t end)
719 free_memtype(start, end);
722 pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn,
723 unsigned long size, pgprot_t vma_prot)
728 #ifdef CONFIG_STRICT_DEVMEM
729 /* This check is done in drivers/char/mem.c in case of STRICT_DEVMEM */
730 static inline int range_is_allowed(unsigned long pfn, unsigned long size)
735 /* This check is needed to avoid cache aliasing when PAT is enabled */
736 static inline int range_is_allowed(unsigned long pfn, unsigned long size)
738 u64 from = ((u64)pfn) << PAGE_SHIFT;
739 u64 to = from + size;
745 while (cursor < to) {
746 if (!devmem_is_allowed(pfn)) {
747 pr_info("x86/PAT: Program %s tried to access /dev/mem between [mem %#010Lx-%#010Lx], PAT prevents it\n",
748 current->comm, from, to - 1);
756 #endif /* CONFIG_STRICT_DEVMEM */
758 int phys_mem_access_prot_allowed(struct file *file, unsigned long pfn,
759 unsigned long size, pgprot_t *vma_prot)
761 enum page_cache_mode pcm = _PAGE_CACHE_MODE_WB;
763 if (!range_is_allowed(pfn, size))
766 if (file->f_flags & O_DSYNC)
767 pcm = _PAGE_CACHE_MODE_UC_MINUS;
771 * On the PPro and successors, the MTRRs are used to set
772 * memory types for physical addresses outside main memory,
773 * so blindly setting UC or PWT on those pages is wrong.
774 * For Pentiums and earlier, the surround logic should disable
775 * caching for the high addresses through the KEN pin, but
776 * we maintain the tradition of paranoia in this code.
778 if (!pat_enabled() &&
779 !(boot_cpu_has(X86_FEATURE_MTRR) ||
780 boot_cpu_has(X86_FEATURE_K6_MTRR) ||
781 boot_cpu_has(X86_FEATURE_CYRIX_ARR) ||
782 boot_cpu_has(X86_FEATURE_CENTAUR_MCR)) &&
783 (pfn << PAGE_SHIFT) >= __pa(high_memory)) {
784 pcm = _PAGE_CACHE_MODE_UC;
788 *vma_prot = __pgprot((pgprot_val(*vma_prot) & ~_PAGE_CACHE_MASK) |
789 cachemode2protval(pcm));
794 * Change the memory type for the physial address range in kernel identity
795 * mapping space if that range is a part of identity map.
797 int kernel_map_sync_memtype(u64 base, unsigned long size,
798 enum page_cache_mode pcm)
802 if (base > __pa(high_memory-1))
806 * some areas in the middle of the kernel identity range
807 * are not mapped, like the PCI space.
809 if (!page_is_ram(base >> PAGE_SHIFT))
812 id_sz = (__pa(high_memory-1) <= base + size) ?
813 __pa(high_memory) - base :
816 if (ioremap_change_attr((unsigned long)__va(base), id_sz, pcm) < 0) {
817 pr_info("x86/PAT: %s:%d ioremap_change_attr failed %s for [mem %#010Lx-%#010Lx]\n",
818 current->comm, current->pid,
820 base, (unsigned long long)(base + size-1));
827 * Internal interface to reserve a range of physical memory with prot.
828 * Reserved non RAM regions only and after successful reserve_memtype,
829 * this func also keeps identity mapping (if any) in sync with this new prot.
831 static int reserve_pfn_range(u64 paddr, unsigned long size, pgprot_t *vma_prot,
836 enum page_cache_mode want_pcm = pgprot2cachemode(*vma_prot);
837 enum page_cache_mode pcm = want_pcm;
839 is_ram = pat_pagerange_is_ram(paddr, paddr + size);
842 * reserve_pfn_range() for RAM pages. We do not refcount to keep
843 * track of number of mappings of RAM pages. We can assert that
844 * the type requested matches the type of first page in the range.
850 pcm = lookup_memtype(paddr);
851 if (want_pcm != pcm) {
852 pr_warn("x86/PAT: %s:%d map pfn RAM range req %s for [mem %#010Lx-%#010Lx], got %s\n",
853 current->comm, current->pid,
854 cattr_name(want_pcm),
855 (unsigned long long)paddr,
856 (unsigned long long)(paddr + size - 1),
858 *vma_prot = __pgprot((pgprot_val(*vma_prot) &
859 (~_PAGE_CACHE_MASK)) |
860 cachemode2protval(pcm));
865 ret = reserve_memtype(paddr, paddr + size, want_pcm, &pcm);
869 if (pcm != want_pcm) {
871 !is_new_memtype_allowed(paddr, size, want_pcm, pcm)) {
872 free_memtype(paddr, paddr + size);
873 pr_err("x86/PAT: %s:%d map pfn expected mapping type %s for [mem %#010Lx-%#010Lx], got %s\n",
874 current->comm, current->pid,
875 cattr_name(want_pcm),
876 (unsigned long long)paddr,
877 (unsigned long long)(paddr + size - 1),
882 * We allow returning different type than the one requested in
885 *vma_prot = __pgprot((pgprot_val(*vma_prot) &
886 (~_PAGE_CACHE_MASK)) |
887 cachemode2protval(pcm));
890 if (kernel_map_sync_memtype(paddr, size, pcm) < 0) {
891 free_memtype(paddr, paddr + size);
898 * Internal interface to free a range of physical memory.
899 * Frees non RAM regions only.
901 static void free_pfn_range(u64 paddr, unsigned long size)
905 is_ram = pat_pagerange_is_ram(paddr, paddr + size);
907 free_memtype(paddr, paddr + size);
911 * track_pfn_copy is called when vma that is covering the pfnmap gets
912 * copied through copy_page_range().
914 * If the vma has a linear pfn mapping for the entire range, we get the prot
915 * from pte and reserve the entire vma range with single reserve_pfn_range call.
917 int track_pfn_copy(struct vm_area_struct *vma)
919 resource_size_t paddr;
921 unsigned long vma_size = vma->vm_end - vma->vm_start;
924 if (vma->vm_flags & VM_PAT) {
926 * reserve the whole chunk covered by vma. We need the
927 * starting address and protection from pte.
929 if (follow_phys(vma, vma->vm_start, 0, &prot, &paddr)) {
933 pgprot = __pgprot(prot);
934 return reserve_pfn_range(paddr, vma_size, &pgprot, 1);
941 * prot is passed in as a parameter for the new mapping. If the vma has a
942 * linear pfn mapping for the entire range reserve the entire vma range with
943 * single reserve_pfn_range call.
945 int track_pfn_remap(struct vm_area_struct *vma, pgprot_t *prot,
946 unsigned long pfn, unsigned long addr, unsigned long size)
948 resource_size_t paddr = (resource_size_t)pfn << PAGE_SHIFT;
949 enum page_cache_mode pcm;
951 /* reserve the whole chunk starting from paddr */
952 if (addr == vma->vm_start && size == (vma->vm_end - vma->vm_start)) {
955 ret = reserve_pfn_range(paddr, size, prot, 0);
957 vma->vm_flags |= VM_PAT;
965 * For anything smaller than the vma size we set prot based on the
968 pcm = lookup_memtype(paddr);
970 /* Check memtype for the remaining pages */
971 while (size > PAGE_SIZE) {
974 if (pcm != lookup_memtype(paddr))
978 *prot = __pgprot((pgprot_val(vma->vm_page_prot) & (~_PAGE_CACHE_MASK)) |
979 cachemode2protval(pcm));
984 int track_pfn_insert(struct vm_area_struct *vma, pgprot_t *prot,
987 enum page_cache_mode pcm;
992 /* Set prot based on lookup */
993 pcm = lookup_memtype((resource_size_t)pfn << PAGE_SHIFT);
994 *prot = __pgprot((pgprot_val(vma->vm_page_prot) & (~_PAGE_CACHE_MASK)) |
995 cachemode2protval(pcm));
1001 * untrack_pfn is called while unmapping a pfnmap for a region.
1002 * untrack can be called for a specific region indicated by pfn and size or
1003 * can be for the entire vma (in which case pfn, size are zero).
1005 void untrack_pfn(struct vm_area_struct *vma, unsigned long pfn,
1008 resource_size_t paddr;
1011 if (!(vma->vm_flags & VM_PAT))
1014 /* free the chunk starting from pfn or the whole chunk */
1015 paddr = (resource_size_t)pfn << PAGE_SHIFT;
1016 if (!paddr && !size) {
1017 if (follow_phys(vma, vma->vm_start, 0, &prot, &paddr)) {
1022 size = vma->vm_end - vma->vm_start;
1024 free_pfn_range(paddr, size);
1025 vma->vm_flags &= ~VM_PAT;
1028 pgprot_t pgprot_writecombine(pgprot_t prot)
1030 return __pgprot(pgprot_val(prot) |
1031 cachemode2protval(_PAGE_CACHE_MODE_WC));
1033 EXPORT_SYMBOL_GPL(pgprot_writecombine);
1035 pgprot_t pgprot_writethrough(pgprot_t prot)
1037 return __pgprot(pgprot_val(prot) |
1038 cachemode2protval(_PAGE_CACHE_MODE_WT));
1040 EXPORT_SYMBOL_GPL(pgprot_writethrough);
1042 #if defined(CONFIG_DEBUG_FS) && defined(CONFIG_X86_PAT)
1044 static struct memtype *memtype_get_idx(loff_t pos)
1046 struct memtype *print_entry;
1049 print_entry = kzalloc(sizeof(struct memtype), GFP_KERNEL);
1053 spin_lock(&memtype_lock);
1054 ret = rbt_memtype_copy_nth_element(print_entry, pos);
1055 spin_unlock(&memtype_lock);
1065 static void *memtype_seq_start(struct seq_file *seq, loff_t *pos)
1069 seq_puts(seq, "PAT memtype list:\n");
1072 return memtype_get_idx(*pos);
1075 static void *memtype_seq_next(struct seq_file *seq, void *v, loff_t *pos)
1078 return memtype_get_idx(*pos);
1081 static void memtype_seq_stop(struct seq_file *seq, void *v)
1085 static int memtype_seq_show(struct seq_file *seq, void *v)
1087 struct memtype *print_entry = (struct memtype *)v;
1089 seq_printf(seq, "%s @ 0x%Lx-0x%Lx\n", cattr_name(print_entry->type),
1090 print_entry->start, print_entry->end);
1096 static const struct seq_operations memtype_seq_ops = {
1097 .start = memtype_seq_start,
1098 .next = memtype_seq_next,
1099 .stop = memtype_seq_stop,
1100 .show = memtype_seq_show,
1103 static int memtype_seq_open(struct inode *inode, struct file *file)
1105 return seq_open(file, &memtype_seq_ops);
1108 static const struct file_operations memtype_fops = {
1109 .open = memtype_seq_open,
1111 .llseek = seq_lseek,
1112 .release = seq_release,
1115 static int __init pat_memtype_list_init(void)
1117 if (pat_enabled()) {
1118 debugfs_create_file("pat_memtype_list", S_IRUSR,
1119 arch_debugfs_dir, NULL, &memtype_fops);
1124 late_initcall(pat_memtype_list_init);
1126 #endif /* CONFIG_DEBUG_FS && CONFIG_X86_PAT */