2 * Copyright 2002 Andi Kleen, SuSE Labs.
3 * Thanks to Ben LaHaise for precious feedback.
5 #include <linux/highmem.h>
6 #include <linux/bootmem.h>
7 #include <linux/module.h>
8 #include <linux/sched.h>
9 #include <linux/slab.h>
13 #include <asm/processor.h>
14 #include <asm/tlbflush.h>
15 #include <asm/sections.h>
16 #include <asm/uaccess.h>
17 #include <asm/pgalloc.h>
20 within(unsigned long addr, unsigned long start, unsigned long end)
22 return addr >= start && addr < end;
30 * clflush_cache_range - flush a cache range with clflush
31 * @addr: virtual start address
32 * @size: number of bytes to flush
34 * clflush is an unordered instruction which needs fencing with mfence
35 * to avoid ordering issues.
37 void clflush_cache_range(void *vaddr, unsigned int size)
39 void *vend = vaddr + size - 1;
43 for (; vaddr < vend; vaddr += boot_cpu_data.x86_clflush_size)
46 * Flush any possible final partial cacheline:
53 static void __cpa_flush_all(void *arg)
56 * Flush all to work around Errata in early athlons regarding
57 * large page flushing.
61 if (boot_cpu_data.x86_model >= 4)
65 static void cpa_flush_all(void)
67 BUG_ON(irqs_disabled());
69 on_each_cpu(__cpa_flush_all, NULL, 1, 1);
72 static void __cpa_flush_range(void *arg)
75 * We could optimize that further and do individual per page
76 * tlb invalidates for a low number of pages. Caveat: we must
77 * flush the high aliases on 64bit as well.
82 static void cpa_flush_range(unsigned long start, int numpages)
84 unsigned int i, level;
87 BUG_ON(irqs_disabled());
88 WARN_ON(PAGE_ALIGN(start) != start);
90 on_each_cpu(__cpa_flush_range, NULL, 1, 1);
93 * We only need to flush on one CPU,
94 * clflush is a MESI-coherent instruction that
95 * will cause all other CPUs to flush the same
98 for (i = 0, addr = start; i < numpages; i++, addr += PAGE_SIZE) {
99 pte_t *pte = lookup_address(addr, &level);
102 * Only flush present addresses:
104 if (pte && pte_present(*pte))
105 clflush_cache_range((void *) addr, PAGE_SIZE);
110 * Certain areas of memory on x86 require very specific protection flags,
111 * for example the BIOS area or kernel text. Callers don't always get this
112 * right (again, ioremap() on BIOS memory is not uncommon) so this function
113 * checks and fixes these known static required protection bits.
115 static inline pgprot_t static_protections(pgprot_t prot, unsigned long address)
117 pgprot_t forbidden = __pgprot(0);
120 * The BIOS area between 640k and 1Mb needs to be executable for
121 * PCI BIOS based config access (CONFIG_PCI_GOBIOS) support.
123 if (within(__pa(address), BIOS_BEGIN, BIOS_END))
124 pgprot_val(forbidden) |= _PAGE_NX;
127 * The kernel text needs to be executable for obvious reasons
128 * Does not cover __inittext since that is gone later on
130 if (within(address, (unsigned long)_text, (unsigned long)_etext))
131 pgprot_val(forbidden) |= _PAGE_NX;
133 #ifdef CONFIG_DEBUG_RODATA
134 /* The .rodata section needs to be read-only */
135 if (within(address, (unsigned long)__start_rodata,
136 (unsigned long)__end_rodata))
137 pgprot_val(forbidden) |= _PAGE_RW;
140 prot = __pgprot(pgprot_val(prot) & ~pgprot_val(forbidden));
145 pte_t *lookup_address(unsigned long address, int *level)
147 pgd_t *pgd = pgd_offset_k(address);
151 *level = PG_LEVEL_NONE;
155 pud = pud_offset(pgd, address);
158 pmd = pmd_offset(pud, address);
162 *level = PG_LEVEL_2M;
166 *level = PG_LEVEL_4K;
167 return pte_offset_kernel(pmd, address);
170 static void __set_pmd_pte(pte_t *kpte, unsigned long address, pte_t pte)
173 set_pte_atomic(kpte, pte);
175 if (!SHARED_KERNEL_PMD) {
178 for (page = pgd_list; page; page = (struct page *)page->index) {
183 pgd = (pgd_t *)page_address(page) + pgd_index(address);
184 pud = pud_offset(pgd, address);
185 pmd = pmd_offset(pud, address);
186 set_pte_atomic((pte_t *)pmd, pte);
192 static int split_large_page(pte_t *kpte, unsigned long address)
194 pgprot_t ref_prot = pte_pgprot(pte_clrhuge(*kpte));
195 gfp_t gfp_flags = GFP_KERNEL;
200 unsigned int i, level;
202 #ifdef CONFIG_DEBUG_PAGEALLOC
203 gfp_flags = __GFP_HIGH | __GFP_NOFAIL | __GFP_NOWARN;
204 gfp_flags = GFP_ATOMIC | __GFP_NOWARN;
206 base = alloc_pages(gfp_flags, 0);
210 spin_lock_irqsave(&pgd_lock, flags);
212 * Check for races, another CPU might have split this page
215 tmp = lookup_address(address, &level);
221 address = __pa(address);
222 addr = address & LARGE_PAGE_MASK;
223 pbase = (pte_t *)page_address(base);
225 paravirt_alloc_pt(&init_mm, page_to_pfn(base));
228 pgprot_val(ref_prot) &= ~_PAGE_NX;
229 for (i = 0; i < PTRS_PER_PTE; i++, addr += PAGE_SIZE)
230 set_pte(&pbase[i], pfn_pte(addr >> PAGE_SHIFT, ref_prot));
233 * Install the new, split up pagetable. Important detail here:
235 * On Intel the NX bit of all levels must be cleared to make a
236 * page executable. See section 4.13.2 of Intel 64 and IA-32
237 * Architectures Software Developer's Manual).
239 ref_prot = pte_pgprot(pte_mkexec(pte_clrhuge(*kpte)));
240 __set_pmd_pte(kpte, address, mk_pte(base, ref_prot));
244 spin_unlock_irqrestore(&pgd_lock, flags);
247 __free_pages(base, 0);
253 __change_page_attr(unsigned long address, unsigned long pfn,
254 pgprot_t mask_set, pgprot_t mask_clr)
256 struct page *kpte_page;
261 BUG_ON(pfn > max_low_pfn);
265 kpte = lookup_address(address, &level);
269 kpte_page = virt_to_page(kpte);
270 BUG_ON(PageLRU(kpte_page));
271 BUG_ON(PageCompound(kpte_page));
273 if (level == PG_LEVEL_4K) {
274 pgprot_t new_prot = pte_pgprot(*kpte);
275 pte_t new_pte, old_pte = *kpte;
277 pgprot_val(new_prot) &= ~pgprot_val(mask_clr);
278 pgprot_val(new_prot) |= pgprot_val(mask_set);
280 new_prot = static_protections(new_prot, address);
282 new_pte = pfn_pte(pfn, canon_pgprot(new_prot));
283 BUG_ON(pte_pfn(new_pte) != pte_pfn(old_pte));
285 set_pte_atomic(kpte, new_pte);
287 err = split_large_page(kpte, address);
295 * change_page_attr_addr - Change page table attributes in linear mapping
296 * @address: Virtual address in linear mapping.
297 * @prot: New page table attribute (PAGE_*)
299 * Change page attributes of a page in the direct mapping. This is a variant
300 * of change_page_attr() that also works on memory holes that do not have
301 * mem_map entry (pfn_valid() is false).
303 * See change_page_attr() documentation for more details.
305 * Modules and drivers should use the set_memory_* APIs instead.
309 change_page_attr_addr(unsigned long address, pgprot_t mask_set,
312 int err = 0, kernel_map = 0;
316 if (address >= __START_KERNEL_map &&
317 address < __START_KERNEL_map + KERNEL_TEXT_SIZE) {
319 address = (unsigned long)__va(__pa((void *)address));
324 pfn = __pa(address) >> PAGE_SHIFT;
326 if (!kernel_map || 1) {
327 err = __change_page_attr(address, pfn, mask_set, mask_clr);
334 * Handle kernel mapping too which aliases part of
337 if (__pa(address) < KERNEL_TEXT_SIZE) {
340 addr2 = __pa(address) + __START_KERNEL_map - phys_base;
341 /* Make sure the kernel mappings stay executable */
342 pgprot_val(mask_clr) |= _PAGE_NX;
344 * Our high aliases are imprecise, so do not propagate
345 * failures back to users:
347 __change_page_attr(addr2, pfn, mask_set, mask_clr);
354 static int __change_page_attr_set_clr(unsigned long addr, int numpages,
355 pgprot_t mask_set, pgprot_t mask_clr)
360 for (i = 0; i < numpages ; i++, addr += PAGE_SIZE) {
361 ret = change_page_attr_addr(addr, mask_set, mask_clr);
369 static int change_page_attr_set_clr(unsigned long addr, int numpages,
370 pgprot_t mask_set, pgprot_t mask_clr)
372 int ret = __change_page_attr_set_clr(addr, numpages, mask_set,
376 * On success we use clflush, when the CPU supports it to
377 * avoid the wbindv. If the CPU does not support it and in the
378 * error case we fall back to cpa_flush_all (which uses
381 if (!ret && cpu_has_clflush)
382 cpa_flush_range(addr, numpages);
389 static inline int change_page_attr_set(unsigned long addr, int numpages,
392 return change_page_attr_set_clr(addr, numpages, mask, __pgprot(0));
395 static inline int change_page_attr_clear(unsigned long addr, int numpages,
398 return __change_page_attr_set_clr(addr, numpages, __pgprot(0), mask);
402 int set_memory_uc(unsigned long addr, int numpages)
404 return change_page_attr_set(addr, numpages,
405 __pgprot(_PAGE_PCD | _PAGE_PWT));
407 EXPORT_SYMBOL(set_memory_uc);
409 int set_memory_wb(unsigned long addr, int numpages)
411 return change_page_attr_clear(addr, numpages,
412 __pgprot(_PAGE_PCD | _PAGE_PWT));
414 EXPORT_SYMBOL(set_memory_wb);
416 int set_memory_x(unsigned long addr, int numpages)
418 return change_page_attr_clear(addr, numpages, __pgprot(_PAGE_NX));
420 EXPORT_SYMBOL(set_memory_x);
422 int set_memory_nx(unsigned long addr, int numpages)
424 return change_page_attr_set(addr, numpages, __pgprot(_PAGE_NX));
426 EXPORT_SYMBOL(set_memory_nx);
428 int set_memory_ro(unsigned long addr, int numpages)
430 return change_page_attr_clear(addr, numpages, __pgprot(_PAGE_RW));
433 int set_memory_rw(unsigned long addr, int numpages)
435 return change_page_attr_set(addr, numpages, __pgprot(_PAGE_RW));
438 int set_memory_np(unsigned long addr, int numpages)
440 return change_page_attr_clear(addr, numpages, __pgprot(_PAGE_PRESENT));
443 int set_pages_uc(struct page *page, int numpages)
445 unsigned long addr = (unsigned long)page_address(page);
447 return set_memory_uc(addr, numpages);
449 EXPORT_SYMBOL(set_pages_uc);
451 int set_pages_wb(struct page *page, int numpages)
453 unsigned long addr = (unsigned long)page_address(page);
455 return set_memory_wb(addr, numpages);
457 EXPORT_SYMBOL(set_pages_wb);
459 int set_pages_x(struct page *page, int numpages)
461 unsigned long addr = (unsigned long)page_address(page);
463 return set_memory_x(addr, numpages);
465 EXPORT_SYMBOL(set_pages_x);
467 int set_pages_nx(struct page *page, int numpages)
469 unsigned long addr = (unsigned long)page_address(page);
471 return set_memory_nx(addr, numpages);
473 EXPORT_SYMBOL(set_pages_nx);
475 int set_pages_ro(struct page *page, int numpages)
477 unsigned long addr = (unsigned long)page_address(page);
479 return set_memory_ro(addr, numpages);
482 int set_pages_rw(struct page *page, int numpages)
484 unsigned long addr = (unsigned long)page_address(page);
486 return set_memory_rw(addr, numpages);
490 #if defined(CONFIG_DEBUG_PAGEALLOC) || defined(CONFIG_CPA_DEBUG)
491 static inline int __change_page_attr_set(unsigned long addr, int numpages,
494 return __change_page_attr_set_clr(addr, numpages, mask, __pgprot(0));
497 static inline int __change_page_attr_clear(unsigned long addr, int numpages,
500 return __change_page_attr_set_clr(addr, numpages, __pgprot(0), mask);
504 #ifdef CONFIG_DEBUG_PAGEALLOC
506 static int __set_pages_p(struct page *page, int numpages)
508 unsigned long addr = (unsigned long)page_address(page);
510 return __change_page_attr_set(addr, numpages,
511 __pgprot(_PAGE_PRESENT | _PAGE_RW));
514 static int __set_pages_np(struct page *page, int numpages)
516 unsigned long addr = (unsigned long)page_address(page);
518 return __change_page_attr_clear(addr, numpages,
519 __pgprot(_PAGE_PRESENT));
522 void kernel_map_pages(struct page *page, int numpages, int enable)
524 if (PageHighMem(page))
527 debug_check_no_locks_freed(page_address(page),
528 numpages * PAGE_SIZE);
532 * If page allocator is not up yet then do not call c_p_a():
534 if (!debug_pagealloc_enabled)
538 * The return value is ignored - the calls cannot fail,
539 * large pages are disabled at boot time:
542 __set_pages_p(page, numpages);
544 __set_pages_np(page, numpages);
547 * We should perform an IPI and flush all tlbs,
548 * but that can deadlock->flush only current cpu:
555 * The testcases use internal knowledge of the implementation that shouldn't
556 * be exposed to the rest of the kernel. Include these directly here.
558 #ifdef CONFIG_CPA_DEBUG
559 #include "pageattr-test.c"