arch/x86/kvm/x86.c

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * derived from drivers/kvm/kvm_main.c
   5  *
   6  * Copyright (C) 2006 Qumranet, Inc.
   7  * Copyright (C) 2008 Qumranet, Inc.
   8  * Copyright IBM Corporation, 2008
   9  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  10  *
  11  * Authors:
  12  *   Avi Kivity   <avi@qumranet.com>
  13  *   Yaniv Kamay  <yaniv@qumranet.com>
  14  *   Amit Shah    <amit.shah@qumranet.com>
  15  *   Ben-Ami Yassour <benami@il.ibm.com>
  16  *
  17  * This work is licensed under the terms of the GNU GPL, version 2.  See
  18  * the COPYING file in the top-level directory.
  19  *
  20  */
  21
  22 #include <linux/kvm_host.h>
  23 #include "irq.h"
  24 #include "mmu.h"
  25 #include "i8254.h"
  26 #include "tss.h"
  27 #include "kvm_cache_regs.h"
  28 #include "x86.h"
  29 #include "cpuid.h"
  30
  31 #include <linux/clocksource.h>
  32 #include <linux/interrupt.h>
  33 #include <linux/kvm.h>
  34 #include <linux/fs.h>
  35 #include <linux/vmalloc.h>
  36 #include <linux/module.h>
  37 #include <linux/mman.h>
  38 #include <linux/highmem.h>
  39 #include <linux/iommu.h>
  40 #include <linux/intel-iommu.h>
  41 #include <linux/cpufreq.h>
  42 #include <linux/user-return-notifier.h>
  43 #include <linux/srcu.h>
  44 #include <linux/slab.h>
  45 #include <linux/perf_event.h>
  46 #include <linux/uaccess.h>
  47 #include <linux/hash.h>
  48 #include <linux/pci.h>
  49 #include <linux/timekeeper_internal.h>
  50 #include <linux/pvclock_gtod.h>
  51 #include <trace/events/kvm.h>
  52
  53 #define CREATE_TRACE_POINTS
  54 #include "trace.h"
  55
  56 #include <asm/debugreg.h>
  57 #include <asm/msr.h>
  58 #include <asm/desc.h>
  59 #include <asm/mtrr.h>
  60 #include <asm/mce.h>
  61 #include <asm/i387.h>
  62 #include <asm/fpu-internal.h> /* Ugh! */
  63 #include <asm/xcr.h>
  64 #include <asm/pvclock.h>
  65 #include <asm/div64.h>
  66
  67 #define MAX_IO_MSRS 256
  68 #define KVM_MAX_MCE_BANKS 32
  69 #define KVM_MCE_CAP_SUPPORTED (MCG_CTL_P | MCG_SER_P)
  70
  71 #define emul_to_vcpu(ctxt) \
  72         container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
  73
  74 /* EFER defaults:
  75  * - enable syscall per default because its emulated by KVM
  76  * - enable LME and LMA per default on 64 bit KVM
  77  */
  78 #ifdef CONFIG_X86_64
  79 static
  80 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
  81 #else
  82 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
  83 #endif
  84
  85 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
  86 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
  87
  88 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
  89 static void process_nmi(struct kvm_vcpu *vcpu);
  90
  91 struct kvm_x86_ops *kvm_x86_ops;
  92 EXPORT_SYMBOL_GPL(kvm_x86_ops);
  93
  94 static bool ignore_msrs = 0;
  95 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
  96
  97 bool kvm_has_tsc_control;
  98 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
  99 u32  kvm_max_guest_tsc_khz;
 100 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
 101
 102 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
 103 static u32 tsc_tolerance_ppm = 250;
 104 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
 105
 106 #define KVM_NR_SHARED_MSRS 16
 107
 108 struct kvm_shared_msrs_global {
 109         int nr;
 110         u32 msrs[KVM_NR_SHARED_MSRS];
 111 };
 112
 113 struct kvm_shared_msrs {
 114         struct user_return_notifier urn;
 115         bool registered;
 116         struct kvm_shared_msr_values {
 117                 u64 host;
 118                 u64 curr;
 119         } values[KVM_NR_SHARED_MSRS];
 120 };
 121
 122 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
 123 static struct kvm_shared_msrs __percpu *shared_msrs;
 124
 125 struct kvm_stats_debugfs_item debugfs_entries[] = {
 126         { "pf_fixed", VCPU_STAT(pf_fixed) },
 127         { "pf_guest", VCPU_STAT(pf_guest) },
 128         { "tlb_flush", VCPU_STAT(tlb_flush) },
 129         { "invlpg", VCPU_STAT(invlpg) },
 130         { "exits", VCPU_STAT(exits) },
 131         { "io_exits", VCPU_STAT(io_exits) },
 132         { "mmio_exits", VCPU_STAT(mmio_exits) },
 133         { "signal_exits", VCPU_STAT(signal_exits) },
 134         { "irq_window", VCPU_STAT(irq_window_exits) },
 135         { "nmi_window", VCPU_STAT(nmi_window_exits) },
 136         { "halt_exits", VCPU_STAT(halt_exits) },
 137         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
 138         { "hypercalls", VCPU_STAT(hypercalls) },
 139         { "request_irq", VCPU_STAT(request_irq_exits) },
 140         { "irq_exits", VCPU_STAT(irq_exits) },
 141         { "host_state_reload", VCPU_STAT(host_state_reload) },
 142         { "efer_reload", VCPU_STAT(efer_reload) },
 143         { "fpu_reload", VCPU_STAT(fpu_reload) },
 144         { "insn_emulation", VCPU_STAT(insn_emulation) },
 145         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
 146         { "irq_injections", VCPU_STAT(irq_injections) },
 147         { "nmi_injections", VCPU_STAT(nmi_injections) },
 148         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
 149         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
 150         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
 151         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
 152         { "mmu_flooded", VM_STAT(mmu_flooded) },
 153         { "mmu_recycled", VM_STAT(mmu_recycled) },
 154         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
 155         { "mmu_unsync", VM_STAT(mmu_unsync) },
 156         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
 157         { "largepages", VM_STAT(lpages) },
 158         { NULL }
 159 };
 160
 161 u64 __read_mostly host_xcr0;
 162
 163 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
 164
 165 static int kvm_vcpu_reset(struct kvm_vcpu *vcpu);
 166
 167 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 168 {
 169         int i;
 170         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU); i++)
 171                 vcpu->arch.apf.gfns[i] = ~0;
 172 }
 173
 174 static void kvm_on_user_return(struct user_return_notifier *urn)
 175 {
 176         unsigned slot;
 177         struct kvm_shared_msrs *locals
 178                 = container_of(urn, struct kvm_shared_msrs, urn);
 179         struct kvm_shared_msr_values *values;
 180
 181         for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
 182                 values = &locals->values[slot];
 183                 if (values->host != values->curr) {
 184                         wrmsrl(shared_msrs_global.msrs[slot], values->host);
 185                         values->curr = values->host;
 186                 }
 187         }
 188         locals->registered = false;
 189         user_return_notifier_unregister(urn);
 190 }
 191
 192 static void shared_msr_update(unsigned slot, u32 msr)
 193 {
 194         u64 value;
 195         unsigned int cpu = smp_processor_id();
 196         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 197
 198         /* only read, and nobody should modify it at this time,
 199          * so don't need lock */
 200         if (slot >= shared_msrs_global.nr) {
 201                 printk(KERN_ERR "kvm: invalid MSR slot!");
 202                 return;
 203         }
 204         rdmsrl_safe(msr, &value);
 205         smsr->values[slot].host = value;
 206         smsr->values[slot].curr = value;
 207 }
 208
 209 void kvm_define_shared_msr(unsigned slot, u32 msr)
 210 {
 211         if (slot >= shared_msrs_global.nr)
 212                 shared_msrs_global.nr = slot + 1;
 213         shared_msrs_global.msrs[slot] = msr;
 214         /* we need ensured the shared_msr_global have been updated */
 215         smp_wmb();
 216 }
 217 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
 218
 219 static void kvm_shared_msr_cpu_online(void)
 220 {
 221         unsigned i;
 222
 223         for (i = 0; i < shared_msrs_global.nr; ++i)
 224                 shared_msr_update(i, shared_msrs_global.msrs[i]);
 225 }
 226
 227 void kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
 228 {
 229         unsigned int cpu = smp_processor_id();
 230         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 231
 232         if (((value ^ smsr->values[slot].curr) & mask) == 0)
 233                 return;
 234         smsr->values[slot].curr = value;
 235         wrmsrl(shared_msrs_global.msrs[slot], value);
 236         if (!smsr->registered) {
 237                 smsr->urn.on_user_return = kvm_on_user_return;
 238                 user_return_notifier_register(&smsr->urn);
 239                 smsr->registered = true;
 240         }
 241 }
 242 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
 243
 244 static void drop_user_return_notifiers(void *ignore)
 245 {
 246         unsigned int cpu = smp_processor_id();
 247         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 248
 249         if (smsr->registered)
 250                 kvm_on_user_return(&smsr->urn);
 251 }
 252
 253 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 254 {
 255         return vcpu->arch.apic_base;
 256 }
 257 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 258
 259 void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
 260 {
 261         /* TODO: reserve bits check */
 262         kvm_lapic_set_base(vcpu, data);
 263 }
 264 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 265
 266 #define EXCPT_BENIGN            0
 267 #define EXCPT_CONTRIBUTORY      1
 268 #define EXCPT_PF                2
 269
 270 static int exception_class(int vector)
 271 {
 272         switch (vector) {
 273         case PF_VECTOR:
 274                 return EXCPT_PF;
 275         case DE_VECTOR:
 276         case TS_VECTOR:
 277         case NP_VECTOR:
 278         case SS_VECTOR:
 279         case GP_VECTOR:
 280                 return EXCPT_CONTRIBUTORY;
 281         default:
 282                 break;
 283         }
 284         return EXCPT_BENIGN;
 285 }
 286
 287 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 288                 unsigned nr, bool has_error, u32 error_code,
 289                 bool reinject)
 290 {
 291         u32 prev_nr;
 292         int class1, class2;
 293
 294         kvm_make_request(KVM_REQ_EVENT, vcpu);
 295
 296         if (!vcpu->arch.exception.pending) {
 297         queue:
 298                 vcpu->arch.exception.pending = true;
 299                 vcpu->arch.exception.has_error_code = has_error;
 300                 vcpu->arch.exception.nr = nr;
 301                 vcpu->arch.exception.error_code = error_code;
 302                 vcpu->arch.exception.reinject = reinject;
 303                 return;
 304         }
 305
 306         /* to check exception */
 307         prev_nr = vcpu->arch.exception.nr;
 308         if (prev_nr == DF_VECTOR) {
 309                 /* triple fault -> shutdown */
 310                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 311                 return;
 312         }
 313         class1 = exception_class(prev_nr);
 314         class2 = exception_class(nr);
 315         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 316                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 317                 /* generate double fault per SDM Table 5-5 */
 318                 vcpu->arch.exception.pending = true;
 319                 vcpu->arch.exception.has_error_code = true;
 320                 vcpu->arch.exception.nr = DF_VECTOR;
 321                 vcpu->arch.exception.error_code = 0;
 322         } else
 323                 /* replace previous exception with a new one in a hope
 324                    that instruction re-execution will regenerate lost
 325                    exception */
 326                 goto queue;
 327 }
 328
 329 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 330 {
 331         kvm_multiple_exception(vcpu, nr, false, 0, false);
 332 }
 333 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 334
 335 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 336 {
 337         kvm_multiple_exception(vcpu, nr, false, 0, true);
 338 }
 339 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 340
 341 void kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 342 {
 343         if (err)
 344                 kvm_inject_gp(vcpu, 0);
 345         else
 346                 kvm_x86_ops->skip_emulated_instruction(vcpu);
 347 }
 348 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 349
 350 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 351 {
 352         ++vcpu->stat.pf_guest;
 353         vcpu->arch.cr2 = fault->address;
 354         kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 355 }
 356 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
 357
 358 void kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 359 {
 360         if (mmu_is_nested(vcpu) && !fault->nested_page_fault)
 361                 vcpu->arch.nested_mmu.inject_page_fault(vcpu, fault);
 362         else
 363                 vcpu->arch.mmu.inject_page_fault(vcpu, fault);
 364 }
 365
 366 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 367 {
 368         atomic_inc(&vcpu->arch.nmi_queued);
 369         kvm_make_request(KVM_REQ_NMI, vcpu);
 370 }
 371 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 372
 373 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 374 {
 375         kvm_multiple_exception(vcpu, nr, true, error_code, false);
 376 }
 377 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 378
 379 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 380 {
 381         kvm_multiple_exception(vcpu, nr, true, error_code, true);
 382 }
 383 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 384
 385 /*
 386  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 387  * a #GP and return false.
 388  */
 389 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 390 {
 391         if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
 392                 return true;
 393         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 394         return false;
 395 }
 396 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 397
 398 /*
 399  * This function will be used to read from the physical memory of the currently
 400  * running guest. The difference to kvm_read_guest_page is that this function
 401  * can read from guest physical or from the guest's guest physical memory.
 402  */
 403 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 404                             gfn_t ngfn, void *data, int offset, int len,
 405                             u32 access)
 406 {
 407         gfn_t real_gfn;
 408         gpa_t ngpa;
 409
 410         ngpa     = gfn_to_gpa(ngfn);
 411         real_gfn = mmu->translate_gpa(vcpu, ngpa, access);
 412         if (real_gfn == UNMAPPED_GVA)
 413                 return -EFAULT;
 414
 415         real_gfn = gpa_to_gfn(real_gfn);
 416
 417         return kvm_read_guest_page(vcpu->kvm, real_gfn, data, offset, len);
 418 }
 419 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 420
 421 int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
 422                                void *data, int offset, int len, u32 access)
 423 {
 424         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
 425                                        data, offset, len, access);
 426 }
 427
 428 /*
 429  * Load the pae pdptrs.  Return true is they are all valid.
 430  */
 431 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 432 {
 433         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 434         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 435         int i;
 436         int ret;
 437         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 438
 439         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 440                                       offset * sizeof(u64), sizeof(pdpte),
 441                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 442         if (ret < 0) {
 443                 ret = 0;
 444                 goto out;
 445         }
 446         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 447                 if (is_present_gpte(pdpte[i]) &&
 448                     (pdpte[i] & vcpu->arch.mmu.rsvd_bits_mask[0][2])) {
 449                         ret = 0;
 450                         goto out;
 451                 }
 452         }
 453         ret = 1;
 454
 455         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 456         __set_bit(VCPU_EXREG_PDPTR,
 457                   (unsigned long *)&vcpu->arch.regs_avail);
 458         __set_bit(VCPU_EXREG_PDPTR,
 459                   (unsigned long *)&vcpu->arch.regs_dirty);
 460 out:
 461
 462         return ret;
 463 }
 464 EXPORT_SYMBOL_GPL(load_pdptrs);
 465
 466 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
 467 {
 468         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
 469         bool changed = true;
 470         int offset;
 471         gfn_t gfn;
 472         int r;
 473
 474         if (is_long_mode(vcpu) || !is_pae(vcpu))
 475                 return false;
 476
 477         if (!test_bit(VCPU_EXREG_PDPTR,
 478                       (unsigned long *)&vcpu->arch.regs_avail))
 479                 return true;
 480
 481         gfn = (kvm_read_cr3(vcpu) & ~31u) >> PAGE_SHIFT;
 482         offset = (kvm_read_cr3(vcpu) & ~31u) & (PAGE_SIZE - 1);
 483         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
 484                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
 485         if (r < 0)
 486                 goto out;
 487         changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
 488 out:
 489
 490         return changed;
 491 }
 492
 493 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 494 {
 495         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 496         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP |
 497                                     X86_CR0_CD | X86_CR0_NW;
 498
 499         cr0 |= X86_CR0_ET;
 500
 501 #ifdef CONFIG_X86_64
 502         if (cr0 & 0xffffffff00000000UL)
 503                 return 1;
 504 #endif
 505
 506         cr0 &= ~CR0_RESERVED_BITS;
 507
 508         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 509                 return 1;
 510
 511         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 512                 return 1;
 513
 514         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
 515 #ifdef CONFIG_X86_64
 516                 if ((vcpu->arch.efer & EFER_LME)) {
 517                         int cs_db, cs_l;
 518
 519                         if (!is_pae(vcpu))
 520                                 return 1;
 521                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
 522                         if (cs_l)
 523                                 return 1;
 524                 } else
 525 #endif
 526                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 527                                                  kvm_read_cr3(vcpu)))
 528                         return 1;
 529         }
 530
 531         if (!(cr0 & X86_CR0_PG) && kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
 532                 return 1;
 533
 534         kvm_x86_ops->set_cr0(vcpu, cr0);
 535
 536         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 537                 kvm_clear_async_pf_completion_queue(vcpu);
 538                 kvm_async_pf_hash_reset(vcpu);
 539         }
 540
 541         if ((cr0 ^ old_cr0) & update_bits)
 542                 kvm_mmu_reset_context(vcpu);
 543         return 0;
 544 }
 545 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 546
 547 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 548 {
 549         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 550 }
 551 EXPORT_SYMBOL_GPL(kvm_lmsw);
 552
 553 int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 554 {
 555         u64 xcr0;
 556
 557         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 558         if (index != XCR_XFEATURE_ENABLED_MASK)
 559                 return 1;
 560         xcr0 = xcr;
 561         if (kvm_x86_ops->get_cpl(vcpu) != 0)
 562                 return 1;
 563         if (!(xcr0 & XSTATE_FP))
 564                 return 1;
 565         if ((xcr0 & XSTATE_YMM) && !(xcr0 & XSTATE_SSE))
 566                 return 1;
 567         if (xcr0 & ~host_xcr0)
 568                 return 1;
 569         vcpu->arch.xcr0 = xcr0;
 570         vcpu->guest_xcr0_loaded = 0;
 571         return 0;
 572 }
 573
 574 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 575 {
 576         if (__kvm_set_xcr(vcpu, index, xcr)) {
 577                 kvm_inject_gp(vcpu, 0);
 578                 return 1;
 579         }
 580         return 0;
 581 }
 582 EXPORT_SYMBOL_GPL(kvm_set_xcr);
 583
 584 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 585 {
 586         unsigned long old_cr4 = kvm_read_cr4(vcpu);
 587         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE |
 588                                    X86_CR4_PAE | X86_CR4_SMEP;
 589         if (cr4 & CR4_RESERVED_BITS)
 590                 return 1;
 591
 592         if (!guest_cpuid_has_xsave(vcpu) && (cr4 & X86_CR4_OSXSAVE))
 593                 return 1;
 594
 595         if (!guest_cpuid_has_smep(vcpu) && (cr4 & X86_CR4_SMEP))
 596                 return 1;
 597
 598         if (!guest_cpuid_has_fsgsbase(vcpu) && (cr4 & X86_CR4_RDWRGSFS))
 599                 return 1;
 600
 601         if (is_long_mode(vcpu)) {
 602                 if (!(cr4 & X86_CR4_PAE))
 603                         return 1;
 604         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
 605                    && ((cr4 ^ old_cr4) & pdptr_bits)
 606                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 607                                    kvm_read_cr3(vcpu)))
 608                 return 1;
 609
 610         if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
 611                 if (!guest_cpuid_has_pcid(vcpu))
 612                         return 1;
 613
 614                 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
 615                 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_MASK) || !is_long_mode(vcpu))
 616                         return 1;
 617         }
 618
 619         if (kvm_x86_ops->set_cr4(vcpu, cr4))
 620                 return 1;
 621
 622         if (((cr4 ^ old_cr4) & pdptr_bits) ||
 623             (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
 624                 kvm_mmu_reset_context(vcpu);
 625
 626         if ((cr4 ^ old_cr4) & X86_CR4_OSXSAVE)
 627                 kvm_update_cpuid(vcpu);
 628
 629         return 0;
 630 }
 631 EXPORT_SYMBOL_GPL(kvm_set_cr4);
 632
 633 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 634 {
 635         if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
 636                 kvm_mmu_sync_roots(vcpu);
 637                 kvm_mmu_flush_tlb(vcpu);
 638                 return 0;
 639         }
 640
 641         if (is_long_mode(vcpu)) {
 642                 if (kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE)) {
 643                         if (cr3 & CR3_PCID_ENABLED_RESERVED_BITS)
 644                                 return 1;
 645                 } else
 646                         if (cr3 & CR3_L_MODE_RESERVED_BITS)
 647                                 return 1;
 648         } else {
 649                 if (is_pae(vcpu)) {
 650                         if (cr3 & CR3_PAE_RESERVED_BITS)
 651                                 return 1;
 652                         if (is_paging(vcpu) &&
 653                             !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
 654                                 return 1;
 655                 }
 656                 /*
 657                  * We don't check reserved bits in nonpae mode, because
 658                  * this isn't enforced, and VMware depends on this.
 659                  */
 660         }
 661
 662         /*
 663          * Does the new cr3 value map to physical memory? (Note, we
 664          * catch an invalid cr3 even in real-mode, because it would
 665          * cause trouble later on when we turn on paging anyway.)
 666          *
 667          * A real CPU would silently accept an invalid cr3 and would
 668          * attempt to use it - with largely undefined (and often hard
 669          * to debug) behavior on the guest side.
 670          */
 671         if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
 672                 return 1;
 673         vcpu->arch.cr3 = cr3;
 674         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
 675         vcpu->arch.mmu.new_cr3(vcpu);
 676         return 0;
 677 }
 678 EXPORT_SYMBOL_GPL(kvm_set_cr3);
 679
 680 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
 681 {
 682         if (cr8 & CR8_RESERVED_BITS)
 683                 return 1;
 684         if (irqchip_in_kernel(vcpu->kvm))
 685                 kvm_lapic_set_tpr(vcpu, cr8);
 686         else
 687                 vcpu->arch.cr8 = cr8;
 688         return 0;
 689 }
 690 EXPORT_SYMBOL_GPL(kvm_set_cr8);
 691
 692 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
 693 {
 694         if (irqchip_in_kernel(vcpu->kvm))
 695                 return kvm_lapic_get_cr8(vcpu);
 696         else
 697                 return vcpu->arch.cr8;
 698 }
 699 EXPORT_SYMBOL_GPL(kvm_get_cr8);
 700
 701 static void kvm_update_dr7(struct kvm_vcpu *vcpu)
 702 {
 703         unsigned long dr7;
 704
 705         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
 706                 dr7 = vcpu->arch.guest_debug_dr7;
 707         else
 708                 dr7 = vcpu->arch.dr7;
 709         kvm_x86_ops->set_dr7(vcpu, dr7);
 710         vcpu->arch.switch_db_regs = (dr7 & DR7_BP_EN_MASK);
 711 }
 712
 713 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 714 {
 715         switch (dr) {
 716         case 0 ... 3:
 717                 vcpu->arch.db[dr] = val;
 718                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 719                         vcpu->arch.eff_db[dr] = val;
 720                 break;
 721         case 4:
 722                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 723                         return 1; /* #UD */
 724                 /* fall through */
 725         case 6:
 726                 if (val & 0xffffffff00000000ULL)
 727                         return -1; /* #GP */
 728                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | DR6_FIXED_1;
 729                 break;
 730         case 5:
 731                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 732                         return 1; /* #UD */
 733                 /* fall through */
 734         default: /* 7 */
 735                 if (val & 0xffffffff00000000ULL)
 736                         return -1; /* #GP */
 737                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
 738                 kvm_update_dr7(vcpu);
 739                 break;
 740         }
 741
 742         return 0;
 743 }
 744
 745 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 746 {
 747         int res;
 748
 749         res = __kvm_set_dr(vcpu, dr, val);
 750         if (res > 0)
 751                 kvm_queue_exception(vcpu, UD_VECTOR);
 752         else if (res < 0)
 753                 kvm_inject_gp(vcpu, 0);
 754
 755         return res;
 756 }
 757 EXPORT_SYMBOL_GPL(kvm_set_dr);
 758
 759 static int _kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 760 {
 761         switch (dr) {
 762         case 0 ... 3:
 763                 *val = vcpu->arch.db[dr];
 764                 break;
 765         case 4:
 766                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 767                         return 1;
 768                 /* fall through */
 769         case 6:
 770                 *val = vcpu->arch.dr6;
 771                 break;
 772         case 5:
 773                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 774                         return 1;
 775                 /* fall through */
 776         default: /* 7 */
 777                 *val = vcpu->arch.dr7;
 778                 break;
 779         }
 780
 781         return 0;
 782 }
 783
 784 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 785 {
 786         if (_kvm_get_dr(vcpu, dr, val)) {
 787                 kvm_queue_exception(vcpu, UD_VECTOR);
 788                 return 1;
 789         }
 790         return 0;
 791 }
 792 EXPORT_SYMBOL_GPL(kvm_get_dr);
 793
 794 bool kvm_rdpmc(struct kvm_vcpu *vcpu)
 795 {
 796         u32 ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
 797         u64 data;
 798         int err;
 799
 800         err = kvm_pmu_read_pmc(vcpu, ecx, &data);
 801         if (err)
 802                 return err;
 803         kvm_register_write(vcpu, VCPU_REGS_RAX, (u32)data);
 804         kvm_register_write(vcpu, VCPU_REGS_RDX, data >> 32);
 805         return err;
 806 }
 807 EXPORT_SYMBOL_GPL(kvm_rdpmc);
 808
 809 /*
 810  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
 811  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
 812  *
 813  * This list is modified at module load time to reflect the
 814  * capabilities of the host cpu. This capabilities test skips MSRs that are
 815  * kvm-specific. Those are put in the beginning of the list.
 816  */
 817
 818 #define KVM_SAVE_MSRS_BEGIN     10
 819 static u32 msrs_to_save[] = {
 820         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
 821         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
 822         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
 823         HV_X64_MSR_APIC_ASSIST_PAGE, MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
 824         MSR_KVM_PV_EOI_EN,
 825         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
 826         MSR_STAR,
 827 #ifdef CONFIG_X86_64
 828         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
 829 #endif
 830         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA
 831 };
 832
 833 static unsigned num_msrs_to_save;
 834
 835 static const u32 emulated_msrs[] = {
 836         MSR_IA32_TSC_ADJUST,
 837         MSR_IA32_TSCDEADLINE,
 838         MSR_IA32_MISC_ENABLE,
 839         MSR_IA32_MCG_STATUS,
 840         MSR_IA32_MCG_CTL,
 841 };
 842
 843 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
 844 {
 845         u64 old_efer = vcpu->arch.efer;
 846
 847         if (efer & efer_reserved_bits)
 848                 return 1;
 849
 850         if (is_paging(vcpu)
 851             && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
 852                 return 1;
 853
 854         if (efer & EFER_FFXSR) {
 855                 struct kvm_cpuid_entry2 *feat;
 856
 857                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 858                 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT)))
 859                         return 1;
 860         }
 861
 862         if (efer & EFER_SVME) {
 863                 struct kvm_cpuid_entry2 *feat;
 864
 865                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 866                 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM)))
 867                         return 1;
 868         }
 869
 870         efer &= ~EFER_LMA;
 871         efer |= vcpu->arch.efer & EFER_LMA;
 872
 873         kvm_x86_ops->set_efer(vcpu, efer);
 874
 875         /* Update reserved bits */
 876         if ((efer ^ old_efer) & EFER_NX)
 877                 kvm_mmu_reset_context(vcpu);
 878
 879         return 0;
 880 }
 881
 882 void kvm_enable_efer_bits(u64 mask)
 883 {
 884        efer_reserved_bits &= ~mask;
 885 }
 886 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
 887
 888
 889 /*
 890  * Writes msr value into into the appropriate "register".
 891  * Returns 0 on success, non-0 otherwise.
 892  * Assumes vcpu_load() was already called.
 893  */
 894 int kvm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
 895 {
 896         return kvm_x86_ops->set_msr(vcpu, msr);
 897 }
 898
 899 /*
 900  * Adapt set_msr() to msr_io()'s calling convention
 901  */
 902 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
 903 {
 904         struct msr_data msr;
 905
 906         msr.data = *data;
 907         msr.index = index;
 908         msr.host_initiated = true;
 909         return kvm_set_msr(vcpu, &msr);
 910 }
 911
 912 #ifdef CONFIG_X86_64
 913 struct pvclock_gtod_data {
 914         seqcount_t      seq;
 915
 916         struct { /* extract of a clocksource struct */
 917                 int vclock_mode;
 918                 cycle_t cycle_last;
 919                 cycle_t mask;
 920                 u32     mult;
 921                 u32     shift;
 922         } clock;
 923
 924         /* open coded 'struct timespec' */
 925         u64             monotonic_time_snsec;
 926         time_t          monotonic_time_sec;
 927 };
 928
 929 static struct pvclock_gtod_data pvclock_gtod_data;
 930
 931 static void update_pvclock_gtod(struct timekeeper *tk)
 932 {
 933         struct pvclock_gtod_data *vdata = &pvclock_gtod_data;
 934
 935         write_seqcount_begin(&vdata->seq);
 936
 937         /* copy pvclock gtod data */
 938         vdata->clock.vclock_mode        = tk->clock->archdata.vclock_mode;
 939         vdata->clock.cycle_last         = tk->clock->cycle_last;
 940         vdata->clock.mask               = tk->clock->mask;
 941         vdata->clock.mult               = tk->mult;
 942         vdata->clock.shift              = tk->shift;
 943
 944         vdata->monotonic_time_sec       = tk->xtime_sec
 945                                         + tk->wall_to_monotonic.tv_sec;
 946         vdata->monotonic_time_snsec     = tk->xtime_nsec
 947                                         + (tk->wall_to_monotonic.tv_nsec
 948                                                 << tk->shift);
 949         while (vdata->monotonic_time_snsec >=
 950                                         (((u64)NSEC_PER_SEC) << tk->shift)) {
 951                 vdata->monotonic_time_snsec -=
 952                                         ((u64)NSEC_PER_SEC) << tk->shift;
 953                 vdata->monotonic_time_sec++;
 954         }
 955
 956         write_seqcount_end(&vdata->seq);
 957 }
 958 #endif
 959
 960
 961 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
 962 {
 963         int version;
 964         int r;
 965         struct pvclock_wall_clock wc;
 966         struct timespec boot;
 967
 968         if (!wall_clock)
 969                 return;
 970
 971         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
 972         if (r)
 973                 return;
 974
 975         if (version & 1)
 976                 ++version;  /* first time write, random junk */
 977
 978         ++version;
 979
 980         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
 981
 982         /*
 983          * The guest calculates current wall clock time by adding
 984          * system time (updated by kvm_guest_time_update below) to the
 985          * wall clock specified here.  guest system time equals host
 986          * system time for us, thus we must fill in host boot time here.
 987          */
 988         getboottime(&boot);
 989
 990         if (kvm->arch.kvmclock_offset) {
 991                 struct timespec ts = ns_to_timespec(kvm->arch.kvmclock_offset);
 992                 boot = timespec_sub(boot, ts);
 993         }
 994         wc.sec = boot.tv_sec;
 995         wc.nsec = boot.tv_nsec;
 996         wc.version = version;
 997
 998         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
 999
1000         version++;
1001         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
1002 }
1003
1004 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
1005 {
1006         uint32_t quotient, remainder;
1007
1008         /* Don't try to replace with do_div(), this one calculates
1009          * "(dividend << 32) / divisor" */
1010         __asm__ ( "divl %4"
1011                   : "=a" (quotient), "=d" (remainder)
1012                   : "0" (0), "1" (dividend), "r" (divisor) );
1013         return quotient;
1014 }
1015
1016 static void kvm_get_time_scale(uint32_t scaled_khz, uint32_t base_khz,
1017                                s8 *pshift, u32 *pmultiplier)
1018 {
1019         uint64_t scaled64;
1020         int32_t  shift = 0;
1021         uint64_t tps64;
1022         uint32_t tps32;
1023
1024         tps64 = base_khz * 1000LL;
1025         scaled64 = scaled_khz * 1000LL;
1026         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
1027                 tps64 >>= 1;
1028                 shift--;
1029         }
1030
1031         tps32 = (uint32_t)tps64;
1032         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
1033                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
1034                         scaled64 >>= 1;
1035                 else
1036                         tps32 <<= 1;
1037                 shift++;
1038         }
1039
1040         *pshift = shift;
1041         *pmultiplier = div_frac(scaled64, tps32);
1042
1043         pr_debug("%s: base_khz %u => %u, shift %d, mul %u\n",
1044                  __func__, base_khz, scaled_khz, shift, *pmultiplier);
1045 }
1046
1047 static inline u64 get_kernel_ns(void)
1048 {
1049         struct timespec ts;
1050
1051         WARN_ON(preemptible());
1052         ktime_get_ts(&ts);
1053         monotonic_to_bootbased(&ts);
1054         return timespec_to_ns(&ts);
1055 }
1056
1057 #ifdef CONFIG_X86_64
1058 static atomic_t kvm_guest_has_master_clock = ATOMIC_INIT(0);
1059 #endif
1060
1061 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
1062 unsigned long max_tsc_khz;
1063
1064 static inline u64 nsec_to_cycles(struct kvm_vcpu *vcpu, u64 nsec)
1065 {
1066         return pvclock_scale_delta(nsec, vcpu->arch.virtual_tsc_mult,
1067                                    vcpu->arch.virtual_tsc_shift);
1068 }
1069
1070 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
1071 {
1072         u64 v = (u64)khz * (1000000 + ppm);
1073         do_div(v, 1000000);
1074         return v;
1075 }
1076
1077 static void kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 this_tsc_khz)
1078 {
1079         u32 thresh_lo, thresh_hi;
1080         int use_scaling = 0;
1081
1082         /* Compute a scale to convert nanoseconds in TSC cycles */
1083         kvm_get_time_scale(this_tsc_khz, NSEC_PER_SEC / 1000,
1084                            &vcpu->arch.virtual_tsc_shift,
1085                            &vcpu->arch.virtual_tsc_mult);
1086         vcpu->arch.virtual_tsc_khz = this_tsc_khz;
1087
1088         /*
1089          * Compute the variation in TSC rate which is acceptable
1090          * within the range of tolerance and decide if the
1091          * rate being applied is within that bounds of the hardware
1092          * rate.  If so, no scaling or compensation need be done.
1093          */
1094         thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
1095         thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
1096         if (this_tsc_khz < thresh_lo || this_tsc_khz > thresh_hi) {
1097                 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", this_tsc_khz, thresh_lo, thresh_hi);
1098                 use_scaling = 1;
1099         }
1100         kvm_x86_ops->set_tsc_khz(vcpu, this_tsc_khz, use_scaling);
1101 }
1102
1103 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
1104 {
1105         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
1106                                       vcpu->arch.virtual_tsc_mult,
1107                                       vcpu->arch.virtual_tsc_shift);
1108         tsc += vcpu->arch.this_tsc_write;
1109         return tsc;
1110 }
1111
1112 void kvm_track_tsc_matching(struct kvm_vcpu *vcpu)
1113 {
1114 #ifdef CONFIG_X86_64
1115         bool vcpus_matched;
1116         bool do_request = false;
1117         struct kvm_arch *ka = &vcpu->kvm->arch;
1118         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1119
1120         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1121                          atomic_read(&vcpu->kvm->online_vcpus));
1122
1123         if (vcpus_matched && gtod->clock.vclock_mode == VCLOCK_TSC)
1124                 if (!ka->use_master_clock)
1125                         do_request = 1;
1126
1127         if (!vcpus_matched && ka->use_master_clock)
1128                         do_request = 1;
1129
1130         if (do_request)
1131                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
1132
1133         trace_kvm_track_tsc(vcpu->vcpu_id, ka->nr_vcpus_matched_tsc,
1134                             atomic_read(&vcpu->kvm->online_vcpus),
1135                             ka->use_master_clock, gtod->clock.vclock_mode);
1136 #endif
1137 }
1138
1139 static void update_ia32_tsc_adjust_msr(struct kvm_vcpu *vcpu, s64 offset)
1140 {
1141         u64 curr_offset = kvm_x86_ops->read_tsc_offset(vcpu);
1142         vcpu->arch.ia32_tsc_adjust_msr += offset - curr_offset;
1143 }
1144
1145 void kvm_write_tsc(struct kvm_vcpu *vcpu, struct msr_data *msr)
1146 {
1147         struct kvm *kvm = vcpu->kvm;
1148         u64 offset, ns, elapsed;
1149         unsigned long flags;
1150         s64 usdiff;
1151         bool matched;
1152         u64 data = msr->data;
1153
1154         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1155         offset = kvm_x86_ops->compute_tsc_offset(vcpu, data);
1156         ns = get_kernel_ns();
1157         elapsed = ns - kvm->arch.last_tsc_nsec;
1158
1159         /* n.b - signed multiplication and division required */
1160         usdiff = data - kvm->arch.last_tsc_write;
1161 #ifdef CONFIG_X86_64
1162         usdiff = (usdiff * 1000) / vcpu->arch.virtual_tsc_khz;
1163 #else
1164         /* do_div() only does unsigned */
1165         asm("idivl %2; xor %%edx, %%edx"
1166             : "=A"(usdiff)
1167             : "A"(usdiff * 1000), "rm"(vcpu->arch.virtual_tsc_khz));
1168 #endif
1169         do_div(elapsed, 1000);
1170         usdiff -= elapsed;
1171         if (usdiff < 0)
1172                 usdiff = -usdiff;
1173
1174         /*
1175          * Special case: TSC write with a small delta (1 second) of virtual
1176          * cycle time against real time is interpreted as an attempt to
1177          * synchronize the CPU.
1178          *
1179          * For a reliable TSC, we can match TSC offsets, and for an unstable
1180          * TSC, we add elapsed time in this computation.  We could let the
1181          * compensation code attempt to catch up if we fall behind, but
1182          * it's better to try to match offsets from the beginning.
1183          */
1184         if (usdiff < USEC_PER_SEC &&
1185             vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
1186                 if (!check_tsc_unstable()) {
1187                         offset = kvm->arch.cur_tsc_offset;
1188                         pr_debug("kvm: matched tsc offset for %llu\n", data);
1189                 } else {
1190                         u64 delta = nsec_to_cycles(vcpu, elapsed);
1191                         data += delta;
1192                         offset = kvm_x86_ops->compute_tsc_offset(vcpu, data);
1193                         pr_debug("kvm: adjusted tsc offset by %llu\n", delta);
1194                 }
1195                 matched = true;
1196         } else {
1197                 /*
1198                  * We split periods of matched TSC writes into generations.
1199                  * For each generation, we track the original measured
1200                  * nanosecond time, offset, and write, so if TSCs are in
1201                  * sync, we can match exact offset, and if not, we can match
1202                  * exact software computation in compute_guest_tsc()
1203                  *
1204                  * These values are tracked in kvm->arch.cur_xxx variables.
1205                  */
1206                 kvm->arch.cur_tsc_generation++;
1207                 kvm->arch.cur_tsc_nsec = ns;
1208                 kvm->arch.cur_tsc_write = data;
1209                 kvm->arch.cur_tsc_offset = offset;
1210                 matched = false;
1211                 pr_debug("kvm: new tsc generation %u, clock %llu\n",
1212                          kvm->arch.cur_tsc_generation, data);
1213         }
1214
1215         /*
1216          * We also track th most recent recorded KHZ, write and time to
1217          * allow the matching interval to be extended at each write.
1218          */
1219         kvm->arch.last_tsc_nsec = ns;
1220         kvm->arch.last_tsc_write = data;
1221         kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
1222
1223         /* Reset of TSC must disable overshoot protection below */
1224         vcpu->arch.hv_clock.tsc_timestamp = 0;
1225         vcpu->arch.last_guest_tsc = data;
1226
1227         /* Keep track of which generation this VCPU has synchronized to */
1228         vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
1229         vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
1230         vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
1231
1232         if (guest_cpuid_has_tsc_adjust(vcpu) && !msr->host_initiated)
1233                 update_ia32_tsc_adjust_msr(vcpu, offset);
1234         kvm_x86_ops->write_tsc_offset(vcpu, offset);
1235         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1236
1237         spin_lock(&kvm->arch.pvclock_gtod_sync_lock);
1238         if (matched)
1239                 kvm->arch.nr_vcpus_matched_tsc++;
1240         else
1241                 kvm->arch.nr_vcpus_matched_tsc = 0;
1242
1243         kvm_track_tsc_matching(vcpu);
1244         spin_unlock(&kvm->arch.pvclock_gtod_sync_lock);
1245 }
1246
1247 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1248
1249 #ifdef CONFIG_X86_64
1250
1251 static cycle_t read_tsc(void)
1252 {
1253         cycle_t ret;
1254         u64 last;
1255
1256         /*
1257          * Empirically, a fence (of type that depends on the CPU)
1258          * before rdtsc is enough to ensure that rdtsc is ordered
1259          * with respect to loads.  The various CPU manuals are unclear
1260          * as to whether rdtsc can be reordered with later loads,
1261          * but no one has ever seen it happen.
1262          */
1263         rdtsc_barrier();
1264         ret = (cycle_t)vget_cycles();
1265
1266         last = pvclock_gtod_data.clock.cycle_last;
1267
1268         if (likely(ret >= last))
1269                 return ret;
1270
1271         /*
1272          * GCC likes to generate cmov here, but this branch is extremely
1273          * predictable (it's just a funciton of time and the likely is
1274          * very likely) and there's a data dependence, so force GCC
1275          * to generate a branch instead.  I don't barrier() because
1276          * we don't actually need a barrier, and if this function
1277          * ever gets inlined it will generate worse code.
1278          */
1279         asm volatile ("");
1280         return last;
1281 }
1282
1283 static inline u64 vgettsc(cycle_t *cycle_now)
1284 {
1285         long v;
1286         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1287
1288         *cycle_now = read_tsc();
1289
1290         v = (*cycle_now - gtod->clock.cycle_last) & gtod->clock.mask;
1291         return v * gtod->clock.mult;
1292 }
1293
1294 static int do_monotonic(struct timespec *ts, cycle_t *cycle_now)
1295 {
1296         unsigned long seq;
1297         u64 ns;
1298         int mode;
1299         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1300
1301         ts->tv_nsec = 0;
1302         do {
1303                 seq = read_seqcount_begin(&gtod->seq);
1304                 mode = gtod->clock.vclock_mode;
1305                 ts->tv_sec = gtod->monotonic_time_sec;
1306                 ns = gtod->monotonic_time_snsec;
1307                 ns += vgettsc(cycle_now);
1308                 ns >>= gtod->clock.shift;
1309         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
1310         timespec_add_ns(ts, ns);
1311
1312         return mode;
1313 }
1314
1315 /* returns true if host is using tsc clocksource */
1316 static bool kvm_get_time_and_clockread(s64 *kernel_ns, cycle_t *cycle_now)
1317 {
1318         struct timespec ts;
1319
1320         /* checked again under seqlock below */
1321         if (pvclock_gtod_data.clock.vclock_mode != VCLOCK_TSC)
1322                 return false;
1323
1324         if (do_monotonic(&ts, cycle_now) != VCLOCK_TSC)
1325                 return false;
1326
1327         monotonic_to_bootbased(&ts);
1328         *kernel_ns = timespec_to_ns(&ts);
1329
1330         return true;
1331 }
1332 #endif
1333
1334 /*
1335  *
1336  * Assuming a stable TSC across physical CPUS, and a stable TSC
1337  * across virtual CPUs, the following condition is possible.
1338  * Each numbered line represents an event visible to both
1339  * CPUs at the next numbered event.
1340  *
1341  * "timespecX" represents host monotonic time. "tscX" represents
1342  * RDTSC value.
1343  *
1344  *              VCPU0 on CPU0           |       VCPU1 on CPU1
1345  *
1346  * 1.  read timespec0,tsc0
1347  * 2.                                   | timespec1 = timespec0 + N
1348  *                                      | tsc1 = tsc0 + M
1349  * 3. transition to guest               | transition to guest
1350  * 4. ret0 = timespec0 + (rdtsc - tsc0) |
1351  * 5.                                   | ret1 = timespec1 + (rdtsc - tsc1)
1352  *                                      | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
1353  *
1354  * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
1355  *
1356  *      - ret0 < ret1
1357  *      - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
1358  *              ...
1359  *      - 0 < N - M => M < N
1360  *
1361  * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
1362  * always the case (the difference between two distinct xtime instances
1363  * might be smaller then the difference between corresponding TSC reads,
1364  * when updating guest vcpus pvclock areas).
1365  *
1366  * To avoid that problem, do not allow visibility of distinct
1367  * system_timestamp/tsc_timestamp values simultaneously: use a master
1368  * copy of host monotonic time values. Update that master copy
1369  * in lockstep.
1370  *
1371  * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
1372  *
1373  */
1374
1375 static void pvclock_update_vm_gtod_copy(struct kvm *kvm)
1376 {
1377 #ifdef CONFIG_X86_64
1378         struct kvm_arch *ka = &kvm->arch;
1379         int vclock_mode;
1380         bool host_tsc_clocksource, vcpus_matched;
1381
1382         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1383                         atomic_read(&kvm->online_vcpus));
1384
1385         /*
1386          * If the host uses TSC clock, then passthrough TSC as stable
1387          * to the guest.
1388          */
1389         host_tsc_clocksource = kvm_get_time_and_clockread(
1390                                         &ka->master_kernel_ns,
1391                                         &ka->master_cycle_now);
1392
1393         ka->use_master_clock = host_tsc_clocksource & vcpus_matched;
1394
1395         if (ka->use_master_clock)
1396                 atomic_set(&kvm_guest_has_master_clock, 1);
1397
1398         vclock_mode = pvclock_gtod_data.clock.vclock_mode;
1399         trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode,
1400                                         vcpus_matched);
1401 #endif
1402 }
1403
1404 static int kvm_guest_time_update(struct kvm_vcpu *v)
1405 {
1406         unsigned long flags, this_tsc_khz;
1407         struct kvm_vcpu_arch *vcpu = &v->arch;
1408         struct kvm_arch *ka = &v->kvm->arch;
1409         s64 kernel_ns, max_kernel_ns;
1410         u64 tsc_timestamp, host_tsc;
1411         struct pvclock_vcpu_time_info guest_hv_clock;
1412         u8 pvclock_flags;
1413         bool use_master_clock;
1414
1415         kernel_ns = 0;
1416         host_tsc = 0;
1417
1418         /*
1419          * If the host uses TSC clock, then passthrough TSC as stable
1420          * to the guest.
1421          */
1422         spin_lock(&ka->pvclock_gtod_sync_lock);
1423         use_master_clock = ka->use_master_clock;
1424         if (use_master_clock) {
1425                 host_tsc = ka->master_cycle_now;
1426                 kernel_ns = ka->master_kernel_ns;
1427         }
1428         spin_unlock(&ka->pvclock_gtod_sync_lock);
1429
1430         /* Keep irq disabled to prevent changes to the clock */
1431         local_irq_save(flags);
1432         this_tsc_khz = __get_cpu_var(cpu_tsc_khz);
1433         if (unlikely(this_tsc_khz == 0)) {
1434                 local_irq_restore(flags);
1435                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1436                 return 1;
1437         }
1438         if (!use_master_clock) {
1439                 host_tsc = native_read_tsc();
1440                 kernel_ns = get_kernel_ns();
1441         }
1442
1443         tsc_timestamp = kvm_x86_ops->read_l1_tsc(v, host_tsc);
1444
1445         /*
1446          * We may have to catch up the TSC to match elapsed wall clock
1447          * time for two reasons, even if kvmclock is used.
1448          *   1) CPU could have been running below the maximum TSC rate
1449          *   2) Broken TSC compensation resets the base at each VCPU
1450          *      entry to avoid unknown leaps of TSC even when running
1451          *      again on the same CPU.  This may cause apparent elapsed
1452          *      time to disappear, and the guest to stand still or run
1453          *      very slowly.
1454          */
1455         if (vcpu->tsc_catchup) {
1456                 u64 tsc = compute_guest_tsc(v, kernel_ns);
1457                 if (tsc > tsc_timestamp) {
1458                         adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
1459                         tsc_timestamp = tsc;
1460                 }
1461         }
1462
1463         local_irq_restore(flags);
1464
1465         if (!vcpu->pv_time_enabled)
1466                 return 0;
1467
1468         /*
1469          * Time as measured by the TSC may go backwards when resetting the base
1470          * tsc_timestamp.  The reason for this is that the TSC resolution is
1471          * higher than the resolution of the other clock scales.  Thus, many
1472          * possible measurments of the TSC correspond to one measurement of any
1473          * other clock, and so a spread of values is possible.  This is not a
1474          * problem for the computation of the nanosecond clock; with TSC rates
1475          * around 1GHZ, there can only be a few cycles which correspond to one
1476          * nanosecond value, and any path through this code will inevitably
1477          * take longer than that.  However, with the kernel_ns value itself,
1478          * the precision may be much lower, down to HZ granularity.  If the
1479          * first sampling of TSC against kernel_ns ends in the low part of the
1480          * range, and the second in the high end of the range, we can get:
1481          *
1482          * (TSC - offset_low) * S + kns_old > (TSC - offset_high) * S + kns_new
1483          *
1484          * As the sampling errors potentially range in the thousands of cycles,
1485          * it is possible such a time value has already been observed by the
1486          * guest.  To protect against this, we must compute the system time as
1487          * observed by the guest and ensure the new system time is greater.
1488          */
1489         max_kernel_ns = 0;
1490         if (vcpu->hv_clock.tsc_timestamp) {
1491                 max_kernel_ns = vcpu->last_guest_tsc -
1492                                 vcpu->hv_clock.tsc_timestamp;
1493                 max_kernel_ns = pvclock_scale_delta(max_kernel_ns,
1494                                     vcpu->hv_clock.tsc_to_system_mul,
1495                                     vcpu->hv_clock.tsc_shift);
1496                 max_kernel_ns += vcpu->last_kernel_ns;
1497         }
1498
1499         if (unlikely(vcpu->hw_tsc_khz != this_tsc_khz)) {
1500                 kvm_get_time_scale(NSEC_PER_SEC / 1000, this_tsc_khz,
1501                                    &vcpu->hv_clock.tsc_shift,
1502                                    &vcpu->hv_clock.tsc_to_system_mul);
1503                 vcpu->hw_tsc_khz = this_tsc_khz;
1504         }
1505
1506         /* with a master <monotonic time, tsc value> tuple,
1507          * pvclock clock reads always increase at the (scaled) rate
1508          * of guest TSC - no need to deal with sampling errors.
1509          */
1510         if (!use_master_clock) {
1511                 if (max_kernel_ns > kernel_ns)
1512                         kernel_ns = max_kernel_ns;
1513         }
1514         /* With all the info we got, fill in the values */
1515         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
1516         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
1517         vcpu->last_kernel_ns = kernel_ns;
1518         vcpu->last_guest_tsc = tsc_timestamp;
1519
1520         /*
1521          * The interface expects us to write an even number signaling that the
1522          * update is finished. Since the guest won't see the intermediate
1523          * state, we just increase by 2 at the end.
1524          */
1525         vcpu->hv_clock.version += 2;
1526
1527         if (unlikely(kvm_read_guest_cached(v->kvm, &vcpu->pv_time,
1528                 &guest_hv_clock, sizeof(guest_hv_clock))))
1529                 return 0;
1530
1531         /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
1532         pvclock_flags = (guest_hv_clock.flags & PVCLOCK_GUEST_STOPPED);
1533
1534         if (vcpu->pvclock_set_guest_stopped_request) {
1535                 pvclock_flags |= PVCLOCK_GUEST_STOPPED;
1536                 vcpu->pvclock_set_guest_stopped_request = false;
1537         }
1538
1539         /* If the host uses TSC clocksource, then it is stable */
1540         if (use_master_clock)
1541                 pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;
1542
1543         vcpu->hv_clock.flags = pvclock_flags;
1544
1545         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1546                                 &vcpu->hv_clock,
1547                                 sizeof(vcpu->hv_clock));
1548         return 0;
1549 }
1550
1551 static bool msr_mtrr_valid(unsigned msr)
1552 {
1553         switch (msr) {
1554         case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
1555         case MSR_MTRRfix64K_00000:
1556         case MSR_MTRRfix16K_80000:
1557         case MSR_MTRRfix16K_A0000:
1558         case MSR_MTRRfix4K_C0000:
1559         case MSR_MTRRfix4K_C8000:
1560         case MSR_MTRRfix4K_D0000:
1561         case MSR_MTRRfix4K_D8000:
1562         case MSR_MTRRfix4K_E0000:
1563         case MSR_MTRRfix4K_E8000:
1564         case MSR_MTRRfix4K_F0000:
1565         case MSR_MTRRfix4K_F8000:
1566         case MSR_MTRRdefType:
1567         case MSR_IA32_CR_PAT:
1568                 return true;
1569         case 0x2f8:
1570                 return true;
1571         }
1572         return false;
1573 }
1574
1575 static bool valid_pat_type(unsigned t)
1576 {
1577         return t < 8 && (1 << t) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
1578 }
1579
1580 static bool valid_mtrr_type(unsigned t)
1581 {
1582         return t < 8 && (1 << t) & 0x73; /* 0, 1, 4, 5, 6 */
1583 }
1584
1585 static bool mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1586 {
1587         int i;
1588
1589         if (!msr_mtrr_valid(msr))
1590                 return false;
1591
1592         if (msr == MSR_IA32_CR_PAT) {
1593                 for (i = 0; i < 8; i++)
1594                         if (!valid_pat_type((data >> (i * 8)) & 0xff))
1595                                 return false;
1596                 return true;
1597         } else if (msr == MSR_MTRRdefType) {
1598                 if (data & ~0xcff)
1599                         return false;
1600                 return valid_mtrr_type(data & 0xff);
1601         } else if (msr >= MSR_MTRRfix64K_00000 && msr <= MSR_MTRRfix4K_F8000) {
1602                 for (i = 0; i < 8 ; i++)
1603                         if (!valid_mtrr_type((data >> (i * 8)) & 0xff))
1604                                 return false;
1605                 return true;
1606         }
1607
1608         /* variable MTRRs */
1609         return valid_mtrr_type(data & 0xff);
1610 }
1611
1612 static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1613 {
1614         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1615
1616         if (!mtrr_valid(vcpu, msr, data))
1617                 return 1;
1618
1619         if (msr == MSR_MTRRdefType) {
1620                 vcpu->arch.mtrr_state.def_type = data;
1621                 vcpu->arch.mtrr_state.enabled = (data & 0xc00) >> 10;
1622         } else if (msr == MSR_MTRRfix64K_00000)
1623                 p[0] = data;
1624         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1625                 p[1 + msr - MSR_MTRRfix16K_80000] = data;
1626         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1627                 p[3 + msr - MSR_MTRRfix4K_C0000] = data;
1628         else if (msr == MSR_IA32_CR_PAT)
1629                 vcpu->arch.pat = data;
1630         else {  /* Variable MTRRs */
1631                 int idx, is_mtrr_mask;
1632                 u64 *pt;
1633
1634                 idx = (msr - 0x200) / 2;
1635                 is_mtrr_mask = msr - 0x200 - 2 * idx;
1636                 if (!is_mtrr_mask)
1637                         pt =
1638                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1639                 else
1640                         pt =
1641                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1642                 *pt = data;
1643         }
1644
1645         kvm_mmu_reset_context(vcpu);
1646         return 0;
1647 }
1648
1649 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1650 {
1651         u64 mcg_cap = vcpu->arch.mcg_cap;
1652         unsigned bank_num = mcg_cap & 0xff;
1653
1654         switch (msr) {
1655         case MSR_IA32_MCG_STATUS:
1656                 vcpu->arch.mcg_status = data;
1657                 break;
1658         case MSR_IA32_MCG_CTL:
1659                 if (!(mcg_cap & MCG_CTL_P))
1660                         return 1;
1661                 if (data != 0 && data != ~(u64)0)
1662                         return -1;
1663                 vcpu->arch.mcg_ctl = data;
1664                 break;
1665         default:
1666                 if (msr >= MSR_IA32_MC0_CTL &&
1667                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1668                         u32 offset = msr - MSR_IA32_MC0_CTL;
1669                         /* only 0 or all 1s can be written to IA32_MCi_CTL
1670                          * some Linux kernels though clear bit 10 in bank 4 to
1671                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1672                          * this to avoid an uncatched #GP in the guest
1673                          */
1674                         if ((offset & 0x3) == 0 &&
1675                             data != 0 && (data | (1 << 10)) != ~(u64)0)
1676                                 return -1;
1677                         vcpu->arch.mce_banks[offset] = data;
1678                         break;
1679                 }
1680                 return 1;
1681         }
1682         return 0;
1683 }
1684
1685 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
1686 {
1687         struct kvm *kvm = vcpu->kvm;
1688         int lm = is_long_mode(vcpu);
1689         u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
1690                 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
1691         u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
1692                 : kvm->arch.xen_hvm_config.blob_size_32;
1693         u32 page_num = data & ~PAGE_MASK;
1694         u64 page_addr = data & PAGE_MASK;
1695         u8 *page;
1696         int r;
1697
1698         r = -E2BIG;
1699         if (page_num >= blob_size)
1700                 goto out;
1701         r = -ENOMEM;
1702         page = memdup_user(blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE);
1703         if (IS_ERR(page)) {
1704                 r = PTR_ERR(page);
1705                 goto out;
1706         }
1707         if (kvm_write_guest(kvm, page_addr, page, PAGE_SIZE))
1708                 goto out_free;
1709         r = 0;
1710 out_free:
1711         kfree(page);
1712 out:
1713         return r;
1714 }
1715
1716 static bool kvm_hv_hypercall_enabled(struct kvm *kvm)
1717 {
1718         return kvm->arch.hv_hypercall & HV_X64_MSR_HYPERCALL_ENABLE;
1719 }
1720
1721 static bool kvm_hv_msr_partition_wide(u32 msr)
1722 {
1723         bool r = false;
1724         switch (msr) {
1725         case HV_X64_MSR_GUEST_OS_ID:
1726         case HV_X64_MSR_HYPERCALL:
1727                 r = true;
1728                 break;
1729         }
1730
1731         return r;
1732 }
1733
1734 static int set_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1735 {
1736         struct kvm *kvm = vcpu->kvm;
1737
1738         switch (msr) {
1739         case HV_X64_MSR_GUEST_OS_ID:
1740                 kvm->arch.hv_guest_os_id = data;
1741                 /* setting guest os id to zero disables hypercall page */
1742                 if (!kvm->arch.hv_guest_os_id)
1743                         kvm->arch.hv_hypercall &= ~HV_X64_MSR_HYPERCALL_ENABLE;
1744                 break;
1745         case HV_X64_MSR_HYPERCALL: {
1746                 u64 gfn;
1747                 unsigned long addr;
1748                 u8 instructions[4];
1749
1750                 /* if guest os id is not set hypercall should remain disabled */
1751                 if (!kvm->arch.hv_guest_os_id)
1752                         break;
1753                 if (!(data & HV_X64_MSR_HYPERCALL_ENABLE)) {
1754                         kvm->arch.hv_hypercall = data;
1755                         break;
1756                 }
1757                 gfn = data >> HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT;
1758                 addr = gfn_to_hva(kvm, gfn);
1759                 if (kvm_is_error_hva(addr))
1760                         return 1;
1761                 kvm_x86_ops->patch_hypercall(vcpu, instructions);
1762                 ((unsigned char *)instructions)[3] = 0xc3; /* ret */
1763                 if (__copy_to_user((void __user *)addr, instructions, 4))
1764                         return 1;
1765                 kvm->arch.hv_hypercall = data;
1766                 break;
1767         }
1768         default:
1769                 vcpu_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1770                             "data 0x%llx\n", msr, data);
1771                 return 1;
1772         }
1773         return 0;
1774 }
1775
1776 static int set_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1777 {
1778         switch (msr) {
1779         case HV_X64_MSR_APIC_ASSIST_PAGE: {
1780                 unsigned long addr;
1781
1782                 if (!(data & HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE)) {
1783                         vcpu->arch.hv_vapic = data;
1784                         break;
1785                 }
1786                 addr = gfn_to_hva(vcpu->kvm, data >>
1787                                   HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT);
1788                 if (kvm_is_error_hva(addr))
1789                         return 1;
1790                 if (__clear_user((void __user *)addr, PAGE_SIZE))
1791                         return 1;
1792                 vcpu->arch.hv_vapic = data;
1793                 break;
1794         }
1795         case HV_X64_MSR_EOI:
1796                 return kvm_hv_vapic_msr_write(vcpu, APIC_EOI, data);
1797         case HV_X64_MSR_ICR:
1798                 return kvm_hv_vapic_msr_write(vcpu, APIC_ICR, data);
1799         case HV_X64_MSR_TPR:
1800                 return kvm_hv_vapic_msr_write(vcpu, APIC_TASKPRI, data);
1801         default:
1802                 vcpu_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1803                             "data 0x%llx\n", msr, data);
1804                 return 1;
1805         }
1806
1807         return 0;
1808 }
1809
1810 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
1811 {
1812         gpa_t gpa = data & ~0x3f;
1813
1814         /* Bits 2:5 are reserved, Should be zero */
1815         if (data & 0x3c)
1816                 return 1;
1817
1818         vcpu->arch.apf.msr_val = data;
1819
1820         if (!(data & KVM_ASYNC_PF_ENABLED)) {
1821                 kvm_clear_async_pf_completion_queue(vcpu);
1822                 kvm_async_pf_hash_reset(vcpu);
1823                 return 0;
1824         }
1825
1826         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa,
1827                                         sizeof(u32)))
1828                 return 1;
1829
1830         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
1831         kvm_async_pf_wakeup_all(vcpu);
1832         return 0;
1833 }
1834
1835 static void kvmclock_reset(struct kvm_vcpu *vcpu)
1836 {
1837         vcpu->arch.pv_time_enabled = false;
1838 }
1839
1840 static void accumulate_steal_time(struct kvm_vcpu *vcpu)
1841 {
1842         u64 delta;
1843
1844         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
1845                 return;
1846
1847         delta = current->sched_info.run_delay - vcpu->arch.st.last_steal;
1848         vcpu->arch.st.last_steal = current->sched_info.run_delay;
1849         vcpu->arch.st.accum_steal = delta;
1850 }
1851
1852 static void record_steal_time(struct kvm_vcpu *vcpu)
1853 {
1854         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
1855                 return;
1856
1857         if (unlikely(kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
1858                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time))))
1859                 return;
1860
1861         vcpu->arch.st.steal.steal += vcpu->arch.st.accum_steal;
1862         vcpu->arch.st.steal.version += 2;
1863         vcpu->arch.st.accum_steal = 0;
1864
1865         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
1866                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
1867 }
1868
1869 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
1870 {
1871         bool pr = false;
1872         u32 msr = msr_info->index;
1873         u64 data = msr_info->data;
1874
1875         switch (msr) {
1876         case MSR_AMD64_NB_CFG:
1877         case MSR_IA32_UCODE_REV:
1878         case MSR_IA32_UCODE_WRITE:
1879         case MSR_VM_HSAVE_PA:
1880         case MSR_AMD64_PATCH_LOADER:
1881         case MSR_AMD64_BU_CFG2:
1882                 break;
1883
1884         case MSR_EFER:
1885                 return set_efer(vcpu, data);
1886         case MSR_K7_HWCR:
1887                 data &= ~(u64)0x40;     /* ignore flush filter disable */
1888                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
1889                 data &= ~(u64)0x8;      /* ignore TLB cache disable */
1890                 if (data != 0) {
1891                         vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
1892                                     data);
1893                         return 1;
1894                 }
1895                 break;
1896         case MSR_FAM10H_MMIO_CONF_BASE:
1897                 if (data != 0) {
1898                         vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
1899                                     "0x%llx\n", data);
1900                         return 1;
1901                 }
1902                 break;
1903         case MSR_IA32_DEBUGCTLMSR:
1904                 if (!data) {
1905                         /* We support the non-activated case already */
1906                         break;
1907                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
1908                         /* Values other than LBR and BTF are vendor-specific,
1909                            thus reserved and should throw a #GP */
1910                         return 1;
1911                 }
1912                 vcpu_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
1913                             __func__, data);
1914                 break;
1915         case 0x200 ... 0x2ff:
1916                 return set_msr_mtrr(vcpu, msr, data);
1917         case MSR_IA32_APICBASE:
1918                 kvm_set_apic_base(vcpu, data);
1919                 break;
1920         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1921                 return kvm_x2apic_msr_write(vcpu, msr, data);
1922         case MSR_IA32_TSCDEADLINE:
1923                 kvm_set_lapic_tscdeadline_msr(vcpu, data);
1924                 break;
1925         case MSR_IA32_TSC_ADJUST:
1926                 if (guest_cpuid_has_tsc_adjust(vcpu)) {
1927                         if (!msr_info->host_initiated) {
1928                                 u64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;
1929                                 kvm_x86_ops->adjust_tsc_offset(vcpu, adj, true);
1930                         }
1931                         vcpu->arch.ia32_tsc_adjust_msr = data;
1932                 }
1933                 break;
1934         case MSR_IA32_MISC_ENABLE:
1935                 vcpu->arch.ia32_misc_enable_msr = data;
1936                 break;
1937         case MSR_KVM_WALL_CLOCK_NEW:
1938         case MSR_KVM_WALL_CLOCK:
1939                 vcpu->kvm->arch.wall_clock = data;
1940                 kvm_write_wall_clock(vcpu->kvm, data);
1941                 break;
1942         case MSR_KVM_SYSTEM_TIME_NEW:
1943         case MSR_KVM_SYSTEM_TIME: {
1944                 u64 gpa_offset;
1945                 kvmclock_reset(vcpu);
1946
1947                 vcpu->arch.time = data;
1948                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1949
1950                 /* we verify if the enable bit is set... */
1951                 if (!(data & 1))
1952                         break;
1953
1954                 gpa_offset = data & ~(PAGE_MASK | 1);
1955
1956                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm,
1957                      &vcpu->arch.pv_time, data & ~1ULL,
1958                      sizeof(struct pvclock_vcpu_time_info)))
1959                         vcpu->arch.pv_time_enabled = false;
1960                 else
1961                         vcpu->arch.pv_time_enabled = true;
1962
1963                 break;
1964         }
1965         case MSR_KVM_ASYNC_PF_EN:
1966                 if (kvm_pv_enable_async_pf(vcpu, data))
1967                         return 1;
1968                 break;
1969         case MSR_KVM_STEAL_TIME:
1970
1971                 if (unlikely(!sched_info_on()))
1972                         return 1;
1973
1974                 if (data & KVM_STEAL_RESERVED_MASK)
1975                         return 1;
1976
1977                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.st.stime,
1978                                                 data & KVM_STEAL_VALID_BITS,
1979                                                 sizeof(struct kvm_steal_time)))
1980                         return 1;
1981
1982                 vcpu->arch.st.msr_val = data;
1983
1984                 if (!(data & KVM_MSR_ENABLED))
1985                         break;
1986
1987                 vcpu->arch.st.last_steal = current->sched_info.run_delay;
1988
1989                 preempt_disable();
1990                 accumulate_steal_time(vcpu);
1991                 preempt_enable();
1992
1993                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
1994
1995                 break;
1996         case MSR_KVM_PV_EOI_EN:
1997                 if (kvm_lapic_enable_pv_eoi(vcpu, data))
1998                         return 1;
1999                 break;
2000
2001         case MSR_IA32_MCG_CTL:
2002         case MSR_IA32_MCG_STATUS:
2003         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
2004                 return set_msr_mce(vcpu, msr, data);
2005
2006         /* Performance counters are not protected by a CPUID bit,
2007          * so we should check all of them in the generic path for the sake of
2008          * cross vendor migration.
2009          * Writing a zero into the event select MSRs disables them,
2010          * which we perfectly emulate ;-). Any other value should be at least
2011          * reported, some guests depend on them.
2012          */
2013         case MSR_K7_EVNTSEL0:
2014         case MSR_K7_EVNTSEL1:
2015         case MSR_K7_EVNTSEL2:
2016         case MSR_K7_EVNTSEL3:
2017                 if (data != 0)
2018                         vcpu_unimpl(vcpu, "unimplemented perfctr wrmsr: "
2019                                     "0x%x data 0x%llx\n", msr, data);
2020                 break;
2021         /* at least RHEL 4 unconditionally writes to the perfctr registers,
2022          * so we ignore writes to make it happy.
2023          */
2024         case MSR_K7_PERFCTR0:
2025         case MSR_K7_PERFCTR1:
2026         case MSR_K7_PERFCTR2:
2027         case MSR_K7_PERFCTR3:
2028                 vcpu_unimpl(vcpu, "unimplemented perfctr wrmsr: "
2029                             "0x%x data 0x%llx\n", msr, data);
2030                 break;
2031         case MSR_P6_PERFCTR0:
2032         case MSR_P6_PERFCTR1:
2033                 pr = true;
2034         case MSR_P6_EVNTSEL0:
2035         case MSR_P6_EVNTSEL1:
2036                 if (kvm_pmu_msr(vcpu, msr))
2037                         return kvm_pmu_set_msr(vcpu, msr, data);
2038
2039                 if (pr || data != 0)
2040                         vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
2041                                     "0x%x data 0x%llx\n", msr, data);
2042                 break;
2043         case MSR_K7_CLK_CTL:
2044                 /*
2045                  * Ignore all writes to this no longer documented MSR.
2046                  * Writes are only relevant for old K7 processors,
2047                  * all pre-dating SVM, but a recommended workaround from
2048                  * AMD for these chips. It is possible to specify the
2049                  * affected processor models on the command line, hence
2050                  * the need to ignore the workaround.
2051                  */
2052                 break;
2053         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2054                 if (kvm_hv_msr_partition_wide(msr)) {
2055                         int r;
2056                         mutex_lock(&vcpu->kvm->lock);
2057                         r = set_msr_hyperv_pw(vcpu, msr, data);
2058                         mutex_unlock(&vcpu->kvm->lock);
2059                         return r;
2060                 } else
2061                         return set_msr_hyperv(vcpu, msr, data);
2062                 break;
2063         case MSR_IA32_BBL_CR_CTL3:
2064                 /* Drop writes to this legacy MSR -- see rdmsr
2065                  * counterpart for further detail.
2066                  */
2067                 vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n", msr, data);
2068                 break;
2069         case MSR_AMD64_OSVW_ID_LENGTH:
2070                 if (!guest_cpuid_has_osvw(vcpu))
2071                         return 1;
2072                 vcpu->arch.osvw.length = data;
2073                 break;
2074         case MSR_AMD64_OSVW_STATUS:
2075                 if (!guest_cpuid_has_osvw(vcpu))
2076                         return 1;
2077                 vcpu->arch.osvw.status = data;
2078                 break;
2079         default:
2080                 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
2081                         return xen_hvm_config(vcpu, data);
2082                 if (kvm_pmu_msr(vcpu, msr))
2083                         return kvm_pmu_set_msr(vcpu, msr, data);
2084                 if (!ignore_msrs) {
2085                         vcpu_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
2086                                     msr, data);
2087                         return 1;
2088                 } else {
2089                         vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
2090                                     msr, data);
2091                         break;
2092                 }
2093         }
2094         return 0;
2095 }
2096 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
2097
2098
2099 /*
2100  * Reads an msr value (of 'msr_index') into 'pdata'.
2101  * Returns 0 on success, non-0 otherwise.
2102  * Assumes vcpu_load() was already called.
2103  */
2104 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
2105 {
2106         return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
2107 }
2108
2109 static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2110 {
2111         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
2112
2113         if (!msr_mtrr_valid(msr))
2114                 return 1;
2115
2116         if (msr == MSR_MTRRdefType)
2117                 *pdata = vcpu->arch.mtrr_state.def_type +
2118                          (vcpu->arch.mtrr_state.enabled << 10);
2119         else if (msr == MSR_MTRRfix64K_00000)
2120                 *pdata = p[0];
2121         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
2122                 *pdata = p[1 + msr - MSR_MTRRfix16K_80000];
2123         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
2124                 *pdata = p[3 + msr - MSR_MTRRfix4K_C0000];
2125         else if (msr == MSR_IA32_CR_PAT)
2126                 *pdata = vcpu->arch.pat;
2127         else {  /* Variable MTRRs */
2128                 int idx, is_mtrr_mask;
2129                 u64 *pt;
2130
2131                 idx = (msr - 0x200) / 2;
2132                 is_mtrr_mask = msr - 0x200 - 2 * idx;
2133                 if (!is_mtrr_mask)
2134                         pt =
2135                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
2136                 else
2137                         pt =
2138                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
2139                 *pdata = *pt;
2140         }
2141
2142         return 0;
2143 }
2144
2145 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2146 {
2147         u64 data;
2148         u64 mcg_cap = vcpu->arch.mcg_cap;
2149         unsigned bank_num = mcg_cap & 0xff;
2150
2151         switch (msr) {
2152         case MSR_IA32_P5_MC_ADDR:
2153         case MSR_IA32_P5_MC_TYPE:
2154                 data = 0;
2155                 break;
2156         case MSR_IA32_MCG_CAP:
2157                 data = vcpu->arch.mcg_cap;
2158                 break;
2159         case MSR_IA32_MCG_CTL:
2160                 if (!(mcg_cap & MCG_CTL_P))
2161                         return 1;
2162                 data = vcpu->arch.mcg_ctl;
2163                 break;
2164         case MSR_IA32_MCG_STATUS:
2165                 data = vcpu->arch.mcg_status;
2166                 break;
2167         default:
2168                 if (msr >= MSR_IA32_MC0_CTL &&
2169                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
2170                         u32 offset = msr - MSR_IA32_MC0_CTL;
2171                         data = vcpu->arch.mce_banks[offset];
2172                         break;
2173                 }
2174                 return 1;
2175         }
2176         *pdata = data;
2177         return 0;
2178 }
2179
2180 static int get_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2181 {
2182         u64 data = 0;
2183         struct kvm *kvm = vcpu->kvm;
2184
2185         switch (msr) {
2186         case HV_X64_MSR_GUEST_OS_ID:
2187                 data = kvm->arch.hv_guest_os_id;
2188                 break;
2189         case HV_X64_MSR_HYPERCALL:
2190                 data = kvm->arch.hv_hypercall;
2191                 break;
2192         default:
2193                 vcpu_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
2194                 return 1;
2195         }
2196
2197         *pdata = data;
2198         return 0;
2199 }
2200
2201 static int get_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2202 {
2203         u64 data = 0;
2204
2205         switch (msr) {
2206         case HV_X64_MSR_VP_INDEX: {
2207                 int r;
2208                 struct kvm_vcpu *v;
2209                 kvm_for_each_vcpu(r, v, vcpu->kvm)
2210                         if (v == vcpu)
2211                                 data = r;
2212                 break;
2213         }
2214         case HV_X64_MSR_EOI:
2215                 return kvm_hv_vapic_msr_read(vcpu, APIC_EOI, pdata);
2216         case HV_X64_MSR_ICR:
2217                 return kvm_hv_vapic_msr_read(vcpu, APIC_ICR, pdata);
2218         case HV_X64_MSR_TPR:
2219                 return kvm_hv_vapic_msr_read(vcpu, APIC_TASKPRI, pdata);
2220         case HV_X64_MSR_APIC_ASSIST_PAGE:
2221                 data = vcpu->arch.hv_vapic;
2222                 break;
2223         default:
2224                 vcpu_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
2225                 return 1;
2226         }
2227         *pdata = data;
2228         return 0;
2229 }
2230
2231 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2232 {
2233         u64 data;
2234
2235         switch (msr) {
2236         case MSR_IA32_PLATFORM_ID:
2237         case MSR_IA32_EBL_CR_POWERON:
2238         case MSR_IA32_DEBUGCTLMSR:
2239         case MSR_IA32_LASTBRANCHFROMIP:
2240         case MSR_IA32_LASTBRANCHTOIP:
2241         case MSR_IA32_LASTINTFROMIP:
2242         case MSR_IA32_LASTINTTOIP:
2243         case MSR_K8_SYSCFG:
2244         case MSR_K7_HWCR:
2245         case MSR_VM_HSAVE_PA:
2246         case MSR_K7_EVNTSEL0:
2247         case MSR_K7_PERFCTR0:
2248         case MSR_K8_INT_PENDING_MSG:
2249         case MSR_AMD64_NB_CFG:
2250         case MSR_FAM10H_MMIO_CONF_BASE:
2251         case MSR_AMD64_BU_CFG2:
2252                 data = 0;
2253                 break;
2254         case MSR_P6_PERFCTR0:
2255         case MSR_P6_PERFCTR1:
2256         case MSR_P6_EVNTSEL0:
2257         case MSR_P6_EVNTSEL1:
2258                 if (kvm_pmu_msr(vcpu, msr))
2259                         return kvm_pmu_get_msr(vcpu, msr, pdata);
2260                 data = 0;
2261                 break;
2262         case MSR_IA32_UCODE_REV:
2263                 data = 0x100000000ULL;
2264                 break;
2265         case MSR_MTRRcap:
2266                 data = 0x500 | KVM_NR_VAR_MTRR;
2267                 break;
2268         case 0x200 ... 0x2ff:
2269                 return get_msr_mtrr(vcpu, msr, pdata);
2270         case 0xcd: /* fsb frequency */
2271                 data = 3;
2272                 break;
2273                 /*
2274                  * MSR_EBC_FREQUENCY_ID
2275                  * Conservative value valid for even the basic CPU models.
2276                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
2277                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
2278                  * and 266MHz for model 3, or 4. Set Core Clock
2279                  * Frequency to System Bus Frequency Ratio to 1 (bits
2280                  * 31:24) even though these are only valid for CPU
2281                  * models > 2, however guests may end up dividing or
2282                  * multiplying by zero otherwise.
2283                  */
2284         case MSR_EBC_FREQUENCY_ID:
2285                 data = 1 << 24;
2286                 break;
2287         case MSR_IA32_APICBASE:
2288                 data = kvm_get_apic_base(vcpu);
2289                 break;
2290         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2291                 return kvm_x2apic_msr_read(vcpu, msr, pdata);
2292                 break;
2293         case MSR_IA32_TSCDEADLINE:
2294                 data = kvm_get_lapic_tscdeadline_msr(vcpu);
2295                 break;
2296         case MSR_IA32_TSC_ADJUST:
2297                 data = (u64)vcpu->arch.ia32_tsc_adjust_msr;
2298                 break;
2299         case MSR_IA32_MISC_ENABLE:
2300                 data = vcpu->arch.ia32_misc_enable_msr;
2301                 break;
2302         case MSR_IA32_PERF_STATUS:
2303                 /* TSC increment by tick */
2304                 data = 1000ULL;
2305                 /* CPU multiplier */
2306                 data |= (((uint64_t)4ULL) << 40);
2307                 break;
2308         case MSR_EFER:
2309                 data = vcpu->arch.efer;
2310                 break;
2311         case MSR_KVM_WALL_CLOCK:
2312         case MSR_KVM_WALL_CLOCK_NEW:
2313                 data = vcpu->kvm->arch.wall_clock;
2314                 break;
2315         case MSR_KVM_SYSTEM_TIME:
2316         case MSR_KVM_SYSTEM_TIME_NEW:
2317                 data = vcpu->arch.time;
2318                 break;
2319         case MSR_KVM_ASYNC_PF_EN:
2320                 data = vcpu->arch.apf.msr_val;
2321                 break;
2322         case MSR_KVM_STEAL_TIME:
2323                 data = vcpu->arch.st.msr_val;
2324                 break;
2325         case MSR_KVM_PV_EOI_EN:
2326                 data = vcpu->arch.pv_eoi.msr_val;
2327                 break;
2328         case MSR_IA32_P5_MC_ADDR:
2329         case MSR_IA32_P5_MC_TYPE:
2330         case MSR_IA32_MCG_CAP:
2331         case MSR_IA32_MCG_CTL:
2332         case MSR_IA32_MCG_STATUS:
2333         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
2334                 return get_msr_mce(vcpu, msr, pdata);
2335         case MSR_K7_CLK_CTL:
2336                 /*
2337                  * Provide expected ramp-up count for K7. All other
2338                  * are set to zero, indicating minimum divisors for
2339                  * every field.
2340                  *
2341                  * This prevents guest kernels on AMD host with CPU
2342                  * type 6, model 8 and higher from exploding due to
2343                  * the rdmsr failing.
2344                  */
2345                 data = 0x20000000;
2346                 break;
2347         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2348                 if (kvm_hv_msr_partition_wide(msr)) {
2349                         int r;
2350                         mutex_lock(&vcpu->kvm->lock);
2351                         r = get_msr_hyperv_pw(vcpu, msr, pdata);
2352                         mutex_unlock(&vcpu->kvm->lock);
2353                         return r;
2354                 } else
2355                         return get_msr_hyperv(vcpu, msr, pdata);
2356                 break;
2357         case MSR_IA32_BBL_CR_CTL3:
2358                 /* This legacy MSR exists but isn't fully documented in current
2359                  * silicon.  It is however accessed by winxp in very narrow
2360                  * scenarios where it sets bit #19, itself documented as
2361                  * a "reserved" bit.  Best effort attempt to source coherent
2362                  * read data here should the balance of the register be
2363                  * interpreted by the guest:
2364                  *
2365                  * L2 cache control register 3: 64GB range, 256KB size,
2366                  * enabled, latency 0x1, configured
2367                  */
2368                 data = 0xbe702111;
2369                 break;
2370         case MSR_AMD64_OSVW_ID_LENGTH:
2371                 if (!guest_cpuid_has_osvw(vcpu))
2372                         return 1;
2373                 data = vcpu->arch.osvw.length;
2374                 break;
2375         case MSR_AMD64_OSVW_STATUS:
2376                 if (!guest_cpuid_has_osvw(vcpu))
2377                         return 1;
2378                 data = vcpu->arch.osvw.status;
2379                 break;
2380         default:
2381                 if (kvm_pmu_msr(vcpu, msr))
2382                         return kvm_pmu_get_msr(vcpu, msr, pdata);
2383                 if (!ignore_msrs) {
2384                         vcpu_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
2385                         return 1;
2386                 } else {
2387                         vcpu_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr);
2388                         data = 0;
2389                 }
2390                 break;
2391         }
2392         *pdata = data;
2393         return 0;
2394 }
2395 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
2396
2397 /*
2398  * Read or write a bunch of msrs. All parameters are kernel addresses.
2399  *
2400  * @return number of msrs set successfully.
2401  */
2402 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
2403                     struct kvm_msr_entry *entries,
2404                     int (*do_msr)(struct kvm_vcpu *vcpu,
2405                                   unsigned index, u64 *data))
2406 {
2407         int i, idx;
2408
2409         idx = srcu_read_lock(&vcpu->kvm->srcu);
2410         for (i = 0; i < msrs->nmsrs; ++i)
2411                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
2412                         break;
2413         srcu_read_unlock(&vcpu->kvm->srcu, idx);
2414
2415         return i;
2416 }
2417
2418 /*
2419  * Read or write a bunch of msrs. Parameters are user addresses.
2420  *
2421  * @return number of msrs set successfully.
2422  */
2423 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
2424                   int (*do_msr)(struct kvm_vcpu *vcpu,
2425                                 unsigned index, u64 *data),
2426                   int writeback)
2427 {
2428         struct kvm_msrs msrs;
2429         struct kvm_msr_entry *entries;
2430         int r, n;
2431         unsigned size;
2432
2433         r = -EFAULT;
2434         if (copy_from_user(&msrs, user_msrs, sizeof msrs))
2435                 goto out;
2436
2437         r = -E2BIG;
2438         if (msrs.nmsrs >= MAX_IO_MSRS)
2439                 goto out;
2440
2441         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
2442         entries = memdup_user(user_msrs->entries, size);
2443         if (IS_ERR(entries)) {
2444                 r = PTR_ERR(entries);
2445                 goto out;
2446         }
2447
2448         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
2449         if (r < 0)
2450                 goto out_free;
2451
2452         r = -EFAULT;
2453         if (writeback && copy_to_user(user_msrs->entries, entries, size))
2454                 goto out_free;
2455
2456         r = n;
2457
2458 out_free:
2459         kfree(entries);
2460 out:
2461         return r;
2462 }
2463
2464 int kvm_dev_ioctl_check_extension(long ext)
2465 {
2466         int r;
2467
2468         switch (ext) {
2469         case KVM_CAP_IRQCHIP:
2470         case KVM_CAP_HLT:
2471         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
2472         case KVM_CAP_SET_TSS_ADDR:
2473         case KVM_CAP_EXT_CPUID:
2474         case KVM_CAP_CLOCKSOURCE:
2475         case KVM_CAP_PIT:
2476         case KVM_CAP_NOP_IO_DELAY:
2477         case KVM_CAP_MP_STATE:
2478         case KVM_CAP_SYNC_MMU:
2479         case KVM_CAP_USER_NMI:
2480         case KVM_CAP_REINJECT_CONTROL:
2481         case KVM_CAP_IRQ_INJECT_STATUS:
2482         case KVM_CAP_ASSIGN_DEV_IRQ:
2483         case KVM_CAP_IRQFD:
2484         case KVM_CAP_IOEVENTFD:
2485         case KVM_CAP_PIT2:
2486         case KVM_CAP_PIT_STATE2:
2487         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
2488         case KVM_CAP_XEN_HVM:
2489         case KVM_CAP_ADJUST_CLOCK:
2490         case KVM_CAP_VCPU_EVENTS:
2491         case KVM_CAP_HYPERV:
2492         case KVM_CAP_HYPERV_VAPIC:
2493         case KVM_CAP_HYPERV_SPIN:
2494         case KVM_CAP_PCI_SEGMENT:
2495         case KVM_CAP_DEBUGREGS:
2496         case KVM_CAP_X86_ROBUST_SINGLESTEP:
2497         case KVM_CAP_XSAVE:
2498         case KVM_CAP_ASYNC_PF:
2499         case KVM_CAP_GET_TSC_KHZ:
2500         case KVM_CAP_PCI_2_3:
2501         case KVM_CAP_KVMCLOCK_CTRL:
2502         case KVM_CAP_READONLY_MEM:
2503         case KVM_CAP_IRQFD_RESAMPLE:
2504                 r = 1;
2505                 break;
2506         case KVM_CAP_COALESCED_MMIO:
2507                 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
2508                 break;
2509         case KVM_CAP_VAPIC:
2510                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
2511                 break;
2512         case KVM_CAP_NR_VCPUS:
2513                 r = KVM_SOFT_MAX_VCPUS;
2514                 break;
2515         case KVM_CAP_MAX_VCPUS:
2516                 r = KVM_MAX_VCPUS;
2517                 break;
2518         case KVM_CAP_NR_MEMSLOTS:
2519                 r = KVM_USER_MEM_SLOTS;
2520                 break;
2521         case KVM_CAP_PV_MMU:    /* obsolete */
2522                 r = 0;
2523                 break;
2524         case KVM_CAP_IOMMU:
2525                 r = iommu_present(&pci_bus_type);
2526                 break;
2527         case KVM_CAP_MCE:
2528                 r = KVM_MAX_MCE_BANKS;
2529                 break;
2530         case KVM_CAP_XCRS:
2531                 r = cpu_has_xsave;
2532                 break;
2533         case KVM_CAP_TSC_CONTROL:
2534                 r = kvm_has_tsc_control;
2535                 break;
2536         case KVM_CAP_TSC_DEADLINE_TIMER:
2537                 r = boot_cpu_has(X86_FEATURE_TSC_DEADLINE_TIMER);
2538                 break;
2539         default:
2540                 r = 0;
2541                 break;
2542         }
2543         return r;
2544
2545 }
2546
2547 long kvm_arch_dev_ioctl(struct file *filp,
2548                         unsigned int ioctl, unsigned long arg)
2549 {
2550         void __user *argp = (void __user *)arg;
2551         long r;
2552
2553         switch (ioctl) {
2554         case KVM_GET_MSR_INDEX_LIST: {
2555                 struct kvm_msr_list __user *user_msr_list = argp;
2556                 struct kvm_msr_list msr_list;
2557                 unsigned n;
2558
2559                 r = -EFAULT;
2560                 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
2561                         goto out;
2562                 n = msr_list.nmsrs;
2563                 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
2564                 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
2565                         goto out;
2566                 r = -E2BIG;
2567                 if (n < msr_list.nmsrs)
2568                         goto out;
2569                 r = -EFAULT;
2570                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
2571                                  num_msrs_to_save * sizeof(u32)))
2572                         goto out;
2573                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
2574                                  &emulated_msrs,
2575                                  ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
2576                         goto out;
2577                 r = 0;
2578                 break;
2579         }
2580         case KVM_GET_SUPPORTED_CPUID: {
2581                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2582                 struct kvm_cpuid2 cpuid;
2583
2584                 r = -EFAULT;
2585                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2586                         goto out;
2587                 r = kvm_dev_ioctl_get_supported_cpuid(&cpuid,
2588                                                       cpuid_arg->entries);
2589                 if (r)
2590                         goto out;
2591
2592                 r = -EFAULT;
2593                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2594                         goto out;
2595                 r = 0;
2596                 break;
2597         }
2598         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
2599                 u64 mce_cap;
2600
2601                 mce_cap = KVM_MCE_CAP_SUPPORTED;
2602                 r = -EFAULT;
2603                 if (copy_to_user(argp, &mce_cap, sizeof mce_cap))
2604                         goto out;
2605                 r = 0;
2606                 break;
2607         }
2608         default:
2609                 r = -EINVAL;
2610         }
2611 out:
2612         return r;
2613 }
2614
2615 static void wbinvd_ipi(void *garbage)
2616 {
2617         wbinvd();
2618 }
2619
2620 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
2621 {
2622         return vcpu->kvm->arch.iommu_domain &&
2623                 !(vcpu->kvm->arch.iommu_flags & KVM_IOMMU_CACHE_COHERENCY);
2624 }
2625
2626 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
2627 {
2628         /* Address WBINVD may be executed by guest */
2629         if (need_emulate_wbinvd(vcpu)) {
2630                 if (kvm_x86_ops->has_wbinvd_exit())
2631                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
2632                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
2633                         smp_call_function_single(vcpu->cpu,
2634                                         wbinvd_ipi, NULL, 1);
2635         }
2636
2637         kvm_x86_ops->vcpu_load(vcpu, cpu);
2638
2639         /* Apply any externally detected TSC adjustments (due to suspend) */
2640         if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
2641                 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
2642                 vcpu->arch.tsc_offset_adjustment = 0;
2643                 set_bit(KVM_REQ_CLOCK_UPDATE, &vcpu->requests);
2644         }
2645
2646         if (unlikely(vcpu->cpu != cpu) || check_tsc_unstable()) {
2647                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
2648                                 native_read_tsc() - vcpu->arch.last_host_tsc;
2649                 if (tsc_delta < 0)
2650                         mark_tsc_unstable("KVM discovered backwards TSC");
2651                 if (check_tsc_unstable()) {
2652                         u64 offset = kvm_x86_ops->compute_tsc_offset(vcpu,
2653                                                 vcpu->arch.last_guest_tsc);
2654                         kvm_x86_ops->write_tsc_offset(vcpu, offset);
2655                         vcpu->arch.tsc_catchup = 1;
2656                 }
2657                 /*
2658                  * On a host with synchronized TSC, there is no need to update
2659                  * kvmclock on vcpu->cpu migration
2660                  */
2661                 if (!vcpu->kvm->arch.use_master_clock || vcpu->cpu == -1)
2662                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2663                 if (vcpu->cpu != cpu)
2664                         kvm_migrate_timers(vcpu);
2665                 vcpu->cpu = cpu;
2666         }
2667
2668         accumulate_steal_time(vcpu);
2669         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2670 }
2671
2672 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
2673 {
2674         kvm_x86_ops->vcpu_put(vcpu);
2675         kvm_put_guest_fpu(vcpu);
2676         vcpu->arch.last_host_tsc = native_read_tsc();
2677 }
2678
2679 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
2680                                     struct kvm_lapic_state *s)
2681 {
2682         memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
2683
2684         return 0;
2685 }
2686
2687 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
2688                                     struct kvm_lapic_state *s)
2689 {
2690         kvm_apic_post_state_restore(vcpu, s);
2691         update_cr8_intercept(vcpu);
2692
2693         return 0;
2694 }
2695
2696 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
2697                                     struct kvm_interrupt *irq)
2698 {
2699         if (irq->irq < 0 || irq->irq >= KVM_NR_INTERRUPTS)
2700                 return -EINVAL;
2701         if (irqchip_in_kernel(vcpu->kvm))
2702                 return -ENXIO;
2703
2704         kvm_queue_interrupt(vcpu, irq->irq, false);
2705         kvm_make_request(KVM_REQ_EVENT, vcpu);
2706
2707         return 0;
2708 }
2709
2710 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
2711 {
2712         kvm_inject_nmi(vcpu);
2713
2714         return 0;
2715 }
2716
2717 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
2718                                            struct kvm_tpr_access_ctl *tac)
2719 {
2720         if (tac->flags)
2721                 return -EINVAL;
2722         vcpu->arch.tpr_access_reporting = !!tac->enabled;
2723         return 0;
2724 }
2725
2726 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
2727                                         u64 mcg_cap)
2728 {
2729         int r;
2730         unsigned bank_num = mcg_cap & 0xff, bank;
2731
2732         r = -EINVAL;
2733         if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
2734                 goto out;
2735         if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000))
2736                 goto out;
2737         r = 0;
2738         vcpu->arch.mcg_cap = mcg_cap;
2739         /* Init IA32_MCG_CTL to all 1s */
2740         if (mcg_cap & MCG_CTL_P)
2741                 vcpu->arch.mcg_ctl = ~(u64)0;
2742         /* Init IA32_MCi_CTL to all 1s */
2743         for (bank = 0; bank < bank_num; bank++)
2744                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
2745 out:
2746         return r;
2747 }
2748
2749 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
2750                                       struct kvm_x86_mce *mce)
2751 {
2752         u64 mcg_cap = vcpu->arch.mcg_cap;
2753         unsigned bank_num = mcg_cap & 0xff;
2754         u64 *banks = vcpu->arch.mce_banks;
2755
2756         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
2757                 return -EINVAL;
2758         /*
2759          * if IA32_MCG_CTL is not all 1s, the uncorrected error
2760          * reporting is disabled
2761          */
2762         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
2763             vcpu->arch.mcg_ctl != ~(u64)0)
2764                 return 0;
2765         banks += 4 * mce->bank;
2766         /*
2767          * if IA32_MCi_CTL is not all 1s, the uncorrected error
2768          * reporting is disabled for the bank
2769          */
2770         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
2771                 return 0;
2772         if (mce->status & MCI_STATUS_UC) {
2773                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
2774                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
2775                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
2776                         return 0;
2777                 }
2778                 if (banks[1] & MCI_STATUS_VAL)
2779                         mce->status |= MCI_STATUS_OVER;
2780                 banks[2] = mce->addr;
2781                 banks[3] = mce->misc;
2782                 vcpu->arch.mcg_status = mce->mcg_status;
2783                 banks[1] = mce->status;
2784                 kvm_queue_exception(vcpu, MC_VECTOR);
2785         } else if (!(banks[1] & MCI_STATUS_VAL)
2786                    || !(banks[1] & MCI_STATUS_UC)) {
2787                 if (banks[1] & MCI_STATUS_VAL)
2788                         mce->status |= MCI_STATUS_OVER;
2789                 banks[2] = mce->addr;
2790                 banks[3] = mce->misc;
2791                 banks[1] = mce->status;
2792         } else
2793                 banks[1] |= MCI_STATUS_OVER;
2794         return 0;
2795 }
2796
2797 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
2798                                                struct kvm_vcpu_events *events)
2799 {
2800         process_nmi(vcpu);
2801         events->exception.injected =
2802                 vcpu->arch.exception.pending &&
2803                 !kvm_exception_is_soft(vcpu->arch.exception.nr);
2804         events->exception.nr = vcpu->arch.exception.nr;
2805         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
2806         events->exception.pad = 0;
2807         events->exception.error_code = vcpu->arch.exception.error_code;
2808
2809         events->interrupt.injected =
2810                 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
2811         events->interrupt.nr = vcpu->arch.interrupt.nr;
2812         events->interrupt.soft = 0;
2813         events->interrupt.shadow =
2814                 kvm_x86_ops->get_interrupt_shadow(vcpu,
2815                         KVM_X86_SHADOW_INT_MOV_SS | KVM_X86_SHADOW_INT_STI);
2816
2817         events->nmi.injected = vcpu->arch.nmi_injected;
2818         events->nmi.pending = vcpu->arch.nmi_pending != 0;
2819         events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
2820         events->nmi.pad = 0;
2821
2822         events->sipi_vector = vcpu->arch.sipi_vector;
2823
2824         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
2825                          | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2826                          | KVM_VCPUEVENT_VALID_SHADOW);
2827         memset(&events->reserved, 0, sizeof(events->reserved));
2828 }
2829
2830 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
2831                                               struct kvm_vcpu_events *events)
2832 {
2833         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2834                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2835                               | KVM_VCPUEVENT_VALID_SHADOW))
2836                 return -EINVAL;
2837
2838         process_nmi(vcpu);
2839         vcpu->arch.exception.pending = events->exception.injected;
2840         vcpu->arch.exception.nr = events->exception.nr;
2841         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
2842         vcpu->arch.exception.error_code = events->exception.error_code;
2843
2844         vcpu->arch.interrupt.pending = events->interrupt.injected;
2845         vcpu->arch.interrupt.nr = events->interrupt.nr;
2846         vcpu->arch.interrupt.soft = events->interrupt.soft;
2847         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
2848                 kvm_x86_ops->set_interrupt_shadow(vcpu,
2849                                                   events->interrupt.shadow);
2850
2851         vcpu->arch.nmi_injected = events->nmi.injected;
2852         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
2853                 vcpu->arch.nmi_pending = events->nmi.pending;
2854         kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
2855
2856         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR)
2857                 vcpu->arch.sipi_vector = events->sipi_vector;
2858
2859         kvm_make_request(KVM_REQ_EVENT, vcpu);
2860
2861         return 0;
2862 }
2863
2864 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
2865                                              struct kvm_debugregs *dbgregs)
2866 {
2867         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
2868         dbgregs->dr6 = vcpu->arch.dr6;
2869         dbgregs->dr7 = vcpu->arch.dr7;
2870         dbgregs->flags = 0;
2871         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
2872 }
2873
2874 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
2875                                             struct kvm_debugregs *dbgregs)
2876 {
2877         if (dbgregs->flags)
2878                 return -EINVAL;
2879
2880         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
2881         vcpu->arch.dr6 = dbgregs->dr6;
2882         vcpu->arch.dr7 = dbgregs->dr7;
2883
2884         return 0;
2885 }
2886
2887 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
2888                                          struct kvm_xsave *guest_xsave)
2889 {
2890         if (cpu_has_xsave)
2891                 memcpy(guest_xsave->region,
2892                         &vcpu->arch.guest_fpu.state->xsave,
2893                         xstate_size);
2894         else {
2895                 memcpy(guest_xsave->region,
2896                         &vcpu->arch.guest_fpu.state->fxsave,
2897                         sizeof(struct i387_fxsave_struct));
2898                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
2899                         XSTATE_FPSSE;
2900         }
2901 }
2902
2903 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
2904                                         struct kvm_xsave *guest_xsave)
2905 {
2906         u64 xstate_bv =
2907                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
2908
2909         if (cpu_has_xsave)
2910                 memcpy(&vcpu->arch.guest_fpu.state->xsave,
2911                         guest_xsave->region, xstate_size);
2912         else {
2913                 if (xstate_bv & ~XSTATE_FPSSE)
2914                         return -EINVAL;
2915                 memcpy(&vcpu->arch.guest_fpu.state->fxsave,
2916                         guest_xsave->region, sizeof(struct i387_fxsave_struct));
2917         }
2918         return 0;
2919 }
2920
2921 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
2922                                         struct kvm_xcrs *guest_xcrs)
2923 {
2924         if (!cpu_has_xsave) {
2925                 guest_xcrs->nr_xcrs = 0;
2926                 return;
2927         }
2928
2929         guest_xcrs->nr_xcrs = 1;
2930         guest_xcrs->flags = 0;
2931         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
2932         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
2933 }
2934
2935 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
2936                                        struct kvm_xcrs *guest_xcrs)
2937 {
2938         int i, r = 0;
2939
2940         if (!cpu_has_xsave)
2941                 return -EINVAL;
2942
2943         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
2944                 return -EINVAL;
2945
2946         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
2947                 /* Only support XCR0 currently */
2948                 if (guest_xcrs->xcrs[0].xcr == XCR_XFEATURE_ENABLED_MASK) {
2949                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
2950                                 guest_xcrs->xcrs[0].value);
2951                         break;
2952                 }
2953         if (r)
2954                 r = -EINVAL;
2955         return r;
2956 }
2957
2958 /*
2959  * kvm_set_guest_paused() indicates to the guest kernel that it has been
2960  * stopped by the hypervisor.  This function will be called from the host only.
2961  * EINVAL is returned when the host attempts to set the flag for a guest that
2962  * does not support pv clocks.
2963  */
2964 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
2965 {
2966         if (!vcpu->arch.pv_time_enabled)
2967                 return -EINVAL;
2968         vcpu->arch.pvclock_set_guest_stopped_request = true;
2969         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2970         return 0;
2971 }
2972
2973 long kvm_arch_vcpu_ioctl(struct file *filp,
2974                          unsigned int ioctl, unsigned long arg)
2975 {
2976         struct kvm_vcpu *vcpu = filp->private_data;
2977         void __user *argp = (void __user *)arg;
2978         int r;
2979         union {
2980                 struct kvm_lapic_state *lapic;
2981                 struct kvm_xsave *xsave;
2982                 struct kvm_xcrs *xcrs;
2983                 void *buffer;
2984         } u;
2985
2986         u.buffer = NULL;
2987         switch (ioctl) {
2988         case KVM_GET_LAPIC: {
2989                 r = -EINVAL;
2990                 if (!vcpu->arch.apic)
2991                         goto out;
2992                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
2993
2994                 r = -ENOMEM;
2995                 if (!u.lapic)
2996                         goto out;
2997                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
2998                 if (r)
2999                         goto out;
3000                 r = -EFAULT;
3001                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
3002                         goto out;
3003                 r = 0;
3004                 break;
3005         }
3006         case KVM_SET_LAPIC: {
3007                 r = -EINVAL;
3008                 if (!vcpu->arch.apic)
3009                         goto out;
3010                 u.lapic = memdup_user(argp, sizeof(*u.lapic));
3011                 if (IS_ERR(u.lapic))
3012                         return PTR_ERR(u.lapic);
3013
3014                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
3015                 break;
3016         }
3017         case KVM_INTERRUPT: {
3018                 struct kvm_interrupt irq;
3019
3020                 r = -EFAULT;
3021                 if (copy_from_user(&irq, argp, sizeof irq))
3022                         goto out;
3023                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
3024                 break;
3025         }
3026         case KVM_NMI: {
3027                 r = kvm_vcpu_ioctl_nmi(vcpu);
3028                 break;
3029         }
3030         case KVM_SET_CPUID: {
3031                 struct kvm_cpuid __user *cpuid_arg = argp;
3032                 struct kvm_cpuid cpuid;
3033
3034                 r = -EFAULT;
3035                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3036                         goto out;
3037                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
3038                 break;
3039         }
3040         case KVM_SET_CPUID2: {
3041                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3042                 struct kvm_cpuid2 cpuid;
3043
3044                 r = -EFAULT;
3045                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3046                         goto out;
3047                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
3048                                               cpuid_arg->entries);
3049                 break;
3050         }
3051         case KVM_GET_CPUID2: {
3052                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3053                 struct kvm_cpuid2 cpuid;
3054
3055                 r = -EFAULT;
3056                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3057                         goto out;
3058                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
3059                                               cpuid_arg->entries);
3060                 if (r)
3061                         goto out;
3062                 r = -EFAULT;
3063                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
3064                         goto out;
3065                 r = 0;
3066                 break;
3067         }
3068         case KVM_GET_MSRS:
3069                 r = msr_io(vcpu, argp, kvm_get_msr, 1);
3070                 break;
3071         case KVM_SET_MSRS:
3072                 r = msr_io(vcpu, argp, do_set_msr, 0);
3073                 break;
3074         case KVM_TPR_ACCESS_REPORTING: {
3075                 struct kvm_tpr_access_ctl tac;
3076
3077                 r = -EFAULT;
3078                 if (copy_from_user(&tac, argp, sizeof tac))
3079                         goto out;
3080                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
3081                 if (r)
3082                         goto out;
3083                 r = -EFAULT;
3084                 if (copy_to_user(argp, &tac, sizeof tac))
3085                         goto out;
3086                 r = 0;
3087                 break;
3088         };
3089         case KVM_SET_VAPIC_ADDR: {
3090                 struct kvm_vapic_addr va;
3091
3092                 r = -EINVAL;
3093                 if (!irqchip_in_kernel(vcpu->kvm))
3094                         goto out;
3095                 r = -EFAULT;
3096                 if (copy_from_user(&va, argp, sizeof va))
3097                         goto out;
3098                 r = 0;
3099                 kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
3100                 break;
3101         }
3102         case KVM_X86_SETUP_MCE: {
3103                 u64 mcg_cap;
3104
3105                 r = -EFAULT;
3106                 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
3107                         goto out;
3108                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
3109                 break;
3110         }
3111         case KVM_X86_SET_MCE: {
3112                 struct kvm_x86_mce mce;
3113
3114                 r = -EFAULT;
3115                 if (copy_from_user(&mce, argp, sizeof mce))
3116                         goto out;
3117                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
3118                 break;
3119         }
3120         case KVM_GET_VCPU_EVENTS: {
3121                 struct kvm_vcpu_events events;
3122
3123                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
3124
3125                 r = -EFAULT;
3126                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
3127                         break;
3128                 r = 0;
3129                 break;
3130         }
3131         case KVM_SET_VCPU_EVENTS: {
3132                 struct kvm_vcpu_events events;
3133
3134                 r = -EFAULT;
3135                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
3136                         break;
3137
3138                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
3139                 break;
3140         }
3141         case KVM_GET_DEBUGREGS: {
3142                 struct kvm_debugregs dbgregs;
3143
3144                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
3145
3146                 r = -EFAULT;
3147                 if (copy_to_user(argp, &dbgregs,
3148                                  sizeof(struct kvm_debugregs)))
3149                         break;
3150                 r = 0;
3151                 break;
3152         }
3153         case KVM_SET_DEBUGREGS: {
3154                 struct kvm_debugregs dbgregs;
3155
3156                 r = -EFAULT;
3157                 if (copy_from_user(&dbgregs, argp,
3158                                    sizeof(struct kvm_debugregs)))
3159                         break;
3160
3161                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
3162                 break;
3163         }
3164         case KVM_GET_XSAVE: {
3165                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
3166                 r = -ENOMEM;
3167                 if (!u.xsave)
3168                         break;
3169
3170                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
3171
3172                 r = -EFAULT;
3173                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
3174                         break;
3175                 r = 0;
3176                 break;
3177         }
3178         case KVM_SET_XSAVE: {
3179                 u.xsave = memdup_user(argp, sizeof(*u.xsave));
3180                 if (IS_ERR(u.xsave))
3181                         return PTR_ERR(u.xsave);
3182
3183                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
3184                 break;
3185         }
3186         case KVM_GET_XCRS: {
3187                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
3188                 r = -ENOMEM;
3189                 if (!u.xcrs)
3190                         break;
3191
3192                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
3193
3194                 r = -EFAULT;
3195                 if (copy_to_user(argp, u.xcrs,
3196                                  sizeof(struct kvm_xcrs)))
3197                         break;
3198                 r = 0;
3199                 break;
3200         }
3201         case KVM_SET_XCRS: {
3202                 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
3203                 if (IS_ERR(u.xcrs))
3204                         return PTR_ERR(u.xcrs);
3205
3206                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
3207                 break;
3208         }
3209         case KVM_SET_TSC_KHZ: {
3210                 u32 user_tsc_khz;
3211
3212                 r = -EINVAL;
3213                 user_tsc_khz = (u32)arg;
3214
3215                 if (user_tsc_khz >= kvm_max_guest_tsc_khz)
3216                         goto out;
3217
3218                 if (user_tsc_khz == 0)
3219                         user_tsc_khz = tsc_khz;
3220
3221                 kvm_set_tsc_khz(vcpu, user_tsc_khz);
3222
3223                 r = 0;
3224                 goto out;
3225         }
3226         case KVM_GET_TSC_KHZ: {
3227                 r = vcpu->arch.virtual_tsc_khz;
3228                 goto out;
3229         }
3230         case KVM_KVMCLOCK_CTRL: {
3231                 r = kvm_set_guest_paused(vcpu);
3232                 goto out;
3233         }
3234         default:
3235                 r = -EINVAL;
3236         }
3237 out:
3238         kfree(u.buffer);
3239         return r;
3240 }
3241
3242 int kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
3243 {
3244         return VM_FAULT_SIGBUS;
3245 }
3246
3247 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
3248 {
3249         int ret;
3250
3251         if (addr > (unsigned int)(-3 * PAGE_SIZE))
3252                 return -EINVAL;
3253         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
3254         return ret;
3255 }
3256
3257 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
3258                                               u64 ident_addr)
3259 {
3260         kvm->arch.ept_identity_map_addr = ident_addr;
3261         return 0;
3262 }
3263
3264 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
3265                                           u32 kvm_nr_mmu_pages)
3266 {
3267         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
3268                 return -EINVAL;
3269
3270         mutex_lock(&kvm->slots_lock);
3271
3272         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
3273         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
3274
3275         mutex_unlock(&kvm->slots_lock);
3276         return 0;
3277 }
3278
3279 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
3280 {
3281         return kvm->arch.n_max_mmu_pages;
3282 }
3283
3284 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3285 {
3286         int r;
3287
3288         r = 0;
3289         switch (chip->chip_id) {
3290         case KVM_IRQCHIP_PIC_MASTER:
3291                 memcpy(&chip->chip.pic,
3292                         &pic_irqchip(kvm)->pics[0],
3293                         sizeof(struct kvm_pic_state));
3294                 break;
3295         case KVM_IRQCHIP_PIC_SLAVE:
3296                 memcpy(&chip->chip.pic,
3297                         &pic_irqchip(kvm)->pics[1],
3298                         sizeof(struct kvm_pic_state));
3299                 break;
3300         case KVM_IRQCHIP_IOAPIC:
3301                 r = kvm_get_ioapic(kvm, &chip->chip.ioapic);
3302                 break;
3303         default:
3304                 r = -EINVAL;
3305                 break;
3306         }
3307         return r;
3308 }
3309
3310 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3311 {
3312         int r;
3313
3314         r = 0;
3315         switch (chip->chip_id) {
3316         case KVM_IRQCHIP_PIC_MASTER:
3317                 spin_lock(&pic_irqchip(kvm)->lock);
3318                 memcpy(&pic_irqchip(kvm)->pics[0],
3319                         &chip->chip.pic,
3320                         sizeof(struct kvm_pic_state));
3321                 spin_unlock(&pic_irqchip(kvm)->lock);
3322                 break;
3323         case KVM_IRQCHIP_PIC_SLAVE:
3324                 spin_lock(&pic_irqchip(kvm)->lock);
3325                 memcpy(&pic_irqchip(kvm)->pics[1],
3326                         &chip->chip.pic,
3327                         sizeof(struct kvm_pic_state));
3328                 spin_unlock(&pic_irqchip(kvm)->lock);
3329                 break;
3330         case KVM_IRQCHIP_IOAPIC:
3331                 r = kvm_set_ioapic(kvm, &chip->chip.ioapic);
3332                 break;
3333         default:
3334                 r = -EINVAL;
3335                 break;
3336         }
3337         kvm_pic_update_irq(pic_irqchip(kvm));
3338         return r;
3339 }
3340
3341 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3342 {
3343         int r = 0;
3344
3345         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3346         memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
3347         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3348         return r;
3349 }
3350
3351 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3352 {
3353         int r = 0;
3354
3355         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3356         memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
3357         kvm_pit_load_count(kvm, 0, ps->channels[0].count, 0);
3358         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3359         return r;
3360 }
3361
3362 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3363 {
3364         int r = 0;
3365
3366         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3367         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
3368                 sizeof(ps->channels));
3369         ps->flags = kvm->arch.vpit->pit_state.flags;
3370         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3371         memset(&ps->reserved, 0, sizeof(ps->reserved));
3372         return r;
3373 }
3374
3375 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3376 {
3377         int r = 0, start = 0;
3378         u32 prev_legacy, cur_legacy;
3379         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3380         prev_legacy = kvm->arch.vpit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
3381         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
3382         if (!prev_legacy && cur_legacy)
3383                 start = 1;
3384         memcpy(&kvm->arch.vpit->pit_state.channels, &ps->channels,
3385                sizeof(kvm->arch.vpit->pit_state.channels));
3386         kvm->arch.vpit->pit_state.flags = ps->flags;
3387         kvm_pit_load_count(kvm, 0, kvm->arch.vpit->pit_state.channels[0].count, start);
3388         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3389         return r;
3390 }
3391
3392 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
3393                                  struct kvm_reinject_control *control)
3394 {
3395         if (!kvm->arch.vpit)
3396                 return -ENXIO;
3397         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3398         kvm->arch.vpit->pit_state.reinject = control->pit_reinject;
3399         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3400         return 0;
3401 }
3402
3403 /**
3404  * kvm_vm_ioctl_get_dirty_log - get and clear the log of dirty pages in a slot
3405  * @kvm: kvm instance
3406  * @log: slot id and address to which we copy the log
3407  *
3408  * We need to keep it in mind that VCPU threads can write to the bitmap
3409  * concurrently.  So, to avoid losing data, we keep the following order for
3410  * each bit:
3411  *
3412  *   1. Take a snapshot of the bit and clear it if needed.
3413  *   2. Write protect the corresponding page.
3414  *   3. Flush TLB's if needed.
3415  *   4. Copy the snapshot to the userspace.
3416  *
3417  * Between 2 and 3, the guest may write to the page using the remaining TLB
3418  * entry.  This is not a problem because the page will be reported dirty at
3419  * step 4 using the snapshot taken before and step 3 ensures that successive
3420  * writes will be logged for the next call.
3421  */
3422 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
3423 {
3424         int r;
3425         struct kvm_memory_slot *memslot;
3426         unsigned long n, i;
3427         unsigned long *dirty_bitmap;
3428         unsigned long *dirty_bitmap_buffer;
3429         bool is_dirty = false;
3430
3431         mutex_lock(&kvm->slots_lock);
3432
3433         r = -EINVAL;
3434         if (log->slot >= KVM_USER_MEM_SLOTS)
3435                 goto out;
3436
3437         memslot = id_to_memslot(kvm->memslots, log->slot);
3438
3439         dirty_bitmap = memslot->dirty_bitmap;
3440         r = -ENOENT;
3441         if (!dirty_bitmap)
3442                 goto out;
3443
3444         n = kvm_dirty_bitmap_bytes(memslot);
3445
3446         dirty_bitmap_buffer = dirty_bitmap + n / sizeof(long);
3447         memset(dirty_bitmap_buffer, 0, n);
3448
3449         spin_lock(&kvm->mmu_lock);
3450
3451         for (i = 0; i < n / sizeof(long); i++) {
3452                 unsigned long mask;
3453                 gfn_t offset;
3454
3455                 if (!dirty_bitmap[i])
3456                         continue;
3457
3458                 is_dirty = true;
3459
3460                 mask = xchg(&dirty_bitmap[i], 0);
3461                 dirty_bitmap_buffer[i] = mask;
3462
3463                 offset = i * BITS_PER_LONG;
3464                 kvm_mmu_write_protect_pt_masked(kvm, memslot, offset, mask);
3465         }
3466         if (is_dirty)
3467                 kvm_flush_remote_tlbs(kvm);
3468
3469         spin_unlock(&kvm->mmu_lock);
3470
3471         r = -EFAULT;
3472         if (copy_to_user(log->dirty_bitmap, dirty_bitmap_buffer, n))
3473                 goto out;
3474
3475         r = 0;
3476 out:
3477         mutex_unlock(&kvm->slots_lock);
3478         return r;
3479 }
3480
3481 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event)
3482 {
3483         if (!irqchip_in_kernel(kvm))
3484                 return -ENXIO;
3485
3486         irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
3487                                         irq_event->irq, irq_event->level);
3488         return 0;
3489 }
3490
3491 long kvm_arch_vm_ioctl(struct file *filp,
3492                        unsigned int ioctl, unsigned long arg)
3493 {
3494         struct kvm *kvm = filp->private_data;
3495         void __user *argp = (void __user *)arg;
3496         int r = -ENOTTY;
3497         /*
3498          * This union makes it completely explicit to gcc-3.x
3499          * that these two variables' stack usage should be
3500          * combined, not added together.
3501          */
3502         union {
3503                 struct kvm_pit_state ps;
3504                 struct kvm_pit_state2 ps2;
3505                 struct kvm_pit_config pit_config;
3506         } u;
3507
3508         switch (ioctl) {
3509         case KVM_SET_TSS_ADDR:
3510                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
3511                 break;
3512         case KVM_SET_IDENTITY_MAP_ADDR: {
3513                 u64 ident_addr;
3514
3515                 r = -EFAULT;
3516                 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
3517                         goto out;
3518                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
3519                 break;
3520         }
3521         case KVM_SET_NR_MMU_PAGES:
3522                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
3523                 break;
3524         case KVM_GET_NR_MMU_PAGES:
3525                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
3526                 break;
3527         case KVM_CREATE_IRQCHIP: {
3528                 struct kvm_pic *vpic;
3529
3530                 mutex_lock(&kvm->lock);
3531                 r = -EEXIST;
3532                 if (kvm->arch.vpic)
3533                         goto create_irqchip_unlock;
3534                 r = -EINVAL;
3535                 if (atomic_read(&kvm->online_vcpus))
3536                         goto create_irqchip_unlock;
3537                 r = -ENOMEM;
3538                 vpic = kvm_create_pic(kvm);
3539                 if (vpic) {
3540                         r = kvm_ioapic_init(kvm);
3541                         if (r) {
3542                                 mutex_lock(&kvm->slots_lock);
3543                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3544                                                           &vpic->dev_master);
3545                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3546                                                           &vpic->dev_slave);
3547                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3548                                                           &vpic->dev_eclr);
3549                                 mutex_unlock(&kvm->slots_lock);
3550                                 kfree(vpic);
3551                                 goto create_irqchip_unlock;
3552                         }
3553                 } else
3554                         goto create_irqchip_unlock;
3555                 smp_wmb();
3556                 kvm->arch.vpic = vpic;
3557                 smp_wmb();
3558                 r = kvm_setup_default_irq_routing(kvm);
3559                 if (r) {
3560                         mutex_lock(&kvm->slots_lock);
3561                         mutex_lock(&kvm->irq_lock);
3562                         kvm_ioapic_destroy(kvm);
3563                         kvm_destroy_pic(kvm);
3564                         mutex_unlock(&kvm->irq_lock);
3565                         mutex_unlock(&kvm->slots_lock);
3566                 }
3567         create_irqchip_unlock:
3568                 mutex_unlock(&kvm->lock);
3569                 break;
3570         }
3571         case KVM_CREATE_PIT:
3572                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
3573                 goto create_pit;
3574         case KVM_CREATE_PIT2:
3575                 r = -EFAULT;
3576                 if (copy_from_user(&u.pit_config, argp,
3577                                    sizeof(struct kvm_pit_config)))
3578                         goto out;
3579         create_pit:
3580                 mutex_lock(&kvm->slots_lock);
3581                 r = -EEXIST;
3582                 if (kvm->arch.vpit)
3583                         goto create_pit_unlock;
3584                 r = -ENOMEM;
3585                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
3586                 if (kvm->arch.vpit)
3587                         r = 0;
3588         create_pit_unlock:
3589                 mutex_unlock(&kvm->slots_lock);
3590                 break;
3591         case KVM_GET_IRQCHIP: {
3592                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3593                 struct kvm_irqchip *chip;
3594
3595                 chip = memdup_user(argp, sizeof(*chip));
3596                 if (IS_ERR(chip)) {
3597                         r = PTR_ERR(chip);
3598                         goto out;
3599                 }
3600
3601                 r = -ENXIO;
3602                 if (!irqchip_in_kernel(kvm))
3603                         goto get_irqchip_out;
3604                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
3605                 if (r)
3606                         goto get_irqchip_out;
3607                 r = -EFAULT;
3608                 if (copy_to_user(argp, chip, sizeof *chip))
3609                         goto get_irqchip_out;
3610                 r = 0;
3611         get_irqchip_out:
3612                 kfree(chip);
3613                 break;
3614         }
3615         case KVM_SET_IRQCHIP: {
3616                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3617                 struct kvm_irqchip *chip;
3618
3619                 chip = memdup_user(argp, sizeof(*chip));
3620                 if (IS_ERR(chip)) {
3621                         r = PTR_ERR(chip);
3622                         goto out;
3623                 }
3624
3625                 r = -ENXIO;
3626                 if (!irqchip_in_kernel(kvm))
3627                         goto set_irqchip_out;
3628                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
3629                 if (r)
3630                         goto set_irqchip_out;
3631                 r = 0;
3632         set_irqchip_out:
3633                 kfree(chip);
3634                 break;
3635         }
3636         case KVM_GET_PIT: {
3637                 r = -EFAULT;
3638                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
3639                         goto out;
3640                 r = -ENXIO;
3641                 if (!kvm->arch.vpit)
3642                         goto out;
3643                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
3644                 if (r)
3645                         goto out;
3646                 r = -EFAULT;
3647                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
3648                         goto out;
3649                 r = 0;
3650                 break;
3651         }
3652         case KVM_SET_PIT: {
3653                 r = -EFAULT;
3654                 if (copy_from_user(&u.ps, argp, sizeof u.ps))
3655                         goto out;
3656                 r = -ENXIO;
3657                 if (!kvm->arch.vpit)
3658                         goto out;
3659                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
3660                 break;
3661         }
3662         case KVM_GET_PIT2: {
3663                 r = -ENXIO;
3664                 if (!kvm->arch.vpit)
3665                         goto out;
3666                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
3667                 if (r)
3668                         goto out;
3669                 r = -EFAULT;
3670                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
3671                         goto out;
3672                 r = 0;
3673                 break;
3674         }
3675         case KVM_SET_PIT2: {
3676                 r = -EFAULT;
3677                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
3678                         goto out;
3679                 r = -ENXIO;
3680                 if (!kvm->arch.vpit)
3681                         goto out;
3682                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
3683                 break;
3684         }
3685         case KVM_REINJECT_CONTROL: {
3686                 struct kvm_reinject_control control;
3687                 r =  -EFAULT;
3688                 if (copy_from_user(&control, argp, sizeof(control)))
3689                         goto out;
3690                 r = kvm_vm_ioctl_reinject(kvm, &control);
3691                 break;
3692         }
3693         case KVM_XEN_HVM_CONFIG: {
3694                 r = -EFAULT;
3695                 if (copy_from_user(&kvm->arch.xen_hvm_config, argp,
3696                                    sizeof(struct kvm_xen_hvm_config)))
3697                         goto out;
3698                 r = -EINVAL;
3699                 if (kvm->arch.xen_hvm_config.flags)
3700                         goto out;
3701                 r = 0;
3702                 break;
3703         }
3704         case KVM_SET_CLOCK: {
3705                 struct kvm_clock_data user_ns;
3706                 u64 now_ns;
3707                 s64 delta;
3708
3709                 r = -EFAULT;
3710                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
3711                         goto out;
3712
3713                 r = -EINVAL;
3714                 if (user_ns.flags)
3715                         goto out;
3716
3717                 r = 0;
3718                 local_irq_disable();
3719                 now_ns = get_kernel_ns();
3720                 delta = user_ns.clock - now_ns;
3721                 local_irq_enable();
3722                 kvm->arch.kvmclock_offset = delta;
3723                 break;
3724         }
3725         case KVM_GET_CLOCK: {
3726                 struct kvm_clock_data user_ns;
3727                 u64 now_ns;
3728
3729                 local_irq_disable();
3730                 now_ns = get_kernel_ns();
3731                 user_ns.clock = kvm->arch.kvmclock_offset + now_ns;
3732                 local_irq_enable();
3733                 user_ns.flags = 0;
3734                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
3735
3736                 r = -EFAULT;
3737                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
3738                         goto out;
3739                 r = 0;
3740                 break;
3741         }
3742
3743         default:
3744                 ;
3745         }
3746 out:
3747         return r;
3748 }
3749
3750 static void kvm_init_msr_list(void)
3751 {
3752         u32 dummy[2];
3753         unsigned i, j;
3754
3755         /* skip the first msrs in the list. KVM-specific */
3756         for (i = j = KVM_SAVE_MSRS_BEGIN; i < ARRAY_SIZE(msrs_to_save); i++) {
3757                 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
3758                         continue;
3759                 if (j < i)
3760                         msrs_to_save[j] = msrs_to_save[i];
3761                 j++;
3762         }
3763         num_msrs_to_save = j;
3764 }
3765
3766 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
3767                            const void *v)
3768 {
3769         int handled = 0;
3770         int n;
3771
3772         do {
3773                 n = min(len, 8);
3774                 if (!(vcpu->arch.apic &&
3775                       !kvm_iodevice_write(&vcpu->arch.apic->dev, addr, n, v))
3776                     && kvm_io_bus_write(vcpu->kvm, KVM_MMIO_BUS, addr, n, v))
3777                         break;
3778                 handled += n;
3779                 addr += n;
3780                 len -= n;
3781                 v += n;
3782         } while (len);
3783
3784         return handled;
3785 }
3786
3787 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
3788 {
3789         int handled = 0;
3790         int n;
3791
3792         do {
3793                 n = min(len, 8);
3794                 if (!(vcpu->arch.apic &&
3795                       !kvm_iodevice_read(&vcpu->arch.apic->dev, addr, n, v))
3796                     && kvm_io_bus_read(vcpu->kvm, KVM_MMIO_BUS, addr, n, v))
3797                         break;
3798                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, *(u64 *)v);
3799                 handled += n;
3800                 addr += n;
3801                 len -= n;
3802                 v += n;
3803         } while (len);
3804
3805         return handled;
3806 }
3807
3808 static void kvm_set_segment(struct kvm_vcpu *vcpu,
3809                         struct kvm_segment *var, int seg)
3810 {
3811         kvm_x86_ops->set_segment(vcpu, var, seg);
3812 }
3813
3814 void kvm_get_segment(struct kvm_vcpu *vcpu,
3815                      struct kvm_segment *var, int seg)
3816 {
3817         kvm_x86_ops->get_segment(vcpu, var, seg);
3818 }
3819
3820 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access)
3821 {
3822         gpa_t t_gpa;
3823         struct x86_exception exception;
3824
3825         BUG_ON(!mmu_is_nested(vcpu));
3826
3827         /* NPT walks are always user-walks */
3828         access |= PFERR_USER_MASK;
3829         t_gpa  = vcpu->arch.mmu.gva_to_gpa(vcpu, gpa, access, &exception);
3830
3831         return t_gpa;
3832 }
3833
3834 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
3835                               struct x86_exception *exception)
3836 {
3837         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3838         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3839 }
3840
3841  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
3842                                 struct x86_exception *exception)
3843 {
3844         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3845         access |= PFERR_FETCH_MASK;
3846         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3847 }
3848
3849 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
3850                                struct x86_exception *exception)
3851 {
3852         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3853         access |= PFERR_WRITE_MASK;
3854         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3855 }
3856
3857 /* uses this to access any guest's mapped memory without checking CPL */
3858 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
3859                                 struct x86_exception *exception)
3860 {
3861         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
3862 }
3863
3864 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
3865                                       struct kvm_vcpu *vcpu, u32 access,
3866                                       struct x86_exception *exception)
3867 {
3868         void *data = val;
3869         int r = X86EMUL_CONTINUE;
3870
3871         while (bytes) {
3872                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
3873                                                             exception);
3874                 unsigned offset = addr & (PAGE_SIZE-1);
3875                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
3876                 int ret;
3877
3878                 if (gpa == UNMAPPED_GVA)
3879                         return X86EMUL_PROPAGATE_FAULT;
3880                 ret = kvm_read_guest(vcpu->kvm, gpa, data, toread);
3881                 if (ret < 0) {
3882                         r = X86EMUL_IO_NEEDED;
3883                         goto out;
3884                 }
3885
3886                 bytes -= toread;
3887                 data += toread;
3888                 addr += toread;
3889         }
3890 out:
3891         return r;
3892 }
3893
3894 /* used for instruction fetching */
3895 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
3896                                 gva_t addr, void *val, unsigned int bytes,
3897                                 struct x86_exception *exception)
3898 {
3899         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3900         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3901
3902         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu,
3903                                           access | PFERR_FETCH_MASK,
3904                                           exception);
3905 }
3906
3907 int kvm_read_guest_virt(struct x86_emulate_ctxt *ctxt,
3908                                gva_t addr, void *val, unsigned int bytes,
3909                                struct x86_exception *exception)
3910 {
3911         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3912         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3913
3914         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
3915                                           exception);
3916 }
3917 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
3918
3919 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt *ctxt,
3920                                       gva_t addr, void *val, unsigned int bytes,
3921                                       struct x86_exception *exception)
3922 {
3923         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3924         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, exception);
3925 }
3926
3927 int kvm_write_guest_virt_system(struct x86_emulate_ctxt *ctxt,
3928                                        gva_t addr, void *val,
3929                                        unsigned int bytes,
3930                                        struct x86_exception *exception)
3931 {
3932         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3933         void *data = val;
3934         int r = X86EMUL_CONTINUE;
3935
3936         while (bytes) {
3937                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
3938                                                              PFERR_WRITE_MASK,
3939                                                              exception);
3940                 unsigned offset = addr & (PAGE_SIZE-1);
3941                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
3942                 int ret;
3943
3944                 if (gpa == UNMAPPED_GVA)
3945                         return X86EMUL_PROPAGATE_FAULT;
3946                 ret = kvm_write_guest(vcpu->kvm, gpa, data, towrite);
3947                 if (ret < 0) {
3948                         r = X86EMUL_IO_NEEDED;
3949                         goto out;
3950                 }
3951
3952                 bytes -= towrite;
3953                 data += towrite;
3954                 addr += towrite;
3955         }
3956 out:
3957         return r;
3958 }
3959 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
3960
3961 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
3962                                 gpa_t *gpa, struct x86_exception *exception,
3963                                 bool write)
3964 {
3965         u32 access = ((kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0)
3966                 | (write ? PFERR_WRITE_MASK : 0);
3967
3968         if (vcpu_match_mmio_gva(vcpu, gva)
3969             && !permission_fault(vcpu->arch.walk_mmu, vcpu->arch.access, access)) {
3970                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
3971                                         (gva & (PAGE_SIZE - 1));
3972                 trace_vcpu_match_mmio(gva, *gpa, write, false);
3973                 return 1;
3974         }
3975
3976         *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3977
3978         if (*gpa == UNMAPPED_GVA)
3979                 return -1;
3980
3981         /* For APIC access vmexit */
3982         if ((*gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3983                 return 1;
3984
3985         if (vcpu_match_mmio_gpa(vcpu, *gpa)) {
3986                 trace_vcpu_match_mmio(gva, *gpa, write, true);
3987                 return 1;
3988         }
3989
3990         return 0;
3991 }
3992
3993 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
3994                         const void *val, int bytes)
3995 {
3996         int ret;
3997
3998         ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
3999         if (ret < 0)
4000                 return 0;
4001         kvm_mmu_pte_write(vcpu, gpa, val, bytes);
4002         return 1;
4003 }
4004
4005 struct read_write_emulator_ops {
4006         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
4007                                   int bytes);
4008         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
4009                                   void *val, int bytes);
4010         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4011                                int bytes, void *val);
4012         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4013                                     void *val, int bytes);
4014         bool write;
4015 };
4016
4017 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
4018 {
4019         if (vcpu->mmio_read_completed) {
4020                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
4021                                vcpu->mmio_fragments[0].gpa, *(u64 *)val);
4022                 vcpu->mmio_read_completed = 0;
4023                 return 1;
4024         }
4025
4026         return 0;
4027 }
4028
4029 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4030                         void *val, int bytes)
4031 {
4032         return !kvm_read_guest(vcpu->kvm, gpa, val, bytes);
4033 }
4034
4035 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4036                          void *val, int bytes)
4037 {
4038         return emulator_write_phys(vcpu, gpa, val, bytes);
4039 }
4040
4041 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
4042 {
4043         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
4044         return vcpu_mmio_write(vcpu, gpa, bytes, val);
4045 }
4046
4047 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4048                           void *val, int bytes)
4049 {
4050         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
4051         return X86EMUL_IO_NEEDED;
4052 }
4053
4054 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4055                            void *val, int bytes)
4056 {
4057         struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
4058
4059         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
4060         return X86EMUL_CONTINUE;
4061 }
4062
4063 static const struct read_write_emulator_ops read_emultor = {
4064         .read_write_prepare = read_prepare,
4065         .read_write_emulate = read_emulate,
4066         .read_write_mmio = vcpu_mmio_read,
4067         .read_write_exit_mmio = read_exit_mmio,
4068 };
4069
4070 static const struct read_write_emulator_ops write_emultor = {
4071         .read_write_emulate = write_emulate,
4072         .read_write_mmio = write_mmio,
4073         .read_write_exit_mmio = write_exit_mmio,
4074         .write = true,
4075 };
4076
4077 static int emulator_read_write_onepage(unsigned long addr, void *val,
4078                                        unsigned int bytes,
4079                                        struct x86_exception *exception,
4080                                        struct kvm_vcpu *vcpu,
4081                                        const struct read_write_emulator_ops *ops)
4082 {
4083         gpa_t gpa;
4084         int handled, ret;
4085         bool write = ops->write;
4086         struct kvm_mmio_fragment *frag;
4087
4088         ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
4089
4090         if (ret < 0)
4091                 return X86EMUL_PROPAGATE_FAULT;
4092
4093         /* For APIC access vmexit */
4094         if (ret)
4095                 goto mmio;
4096
4097         if (ops->read_write_emulate(vcpu, gpa, val, bytes))
4098                 return X86EMUL_CONTINUE;
4099
4100 mmio:
4101         /*
4102          * Is this MMIO handled locally?
4103          */
4104         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
4105         if (handled == bytes)
4106                 return X86EMUL_CONTINUE;
4107
4108         gpa += handled;
4109         bytes -= handled;
4110         val += handled;
4111
4112         WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS);
4113         frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
4114         frag->gpa = gpa;
4115         frag->data = val;
4116         frag->len = bytes;
4117         return X86EMUL_CONTINUE;
4118 }
4119
4120 int emulator_read_write(struct x86_emulate_ctxt *ctxt, unsigned long addr,
4121                         void *val, unsigned int bytes,
4122                         struct x86_exception *exception,
4123                         const struct read_write_emulator_ops *ops)
4124 {
4125         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4126         gpa_t gpa;
4127         int rc;
4128
4129         if (ops->read_write_prepare &&
4130                   ops->read_write_prepare(vcpu, val, bytes))
4131                 return X86EMUL_CONTINUE;
4132
4133         vcpu->mmio_nr_fragments = 0;
4134
4135         /* Crossing a page boundary? */
4136         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
4137                 int now;
4138
4139                 now = -addr & ~PAGE_MASK;
4140                 rc = emulator_read_write_onepage(addr, val, now, exception,
4141                                                  vcpu, ops);
4142
4143                 if (rc != X86EMUL_CONTINUE)
4144                         return rc;
4145                 addr += now;
4146                 val += now;
4147                 bytes -= now;
4148         }
4149
4150         rc = emulator_read_write_onepage(addr, val, bytes, exception,
4151                                          vcpu, ops);
4152         if (rc != X86EMUL_CONTINUE)
4153                 return rc;
4154
4155         if (!vcpu->mmio_nr_fragments)
4156                 return rc;
4157
4158         gpa = vcpu->mmio_fragments[0].gpa;
4159
4160         vcpu->mmio_needed = 1;
4161         vcpu->mmio_cur_fragment = 0;
4162
4163         vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len);
4164         vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
4165         vcpu->run->exit_reason = KVM_EXIT_MMIO;
4166         vcpu->run->mmio.phys_addr = gpa;
4167
4168         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
4169 }
4170
4171 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
4172                                   unsigned long addr,
4173                                   void *val,
4174                                   unsigned int bytes,
4175                                   struct x86_exception *exception)
4176 {
4177         return emulator_read_write(ctxt, addr, val, bytes,
4178                                    exception, &read_emultor);
4179 }
4180
4181 int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
4182                             unsigned long addr,
4183                             const void *val,
4184                             unsigned int bytes,
4185                             struct x86_exception *exception)
4186 {
4187         return emulator_read_write(ctxt, addr, (void *)val, bytes,
4188                                    exception, &write_emultor);
4189 }
4190
4191 #define CMPXCHG_TYPE(t, ptr, old, new) \
4192         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
4193
4194 #ifdef CONFIG_X86_64
4195 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
4196 #else
4197 #  define CMPXCHG64(ptr, old, new) \
4198         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
4199 #endif
4200
4201 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
4202                                      unsigned long addr,
4203                                      const void *old,
4204                                      const void *new,
4205                                      unsigned int bytes,
4206                                      struct x86_exception *exception)
4207 {
4208         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4209         gpa_t gpa;
4210         struct page *page;
4211         char *kaddr;
4212         bool exchanged;
4213
4214         /* guests cmpxchg8b have to be emulated atomically */
4215         if (bytes > 8 || (bytes & (bytes - 1)))
4216                 goto emul_write;
4217
4218         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
4219
4220         if (gpa == UNMAPPED_GVA ||
4221             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4222                 goto emul_write;
4223
4224         if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
4225                 goto emul_write;
4226
4227         page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
4228         if (is_error_page(page))
4229                 goto emul_write;
4230
4231         kaddr = kmap_atomic(page);
4232         kaddr += offset_in_page(gpa);
4233         switch (bytes) {
4234         case 1:
4235                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
4236                 break;
4237         case 2:
4238                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
4239                 break;
4240         case 4:
4241                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
4242                 break;
4243         case 8:
4244                 exchanged = CMPXCHG64(kaddr, old, new);
4245                 break;
4246         default:
4247                 BUG();
4248         }
4249         kunmap_atomic(kaddr);
4250         kvm_release_page_dirty(page);
4251
4252         if (!exchanged)
4253                 return X86EMUL_CMPXCHG_FAILED;
4254
4255         kvm_mmu_pte_write(vcpu, gpa, new, bytes);
4256
4257         return X86EMUL_CONTINUE;
4258
4259 emul_write:
4260         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
4261
4262         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
4263 }
4264
4265 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
4266 {
4267         /* TODO: String I/O for in kernel device */
4268         int r;
4269
4270         if (vcpu->arch.pio.in)
4271                 r = kvm_io_bus_read(vcpu->kvm, KVM_PIO_BUS, vcpu->arch.pio.port,
4272                                     vcpu->arch.pio.size, pd);
4273         else
4274                 r = kvm_io_bus_write(vcpu->kvm, KVM_PIO_BUS,
4275                                      vcpu->arch.pio.port, vcpu->arch.pio.size,
4276                                      pd);
4277         return r;
4278 }
4279
4280 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
4281                                unsigned short port, void *val,
4282                                unsigned int count, bool in)
4283 {
4284         trace_kvm_pio(!in, port, size, count);
4285
4286         vcpu->arch.pio.port = port;
4287         vcpu->arch.pio.in = in;
4288         vcpu->arch.pio.count  = count;
4289         vcpu->arch.pio.size = size;
4290
4291         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
4292                 vcpu->arch.pio.count = 0;
4293                 return 1;
4294         }
4295
4296         vcpu->run->exit_reason = KVM_EXIT_IO;
4297         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
4298         vcpu->run->io.size = size;
4299         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
4300         vcpu->run->io.count = count;
4301         vcpu->run->io.port = port;
4302
4303         return 0;
4304 }
4305
4306 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
4307                                     int size, unsigned short port, void *val,
4308                                     unsigned int count)
4309 {
4310         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4311         int ret;
4312
4313         if (vcpu->arch.pio.count)
4314                 goto data_avail;
4315
4316         ret = emulator_pio_in_out(vcpu, size, port, val, count, true);
4317         if (ret) {
4318 data_avail:
4319                 memcpy(val, vcpu->arch.pio_data, size * count);
4320                 vcpu->arch.pio.count = 0;
4321                 return 1;
4322         }
4323
4324         return 0;
4325 }
4326
4327 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
4328                                      int size, unsigned short port,
4329                                      const void *val, unsigned int count)
4330 {
4331         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4332
4333         memcpy(vcpu->arch.pio_data, val, size * count);
4334         return emulator_pio_in_out(vcpu, size, port, (void *)val, count, false);
4335 }
4336
4337 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
4338 {
4339         return kvm_x86_ops->get_segment_base(vcpu, seg);
4340 }
4341
4342 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
4343 {
4344         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
4345 }
4346
4347 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
4348 {
4349         if (!need_emulate_wbinvd(vcpu))
4350                 return X86EMUL_CONTINUE;
4351
4352         if (kvm_x86_ops->has_wbinvd_exit()) {
4353                 int cpu = get_cpu();
4354
4355                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
4356                 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
4357                                 wbinvd_ipi, NULL, 1);
4358                 put_cpu();
4359                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
4360         } else
4361                 wbinvd();
4362         return X86EMUL_CONTINUE;
4363 }
4364 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
4365
4366 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
4367 {
4368         kvm_emulate_wbinvd(emul_to_vcpu(ctxt));
4369 }
4370
4371 int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long *dest)
4372 {
4373         return _kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
4374 }
4375
4376 int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long value)
4377 {
4378
4379         return __kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
4380 }
4381
4382 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
4383 {
4384         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
4385 }
4386
4387 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
4388 {
4389         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4390         unsigned long value;
4391
4392         switch (cr) {
4393         case 0:
4394                 value = kvm_read_cr0(vcpu);
4395                 break;
4396         case 2:
4397                 value = vcpu->arch.cr2;
4398                 break;
4399         case 3:
4400                 value = kvm_read_cr3(vcpu);
4401                 break;
4402         case 4:
4403                 value = kvm_read_cr4(vcpu);
4404                 break;
4405         case 8:
4406                 value = kvm_get_cr8(vcpu);
4407                 break;
4408         default:
4409                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
4410                 return 0;
4411         }
4412
4413         return value;
4414 }
4415
4416 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
4417 {
4418         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4419         int res = 0;
4420
4421         switch (cr) {
4422         case 0:
4423                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
4424                 break;
4425         case 2:
4426                 vcpu->arch.cr2 = val;
4427                 break;
4428         case 3:
4429                 res = kvm_set_cr3(vcpu, val);
4430                 break;
4431         case 4:
4432                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
4433                 break;
4434         case 8:
4435                 res = kvm_set_cr8(vcpu, val);
4436                 break;
4437         default:
4438                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
4439                 res = -1;
4440         }
4441
4442         return res;
4443 }
4444
4445 static void emulator_set_rflags(struct x86_emulate_ctxt *ctxt, ulong val)
4446 {
4447         kvm_set_rflags(emul_to_vcpu(ctxt), val);
4448 }
4449
4450 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
4451 {
4452         return kvm_x86_ops->get_cpl(emul_to_vcpu(ctxt));
4453 }
4454
4455 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4456 {
4457         kvm_x86_ops->get_gdt(emul_to_vcpu(ctxt), dt);
4458 }
4459
4460 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4461 {
4462         kvm_x86_ops->get_idt(emul_to_vcpu(ctxt), dt);
4463 }
4464
4465 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4466 {
4467         kvm_x86_ops->set_gdt(emul_to_vcpu(ctxt), dt);
4468 }
4469
4470 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4471 {
4472         kvm_x86_ops->set_idt(emul_to_vcpu(ctxt), dt);
4473 }
4474
4475 static unsigned long emulator_get_cached_segment_base(
4476         struct x86_emulate_ctxt *ctxt, int seg)
4477 {
4478         return get_segment_base(emul_to_vcpu(ctxt), seg);
4479 }
4480
4481 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
4482                                  struct desc_struct *desc, u32 *base3,
4483                                  int seg)
4484 {
4485         struct kvm_segment var;
4486
4487         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
4488         *selector = var.selector;
4489
4490         if (var.unusable) {
4491                 memset(desc, 0, sizeof(*desc));
4492                 return false;
4493         }
4494
4495         if (var.g)
4496                 var.limit >>= 12;
4497         set_desc_limit(desc, var.limit);
4498         set_desc_base(desc, (unsigned long)var.base);
4499 #ifdef CONFIG_X86_64
4500         if (base3)
4501                 *base3 = var.base >> 32;
4502 #endif
4503         desc->type = var.type;
4504         desc->s = var.s;
4505         desc->dpl = var.dpl;
4506         desc->p = var.present;
4507         desc->avl = var.avl;
4508         desc->l = var.l;
4509         desc->d = var.db;
4510         desc->g = var.g;
4511
4512         return true;
4513 }
4514
4515 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
4516                                  struct desc_struct *desc, u32 base3,
4517                                  int seg)
4518 {
4519         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4520         struct kvm_segment var;
4521
4522         var.selector = selector;
4523         var.base = get_desc_base(desc);
4524 #ifdef CONFIG_X86_64
4525         var.base |= ((u64)base3) << 32;
4526 #endif
4527         var.limit = get_desc_limit(desc);
4528         if (desc->g)
4529                 var.limit = (var.limit << 12) | 0xfff;
4530         var.type = desc->type;
4531         var.present = desc->p;
4532         var.dpl = desc->dpl;
4533         var.db = desc->d;
4534         var.s = desc->s;
4535         var.l = desc->l;
4536         var.g = desc->g;
4537         var.avl = desc->avl;
4538         var.present = desc->p;
4539         var.unusable = !var.present;
4540         var.padding = 0;
4541
4542         kvm_set_segment(vcpu, &var, seg);
4543         return;
4544 }
4545
4546 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
4547                             u32 msr_index, u64 *pdata)
4548 {
4549         return kvm_get_msr(emul_to_vcpu(ctxt), msr_index, pdata);
4550 }
4551
4552 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
4553                             u32 msr_index, u64 data)
4554 {
4555         struct msr_data msr;
4556
4557         msr.data = data;
4558         msr.index = msr_index;
4559         msr.host_initiated = false;
4560         return kvm_set_msr(emul_to_vcpu(ctxt), &msr);
4561 }
4562
4563 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
4564                              u32 pmc, u64 *pdata)
4565 {
4566         return kvm_pmu_read_pmc(emul_to_vcpu(ctxt), pmc, pdata);
4567 }
4568
4569 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
4570 {
4571         emul_to_vcpu(ctxt)->arch.halt_request = 1;
4572 }
4573
4574 static void emulator_get_fpu(struct x86_emulate_ctxt *ctxt)
4575 {
4576         preempt_disable();
4577         kvm_load_guest_fpu(emul_to_vcpu(ctxt));
4578         /*
4579          * CR0.TS may reference the host fpu state, not the guest fpu state,
4580          * so it may be clear at this point.
4581          */
4582         clts();
4583 }
4584
4585 static void emulator_put_fpu(struct x86_emulate_ctxt *ctxt)
4586 {
4587         preempt_enable();
4588 }
4589
4590 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
4591                               struct x86_instruction_info *info,
4592                               enum x86_intercept_stage stage)
4593 {
4594         return kvm_x86_ops->check_intercept(emul_to_vcpu(ctxt), info, stage);
4595 }
4596
4597 static void emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
4598                                u32 *eax, u32 *ebx, u32 *ecx, u32 *edx)
4599 {
4600         kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx);
4601 }
4602
4603 static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
4604 {
4605         return kvm_register_read(emul_to_vcpu(ctxt), reg);
4606 }
4607
4608 static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
4609 {
4610         kvm_register_write(emul_to_vcpu(ctxt), reg, val);
4611 }
4612
4613 static const struct x86_emulate_ops emulate_ops = {
4614         .read_gpr            = emulator_read_gpr,
4615         .write_gpr           = emulator_write_gpr,
4616         .read_std            = kvm_read_guest_virt_system,
4617         .write_std           = kvm_write_guest_virt_system,
4618         .fetch               = kvm_fetch_guest_virt,
4619         .read_emulated       = emulator_read_emulated,
4620         .write_emulated      = emulator_write_emulated,
4621         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
4622         .invlpg              = emulator_invlpg,
4623         .pio_in_emulated     = emulator_pio_in_emulated,
4624         .pio_out_emulated    = emulator_pio_out_emulated,
4625         .get_segment         = emulator_get_segment,
4626         .set_segment         = emulator_set_segment,
4627         .get_cached_segment_base = emulator_get_cached_segment_base,
4628         .get_gdt             = emulator_get_gdt,
4629         .get_idt             = emulator_get_idt,
4630         .set_gdt             = emulator_set_gdt,
4631         .set_idt             = emulator_set_idt,
4632         .get_cr              = emulator_get_cr,
4633         .set_cr              = emulator_set_cr,
4634         .set_rflags          = emulator_set_rflags,
4635         .cpl                 = emulator_get_cpl,
4636         .get_dr              = emulator_get_dr,
4637         .set_dr              = emulator_set_dr,
4638         .set_msr             = emulator_set_msr,
4639         .get_msr             = emulator_get_msr,
4640         .read_pmc            = emulator_read_pmc,
4641         .halt                = emulator_halt,
4642         .wbinvd              = emulator_wbinvd,
4643         .fix_hypercall       = emulator_fix_hypercall,
4644         .get_fpu             = emulator_get_fpu,
4645         .put_fpu             = emulator_put_fpu,
4646         .intercept           = emulator_intercept,
4647         .get_cpuid           = emulator_get_cpuid,
4648 };
4649
4650 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
4651 {
4652         u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu, mask);
4653         /*
4654          * an sti; sti; sequence only disable interrupts for the first
4655          * instruction. So, if the last instruction, be it emulated or
4656          * not, left the system with the INT_STI flag enabled, it
4657          * means that the last instruction is an sti. We should not
4658          * leave the flag on in this case. The same goes for mov ss
4659          */
4660         if (!(int_shadow & mask))
4661                 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
4662 }
4663
4664 static void inject_emulated_exception(struct kvm_vcpu *vcpu)
4665 {
4666         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4667         if (ctxt->exception.vector == PF_VECTOR)
4668                 kvm_propagate_fault(vcpu, &ctxt->exception);
4669         else if (ctxt->exception.error_code_valid)
4670                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
4671                                       ctxt->exception.error_code);
4672         else
4673                 kvm_queue_exception(vcpu, ctxt->exception.vector);
4674 }
4675
4676 static void init_decode_cache(struct x86_emulate_ctxt *ctxt)
4677 {
4678         memset(&ctxt->twobyte, 0,
4679                (void *)&ctxt->_regs - (void *)&ctxt->twobyte);
4680
4681         ctxt->fetch.start = 0;
4682         ctxt->fetch.end = 0;
4683         ctxt->io_read.pos = 0;
4684         ctxt->io_read.end = 0;
4685         ctxt->mem_read.pos = 0;
4686         ctxt->mem_read.end = 0;
4687 }
4688
4689 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
4690 {
4691         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4692         int cs_db, cs_l;
4693
4694         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
4695
4696         ctxt->eflags = kvm_get_rflags(vcpu);
4697         ctxt->eip = kvm_rip_read(vcpu);
4698         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
4699                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
4700                      cs_l                               ? X86EMUL_MODE_PROT64 :
4701                      cs_db                              ? X86EMUL_MODE_PROT32 :
4702                                                           X86EMUL_MODE_PROT16;
4703         ctxt->guest_mode = is_guest_mode(vcpu);
4704
4705         init_decode_cache(ctxt);
4706         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
4707 }
4708
4709 int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
4710 {
4711         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4712         int ret;
4713
4714         init_emulate_ctxt(vcpu);
4715
4716         ctxt->op_bytes = 2;
4717         ctxt->ad_bytes = 2;
4718         ctxt->_eip = ctxt->eip + inc_eip;
4719         ret = emulate_int_real(ctxt, irq);
4720
4721         if (ret != X86EMUL_CONTINUE)
4722                 return EMULATE_FAIL;
4723
4724         ctxt->eip = ctxt->_eip;
4725         kvm_rip_write(vcpu, ctxt->eip);
4726         kvm_set_rflags(vcpu, ctxt->eflags);
4727
4728         if (irq == NMI_VECTOR)
4729                 vcpu->arch.nmi_pending = 0;
4730         else
4731                 vcpu->arch.interrupt.pending = false;
4732
4733         return EMULATE_DONE;
4734 }
4735 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
4736
4737 static int handle_emulation_failure(struct kvm_vcpu *vcpu)
4738 {
4739         int r = EMULATE_DONE;
4740
4741         ++vcpu->stat.insn_emulation_fail;
4742         trace_kvm_emulate_insn_failed(vcpu);
4743         if (!is_guest_mode(vcpu)) {
4744                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
4745                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
4746                 vcpu->run->internal.ndata = 0;
4747                 r = EMULATE_FAIL;
4748         }
4749         kvm_queue_exception(vcpu, UD_VECTOR);
4750
4751         return r;
4752 }
4753
4754 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t cr2,
4755                                   bool write_fault_to_shadow_pgtable)
4756 {
4757         gpa_t gpa = cr2;
4758         pfn_t pfn;
4759
4760         if (!vcpu->arch.mmu.direct_map) {
4761                 /*
4762                  * Write permission should be allowed since only
4763                  * write access need to be emulated.
4764                  */
4765                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
4766
4767                 /*
4768                  * If the mapping is invalid in guest, let cpu retry
4769                  * it to generate fault.
4770                  */
4771                 if (gpa == UNMAPPED_GVA)
4772                         return true;
4773         }
4774
4775         /*
4776          * Do not retry the unhandleable instruction if it faults on the
4777          * readonly host memory, otherwise it will goto a infinite loop:
4778          * retry instruction -> write #PF -> emulation fail -> retry
4779          * instruction -> ...
4780          */
4781         pfn = gfn_to_pfn(vcpu->kvm, gpa_to_gfn(gpa));
4782
4783         /*
4784          * If the instruction failed on the error pfn, it can not be fixed,
4785          * report the error to userspace.
4786          */
4787         if (is_error_noslot_pfn(pfn))
4788                 return false;
4789
4790         kvm_release_pfn_clean(pfn);
4791
4792         /* The instructions are well-emulated on direct mmu. */
4793         if (vcpu->arch.mmu.direct_map) {
4794                 unsigned int indirect_shadow_pages;
4795
4796                 spin_lock(&vcpu->kvm->mmu_lock);
4797                 indirect_shadow_pages = vcpu->kvm->arch.indirect_shadow_pages;
4798                 spin_unlock(&vcpu->kvm->mmu_lock);
4799
4800                 if (indirect_shadow_pages)
4801                         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
4802
4803                 return true;
4804         }
4805
4806         /*
4807          * if emulation was due to access to shadowed page table
4808          * and it failed try to unshadow page and re-enter the
4809          * guest to let CPU execute the instruction.
4810          */
4811         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
4812
4813         /*
4814          * If the access faults on its page table, it can not
4815          * be fixed by unprotecting shadow page and it should
4816          * be reported to userspace.
4817          */
4818         return !write_fault_to_shadow_pgtable;
4819 }
4820
4821 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
4822                               unsigned long cr2,  int emulation_type)
4823 {
4824         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4825         unsigned long last_retry_eip, last_retry_addr, gpa = cr2;
4826
4827         last_retry_eip = vcpu->arch.last_retry_eip;
4828         last_retry_addr = vcpu->arch.last_retry_addr;
4829
4830         /*
4831          * If the emulation is caused by #PF and it is non-page_table
4832          * writing instruction, it means the VM-EXIT is caused by shadow
4833          * page protected, we can zap the shadow page and retry this
4834          * instruction directly.
4835          *
4836          * Note: if the guest uses a non-page-table modifying instruction
4837          * on the PDE that points to the instruction, then we will unmap
4838          * the instruction and go to an infinite loop. So, we cache the
4839          * last retried eip and the last fault address, if we meet the eip
4840          * and the address again, we can break out of the potential infinite
4841          * loop.
4842          */
4843         vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
4844
4845         if (!(emulation_type & EMULTYPE_RETRY))
4846                 return false;
4847
4848         if (x86_page_table_writing_insn(ctxt))
4849                 return false;
4850
4851         if (ctxt->eip == last_retry_eip && last_retry_addr == cr2)
4852                 return false;
4853
4854         vcpu->arch.last_retry_eip = ctxt->eip;
4855         vcpu->arch.last_retry_addr = cr2;
4856
4857         if (!vcpu->arch.mmu.direct_map)
4858                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
4859
4860         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
4861
4862         return true;
4863 }
4864
4865 static int complete_emulated_mmio(struct kvm_vcpu *vcpu);
4866 static int complete_emulated_pio(struct kvm_vcpu *vcpu);
4867
4868 int x86_emulate_instruction(struct kvm_vcpu *vcpu,
4869                             unsigned long cr2,
4870                             int emulation_type,
4871                             void *insn,
4872                             int insn_len)
4873 {
4874         int r;
4875         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4876         bool writeback = true;
4877         bool write_fault_to_spt = vcpu->arch.write_fault_to_shadow_pgtable;
4878
4879         /*
4880          * Clear write_fault_to_shadow_pgtable here to ensure it is
4881          * never reused.
4882          */
4883         vcpu->arch.write_fault_to_shadow_pgtable = false;
4884         kvm_clear_exception_queue(vcpu);
4885
4886         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
4887                 init_emulate_ctxt(vcpu);
4888                 ctxt->interruptibility = 0;
4889                 ctxt->have_exception = false;
4890                 ctxt->perm_ok = false;
4891
4892                 ctxt->only_vendor_specific_insn
4893                         = emulation_type & EMULTYPE_TRAP_UD;
4894
4895                 r = x86_decode_insn(ctxt, insn, insn_len);
4896
4897                 trace_kvm_emulate_insn_start(vcpu);
4898                 ++vcpu->stat.insn_emulation;
4899                 if (r != EMULATION_OK)  {
4900                         if (emulation_type & EMULTYPE_TRAP_UD)
4901                                 return EMULATE_FAIL;
4902                         if (reexecute_instruction(vcpu, cr2,
4903                                                   write_fault_to_spt))
4904                                 return EMULATE_DONE;
4905                         if (emulation_type & EMULTYPE_SKIP)
4906                                 return EMULATE_FAIL;
4907                         return handle_emulation_failure(vcpu);
4908                 }
4909         }
4910
4911         if (emulation_type & EMULTYPE_SKIP) {
4912                 kvm_rip_write(vcpu, ctxt->_eip);
4913                 return EMULATE_DONE;
4914         }
4915
4916         if (retry_instruction(ctxt, cr2, emulation_type))
4917                 return EMULATE_DONE;
4918
4919         /* this is needed for vmware backdoor interface to work since it
4920            changes registers values  during IO operation */
4921         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
4922                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
4923                 emulator_invalidate_register_cache(ctxt);
4924         }
4925
4926 restart:
4927         r = x86_emulate_insn(ctxt);
4928
4929         if (r == EMULATION_INTERCEPTED)
4930                 return EMULATE_DONE;
4931
4932         if (r == EMULATION_FAILED) {
4933                 if (reexecute_instruction(vcpu, cr2, write_fault_to_spt))
4934                         return EMULATE_DONE;
4935
4936                 return handle_emulation_failure(vcpu);
4937         }
4938
4939         if (ctxt->have_exception) {
4940                 inject_emulated_exception(vcpu);
4941                 r = EMULATE_DONE;
4942         } else if (vcpu->arch.pio.count) {
4943                 if (!vcpu->arch.pio.in)
4944                         vcpu->arch.pio.count = 0;
4945                 else {
4946                         writeback = false;
4947                         vcpu->arch.complete_userspace_io = complete_emulated_pio;
4948                 }
4949                 r = EMULATE_DO_MMIO;
4950         } else if (vcpu->mmio_needed) {
4951                 if (!vcpu->mmio_is_write)
4952                         writeback = false;
4953                 r = EMULATE_DO_MMIO;
4954                 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
4955         } else if (r == EMULATION_RESTART)
4956                 goto restart;
4957         else
4958                 r = EMULATE_DONE;
4959
4960         if (writeback) {
4961                 toggle_interruptibility(vcpu, ctxt->interruptibility);
4962                 kvm_set_rflags(vcpu, ctxt->eflags);
4963                 kvm_make_request(KVM_REQ_EVENT, vcpu);
4964                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
4965                 kvm_rip_write(vcpu, ctxt->eip);
4966         } else
4967                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
4968
4969         return r;
4970 }
4971 EXPORT_SYMBOL_GPL(x86_emulate_instruction);
4972
4973 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port)
4974 {
4975         unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
4976         int ret = emulator_pio_out_emulated(&vcpu->arch.emulate_ctxt,
4977                                             size, port, &val, 1);
4978         /* do not return to emulator after return from userspace */
4979         vcpu->arch.pio.count = 0;
4980         return ret;
4981 }
4982 EXPORT_SYMBOL_GPL(kvm_fast_pio_out);
4983
4984 static void tsc_bad(void *info)
4985 {
4986         __this_cpu_write(cpu_tsc_khz, 0);
4987 }
4988
4989 static void tsc_khz_changed(void *data)
4990 {
4991         struct cpufreq_freqs *freq = data;
4992         unsigned long khz = 0;
4993
4994         if (data)
4995                 khz = freq->new;
4996         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
4997                 khz = cpufreq_quick_get(raw_smp_processor_id());
4998         if (!khz)
4999                 khz = tsc_khz;
5000         __this_cpu_write(cpu_tsc_khz, khz);
5001 }
5002
5003 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
5004                                      void *data)
5005 {
5006         struct cpufreq_freqs *freq = data;
5007         struct kvm *kvm;
5008         struct kvm_vcpu *vcpu;
5009         int i, send_ipi = 0;
5010
5011         /*
5012          * We allow guests to temporarily run on slowing clocks,
5013          * provided we notify them after, or to run on accelerating
5014          * clocks, provided we notify them before.  Thus time never
5015          * goes backwards.
5016          *
5017          * However, we have a problem.  We can't atomically update
5018          * the frequency of a given CPU from this function; it is
5019          * merely a notifier, which can be called from any CPU.
5020          * Changing the TSC frequency at arbitrary points in time
5021          * requires a recomputation of local variables related to
5022          * the TSC for each VCPU.  We must flag these local variables
5023          * to be updated and be sure the update takes place with the
5024          * new frequency before any guests proceed.
5025          *
5026          * Unfortunately, the combination of hotplug CPU and frequency
5027          * change creates an intractable locking scenario; the order
5028          * of when these callouts happen is undefined with respect to
5029          * CPU hotplug, and they can race with each other.  As such,
5030          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
5031          * undefined; you can actually have a CPU frequency change take
5032          * place in between the computation of X and the setting of the
5033          * variable.  To protect against this problem, all updates of
5034          * the per_cpu tsc_khz variable are done in an interrupt
5035          * protected IPI, and all callers wishing to update the value
5036          * must wait for a synchronous IPI to complete (which is trivial
5037          * if the caller is on the CPU already).  This establishes the
5038          * necessary total order on variable updates.
5039          *
5040          * Note that because a guest time update may take place
5041          * anytime after the setting of the VCPU's request bit, the
5042          * correct TSC value must be set before the request.  However,
5043          * to ensure the update actually makes it to any guest which
5044          * starts running in hardware virtualization between the set
5045          * and the acquisition of the spinlock, we must also ping the
5046          * CPU after setting the request bit.
5047          *
5048          */
5049
5050         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
5051                 return 0;
5052         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
5053                 return 0;
5054
5055         smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5056
5057         raw_spin_lock(&kvm_lock);
5058         list_for_each_entry(kvm, &vm_list, vm_list) {
5059                 kvm_for_each_vcpu(i, vcpu, kvm) {
5060                         if (vcpu->cpu != freq->cpu)
5061                                 continue;
5062                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
5063                         if (vcpu->cpu != smp_processor_id())
5064                                 send_ipi = 1;
5065                 }
5066         }
5067         raw_spin_unlock(&kvm_lock);
5068
5069         if (freq->old < freq->new && send_ipi) {
5070                 /*
5071                  * We upscale the frequency.  Must make the guest
5072                  * doesn't see old kvmclock values while running with
5073                  * the new frequency, otherwise we risk the guest sees
5074                  * time go backwards.
5075                  *
5076                  * In case we update the frequency for another cpu
5077                  * (which might be in guest context) send an interrupt
5078                  * to kick the cpu out of guest context.  Next time
5079                  * guest context is entered kvmclock will be updated,
5080                  * so the guest will not see stale values.
5081                  */
5082                 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5083         }
5084         return 0;
5085 }
5086
5087 static struct notifier_block kvmclock_cpufreq_notifier_block = {
5088         .notifier_call  = kvmclock_cpufreq_notifier
5089 };
5090
5091 static int kvmclock_cpu_notifier(struct notifier_block *nfb,
5092                                         unsigned long action, void *hcpu)
5093 {
5094         unsigned int cpu = (unsigned long)hcpu;
5095
5096         switch (action) {
5097                 case CPU_ONLINE:
5098                 case CPU_DOWN_FAILED:
5099                         smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
5100                         break;
5101                 case CPU_DOWN_PREPARE:
5102                         smp_call_function_single(cpu, tsc_bad, NULL, 1);
5103                         break;
5104         }
5105         return NOTIFY_OK;
5106 }
5107
5108 static struct notifier_block kvmclock_cpu_notifier_block = {
5109         .notifier_call  = kvmclock_cpu_notifier,
5110         .priority = -INT_MAX
5111 };
5112
5113 static void kvm_timer_init(void)
5114 {
5115         int cpu;
5116
5117         max_tsc_khz = tsc_khz;
5118         register_hotcpu_notifier(&kvmclock_cpu_notifier_block);
5119         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
5120 #ifdef CONFIG_CPU_FREQ
5121                 struct cpufreq_policy policy;
5122                 memset(&policy, 0, sizeof(policy));
5123                 cpu = get_cpu();
5124                 cpufreq_get_policy(&policy, cpu);
5125                 if (policy.cpuinfo.max_freq)
5126                         max_tsc_khz = policy.cpuinfo.max_freq;
5127                 put_cpu();
5128 #endif
5129                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
5130                                           CPUFREQ_TRANSITION_NOTIFIER);
5131         }
5132         pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz);
5133         for_each_online_cpu(cpu)
5134                 smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
5135 }
5136
5137 static DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
5138
5139 int kvm_is_in_guest(void)
5140 {
5141         return __this_cpu_read(current_vcpu) != NULL;
5142 }
5143
5144 static int kvm_is_user_mode(void)
5145 {
5146         int user_mode = 3;
5147
5148         if (__this_cpu_read(current_vcpu))
5149                 user_mode = kvm_x86_ops->get_cpl(__this_cpu_read(current_vcpu));
5150
5151         return user_mode != 0;
5152 }
5153
5154 static unsigned long kvm_get_guest_ip(void)
5155 {
5156         unsigned long ip = 0;
5157
5158         if (__this_cpu_read(current_vcpu))
5159                 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
5160
5161         return ip;
5162 }
5163
5164 static struct perf_guest_info_callbacks kvm_guest_cbs = {
5165         .is_in_guest            = kvm_is_in_guest,
5166         .is_user_mode           = kvm_is_user_mode,
5167         .get_guest_ip           = kvm_get_guest_ip,
5168 };
5169
5170 void kvm_before_handle_nmi(struct kvm_vcpu *vcpu)
5171 {
5172         __this_cpu_write(current_vcpu, vcpu);
5173 }
5174 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi);
5175
5176 void kvm_after_handle_nmi(struct kvm_vcpu *vcpu)
5177 {
5178         __this_cpu_write(current_vcpu, NULL);
5179 }
5180 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi);
5181
5182 static void kvm_set_mmio_spte_mask(void)
5183 {
5184         u64 mask;
5185         int maxphyaddr = boot_cpu_data.x86_phys_bits;
5186
5187         /*
5188          * Set the reserved bits and the present bit of an paging-structure
5189          * entry to generate page fault with PFER.RSV = 1.
5190          */
5191         mask = ((1ull << (62 - maxphyaddr + 1)) - 1) << maxphyaddr;
5192         mask |= 1ull;
5193
5194 #ifdef CONFIG_X86_64
5195         /*
5196          * If reserved bit is not supported, clear the present bit to disable
5197          * mmio page fault.
5198          */
5199         if (maxphyaddr == 52)
5200                 mask &= ~1ull;
5201 #endif
5202
5203         kvm_mmu_set_mmio_spte_mask(mask);
5204 }
5205
5206 #ifdef CONFIG_X86_64
5207 static void pvclock_gtod_update_fn(struct work_struct *work)
5208 {
5209         struct kvm *kvm;
5210
5211         struct kvm_vcpu *vcpu;
5212         int i;
5213
5214         raw_spin_lock(&kvm_lock);
5215         list_for_each_entry(kvm, &vm_list, vm_list)
5216                 kvm_for_each_vcpu(i, vcpu, kvm)
5217                         set_bit(KVM_REQ_MASTERCLOCK_UPDATE, &vcpu->requests);
5218         atomic_set(&kvm_guest_has_master_clock, 0);
5219         raw_spin_unlock(&kvm_lock);
5220 }
5221
5222 static DECLARE_WORK(pvclock_gtod_work, pvclock_gtod_update_fn);
5223
5224 /*
5225  * Notification about pvclock gtod data update.
5226  */
5227 static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused,
5228                                void *priv)
5229 {
5230         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
5231         struct timekeeper *tk = priv;
5232
5233         update_pvclock_gtod(tk);
5234
5235         /* disable master clock if host does not trust, or does not
5236          * use, TSC clocksource
5237          */
5238         if (gtod->clock.vclock_mode != VCLOCK_TSC &&
5239             atomic_read(&kvm_guest_has_master_clock) != 0)
5240                 queue_work(system_long_wq, &pvclock_gtod_work);
5241
5242         return 0;
5243 }
5244
5245 static struct notifier_block pvclock_gtod_notifier = {
5246         .notifier_call = pvclock_gtod_notify,
5247 };
5248 #endif
5249
5250 int kvm_arch_init(void *opaque)
5251 {
5252         int r;
5253         struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
5254
5255         if (kvm_x86_ops) {
5256                 printk(KERN_ERR "kvm: already loaded the other module\n");
5257                 r = -EEXIST;
5258                 goto out;
5259         }
5260
5261         if (!ops->cpu_has_kvm_support()) {
5262                 printk(KERN_ERR "kvm: no hardware support\n");
5263                 r = -EOPNOTSUPP;
5264                 goto out;
5265         }
5266         if (ops->disabled_by_bios()) {
5267                 printk(KERN_ERR "kvm: disabled by bios\n");
5268                 r = -EOPNOTSUPP;
5269                 goto out;
5270         }
5271
5272         r = -ENOMEM;
5273         shared_msrs = alloc_percpu(struct kvm_shared_msrs);
5274         if (!shared_msrs) {
5275                 printk(KERN_ERR "kvm: failed to allocate percpu kvm_shared_msrs\n");
5276                 goto out;
5277         }
5278
5279         r = kvm_mmu_module_init();
5280         if (r)
5281                 goto out_free_percpu;
5282
5283         kvm_set_mmio_spte_mask();
5284         kvm_init_msr_list();
5285
5286         kvm_x86_ops = ops;
5287         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
5288                         PT_DIRTY_MASK, PT64_NX_MASK, 0);
5289
5290         kvm_timer_init();
5291
5292         perf_register_guest_info_callbacks(&kvm_guest_cbs);
5293
5294         if (cpu_has_xsave)
5295                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
5296
5297         kvm_lapic_init();
5298 #ifdef CONFIG_X86_64
5299         pvclock_gtod_register_notifier(&pvclock_gtod_notifier);
5300 #endif
5301
5302         return 0;
5303
5304 out_free_percpu:
5305         free_percpu(shared_msrs);
5306 out:
5307         return r;
5308 }
5309
5310 void kvm_arch_exit(void)
5311 {
5312         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
5313
5314         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
5315                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
5316                                             CPUFREQ_TRANSITION_NOTIFIER);
5317         unregister_hotcpu_notifier(&kvmclock_cpu_notifier_block);
5318 #ifdef CONFIG_X86_64
5319         pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier);
5320 #endif
5321         kvm_x86_ops = NULL;
5322         kvm_mmu_module_exit();
5323         free_percpu(shared_msrs);
5324 }
5325
5326 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
5327 {
5328         ++vcpu->stat.halt_exits;
5329         if (irqchip_in_kernel(vcpu->kvm)) {
5330                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
5331                 return 1;
5332         } else {
5333                 vcpu->run->exit_reason = KVM_EXIT_HLT;
5334                 return 0;
5335         }
5336 }
5337 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
5338
5339 int kvm_hv_hypercall(struct kvm_vcpu *vcpu)
5340 {
5341         u64 param, ingpa, outgpa, ret;
5342         uint16_t code, rep_idx, rep_cnt, res = HV_STATUS_SUCCESS, rep_done = 0;
5343         bool fast, longmode;
5344         int cs_db, cs_l;
5345
5346         /*
5347          * hypercall generates UD from non zero cpl and real mode
5348          * per HYPER-V spec
5349          */
5350         if (kvm_x86_ops->get_cpl(vcpu) != 0 || !is_protmode(vcpu)) {
5351                 kvm_queue_exception(vcpu, UD_VECTOR);
5352                 return 0;
5353         }
5354
5355         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
5356         longmode = is_long_mode(vcpu) && cs_l == 1;
5357
5358         if (!longmode) {
5359                 param = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDX) << 32) |
5360                         (kvm_register_read(vcpu, VCPU_REGS_RAX) & 0xffffffff);
5361                 ingpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RBX) << 32) |
5362                         (kvm_register_read(vcpu, VCPU_REGS_RCX) & 0xffffffff);
5363                 outgpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDI) << 32) |
5364                         (kvm_register_read(vcpu, VCPU_REGS_RSI) & 0xffffffff);
5365         }
5366 #ifdef CONFIG_X86_64
5367         else {
5368                 param = kvm_register_read(vcpu, VCPU_REGS_RCX);
5369                 ingpa = kvm_register_read(vcpu, VCPU_REGS_RDX);
5370                 outgpa = kvm_register_read(vcpu, VCPU_REGS_R8);
5371         }
5372 #endif
5373
5374         code = param & 0xffff;
5375         fast = (param >> 16) & 0x1;
5376         rep_cnt = (param >> 32) & 0xfff;
5377         rep_idx = (param >> 48) & 0xfff;
5378
5379         trace_kvm_hv_hypercall(code, fast, rep_cnt, rep_idx, ingpa, outgpa);
5380
5381         switch (code) {
5382         case HV_X64_HV_NOTIFY_LONG_SPIN_WAIT:
5383                 kvm_vcpu_on_spin(vcpu);
5384                 break;
5385         default:
5386                 res = HV_STATUS_INVALID_HYPERCALL_CODE;
5387                 break;
5388         }
5389
5390         ret = res | (((u64)rep_done & 0xfff) << 32);
5391         if (longmode) {
5392                 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
5393         } else {
5394                 kvm_register_write(vcpu, VCPU_REGS_RDX, ret >> 32);
5395                 kvm_register_write(vcpu, VCPU_REGS_RAX, ret & 0xffffffff);
5396         }
5397
5398         return 1;
5399 }
5400
5401 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
5402 {
5403         unsigned long nr, a0, a1, a2, a3, ret;
5404         int r = 1;
5405
5406         if (kvm_hv_hypercall_enabled(vcpu->kvm))
5407                 return kvm_hv_hypercall(vcpu);
5408
5409         nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
5410         a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
5411         a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
5412         a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
5413         a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
5414
5415         trace_kvm_hypercall(nr, a0, a1, a2, a3);
5416
5417         if (!is_long_mode(vcpu)) {
5418                 nr &= 0xFFFFFFFF;
5419                 a0 &= 0xFFFFFFFF;
5420                 a1 &= 0xFFFFFFFF;
5421                 a2 &= 0xFFFFFFFF;
5422                 a3 &= 0xFFFFFFFF;
5423         }
5424
5425         if (kvm_x86_ops->get_cpl(vcpu) != 0) {
5426                 ret = -KVM_EPERM;
5427                 goto out;
5428         }
5429
5430         switch (nr) {
5431         case KVM_HC_VAPIC_POLL_IRQ:
5432                 ret = 0;
5433                 break;
5434         default:
5435                 ret = -KVM_ENOSYS;
5436                 break;
5437         }
5438 out:
5439         kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
5440         ++vcpu->stat.hypercalls;
5441         return r;
5442 }
5443 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
5444
5445 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
5446 {
5447         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5448         char instruction[3];
5449         unsigned long rip = kvm_rip_read(vcpu);
5450
5451         /*
5452          * Blow out the MMU to ensure that no other VCPU has an active mapping
5453          * to ensure that the updated hypercall appears atomically across all
5454          * VCPUs.
5455          */
5456         kvm_mmu_zap_all(vcpu->kvm);
5457
5458         kvm_x86_ops->patch_hypercall(vcpu, instruction);
5459
5460         return emulator_write_emulated(ctxt, rip, instruction, 3, NULL);
5461 }
5462
5463 /*
5464  * Check if userspace requested an interrupt window, and that the
5465  * interrupt window is open.
5466  *
5467  * No need to exit to userspace if we already have an interrupt queued.
5468  */
5469 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
5470 {
5471         return (!irqchip_in_kernel(vcpu->kvm) && !kvm_cpu_has_interrupt(vcpu) &&
5472                 vcpu->run->request_interrupt_window &&
5473                 kvm_arch_interrupt_allowed(vcpu));
5474 }
5475
5476 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
5477 {
5478         struct kvm_run *kvm_run = vcpu->run;
5479
5480         kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
5481         kvm_run->cr8 = kvm_get_cr8(vcpu);
5482         kvm_run->apic_base = kvm_get_apic_base(vcpu);
5483         if (irqchip_in_kernel(vcpu->kvm))
5484                 kvm_run->ready_for_interrupt_injection = 1;
5485         else
5486                 kvm_run->ready_for_interrupt_injection =
5487                         kvm_arch_interrupt_allowed(vcpu) &&
5488                         !kvm_cpu_has_interrupt(vcpu) &&
5489                         !kvm_event_needs_reinjection(vcpu);
5490 }
5491
5492 static int vapic_enter(struct kvm_vcpu *vcpu)
5493 {
5494         struct kvm_lapic *apic = vcpu->arch.apic;
5495         struct page *page;
5496
5497         if (!apic || !apic->vapic_addr)
5498                 return 0;
5499
5500         page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
5501         if (is_error_page(page))
5502                 return -EFAULT;
5503
5504         vcpu->arch.apic->vapic_page = page;
5505         return 0;
5506 }
5507
5508 static void vapic_exit(struct kvm_vcpu *vcpu)
5509 {
5510         struct kvm_lapic *apic = vcpu->arch.apic;
5511         int idx;
5512
5513         if (!apic || !apic->vapic_addr)
5514                 return;
5515
5516         idx = srcu_read_lock(&vcpu->kvm->srcu);
5517         kvm_release_page_dirty(apic->vapic_page);
5518         mark_page_dirty(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
5519         srcu_read_unlock(&vcpu->kvm->srcu, idx);
5520 }
5521
5522 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
5523 {
5524         int max_irr, tpr;
5525
5526         if (!kvm_x86_ops->update_cr8_intercept)
5527                 return;
5528
5529         if (!vcpu->arch.apic)
5530                 return;
5531
5532         if (!vcpu->arch.apic->vapic_addr)
5533                 max_irr = kvm_lapic_find_highest_irr(vcpu);
5534         else
5535                 max_irr = -1;
5536
5537         if (max_irr != -1)
5538                 max_irr >>= 4;
5539
5540         tpr = kvm_lapic_get_cr8(vcpu);
5541
5542         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
5543 }
5544
5545 static void inject_pending_event(struct kvm_vcpu *vcpu)
5546 {
5547         /* try to reinject previous events if any */
5548         if (vcpu->arch.exception.pending) {
5549                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
5550                                         vcpu->arch.exception.has_error_code,
5551                                         vcpu->arch.exception.error_code);
5552                 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
5553                                           vcpu->arch.exception.has_error_code,
5554                                           vcpu->arch.exception.error_code,
5555                                           vcpu->arch.exception.reinject);
5556                 return;
5557         }
5558
5559         if (vcpu->arch.nmi_injected) {
5560                 kvm_x86_ops->set_nmi(vcpu);
5561                 return;
5562         }
5563
5564         if (vcpu->arch.interrupt.pending) {
5565                 kvm_x86_ops->set_irq(vcpu);
5566                 return;
5567         }
5568
5569         /* try to inject new event if pending */
5570         if (vcpu->arch.nmi_pending) {
5571                 if (kvm_x86_ops->nmi_allowed(vcpu)) {
5572                         --vcpu->arch.nmi_pending;
5573                         vcpu->arch.nmi_injected = true;
5574                         kvm_x86_ops->set_nmi(vcpu);
5575                 }
5576         } else if (kvm_cpu_has_injectable_intr(vcpu)) {
5577                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
5578                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
5579                                             false);
5580                         kvm_x86_ops->set_irq(vcpu);
5581                 }
5582         }
5583 }
5584
5585 static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
5586 {
5587         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
5588                         !vcpu->guest_xcr0_loaded) {
5589                 /* kvm_set_xcr() also depends on this */
5590                 xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
5591                 vcpu->guest_xcr0_loaded = 1;
5592         }
5593 }
5594
5595 static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
5596 {
5597         if (vcpu->guest_xcr0_loaded) {
5598                 if (vcpu->arch.xcr0 != host_xcr0)
5599                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
5600                 vcpu->guest_xcr0_loaded = 0;
5601         }
5602 }
5603
5604 static void process_nmi(struct kvm_vcpu *vcpu)
5605 {
5606         unsigned limit = 2;
5607
5608         /*
5609          * x86 is limited to one NMI running, and one NMI pending after it.
5610          * If an NMI is already in progress, limit further NMIs to just one.
5611          * Otherwise, allow two (and we'll inject the first one immediately).
5612          */
5613         if (kvm_x86_ops->get_nmi_mask(vcpu) || vcpu->arch.nmi_injected)
5614                 limit = 1;
5615
5616         vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
5617         vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
5618         kvm_make_request(KVM_REQ_EVENT, vcpu);
5619 }
5620
5621 static void kvm_gen_update_masterclock(struct kvm *kvm)
5622 {
5623 #ifdef CONFIG_X86_64
5624         int i;
5625         struct kvm_vcpu *vcpu;
5626         struct kvm_arch *ka = &kvm->arch;
5627
5628         spin_lock(&ka->pvclock_gtod_sync_lock);
5629         kvm_make_mclock_inprogress_request(kvm);
5630         /* no guest entries from this point */
5631         pvclock_update_vm_gtod_copy(kvm);
5632
5633         kvm_for_each_vcpu(i, vcpu, kvm)
5634                 set_bit(KVM_REQ_CLOCK_UPDATE, &vcpu->requests);
5635
5636         /* guest entries allowed */
5637         kvm_for_each_vcpu(i, vcpu, kvm)
5638                 clear_bit(KVM_REQ_MCLOCK_INPROGRESS, &vcpu->requests);
5639
5640         spin_unlock(&ka->pvclock_gtod_sync_lock);
5641 #endif
5642 }
5643
5644 static void update_eoi_exitmap(struct kvm_vcpu *vcpu)
5645 {
5646         u64 eoi_exit_bitmap[4];
5647
5648         memset(eoi_exit_bitmap, 0, 32);
5649
5650         kvm_ioapic_calculate_eoi_exitmap(vcpu, eoi_exit_bitmap);
5651         kvm_x86_ops->load_eoi_exitmap(vcpu, eoi_exit_bitmap);
5652 }
5653
5654 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
5655 {
5656         int r;
5657         bool req_int_win = !irqchip_in_kernel(vcpu->kvm) &&
5658                 vcpu->run->request_interrupt_window;
5659         bool req_immediate_exit = 0;
5660
5661         if (vcpu->requests) {
5662                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
5663                         kvm_mmu_unload(vcpu);
5664                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
5665                         __kvm_migrate_timers(vcpu);
5666                 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu))
5667                         kvm_gen_update_masterclock(vcpu->kvm);
5668                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
5669                         r = kvm_guest_time_update(vcpu);
5670                         if (unlikely(r))
5671                                 goto out;
5672                 }
5673                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
5674                         kvm_mmu_sync_roots(vcpu);
5675                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
5676                         kvm_x86_ops->tlb_flush(vcpu);
5677                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
5678                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
5679                         r = 0;
5680                         goto out;
5681                 }
5682                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
5683                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
5684                         r = 0;
5685                         goto out;
5686                 }
5687                 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU, vcpu)) {
5688                         vcpu->fpu_active = 0;
5689                         kvm_x86_ops->fpu_deactivate(vcpu);
5690                 }
5691                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
5692                         /* Page is swapped out. Do synthetic halt */
5693                         vcpu->arch.apf.halted = true;
5694                         r = 1;
5695                         goto out;
5696                 }
5697                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
5698                         record_steal_time(vcpu);
5699                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
5700                         process_nmi(vcpu);
5701                 req_immediate_exit =
5702                         kvm_check_request(KVM_REQ_IMMEDIATE_EXIT, vcpu);
5703                 if (kvm_check_request(KVM_REQ_PMU, vcpu))
5704                         kvm_handle_pmu_event(vcpu);
5705                 if (kvm_check_request(KVM_REQ_PMI, vcpu))
5706                         kvm_deliver_pmi(vcpu);
5707                 if (kvm_check_request(KVM_REQ_EOIBITMAP, vcpu))
5708                         update_eoi_exitmap(vcpu);
5709         }
5710
5711         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
5712                 inject_pending_event(vcpu);
5713
5714                 /* enable NMI/IRQ window open exits if needed */
5715                 if (vcpu->arch.nmi_pending)
5716                         kvm_x86_ops->enable_nmi_window(vcpu);
5717                 else if (kvm_cpu_has_injectable_intr(vcpu) || req_int_win)
5718                         kvm_x86_ops->enable_irq_window(vcpu);
5719
5720                 if (kvm_lapic_enabled(vcpu)) {
5721                         /*
5722                          * Update architecture specific hints for APIC
5723                          * virtual interrupt delivery.
5724                          */
5725                         if (kvm_x86_ops->hwapic_irr_update)
5726                                 kvm_x86_ops->hwapic_irr_update(vcpu,
5727                                         kvm_lapic_find_highest_irr(vcpu));
5728                         update_cr8_intercept(vcpu);
5729                         kvm_lapic_sync_to_vapic(vcpu);
5730                 }
5731         }
5732
5733         r = kvm_mmu_reload(vcpu);
5734         if (unlikely(r)) {
5735                 goto cancel_injection;
5736         }
5737
5738         preempt_disable();
5739
5740         kvm_x86_ops->prepare_guest_switch(vcpu);
5741         if (vcpu->fpu_active)
5742                 kvm_load_guest_fpu(vcpu);
5743         kvm_load_guest_xcr0(vcpu);
5744
5745         vcpu->mode = IN_GUEST_MODE;
5746
5747         /* We should set ->mode before check ->requests,
5748          * see the comment in make_all_cpus_request.
5749          */
5750         smp_mb();
5751
5752         local_irq_disable();
5753
5754         if (vcpu->mode == EXITING_GUEST_MODE || vcpu->requests
5755             || need_resched() || signal_pending(current)) {
5756                 vcpu->mode = OUTSIDE_GUEST_MODE;
5757                 smp_wmb();
5758                 local_irq_enable();
5759                 preempt_enable();
5760                 r = 1;
5761                 goto cancel_injection;
5762         }
5763
5764         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
5765
5766         if (req_immediate_exit)
5767                 smp_send_reschedule(vcpu->cpu);
5768
5769         kvm_guest_enter();
5770
5771         if (unlikely(vcpu->arch.switch_db_regs)) {
5772                 set_debugreg(0, 7);
5773                 set_debugreg(vcpu->arch.eff_db[0], 0);
5774                 set_debugreg(vcpu->arch.eff_db[1], 1);
5775                 set_debugreg(vcpu->arch.eff_db[2], 2);
5776                 set_debugreg(vcpu->arch.eff_db[3], 3);
5777         }
5778
5779         trace_kvm_entry(vcpu->vcpu_id);
5780         kvm_x86_ops->run(vcpu);
5781
5782         /*
5783          * If the guest has used debug registers, at least dr7
5784          * will be disabled while returning to the host.
5785          * If we don't have active breakpoints in the host, we don't
5786          * care about the messed up debug address registers. But if
5787          * we have some of them active, restore the old state.
5788          */
5789         if (hw_breakpoint_active())
5790                 hw_breakpoint_restore();
5791
5792         vcpu->arch.last_guest_tsc = kvm_x86_ops->read_l1_tsc(vcpu,
5793                                                            native_read_tsc());
5794
5795         vcpu->mode = OUTSIDE_GUEST_MODE;
5796         smp_wmb();
5797         local_irq_enable();
5798
5799         ++vcpu->stat.exits;
5800
5801         /*
5802          * We must have an instruction between local_irq_enable() and
5803          * kvm_guest_exit(), so the timer interrupt isn't delayed by
5804          * the interrupt shadow.  The stat.exits increment will do nicely.
5805          * But we need to prevent reordering, hence this barrier():
5806          */
5807         barrier();
5808
5809         kvm_guest_exit();
5810
5811         preempt_enable();
5812
5813         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
5814
5815         /*
5816          * Profile KVM exit RIPs:
5817          */
5818         if (unlikely(prof_on == KVM_PROFILING)) {
5819                 unsigned long rip = kvm_rip_read(vcpu);
5820                 profile_hit(KVM_PROFILING, (void *)rip);
5821         }
5822
5823         if (unlikely(vcpu->arch.tsc_always_catchup))
5824                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
5825
5826         if (vcpu->arch.apic_attention)
5827                 kvm_lapic_sync_from_vapic(vcpu);
5828
5829         r = kvm_x86_ops->handle_exit(vcpu);
5830         return r;
5831
5832 cancel_injection:
5833         kvm_x86_ops->cancel_injection(vcpu);
5834         if (unlikely(vcpu->arch.apic_attention))
5835                 kvm_lapic_sync_from_vapic(vcpu);
5836 out:
5837         return r;
5838 }
5839
5840
5841 static int __vcpu_run(struct kvm_vcpu *vcpu)
5842 {
5843         int r;
5844         struct kvm *kvm = vcpu->kvm;
5845
5846         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED)) {
5847                 pr_debug("vcpu %d received sipi with vector # %x\n",
5848                          vcpu->vcpu_id, vcpu->arch.sipi_vector);
5849                 kvm_lapic_reset(vcpu);
5850                 r = kvm_vcpu_reset(vcpu);
5851                 if (r)
5852                         return r;
5853                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5854         }
5855
5856         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5857         r = vapic_enter(vcpu);
5858         if (r) {
5859                 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5860                 return r;
5861         }
5862
5863         r = 1;
5864         while (r > 0) {
5865                 if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
5866                     !vcpu->arch.apf.halted)
5867                         r = vcpu_enter_guest(vcpu);
5868                 else {
5869                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5870                         kvm_vcpu_block(vcpu);
5871                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5872                         if (kvm_check_request(KVM_REQ_UNHALT, vcpu))
5873                         {
5874                                 switch(vcpu->arch.mp_state) {
5875                                 case KVM_MP_STATE_HALTED:
5876                                         vcpu->arch.mp_state =
5877                                                 KVM_MP_STATE_RUNNABLE;
5878                                 case KVM_MP_STATE_RUNNABLE:
5879                                         vcpu->arch.apf.halted = false;
5880                                         break;
5881                                 case KVM_MP_STATE_SIPI_RECEIVED:
5882                                 default:
5883                                         r = -EINTR;
5884                                         break;
5885                                 }
5886                         }
5887                 }
5888
5889                 if (r <= 0)
5890                         break;
5891
5892                 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
5893                 if (kvm_cpu_has_pending_timer(vcpu))
5894                         kvm_inject_pending_timer_irqs(vcpu);
5895
5896                 if (dm_request_for_irq_injection(vcpu)) {
5897                         r = -EINTR;
5898                         vcpu->run->exit_reason = KVM_EXIT_INTR;
5899                         ++vcpu->stat.request_irq_exits;
5900                 }
5901
5902                 kvm_check_async_pf_completion(vcpu);
5903
5904                 if (signal_pending(current)) {
5905                         r = -EINTR;
5906                         vcpu->run->exit_reason = KVM_EXIT_INTR;
5907                         ++vcpu->stat.signal_exits;
5908                 }
5909                 if (need_resched()) {
5910                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5911                         kvm_resched(vcpu);
5912                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5913                 }
5914         }
5915
5916         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5917
5918         vapic_exit(vcpu);
5919
5920         return r;
5921 }
5922
5923 static inline int complete_emulated_io(struct kvm_vcpu *vcpu)
5924 {
5925         int r;
5926         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
5927         r = emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
5928         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
5929         if (r != EMULATE_DONE)
5930                 return 0;
5931         return 1;
5932 }
5933
5934 static int complete_emulated_pio(struct kvm_vcpu *vcpu)
5935 {
5936         BUG_ON(!vcpu->arch.pio.count);
5937
5938         return complete_emulated_io(vcpu);
5939 }
5940
5941 /*
5942  * Implements the following, as a state machine:
5943  *
5944  * read:
5945  *   for each fragment
5946  *     for each mmio piece in the fragment
5947  *       write gpa, len
5948  *       exit
5949  *       copy data
5950  *   execute insn
5951  *
5952  * write:
5953  *   for each fragment
5954  *     for each mmio piece in the fragment
5955  *       write gpa, len
5956  *       copy data
5957  *       exit
5958  */
5959 static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
5960 {
5961         struct kvm_run *run = vcpu->run;
5962         struct kvm_mmio_fragment *frag;
5963         unsigned len;
5964
5965         BUG_ON(!vcpu->mmio_needed);
5966
5967         /* Complete previous fragment */
5968         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
5969         len = min(8u, frag->len);
5970         if (!vcpu->mmio_is_write)
5971                 memcpy(frag->data, run->mmio.data, len);
5972
5973         if (frag->len <= 8) {
5974                 /* Switch to the next fragment. */
5975                 frag++;
5976                 vcpu->mmio_cur_fragment++;
5977         } else {
5978                 /* Go forward to the next mmio piece. */
5979                 frag->data += len;
5980                 frag->gpa += len;
5981                 frag->len -= len;
5982         }
5983
5984         if (vcpu->mmio_cur_fragment == vcpu->mmio_nr_fragments) {
5985                 vcpu->mmio_needed = 0;
5986                 if (vcpu->mmio_is_write)
5987                         return 1;
5988                 vcpu->mmio_read_completed = 1;
5989                 return complete_emulated_io(vcpu);
5990         }
5991
5992         run->exit_reason = KVM_EXIT_MMIO;
5993         run->mmio.phys_addr = frag->gpa;
5994         if (vcpu->mmio_is_write)
5995                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
5996         run->mmio.len = min(8u, frag->len);
5997         run->mmio.is_write = vcpu->mmio_is_write;
5998         vcpu->arch.complete_userspace_io = complete_emulated_mmio;
5999         return 0;
6000 }
6001
6002
6003 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
6004 {
6005         int r;
6006         sigset_t sigsaved;
6007
6008         if (!tsk_used_math(current) && init_fpu(current))
6009                 return -ENOMEM;
6010
6011         if (vcpu->sigset_active)
6012                 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
6013
6014         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
6015                 kvm_vcpu_block(vcpu);
6016                 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
6017                 r = -EAGAIN;
6018                 goto out;
6019         }
6020
6021         /* re-sync apic's tpr */
6022         if (!irqchip_in_kernel(vcpu->kvm)) {
6023                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
6024                         r = -EINVAL;
6025                         goto out;
6026                 }
6027         }
6028
6029         if (unlikely(vcpu->arch.complete_userspace_io)) {
6030                 int (*cui)(struct kvm_vcpu *) = vcpu->arch.complete_userspace_io;
6031                 vcpu->arch.complete_userspace_io = NULL;
6032                 r = cui(vcpu);
6033                 if (r <= 0)
6034                         goto out;
6035         } else
6036                 WARN_ON(vcpu->arch.pio.count || vcpu->mmio_needed);
6037
6038         r = __vcpu_run(vcpu);
6039
6040 out:
6041         post_kvm_run_save(vcpu);
6042         if (vcpu->sigset_active)
6043                 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
6044
6045         return r;
6046 }
6047
6048 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
6049 {
6050         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
6051                 /*
6052                  * We are here if userspace calls get_regs() in the middle of
6053                  * instruction emulation. Registers state needs to be copied
6054                  * back from emulation context to vcpu. Userspace shouldn't do
6055                  * that usually, but some bad designed PV devices (vmware
6056                  * backdoor interface) need this to work
6057                  */
6058                 emulator_writeback_register_cache(&vcpu->arch.emulate_ctxt);
6059                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
6060         }
6061         regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
6062         regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
6063         regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
6064         regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
6065         regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
6066         regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
6067         regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
6068         regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
6069 #ifdef CONFIG_X86_64
6070         regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
6071         regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
6072         regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
6073         regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
6074         regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
6075         regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
6076         regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
6077         regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
6078 #endif
6079
6080         regs->rip = kvm_rip_read(vcpu);
6081         regs->rflags = kvm_get_rflags(vcpu);
6082
6083         return 0;
6084 }
6085
6086 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
6087 {
6088         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
6089         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
6090
6091         kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
6092         kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
6093         kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
6094         kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
6095         kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
6096         kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
6097         kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
6098         kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
6099 #ifdef CONFIG_X86_64
6100         kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
6101         kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
6102         kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
6103         kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
6104         kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
6105         kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
6106         kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
6107         kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
6108 #endif
6109
6110         kvm_rip_write(vcpu, regs->rip);
6111         kvm_set_rflags(vcpu, regs->rflags);
6112
6113         vcpu->arch.exception.pending = false;
6114
6115         kvm_make_request(KVM_REQ_EVENT, vcpu);
6116
6117         return 0;
6118 }
6119
6120 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
6121 {
6122         struct kvm_segment cs;
6123
6124         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
6125         *db = cs.db;
6126         *l = cs.l;
6127 }
6128 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
6129
6130 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
6131                                   struct kvm_sregs *sregs)
6132 {
6133         struct desc_ptr dt;
6134
6135         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
6136         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
6137         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
6138         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
6139         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
6140         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
6141
6142         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
6143         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
6144
6145         kvm_x86_ops->get_idt(vcpu, &dt);
6146         sregs->idt.limit = dt.size;
6147         sregs->idt.base = dt.address;
6148         kvm_x86_ops->get_gdt(vcpu, &dt);
6149         sregs->gdt.limit = dt.size;
6150         sregs->gdt.base = dt.address;
6151
6152         sregs->cr0 = kvm_read_cr0(vcpu);
6153         sregs->cr2 = vcpu->arch.cr2;
6154         sregs->cr3 = kvm_read_cr3(vcpu);
6155         sregs->cr4 = kvm_read_cr4(vcpu);
6156         sregs->cr8 = kvm_get_cr8(vcpu);
6157         sregs->efer = vcpu->arch.efer;
6158         sregs->apic_base = kvm_get_apic_base(vcpu);
6159
6160         memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
6161
6162         if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
6163                 set_bit(vcpu->arch.interrupt.nr,
6164                         (unsigned long *)sregs->interrupt_bitmap);
6165
6166         return 0;
6167 }
6168
6169 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
6170                                     struct kvm_mp_state *mp_state)
6171 {
6172         mp_state->mp_state = vcpu->arch.mp_state;
6173         return 0;
6174 }
6175
6176 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
6177                                     struct kvm_mp_state *mp_state)
6178 {
6179         vcpu->arch.mp_state = mp_state->mp_state;
6180         kvm_make_request(KVM_REQ_EVENT, vcpu);
6181         return 0;
6182 }
6183
6184 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
6185                     int reason, bool has_error_code, u32 error_code)
6186 {
6187         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
6188         int ret;
6189
6190         init_emulate_ctxt(vcpu);
6191
6192         ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
6193                                    has_error_code, error_code);
6194
6195         if (ret)
6196                 return EMULATE_FAIL;
6197
6198         kvm_rip_write(vcpu, ctxt->eip);
6199         kvm_set_rflags(vcpu, ctxt->eflags);
6200         kvm_make_request(KVM_REQ_EVENT, vcpu);
6201         return EMULATE_DONE;
6202 }
6203 EXPORT_SYMBOL_GPL(kvm_task_switch);
6204
6205 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
6206                                   struct kvm_sregs *sregs)
6207 {
6208         int mmu_reset_needed = 0;
6209         int pending_vec, max_bits, idx;
6210         struct desc_ptr dt;
6211
6212         if (!guest_cpuid_has_xsave(vcpu) && (sregs->cr4 & X86_CR4_OSXSAVE))
6213                 return -EINVAL;
6214
6215         dt.size = sregs->idt.limit;
6216         dt.address = sregs->idt.base;
6217         kvm_x86_ops->set_idt(vcpu, &dt);
6218         dt.size = sregs->gdt.limit;
6219         dt.address = sregs->gdt.base;
6220         kvm_x86_ops->set_gdt(vcpu, &dt);
6221
6222         vcpu->arch.cr2 = sregs->cr2;
6223         mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
6224         vcpu->arch.cr3 = sregs->cr3;
6225         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
6226
6227         kvm_set_cr8(vcpu, sregs->cr8);
6228
6229         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
6230         kvm_x86_ops->set_efer(vcpu, sregs->efer);
6231         kvm_set_apic_base(vcpu, sregs->apic_base);
6232
6233         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
6234         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
6235         vcpu->arch.cr0 = sregs->cr0;
6236
6237         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
6238         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
6239         if (sregs->cr4 & X86_CR4_OSXSAVE)
6240                 kvm_update_cpuid(vcpu);
6241
6242         idx = srcu_read_lock(&vcpu->kvm->srcu);
6243         if (!is_long_mode(vcpu) && is_pae(vcpu)) {
6244                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
6245                 mmu_reset_needed = 1;
6246         }
6247         srcu_read_unlock(&vcpu->kvm->srcu, idx);
6248
6249         if (mmu_reset_needed)
6250                 kvm_mmu_reset_context(vcpu);
6251
6252         max_bits = KVM_NR_INTERRUPTS;
6253         pending_vec = find_first_bit(
6254                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
6255         if (pending_vec < max_bits) {
6256                 kvm_queue_interrupt(vcpu, pending_vec, false);
6257                 pr_debug("Set back pending irq %d\n", pending_vec);
6258         }
6259
6260         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
6261         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
6262         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
6263         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
6264         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
6265         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
6266
6267         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
6268         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
6269
6270         update_cr8_intercept(vcpu);
6271
6272         /* Older userspace won't unhalt the vcpu on reset. */
6273         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
6274             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
6275             !is_protmode(vcpu))
6276                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
6277
6278         kvm_make_request(KVM_REQ_EVENT, vcpu);
6279
6280         return 0;
6281 }
6282
6283 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
6284                                         struct kvm_guest_debug *dbg)
6285 {
6286         unsigned long rflags;
6287         int i, r;
6288
6289         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
6290                 r = -EBUSY;
6291                 if (vcpu->arch.exception.pending)
6292                         goto out;
6293                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
6294                         kvm_queue_exception(vcpu, DB_VECTOR);
6295                 else
6296                         kvm_queue_exception(vcpu, BP_VECTOR);
6297         }
6298
6299         /*
6300          * Read rflags as long as potentially injected trace flags are still
6301          * filtered out.
6302          */
6303         rflags = kvm_get_rflags(vcpu);
6304
6305         vcpu->guest_debug = dbg->control;
6306         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
6307                 vcpu->guest_debug = 0;
6308
6309         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
6310                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
6311                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
6312                 vcpu->arch.guest_debug_dr7 = dbg->arch.debugreg[7];
6313         } else {
6314                 for (i = 0; i < KVM_NR_DB_REGS; i++)
6315                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
6316         }
6317         kvm_update_dr7(vcpu);
6318
6319         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
6320                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
6321                         get_segment_base(vcpu, VCPU_SREG_CS);
6322
6323         /*
6324          * Trigger an rflags update that will inject or remove the trace
6325          * flags.
6326          */
6327         kvm_set_rflags(vcpu, rflags);
6328
6329         kvm_x86_ops->update_db_bp_intercept(vcpu);
6330
6331         r = 0;
6332
6333 out:
6334
6335         return r;
6336 }
6337
6338 /*
6339  * Translate a guest virtual address to a guest physical address.
6340  */
6341 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
6342                                     struct kvm_translation *tr)
6343 {
6344         unsigned long vaddr = tr->linear_address;
6345         gpa_t gpa;
6346         int idx;
6347
6348         idx = srcu_read_lock(&vcpu->kvm->srcu);
6349         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
6350         srcu_read_unlock(&vcpu->kvm->srcu, idx);
6351         tr->physical_address = gpa;
6352         tr->valid = gpa != UNMAPPED_GVA;
6353         tr->writeable = 1;
6354         tr->usermode = 0;
6355
6356         return 0;
6357 }
6358
6359 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
6360 {
6361         struct i387_fxsave_struct *fxsave =
6362                         &vcpu->arch.guest_fpu.state->fxsave;
6363
6364         memcpy(fpu->fpr, fxsave->st_space, 128);
6365         fpu->fcw = fxsave->cwd;
6366         fpu->fsw = fxsave->swd;
6367         fpu->ftwx = fxsave->twd;
6368         fpu->last_opcode = fxsave->fop;
6369         fpu->last_ip = fxsave->rip;
6370         fpu->last_dp = fxsave->rdp;
6371         memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
6372
6373         return 0;
6374 }
6375
6376 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
6377 {
6378         struct i387_fxsave_struct *fxsave =
6379                         &vcpu->arch.guest_fpu.state->fxsave;
6380
6381         memcpy(fxsave->st_space, fpu->fpr, 128);
6382         fxsave->cwd = fpu->fcw;
6383         fxsave->swd = fpu->fsw;
6384         fxsave->twd = fpu->ftwx;
6385         fxsave->fop = fpu->last_opcode;
6386         fxsave->rip = fpu->last_ip;
6387         fxsave->rdp = fpu->last_dp;
6388         memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
6389
6390         return 0;
6391 }
6392
6393 int fx_init(struct kvm_vcpu *vcpu)
6394 {
6395         int err;
6396
6397         err = fpu_alloc(&vcpu->arch.guest_fpu);
6398         if (err)
6399                 return err;
6400
6401         fpu_finit(&vcpu->arch.guest_fpu);
6402
6403         /*
6404          * Ensure guest xcr0 is valid for loading
6405          */
6406         vcpu->arch.xcr0 = XSTATE_FP;
6407
6408         vcpu->arch.cr0 |= X86_CR0_ET;
6409
6410         return 0;
6411 }
6412 EXPORT_SYMBOL_GPL(fx_init);
6413
6414 static void fx_free(struct kvm_vcpu *vcpu)
6415 {
6416         fpu_free(&vcpu->arch.guest_fpu);
6417 }
6418
6419 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
6420 {
6421         if (vcpu->guest_fpu_loaded)
6422                 return;
6423
6424         /*
6425          * Restore all possible states in the guest,
6426          * and assume host would use all available bits.
6427          * Guest xcr0 would be loaded later.
6428          */
6429         kvm_put_guest_xcr0(vcpu);
6430         vcpu->guest_fpu_loaded = 1;
6431         __kernel_fpu_begin();
6432         fpu_restore_checking(&vcpu->arch.guest_fpu);
6433         trace_kvm_fpu(1);
6434 }
6435
6436 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
6437 {
6438         kvm_put_guest_xcr0(vcpu);
6439
6440         if (!vcpu->guest_fpu_loaded)
6441                 return;
6442
6443         vcpu->guest_fpu_loaded = 0;
6444         fpu_save_init(&vcpu->arch.guest_fpu);
6445         __kernel_fpu_end();
6446         ++vcpu->stat.fpu_reload;
6447         kvm_make_request(KVM_REQ_DEACTIVATE_FPU, vcpu);
6448         trace_kvm_fpu(0);
6449 }
6450
6451 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
6452 {
6453         kvmclock_reset(vcpu);
6454
6455         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
6456         fx_free(vcpu);
6457         kvm_x86_ops->vcpu_free(vcpu);
6458 }
6459
6460 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
6461                                                 unsigned int id)
6462 {
6463         if (check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
6464                 printk_once(KERN_WARNING
6465                 "kvm: SMP vm created on host with unstable TSC; "
6466                 "guest TSC will not be reliable\n");
6467         return kvm_x86_ops->vcpu_create(kvm, id);
6468 }
6469
6470 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
6471 {
6472         int r;
6473
6474         vcpu->arch.mtrr_state.have_fixed = 1;
6475         r = vcpu_load(vcpu);
6476         if (r)
6477                 return r;
6478         r = kvm_vcpu_reset(vcpu);
6479         if (r == 0)
6480                 r = kvm_mmu_setup(vcpu);
6481         vcpu_put(vcpu);
6482
6483         return r;
6484 }
6485
6486 int kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
6487 {
6488         int r;
6489         struct msr_data msr;
6490
6491         r = vcpu_load(vcpu);
6492         if (r)
6493                 return r;
6494         msr.data = 0x0;
6495         msr.index = MSR_IA32_TSC;
6496         msr.host_initiated = true;
6497         kvm_write_tsc(vcpu, &msr);
6498         vcpu_put(vcpu);
6499
6500         return r;
6501 }
6502
6503 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
6504 {
6505         int r;
6506         vcpu->arch.apf.msr_val = 0;
6507
6508         r = vcpu_load(vcpu);
6509         BUG_ON(r);
6510         kvm_mmu_unload(vcpu);
6511         vcpu_put(vcpu);
6512
6513         fx_free(vcpu);
6514         kvm_x86_ops->vcpu_free(vcpu);
6515 }
6516
6517 static int kvm_vcpu_reset(struct kvm_vcpu *vcpu)
6518 {
6519         atomic_set(&vcpu->arch.nmi_queued, 0);
6520         vcpu->arch.nmi_pending = 0;
6521         vcpu->arch.nmi_injected = false;
6522
6523         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
6524         vcpu->arch.dr6 = DR6_FIXED_1;
6525         vcpu->arch.dr7 = DR7_FIXED_1;
6526         kvm_update_dr7(vcpu);
6527
6528         kvm_make_request(KVM_REQ_EVENT, vcpu);
6529         vcpu->arch.apf.msr_val = 0;
6530         vcpu->arch.st.msr_val = 0;
6531
6532         kvmclock_reset(vcpu);
6533
6534         kvm_clear_async_pf_completion_queue(vcpu);
6535         kvm_async_pf_hash_reset(vcpu);
6536         vcpu->arch.apf.halted = false;
6537
6538         kvm_pmu_reset(vcpu);
6539
6540         memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
6541         vcpu->arch.regs_avail = ~0;
6542         vcpu->arch.regs_dirty = ~0;
6543
6544         return kvm_x86_ops->vcpu_reset(vcpu);
6545 }
6546
6547 int kvm_arch_hardware_enable(void *garbage)
6548 {
6549         struct kvm *kvm;
6550         struct kvm_vcpu *vcpu;
6551         int i;
6552         int ret;
6553         u64 local_tsc;
6554         u64 max_tsc = 0;
6555         bool stable, backwards_tsc = false;
6556
6557         kvm_shared_msr_cpu_online();
6558         ret = kvm_x86_ops->hardware_enable(garbage);
6559         if (ret != 0)
6560                 return ret;
6561
6562         local_tsc = native_read_tsc();
6563         stable = !check_tsc_unstable();
6564         list_for_each_entry(kvm, &vm_list, vm_list) {
6565                 kvm_for_each_vcpu(i, vcpu, kvm) {
6566                         if (!stable && vcpu->cpu == smp_processor_id())
6567                                 set_bit(KVM_REQ_CLOCK_UPDATE, &vcpu->requests);
6568                         if (stable && vcpu->arch.last_host_tsc > local_tsc) {
6569                                 backwards_tsc = true;
6570                                 if (vcpu->arch.last_host_tsc > max_tsc)
6571                                         max_tsc = vcpu->arch.last_host_tsc;
6572                         }
6573                 }
6574         }
6575
6576         /*
6577          * Sometimes, even reliable TSCs go backwards.  This happens on
6578          * platforms that reset TSC during suspend or hibernate actions, but
6579          * maintain synchronization.  We must compensate.  Fortunately, we can
6580          * detect that condition here, which happens early in CPU bringup,
6581          * before any KVM threads can be running.  Unfortunately, we can't
6582          * bring the TSCs fully up to date with real time, as we aren't yet far
6583          * enough into CPU bringup that we know how much real time has actually
6584          * elapsed; our helper function, get_kernel_ns() will be using boot
6585          * variables that haven't been updated yet.
6586          *
6587          * So we simply find the maximum observed TSC above, then record the
6588          * adjustment to TSC in each VCPU.  When the VCPU later gets loaded,
6589          * the adjustment will be applied.  Note that we accumulate
6590          * adjustments, in case multiple suspend cycles happen before some VCPU
6591          * gets a chance to run again.  In the event that no KVM threads get a
6592          * chance to run, we will miss the entire elapsed period, as we'll have
6593          * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
6594          * loose cycle time.  This isn't too big a deal, since the loss will be
6595          * uniform across all VCPUs (not to mention the scenario is extremely
6596          * unlikely). It is possible that a second hibernate recovery happens
6597          * much faster than a first, causing the observed TSC here to be
6598          * smaller; this would require additional padding adjustment, which is
6599          * why we set last_host_tsc to the local tsc observed here.
6600          *
6601          * N.B. - this code below runs only on platforms with reliable TSC,
6602          * as that is the only way backwards_tsc is set above.  Also note
6603          * that this runs for ALL vcpus, which is not a bug; all VCPUs should
6604          * have the same delta_cyc adjustment applied if backwards_tsc
6605          * is detected.  Note further, this adjustment is only done once,
6606          * as we reset last_host_tsc on all VCPUs to stop this from being
6607          * called multiple times (one for each physical CPU bringup).
6608          *
6609          * Platforms with unreliable TSCs don't have to deal with this, they
6610          * will be compensated by the logic in vcpu_load, which sets the TSC to
6611          * catchup mode.  This will catchup all VCPUs to real time, but cannot
6612          * guarantee that they stay in perfect synchronization.
6613          */
6614         if (backwards_tsc) {
6615                 u64 delta_cyc = max_tsc - local_tsc;
6616                 list_for_each_entry(kvm, &vm_list, vm_list) {
6617                         kvm_for_each_vcpu(i, vcpu, kvm) {
6618                                 vcpu->arch.tsc_offset_adjustment += delta_cyc;
6619                                 vcpu->arch.last_host_tsc = local_tsc;
6620                                 set_bit(KVM_REQ_MASTERCLOCK_UPDATE,
6621                                         &vcpu->requests);
6622                         }
6623
6624                         /*
6625                          * We have to disable TSC offset matching.. if you were
6626                          * booting a VM while issuing an S4 host suspend....
6627                          * you may have some problem.  Solving this issue is
6628                          * left as an exercise to the reader.
6629                          */
6630                         kvm->arch.last_tsc_nsec = 0;
6631                         kvm->arch.last_tsc_write = 0;
6632                 }
6633
6634         }
6635         return 0;
6636 }
6637
6638 void kvm_arch_hardware_disable(void *garbage)
6639 {
6640         kvm_x86_ops->hardware_disable(garbage);
6641         drop_user_return_notifiers(garbage);
6642 }
6643
6644 int kvm_arch_hardware_setup(void)
6645 {
6646         return kvm_x86_ops->hardware_setup();
6647 }
6648
6649 void kvm_arch_hardware_unsetup(void)
6650 {
6651         kvm_x86_ops->hardware_unsetup();
6652 }
6653
6654 void kvm_arch_check_processor_compat(void *rtn)
6655 {
6656         kvm_x86_ops->check_processor_compatibility(rtn);
6657 }
6658
6659 bool kvm_vcpu_compatible(struct kvm_vcpu *vcpu)
6660 {
6661         return irqchip_in_kernel(vcpu->kvm) == (vcpu->arch.apic != NULL);
6662 }
6663
6664 struct static_key kvm_no_apic_vcpu __read_mostly;
6665
6666 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
6667 {
6668         struct page *page;
6669         struct kvm *kvm;
6670         int r;
6671
6672         BUG_ON(vcpu->kvm == NULL);
6673         kvm = vcpu->kvm;
6674
6675         vcpu->arch.emulate_ctxt.ops = &emulate_ops;
6676         if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_bsp(vcpu))
6677                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
6678         else
6679                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
6680
6681         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
6682         if (!page) {
6683                 r = -ENOMEM;
6684                 goto fail;
6685         }
6686         vcpu->arch.pio_data = page_address(page);
6687
6688         kvm_set_tsc_khz(vcpu, max_tsc_khz);
6689
6690         r = kvm_mmu_create(vcpu);
6691         if (r < 0)
6692                 goto fail_free_pio_data;
6693
6694         if (irqchip_in_kernel(kvm)) {
6695                 r = kvm_create_lapic(vcpu);
6696                 if (r < 0)
6697                         goto fail_mmu_destroy;
6698         } else
6699                 static_key_slow_inc(&kvm_no_apic_vcpu);
6700
6701         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
6702                                        GFP_KERNEL);
6703         if (!vcpu->arch.mce_banks) {
6704                 r = -ENOMEM;
6705                 goto fail_free_lapic;
6706         }
6707         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
6708
6709         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask, GFP_KERNEL))
6710                 goto fail_free_mce_banks;
6711
6712         r = fx_init(vcpu);
6713         if (r)
6714                 goto fail_free_wbinvd_dirty_mask;
6715
6716         vcpu->arch.ia32_tsc_adjust_msr = 0x0;
6717         vcpu->arch.pv_time_enabled = false;
6718         kvm_async_pf_hash_reset(vcpu);
6719         kvm_pmu_init(vcpu);
6720
6721         return 0;
6722 fail_free_wbinvd_dirty_mask:
6723         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
6724 fail_free_mce_banks:
6725         kfree(vcpu->arch.mce_banks);
6726 fail_free_lapic:
6727         kvm_free_lapic(vcpu);
6728 fail_mmu_destroy:
6729         kvm_mmu_destroy(vcpu);
6730 fail_free_pio_data:
6731         free_page((unsigned long)vcpu->arch.pio_data);
6732 fail:
6733         return r;
6734 }
6735
6736 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
6737 {
6738         int idx;
6739
6740         kvm_pmu_destroy(vcpu);
6741         kfree(vcpu->arch.mce_banks);
6742         kvm_free_lapic(vcpu);
6743         idx = srcu_read_lock(&vcpu->kvm->srcu);
6744         kvm_mmu_destroy(vcpu);
6745         srcu_read_unlock(&vcpu->kvm->srcu, idx);
6746         free_page((unsigned long)vcpu->arch.pio_data);
6747         if (!irqchip_in_kernel(vcpu->kvm))
6748                 static_key_slow_dec(&kvm_no_apic_vcpu);
6749 }
6750
6751 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
6752 {
6753         if (type)
6754                 return -EINVAL;
6755
6756         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
6757         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
6758
6759         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
6760         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
6761         /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
6762         set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID,
6763                 &kvm->arch.irq_sources_bitmap);
6764
6765         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
6766         mutex_init(&kvm->arch.apic_map_lock);
6767         spin_lock_init(&kvm->arch.pvclock_gtod_sync_lock);
6768
6769         pvclock_update_vm_gtod_copy(kvm);
6770
6771         return 0;
6772 }
6773
6774 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
6775 {
6776         int r;
6777         r = vcpu_load(vcpu);
6778         BUG_ON(r);
6779         kvm_mmu_unload(vcpu);
6780         vcpu_put(vcpu);
6781 }
6782
6783 static void kvm_free_vcpus(struct kvm *kvm)
6784 {
6785         unsigned int i;
6786         struct kvm_vcpu *vcpu;
6787
6788         /*
6789          * Unpin any mmu pages first.
6790          */
6791         kvm_for_each_vcpu(i, vcpu, kvm) {
6792                 kvm_clear_async_pf_completion_queue(vcpu);
6793                 kvm_unload_vcpu_mmu(vcpu);
6794         }
6795         kvm_for_each_vcpu(i, vcpu, kvm)
6796                 kvm_arch_vcpu_free(vcpu);
6797
6798         mutex_lock(&kvm->lock);
6799         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
6800                 kvm->vcpus[i] = NULL;
6801
6802         atomic_set(&kvm->online_vcpus, 0);
6803         mutex_unlock(&kvm->lock);
6804 }
6805
6806 void kvm_arch_sync_events(struct kvm *kvm)
6807 {
6808         kvm_free_all_assigned_devices(kvm);
6809         kvm_free_pit(kvm);
6810 }
6811
6812 void kvm_arch_destroy_vm(struct kvm *kvm)
6813 {
6814         kvm_iommu_unmap_guest(kvm);
6815         kfree(kvm->arch.vpic);
6816         kfree(kvm->arch.vioapic);
6817         kvm_free_vcpus(kvm);
6818         if (kvm->arch.apic_access_page)
6819                 put_page(kvm->arch.apic_access_page);
6820         if (kvm->arch.ept_identity_pagetable)
6821                 put_page(kvm->arch.ept_identity_pagetable);
6822         kfree(rcu_dereference_check(kvm->arch.apic_map, 1));
6823 }
6824
6825 void kvm_arch_free_memslot(struct kvm_memory_slot *free,
6826                            struct kvm_memory_slot *dont)
6827 {
6828         int i;
6829
6830         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
6831                 if (!dont || free->arch.rmap[i] != dont->arch.rmap[i]) {
6832                         kvm_kvfree(free->arch.rmap[i]);
6833                         free->arch.rmap[i] = NULL;
6834                 }
6835                 if (i == 0)
6836                         continue;
6837
6838                 if (!dont || free->arch.lpage_info[i - 1] !=
6839                              dont->arch.lpage_info[i - 1]) {
6840                         kvm_kvfree(free->arch.lpage_info[i - 1]);
6841                         free->arch.lpage_info[i - 1] = NULL;
6842                 }
6843         }
6844 }
6845
6846 int kvm_arch_create_memslot(struct kvm_memory_slot *slot, unsigned long npages)
6847 {
6848         int i;
6849
6850         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
6851                 unsigned long ugfn;
6852                 int lpages;
6853                 int level = i + 1;
6854
6855                 lpages = gfn_to_index(slot->base_gfn + npages - 1,
6856                                       slot->base_gfn, level) + 1;
6857
6858                 slot->arch.rmap[i] =
6859                         kvm_kvzalloc(lpages * sizeof(*slot->arch.rmap[i]));
6860                 if (!slot->arch.rmap[i])
6861                         goto out_free;
6862                 if (i == 0)
6863                         continue;
6864
6865                 slot->arch.lpage_info[i - 1] = kvm_kvzalloc(lpages *
6866                                         sizeof(*slot->arch.lpage_info[i - 1]));
6867                 if (!slot->arch.lpage_info[i - 1])
6868                         goto out_free;
6869
6870                 if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
6871                         slot->arch.lpage_info[i - 1][0].write_count = 1;
6872                 if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
6873                         slot->arch.lpage_info[i - 1][lpages - 1].write_count = 1;
6874                 ugfn = slot->userspace_addr >> PAGE_SHIFT;
6875                 /*
6876                  * If the gfn and userspace address are not aligned wrt each
6877                  * other, or if explicitly asked to, disable large page
6878                  * support for this slot
6879                  */
6880                 if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1) ||
6881                     !kvm_largepages_enabled()) {
6882                         unsigned long j;
6883
6884                         for (j = 0; j < lpages; ++j)
6885                                 slot->arch.lpage_info[i - 1][j].write_count = 1;
6886                 }
6887         }
6888
6889         return 0;
6890
6891 out_free:
6892         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
6893                 kvm_kvfree(slot->arch.rmap[i]);
6894                 slot->arch.rmap[i] = NULL;
6895                 if (i == 0)
6896                         continue;
6897
6898                 kvm_kvfree(slot->arch.lpage_info[i - 1]);
6899                 slot->arch.lpage_info[i - 1] = NULL;
6900         }
6901         return -ENOMEM;
6902 }
6903
6904 int kvm_arch_prepare_memory_region(struct kvm *kvm,
6905                                 struct kvm_memory_slot *memslot,
6906                                 struct kvm_memory_slot old,
6907                                 struct kvm_userspace_memory_region *mem,
6908                                 bool user_alloc)
6909 {
6910         int npages = memslot->npages;
6911
6912         /*
6913          * Only private memory slots need to be mapped here since
6914          * KVM_SET_MEMORY_REGION ioctl is no longer supported.
6915          */
6916         if ((memslot->id >= KVM_USER_MEM_SLOTS) && npages && !old.npages) {
6917                 unsigned long userspace_addr;
6918
6919                 /*
6920                  * MAP_SHARED to prevent internal slot pages from being moved
6921                  * by fork()/COW.
6922                  */
6923                 userspace_addr = vm_mmap(NULL, 0, npages * PAGE_SIZE,
6924                                          PROT_READ | PROT_WRITE,
6925                                          MAP_SHARED | MAP_ANONYMOUS, 0);
6926
6927                 if (IS_ERR((void *)userspace_addr))
6928                         return PTR_ERR((void *)userspace_addr);
6929
6930                 memslot->userspace_addr = userspace_addr;
6931         }
6932
6933         return 0;
6934 }
6935
6936 void kvm_arch_commit_memory_region(struct kvm *kvm,
6937                                 struct kvm_userspace_memory_region *mem,
6938                                 struct kvm_memory_slot old,
6939                                 bool user_alloc)
6940 {
6941
6942         int nr_mmu_pages = 0, npages = mem->memory_size >> PAGE_SHIFT;
6943
6944         if ((mem->slot >= KVM_USER_MEM_SLOTS) && old.npages && !npages) {
6945                 int ret;
6946
6947                 ret = vm_munmap(old.userspace_addr,
6948                                 old.npages * PAGE_SIZE);
6949                 if (ret < 0)
6950                         printk(KERN_WARNING
6951                                "kvm_vm_ioctl_set_memory_region: "
6952                                "failed to munmap memory\n");
6953         }
6954
6955         if (!kvm->arch.n_requested_mmu_pages)
6956                 nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
6957
6958         if (nr_mmu_pages)
6959                 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
6960         /*
6961          * Write protect all pages for dirty logging.
6962          * Existing largepage mappings are destroyed here and new ones will
6963          * not be created until the end of the logging.
6964          */
6965         if (npages && (mem->flags & KVM_MEM_LOG_DIRTY_PAGES))
6966                 kvm_mmu_slot_remove_write_access(kvm, mem->slot);
6967         /*
6968          * If memory slot is created, or moved, we need to clear all
6969          * mmio sptes.
6970          */
6971         if (npages && old.base_gfn != mem->guest_phys_addr >> PAGE_SHIFT) {
6972                 kvm_mmu_zap_all(kvm);
6973                 kvm_reload_remote_mmus(kvm);
6974         }
6975 }
6976
6977 void kvm_arch_flush_shadow_all(struct kvm *kvm)
6978 {
6979         kvm_mmu_zap_all(kvm);
6980         kvm_reload_remote_mmus(kvm);
6981 }
6982
6983 void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
6984                                    struct kvm_memory_slot *slot)
6985 {
6986         kvm_arch_flush_shadow_all(kvm);
6987 }
6988
6989 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
6990 {
6991         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
6992                 !vcpu->arch.apf.halted)
6993                 || !list_empty_careful(&vcpu->async_pf.done)
6994                 || vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED
6995                 || atomic_read(&vcpu->arch.nmi_queued) ||
6996                 (kvm_arch_interrupt_allowed(vcpu) &&
6997                  kvm_cpu_has_interrupt(vcpu));
6998 }
6999
7000 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
7001 {
7002         return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
7003 }
7004
7005 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
7006 {
7007         return kvm_x86_ops->interrupt_allowed(vcpu);
7008 }
7009
7010 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
7011 {
7012         unsigned long current_rip = kvm_rip_read(vcpu) +
7013                 get_segment_base(vcpu, VCPU_SREG_CS);
7014
7015         return current_rip == linear_rip;
7016 }
7017 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
7018
7019 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
7020 {
7021         unsigned long rflags;
7022
7023         rflags = kvm_x86_ops->get_rflags(vcpu);
7024         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
7025                 rflags &= ~X86_EFLAGS_TF;
7026         return rflags;
7027 }
7028 EXPORT_SYMBOL_GPL(kvm_get_rflags);
7029
7030 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
7031 {
7032         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
7033             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
7034                 rflags |= X86_EFLAGS_TF;
7035         kvm_x86_ops->set_rflags(vcpu, rflags);
7036         kvm_make_request(KVM_REQ_EVENT, vcpu);
7037 }
7038 EXPORT_SYMBOL_GPL(kvm_set_rflags);
7039
7040 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
7041 {
7042         int r;
7043
7044         if ((vcpu->arch.mmu.direct_map != work->arch.direct_map) ||
7045               is_error_page(work->page))
7046                 return;
7047
7048         r = kvm_mmu_reload(vcpu);
7049         if (unlikely(r))
7050                 return;
7051
7052         if (!vcpu->arch.mmu.direct_map &&
7053               work->arch.cr3 != vcpu->arch.mmu.get_cr3(vcpu))
7054                 return;
7055
7056         vcpu->arch.mmu.page_fault(vcpu, work->gva, 0, true);
7057 }
7058
7059 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
7060 {
7061         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
7062 }
7063
7064 static inline u32 kvm_async_pf_next_probe(u32 key)
7065 {
7066         return (key + 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU) - 1);
7067 }
7068
7069 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
7070 {
7071         u32 key = kvm_async_pf_hash_fn(gfn);
7072
7073         while (vcpu->arch.apf.gfns[key] != ~0)
7074                 key = kvm_async_pf_next_probe(key);
7075
7076         vcpu->arch.apf.gfns[key] = gfn;
7077 }
7078
7079 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
7080 {
7081         int i;
7082         u32 key = kvm_async_pf_hash_fn(gfn);
7083
7084         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU) &&
7085                      (vcpu->arch.apf.gfns[key] != gfn &&
7086                       vcpu->arch.apf.gfns[key] != ~0); i++)
7087                 key = kvm_async_pf_next_probe(key);
7088
7089         return key;
7090 }
7091
7092 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
7093 {
7094         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
7095 }
7096
7097 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
7098 {
7099         u32 i, j, k;
7100
7101         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
7102         while (true) {
7103                 vcpu->arch.apf.gfns[i] = ~0;
7104                 do {
7105                         j = kvm_async_pf_next_probe(j);
7106                         if (vcpu->arch.apf.gfns[j] == ~0)
7107                                 return;
7108                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
7109                         /*
7110                          * k lies cyclically in ]i,j]
7111                          * |    i.k.j |
7112                          * |....j i.k.| or  |.k..j i...|
7113                          */
7114                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
7115                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
7116                 i = j;
7117         }
7118 }
7119
7120 static int apf_put_user(struct kvm_vcpu *vcpu, u32 val)
7121 {
7122
7123         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &val,
7124                                       sizeof(val));
7125 }
7126
7127 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
7128                                      struct kvm_async_pf *work)
7129 {
7130         struct x86_exception fault;
7131
7132         trace_kvm_async_pf_not_present(work->arch.token, work->gva);
7133         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
7134
7135         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) ||
7136             (vcpu->arch.apf.send_user_only &&
7137              kvm_x86_ops->get_cpl(vcpu) == 0))
7138                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
7139         else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_NOT_PRESENT)) {
7140                 fault.vector = PF_VECTOR;
7141                 fault.error_code_valid = true;
7142                 fault.error_code = 0;
7143                 fault.nested_page_fault = false;
7144                 fault.address = work->arch.token;
7145                 kvm_inject_page_fault(vcpu, &fault);
7146         }
7147 }
7148
7149 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
7150                                  struct kvm_async_pf *work)
7151 {
7152         struct x86_exception fault;
7153
7154         trace_kvm_async_pf_ready(work->arch.token, work->gva);
7155         if (is_error_page(work->page))
7156                 work->arch.token = ~0; /* broadcast wakeup */
7157         else
7158                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
7159
7160         if ((vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) &&
7161             !apf_put_user(vcpu, KVM_PV_REASON_PAGE_READY)) {
7162                 fault.vector = PF_VECTOR;
7163                 fault.error_code_valid = true;
7164                 fault.error_code = 0;
7165                 fault.nested_page_fault = false;
7166                 fault.address = work->arch.token;
7167                 kvm_inject_page_fault(vcpu, &fault);
7168         }
7169         vcpu->arch.apf.halted = false;
7170         vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
7171 }
7172
7173 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu)
7174 {
7175         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED))
7176                 return true;
7177         else
7178                 return !kvm_event_needs_reinjection(vcpu) &&
7179                         kvm_x86_ops->interrupt_allowed(vcpu);
7180 }
7181
7182 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
7183 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
7184 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
7185 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
7186 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
7187 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
7188 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
7189 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
7190 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
7191 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
7192 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
7193 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);