arch/x86/kvm/x86.c

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * derived from drivers/kvm/kvm_main.c
   5  *
   6  * Copyright (C) 2006 Qumranet, Inc.
   7  * Copyright (C) 2008 Qumranet, Inc.
   8  * Copyright IBM Corporation, 2008
   9  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  10  *
  11  * Authors:
  12  *   Avi Kivity   <avi@qumranet.com>
  13  *   Yaniv Kamay  <yaniv@qumranet.com>
  14  *   Amit Shah    <amit.shah@qumranet.com>
  15  *   Ben-Ami Yassour <benami@il.ibm.com>
  16  *
  17  * This work is licensed under the terms of the GNU GPL, version 2.  See
  18  * the COPYING file in the top-level directory.
  19  *
  20  */
  21
  22 #include <linux/kvm_host.h>
  23 #include "irq.h"
  24 #include "mmu.h"
  25 #include "i8254.h"
  26 #include "tss.h"
  27 #include "kvm_cache_regs.h"
  28 #include "x86.h"
  29 #include "cpuid.h"
  30 #include "assigned-dev.h"
  31 #include "pmu.h"
  32 #include "hyperv.h"
  33
  34 #include <linux/clocksource.h>
  35 #include <linux/interrupt.h>
  36 #include <linux/kvm.h>
  37 #include <linux/fs.h>
  38 #include <linux/vmalloc.h>
  39 #include <linux/module.h>
  40 #include <linux/mman.h>
  41 #include <linux/highmem.h>
  42 #include <linux/iommu.h>
  43 #include <linux/intel-iommu.h>
  44 #include <linux/cpufreq.h>
  45 #include <linux/user-return-notifier.h>
  46 #include <linux/srcu.h>
  47 #include <linux/slab.h>
  48 #include <linux/perf_event.h>
  49 #include <linux/uaccess.h>
  50 #include <linux/hash.h>
  51 #include <linux/pci.h>
  52 #include <linux/timekeeper_internal.h>
  53 #include <linux/pvclock_gtod.h>
  54 #include <linux/kvm_irqfd.h>
  55 #include <linux/irqbypass.h>
  56 #include <trace/events/kvm.h>
  57
  58 #define CREATE_TRACE_POINTS
  59 #include "trace.h"
  60
  61 #include <asm/debugreg.h>
  62 #include <asm/msr.h>
  63 #include <asm/desc.h>
  64 #include <asm/mce.h>
  65 #include <linux/kernel_stat.h>
  66 #include <asm/fpu/internal.h> /* Ugh! */
  67 #include <asm/pvclock.h>
  68 #include <asm/div64.h>
  69 #include <asm/irq_remapping.h>
  70
  71 #define MAX_IO_MSRS 256
  72 #define KVM_MAX_MCE_BANKS 32
  73 #define KVM_MCE_CAP_SUPPORTED (MCG_CTL_P | MCG_SER_P)
  74
  75 #define emul_to_vcpu(ctxt) \
  76         container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
  77
  78 /* EFER defaults:
  79  * - enable syscall per default because its emulated by KVM
  80  * - enable LME and LMA per default on 64 bit KVM
  81  */
  82 #ifdef CONFIG_X86_64
  83 static
  84 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
  85 #else
  86 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
  87 #endif
  88
  89 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
  90 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
  91
  92 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
  93 static void process_nmi(struct kvm_vcpu *vcpu);
  94 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
  95
  96 struct kvm_x86_ops *kvm_x86_ops __read_mostly;
  97 EXPORT_SYMBOL_GPL(kvm_x86_ops);
  98
  99 static bool __read_mostly ignore_msrs = 0;
 100 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
 101
 102 unsigned int min_timer_period_us = 500;
 103 module_param(min_timer_period_us, uint, S_IRUGO | S_IWUSR);
 104
 105 static bool __read_mostly kvmclock_periodic_sync = true;
 106 module_param(kvmclock_periodic_sync, bool, S_IRUGO);
 107
 108 bool __read_mostly kvm_has_tsc_control;
 109 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
 110 u32  __read_mostly kvm_max_guest_tsc_khz;
 111 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
 112 u8   __read_mostly kvm_tsc_scaling_ratio_frac_bits;
 113 EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits);
 114 u64  __read_mostly kvm_max_tsc_scaling_ratio;
 115 EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio);
 116 static u64 __read_mostly kvm_default_tsc_scaling_ratio;
 117
 118 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
 119 static u32 __read_mostly tsc_tolerance_ppm = 250;
 120 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
 121
 122 /* lapic timer advance (tscdeadline mode only) in nanoseconds */
 123 unsigned int __read_mostly lapic_timer_advance_ns = 0;
 124 module_param(lapic_timer_advance_ns, uint, S_IRUGO | S_IWUSR);
 125
 126 static bool __read_mostly backwards_tsc_observed = false;
 127
 128 #define KVM_NR_SHARED_MSRS 16
 129
 130 struct kvm_shared_msrs_global {
 131         int nr;
 132         u32 msrs[KVM_NR_SHARED_MSRS];
 133 };
 134
 135 struct kvm_shared_msrs {
 136         struct user_return_notifier urn;
 137         bool registered;
 138         struct kvm_shared_msr_values {
 139                 u64 host;
 140                 u64 curr;
 141         } values[KVM_NR_SHARED_MSRS];
 142 };
 143
 144 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
 145 static struct kvm_shared_msrs __percpu *shared_msrs;
 146
 147 struct kvm_stats_debugfs_item debugfs_entries[] = {
 148         { "pf_fixed", VCPU_STAT(pf_fixed) },
 149         { "pf_guest", VCPU_STAT(pf_guest) },
 150         { "tlb_flush", VCPU_STAT(tlb_flush) },
 151         { "invlpg", VCPU_STAT(invlpg) },
 152         { "exits", VCPU_STAT(exits) },
 153         { "io_exits", VCPU_STAT(io_exits) },
 154         { "mmio_exits", VCPU_STAT(mmio_exits) },
 155         { "signal_exits", VCPU_STAT(signal_exits) },
 156         { "irq_window", VCPU_STAT(irq_window_exits) },
 157         { "nmi_window", VCPU_STAT(nmi_window_exits) },
 158         { "halt_exits", VCPU_STAT(halt_exits) },
 159         { "halt_successful_poll", VCPU_STAT(halt_successful_poll) },
 160         { "halt_attempted_poll", VCPU_STAT(halt_attempted_poll) },
 161         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
 162         { "hypercalls", VCPU_STAT(hypercalls) },
 163         { "request_irq", VCPU_STAT(request_irq_exits) },
 164         { "irq_exits", VCPU_STAT(irq_exits) },
 165         { "host_state_reload", VCPU_STAT(host_state_reload) },
 166         { "efer_reload", VCPU_STAT(efer_reload) },
 167         { "fpu_reload", VCPU_STAT(fpu_reload) },
 168         { "insn_emulation", VCPU_STAT(insn_emulation) },
 169         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
 170         { "irq_injections", VCPU_STAT(irq_injections) },
 171         { "nmi_injections", VCPU_STAT(nmi_injections) },
 172         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
 173         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
 174         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
 175         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
 176         { "mmu_flooded", VM_STAT(mmu_flooded) },
 177         { "mmu_recycled", VM_STAT(mmu_recycled) },
 178         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
 179         { "mmu_unsync", VM_STAT(mmu_unsync) },
 180         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
 181         { "largepages", VM_STAT(lpages) },
 182         { NULL }
 183 };
 184
 185 u64 __read_mostly host_xcr0;
 186
 187 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
 188
 189 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 190 {
 191         int i;
 192         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU); i++)
 193                 vcpu->arch.apf.gfns[i] = ~0;
 194 }
 195
 196 static void kvm_on_user_return(struct user_return_notifier *urn)
 197 {
 198         unsigned slot;
 199         struct kvm_shared_msrs *locals
 200                 = container_of(urn, struct kvm_shared_msrs, urn);
 201         struct kvm_shared_msr_values *values;
 202
 203         for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
 204                 values = &locals->values[slot];
 205                 if (values->host != values->curr) {
 206                         wrmsrl(shared_msrs_global.msrs[slot], values->host);
 207                         values->curr = values->host;
 208                 }
 209         }
 210         locals->registered = false;
 211         user_return_notifier_unregister(urn);
 212 }
 213
 214 static void shared_msr_update(unsigned slot, u32 msr)
 215 {
 216         u64 value;
 217         unsigned int cpu = smp_processor_id();
 218         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 219
 220         /* only read, and nobody should modify it at this time,
 221          * so don't need lock */
 222         if (slot >= shared_msrs_global.nr) {
 223                 printk(KERN_ERR "kvm: invalid MSR slot!");
 224                 return;
 225         }
 226         rdmsrl_safe(msr, &value);
 227         smsr->values[slot].host = value;
 228         smsr->values[slot].curr = value;
 229 }
 230
 231 void kvm_define_shared_msr(unsigned slot, u32 msr)
 232 {
 233         BUG_ON(slot >= KVM_NR_SHARED_MSRS);
 234         shared_msrs_global.msrs[slot] = msr;
 235         if (slot >= shared_msrs_global.nr)
 236                 shared_msrs_global.nr = slot + 1;
 237 }
 238 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
 239
 240 static void kvm_shared_msr_cpu_online(void)
 241 {
 242         unsigned i;
 243
 244         for (i = 0; i < shared_msrs_global.nr; ++i)
 245                 shared_msr_update(i, shared_msrs_global.msrs[i]);
 246 }
 247
 248 int kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
 249 {
 250         unsigned int cpu = smp_processor_id();
 251         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 252         int err;
 253
 254         if (((value ^ smsr->values[slot].curr) & mask) == 0)
 255                 return 0;
 256         smsr->values[slot].curr = value;
 257         err = wrmsrl_safe(shared_msrs_global.msrs[slot], value);
 258         if (err)
 259                 return 1;
 260
 261         if (!smsr->registered) {
 262                 smsr->urn.on_user_return = kvm_on_user_return;
 263                 user_return_notifier_register(&smsr->urn);
 264                 smsr->registered = true;
 265         }
 266         return 0;
 267 }
 268 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
 269
 270 static void drop_user_return_notifiers(void)
 271 {
 272         unsigned int cpu = smp_processor_id();
 273         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 274
 275         if (smsr->registered)
 276                 kvm_on_user_return(&smsr->urn);
 277 }
 278
 279 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 280 {
 281         return vcpu->arch.apic_base;
 282 }
 283 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 284
 285 int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
 286 {
 287         u64 old_state = vcpu->arch.apic_base &
 288                 (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE);
 289         u64 new_state = msr_info->data &
 290                 (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE);
 291         u64 reserved_bits = ((~0ULL) << cpuid_maxphyaddr(vcpu)) |
 292                 0x2ff | (guest_cpuid_has_x2apic(vcpu) ? 0 : X2APIC_ENABLE);
 293
 294         if (!msr_info->host_initiated &&
 295             ((msr_info->data & reserved_bits) != 0 ||
 296              new_state == X2APIC_ENABLE ||
 297              (new_state == MSR_IA32_APICBASE_ENABLE &&
 298               old_state == (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE)) ||
 299              (new_state == (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE) &&
 300               old_state == 0)))
 301                 return 1;
 302
 303         kvm_lapic_set_base(vcpu, msr_info->data);
 304         return 0;
 305 }
 306 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 307
 308 asmlinkage __visible void kvm_spurious_fault(void)
 309 {
 310         /* Fault while not rebooting.  We want the trace. */
 311         BUG();
 312 }
 313 EXPORT_SYMBOL_GPL(kvm_spurious_fault);
 314
 315 #define EXCPT_BENIGN            0
 316 #define EXCPT_CONTRIBUTORY      1
 317 #define EXCPT_PF                2
 318
 319 static int exception_class(int vector)
 320 {
 321         switch (vector) {
 322         case PF_VECTOR:
 323                 return EXCPT_PF;
 324         case DE_VECTOR:
 325         case TS_VECTOR:
 326         case NP_VECTOR:
 327         case SS_VECTOR:
 328         case GP_VECTOR:
 329                 return EXCPT_CONTRIBUTORY;
 330         default:
 331                 break;
 332         }
 333         return EXCPT_BENIGN;
 334 }
 335
 336 #define EXCPT_FAULT             0
 337 #define EXCPT_TRAP              1
 338 #define EXCPT_ABORT             2
 339 #define EXCPT_INTERRUPT         3
 340
 341 static int exception_type(int vector)
 342 {
 343         unsigned int mask;
 344
 345         if (WARN_ON(vector > 31 || vector == NMI_VECTOR))
 346                 return EXCPT_INTERRUPT;
 347
 348         mask = 1 << vector;
 349
 350         /* #DB is trap, as instruction watchpoints are handled elsewhere */
 351         if (mask & ((1 << DB_VECTOR) | (1 << BP_VECTOR) | (1 << OF_VECTOR)))
 352                 return EXCPT_TRAP;
 353
 354         if (mask & ((1 << DF_VECTOR) | (1 << MC_VECTOR)))
 355                 return EXCPT_ABORT;
 356
 357         /* Reserved exceptions will result in fault */
 358         return EXCPT_FAULT;
 359 }
 360
 361 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 362                 unsigned nr, bool has_error, u32 error_code,
 363                 bool reinject)
 364 {
 365         u32 prev_nr;
 366         int class1, class2;
 367
 368         kvm_make_request(KVM_REQ_EVENT, vcpu);
 369
 370         if (!vcpu->arch.exception.pending) {
 371         queue:
 372                 if (has_error && !is_protmode(vcpu))
 373                         has_error = false;
 374                 vcpu->arch.exception.pending = true;
 375                 vcpu->arch.exception.has_error_code = has_error;
 376                 vcpu->arch.exception.nr = nr;
 377                 vcpu->arch.exception.error_code = error_code;
 378                 vcpu->arch.exception.reinject = reinject;
 379                 return;
 380         }
 381
 382         /* to check exception */
 383         prev_nr = vcpu->arch.exception.nr;
 384         if (prev_nr == DF_VECTOR) {
 385                 /* triple fault -> shutdown */
 386                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 387                 return;
 388         }
 389         class1 = exception_class(prev_nr);
 390         class2 = exception_class(nr);
 391         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 392                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 393                 /* generate double fault per SDM Table 5-5 */
 394                 vcpu->arch.exception.pending = true;
 395                 vcpu->arch.exception.has_error_code = true;
 396                 vcpu->arch.exception.nr = DF_VECTOR;
 397                 vcpu->arch.exception.error_code = 0;
 398         } else
 399                 /* replace previous exception with a new one in a hope
 400                    that instruction re-execution will regenerate lost
 401                    exception */
 402                 goto queue;
 403 }
 404
 405 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 406 {
 407         kvm_multiple_exception(vcpu, nr, false, 0, false);
 408 }
 409 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 410
 411 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 412 {
 413         kvm_multiple_exception(vcpu, nr, false, 0, true);
 414 }
 415 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 416
 417 void kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 418 {
 419         if (err)
 420                 kvm_inject_gp(vcpu, 0);
 421         else
 422                 kvm_x86_ops->skip_emulated_instruction(vcpu);
 423 }
 424 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 425
 426 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 427 {
 428         ++vcpu->stat.pf_guest;
 429         vcpu->arch.cr2 = fault->address;
 430         kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 431 }
 432 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
 433
 434 static bool kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 435 {
 436         if (mmu_is_nested(vcpu) && !fault->nested_page_fault)
 437                 vcpu->arch.nested_mmu.inject_page_fault(vcpu, fault);
 438         else
 439                 vcpu->arch.mmu.inject_page_fault(vcpu, fault);
 440
 441         return fault->nested_page_fault;
 442 }
 443
 444 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 445 {
 446         atomic_inc(&vcpu->arch.nmi_queued);
 447         kvm_make_request(KVM_REQ_NMI, vcpu);
 448 }
 449 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 450
 451 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 452 {
 453         kvm_multiple_exception(vcpu, nr, true, error_code, false);
 454 }
 455 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 456
 457 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 458 {
 459         kvm_multiple_exception(vcpu, nr, true, error_code, true);
 460 }
 461 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 462
 463 /*
 464  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 465  * a #GP and return false.
 466  */
 467 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 468 {
 469         if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
 470                 return true;
 471         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 472         return false;
 473 }
 474 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 475
 476 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr)
 477 {
 478         if ((dr != 4 && dr != 5) || !kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 479                 return true;
 480
 481         kvm_queue_exception(vcpu, UD_VECTOR);
 482         return false;
 483 }
 484 EXPORT_SYMBOL_GPL(kvm_require_dr);
 485
 486 /*
 487  * This function will be used to read from the physical memory of the currently
 488  * running guest. The difference to kvm_vcpu_read_guest_page is that this function
 489  * can read from guest physical or from the guest's guest physical memory.
 490  */
 491 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 492                             gfn_t ngfn, void *data, int offset, int len,
 493                             u32 access)
 494 {
 495         struct x86_exception exception;
 496         gfn_t real_gfn;
 497         gpa_t ngpa;
 498
 499         ngpa     = gfn_to_gpa(ngfn);
 500         real_gfn = mmu->translate_gpa(vcpu, ngpa, access, &exception);
 501         if (real_gfn == UNMAPPED_GVA)
 502                 return -EFAULT;
 503
 504         real_gfn = gpa_to_gfn(real_gfn);
 505
 506         return kvm_vcpu_read_guest_page(vcpu, real_gfn, data, offset, len);
 507 }
 508 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 509
 510 static int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
 511                                void *data, int offset, int len, u32 access)
 512 {
 513         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
 514                                        data, offset, len, access);
 515 }
 516
 517 /*
 518  * Load the pae pdptrs.  Return true is they are all valid.
 519  */
 520 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 521 {
 522         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 523         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 524         int i;
 525         int ret;
 526         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 527
 528         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 529                                       offset * sizeof(u64), sizeof(pdpte),
 530                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 531         if (ret < 0) {
 532                 ret = 0;
 533                 goto out;
 534         }
 535         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 536                 if (is_present_gpte(pdpte[i]) &&
 537                     (pdpte[i] &
 538                      vcpu->arch.mmu.guest_rsvd_check.rsvd_bits_mask[0][2])) {
 539                         ret = 0;
 540                         goto out;
 541                 }
 542         }
 543         ret = 1;
 544
 545         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 546         __set_bit(VCPU_EXREG_PDPTR,
 547                   (unsigned long *)&vcpu->arch.regs_avail);
 548         __set_bit(VCPU_EXREG_PDPTR,
 549                   (unsigned long *)&vcpu->arch.regs_dirty);
 550 out:
 551
 552         return ret;
 553 }
 554 EXPORT_SYMBOL_GPL(load_pdptrs);
 555
 556 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
 557 {
 558         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
 559         bool changed = true;
 560         int offset;
 561         gfn_t gfn;
 562         int r;
 563
 564         if (is_long_mode(vcpu) || !is_pae(vcpu))
 565                 return false;
 566
 567         if (!test_bit(VCPU_EXREG_PDPTR,
 568                       (unsigned long *)&vcpu->arch.regs_avail))
 569                 return true;
 570
 571         gfn = (kvm_read_cr3(vcpu) & ~31u) >> PAGE_SHIFT;
 572         offset = (kvm_read_cr3(vcpu) & ~31u) & (PAGE_SIZE - 1);
 573         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
 574                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
 575         if (r < 0)
 576                 goto out;
 577         changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
 578 out:
 579
 580         return changed;
 581 }
 582
 583 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 584 {
 585         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 586         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP;
 587
 588         cr0 |= X86_CR0_ET;
 589
 590 #ifdef CONFIG_X86_64
 591         if (cr0 & 0xffffffff00000000UL)
 592                 return 1;
 593 #endif
 594
 595         cr0 &= ~CR0_RESERVED_BITS;
 596
 597         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 598                 return 1;
 599
 600         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 601                 return 1;
 602
 603         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
 604 #ifdef CONFIG_X86_64
 605                 if ((vcpu->arch.efer & EFER_LME)) {
 606                         int cs_db, cs_l;
 607
 608                         if (!is_pae(vcpu))
 609                                 return 1;
 610                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
 611                         if (cs_l)
 612                                 return 1;
 613                 } else
 614 #endif
 615                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 616                                                  kvm_read_cr3(vcpu)))
 617                         return 1;
 618         }
 619
 620         if (!(cr0 & X86_CR0_PG) && kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
 621                 return 1;
 622
 623         kvm_x86_ops->set_cr0(vcpu, cr0);
 624
 625         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 626                 kvm_clear_async_pf_completion_queue(vcpu);
 627                 kvm_async_pf_hash_reset(vcpu);
 628         }
 629
 630         if ((cr0 ^ old_cr0) & update_bits)
 631                 kvm_mmu_reset_context(vcpu);
 632
 633         if (((cr0 ^ old_cr0) & X86_CR0_CD) &&
 634             kvm_arch_has_noncoherent_dma(vcpu->kvm) &&
 635             !kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_CD_NW_CLEARED))
 636                 kvm_zap_gfn_range(vcpu->kvm, 0, ~0ULL);
 637
 638         return 0;
 639 }
 640 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 641
 642 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 643 {
 644         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 645 }
 646 EXPORT_SYMBOL_GPL(kvm_lmsw);
 647
 648 static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
 649 {
 650         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
 651                         !vcpu->guest_xcr0_loaded) {
 652                 /* kvm_set_xcr() also depends on this */
 653                 xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
 654                 vcpu->guest_xcr0_loaded = 1;
 655         }
 656 }
 657
 658 static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
 659 {
 660         if (vcpu->guest_xcr0_loaded) {
 661                 if (vcpu->arch.xcr0 != host_xcr0)
 662                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
 663                 vcpu->guest_xcr0_loaded = 0;
 664         }
 665 }
 666
 667 static int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 668 {
 669         u64 xcr0 = xcr;
 670         u64 old_xcr0 = vcpu->arch.xcr0;
 671         u64 valid_bits;
 672
 673         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 674         if (index != XCR_XFEATURE_ENABLED_MASK)
 675                 return 1;
 676         if (!(xcr0 & XSTATE_FP))
 677                 return 1;
 678         if ((xcr0 & XSTATE_YMM) && !(xcr0 & XSTATE_SSE))
 679                 return 1;
 680
 681         /*
 682          * Do not allow the guest to set bits that we do not support
 683          * saving.  However, xcr0 bit 0 is always set, even if the
 684          * emulated CPU does not support XSAVE (see fx_init).
 685          */
 686         valid_bits = vcpu->arch.guest_supported_xcr0 | XSTATE_FP;
 687         if (xcr0 & ~valid_bits)
 688                 return 1;
 689
 690         if ((!(xcr0 & XSTATE_BNDREGS)) != (!(xcr0 & XSTATE_BNDCSR)))
 691                 return 1;
 692
 693         if (xcr0 & XSTATE_AVX512) {
 694                 if (!(xcr0 & XSTATE_YMM))
 695                         return 1;
 696                 if ((xcr0 & XSTATE_AVX512) != XSTATE_AVX512)
 697                         return 1;
 698         }
 699         kvm_put_guest_xcr0(vcpu);
 700         vcpu->arch.xcr0 = xcr0;
 701
 702         if ((xcr0 ^ old_xcr0) & XSTATE_EXTEND_MASK)
 703                 kvm_update_cpuid(vcpu);
 704         return 0;
 705 }
 706
 707 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 708 {
 709         if (kvm_x86_ops->get_cpl(vcpu) != 0 ||
 710             __kvm_set_xcr(vcpu, index, xcr)) {
 711                 kvm_inject_gp(vcpu, 0);
 712                 return 1;
 713         }
 714         return 0;
 715 }
 716 EXPORT_SYMBOL_GPL(kvm_set_xcr);
 717
 718 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 719 {
 720         unsigned long old_cr4 = kvm_read_cr4(vcpu);
 721         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE |
 722                                    X86_CR4_SMEP | X86_CR4_SMAP;
 723
 724         if (cr4 & CR4_RESERVED_BITS)
 725                 return 1;
 726
 727         if (!guest_cpuid_has_xsave(vcpu) && (cr4 & X86_CR4_OSXSAVE))
 728                 return 1;
 729
 730         if (!guest_cpuid_has_smep(vcpu) && (cr4 & X86_CR4_SMEP))
 731                 return 1;
 732
 733         if (!guest_cpuid_has_smap(vcpu) && (cr4 & X86_CR4_SMAP))
 734                 return 1;
 735
 736         if (!guest_cpuid_has_fsgsbase(vcpu) && (cr4 & X86_CR4_FSGSBASE))
 737                 return 1;
 738
 739         if (is_long_mode(vcpu)) {
 740                 if (!(cr4 & X86_CR4_PAE))
 741                         return 1;
 742         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
 743                    && ((cr4 ^ old_cr4) & pdptr_bits)
 744                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 745                                    kvm_read_cr3(vcpu)))
 746                 return 1;
 747
 748         if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
 749                 if (!guest_cpuid_has_pcid(vcpu))
 750                         return 1;
 751
 752                 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
 753                 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_MASK) || !is_long_mode(vcpu))
 754                         return 1;
 755         }
 756
 757         if (kvm_x86_ops->set_cr4(vcpu, cr4))
 758                 return 1;
 759
 760         if (((cr4 ^ old_cr4) & pdptr_bits) ||
 761             (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
 762                 kvm_mmu_reset_context(vcpu);
 763
 764         if ((cr4 ^ old_cr4) & X86_CR4_OSXSAVE)
 765                 kvm_update_cpuid(vcpu);
 766
 767         return 0;
 768 }
 769 EXPORT_SYMBOL_GPL(kvm_set_cr4);
 770
 771 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 772 {
 773 #ifdef CONFIG_X86_64
 774         cr3 &= ~CR3_PCID_INVD;
 775 #endif
 776
 777         if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
 778                 kvm_mmu_sync_roots(vcpu);
 779                 kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu);
 780                 return 0;
 781         }
 782
 783         if (is_long_mode(vcpu)) {
 784                 if (cr3 & CR3_L_MODE_RESERVED_BITS)
 785                         return 1;
 786         } else if (is_pae(vcpu) && is_paging(vcpu) &&
 787                    !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
 788                 return 1;
 789
 790         vcpu->arch.cr3 = cr3;
 791         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
 792         kvm_mmu_new_cr3(vcpu);
 793         return 0;
 794 }
 795 EXPORT_SYMBOL_GPL(kvm_set_cr3);
 796
 797 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
 798 {
 799         if (cr8 & CR8_RESERVED_BITS)
 800                 return 1;
 801         if (lapic_in_kernel(vcpu))
 802                 kvm_lapic_set_tpr(vcpu, cr8);
 803         else
 804                 vcpu->arch.cr8 = cr8;
 805         return 0;
 806 }
 807 EXPORT_SYMBOL_GPL(kvm_set_cr8);
 808
 809 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
 810 {
 811         if (lapic_in_kernel(vcpu))
 812                 return kvm_lapic_get_cr8(vcpu);
 813         else
 814                 return vcpu->arch.cr8;
 815 }
 816 EXPORT_SYMBOL_GPL(kvm_get_cr8);
 817
 818 static void kvm_update_dr0123(struct kvm_vcpu *vcpu)
 819 {
 820         int i;
 821
 822         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
 823                 for (i = 0; i < KVM_NR_DB_REGS; i++)
 824                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
 825                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_RELOAD;
 826         }
 827 }
 828
 829 static void kvm_update_dr6(struct kvm_vcpu *vcpu)
 830 {
 831         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 832                 kvm_x86_ops->set_dr6(vcpu, vcpu->arch.dr6);
 833 }
 834
 835 static void kvm_update_dr7(struct kvm_vcpu *vcpu)
 836 {
 837         unsigned long dr7;
 838
 839         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
 840                 dr7 = vcpu->arch.guest_debug_dr7;
 841         else
 842                 dr7 = vcpu->arch.dr7;
 843         kvm_x86_ops->set_dr7(vcpu, dr7);
 844         vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_BP_ENABLED;
 845         if (dr7 & DR7_BP_EN_MASK)
 846                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_BP_ENABLED;
 847 }
 848
 849 static u64 kvm_dr6_fixed(struct kvm_vcpu *vcpu)
 850 {
 851         u64 fixed = DR6_FIXED_1;
 852
 853         if (!guest_cpuid_has_rtm(vcpu))
 854                 fixed |= DR6_RTM;
 855         return fixed;
 856 }
 857
 858 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 859 {
 860         switch (dr) {
 861         case 0 ... 3:
 862                 vcpu->arch.db[dr] = val;
 863                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 864                         vcpu->arch.eff_db[dr] = val;
 865                 break;
 866         case 4:
 867                 /* fall through */
 868         case 6:
 869                 if (val & 0xffffffff00000000ULL)
 870                         return -1; /* #GP */
 871                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | kvm_dr6_fixed(vcpu);
 872                 kvm_update_dr6(vcpu);
 873                 break;
 874         case 5:
 875                 /* fall through */
 876         default: /* 7 */
 877                 if (val & 0xffffffff00000000ULL)
 878                         return -1; /* #GP */
 879                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
 880                 kvm_update_dr7(vcpu);
 881                 break;
 882         }
 883
 884         return 0;
 885 }
 886
 887 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 888 {
 889         if (__kvm_set_dr(vcpu, dr, val)) {
 890                 kvm_inject_gp(vcpu, 0);
 891                 return 1;
 892         }
 893         return 0;
 894 }
 895 EXPORT_SYMBOL_GPL(kvm_set_dr);
 896
 897 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 898 {
 899         switch (dr) {
 900         case 0 ... 3:
 901                 *val = vcpu->arch.db[dr];
 902                 break;
 903         case 4:
 904                 /* fall through */
 905         case 6:
 906                 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
 907                         *val = vcpu->arch.dr6;
 908                 else
 909                         *val = kvm_x86_ops->get_dr6(vcpu);
 910                 break;
 911         case 5:
 912                 /* fall through */
 913         default: /* 7 */
 914                 *val = vcpu->arch.dr7;
 915                 break;
 916         }
 917         return 0;
 918 }
 919 EXPORT_SYMBOL_GPL(kvm_get_dr);
 920
 921 bool kvm_rdpmc(struct kvm_vcpu *vcpu)
 922 {
 923         u32 ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
 924         u64 data;
 925         int err;
 926
 927         err = kvm_pmu_rdpmc(vcpu, ecx, &data);
 928         if (err)
 929                 return err;
 930         kvm_register_write(vcpu, VCPU_REGS_RAX, (u32)data);
 931         kvm_register_write(vcpu, VCPU_REGS_RDX, data >> 32);
 932         return err;
 933 }
 934 EXPORT_SYMBOL_GPL(kvm_rdpmc);
 935
 936 /*
 937  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
 938  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
 939  *
 940  * This list is modified at module load time to reflect the
 941  * capabilities of the host cpu. This capabilities test skips MSRs that are
 942  * kvm-specific. Those are put in emulated_msrs; filtering of emulated_msrs
 943  * may depend on host virtualization features rather than host cpu features.
 944  */
 945
 946 static u32 msrs_to_save[] = {
 947         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
 948         MSR_STAR,
 949 #ifdef CONFIG_X86_64
 950         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
 951 #endif
 952         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA,
 953         MSR_IA32_FEATURE_CONTROL, MSR_IA32_BNDCFGS
 954 };
 955
 956 static unsigned num_msrs_to_save;
 957
 958 static u32 emulated_msrs[] = {
 959         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
 960         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
 961         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
 962         HV_X64_MSR_TIME_REF_COUNT, HV_X64_MSR_REFERENCE_TSC,
 963         HV_X64_MSR_CRASH_P0, HV_X64_MSR_CRASH_P1, HV_X64_MSR_CRASH_P2,
 964         HV_X64_MSR_CRASH_P3, HV_X64_MSR_CRASH_P4, HV_X64_MSR_CRASH_CTL,
 965         HV_X64_MSR_RESET,
 966         HV_X64_MSR_VP_INDEX,
 967         HV_X64_MSR_VP_RUNTIME,
 968         HV_X64_MSR_APIC_ASSIST_PAGE, MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
 969         MSR_KVM_PV_EOI_EN,
 970
 971         MSR_IA32_TSC_ADJUST,
 972         MSR_IA32_TSCDEADLINE,
 973         MSR_IA32_MISC_ENABLE,
 974         MSR_IA32_MCG_STATUS,
 975         MSR_IA32_MCG_CTL,
 976         MSR_IA32_SMBASE,
 977 };
 978
 979 static unsigned num_emulated_msrs;
 980
 981 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
 982 {
 983         if (efer & efer_reserved_bits)
 984                 return false;
 985
 986         if (efer & EFER_FFXSR) {
 987                 struct kvm_cpuid_entry2 *feat;
 988
 989                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 990                 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT)))
 991                         return false;
 992         }
 993
 994         if (efer & EFER_SVME) {
 995                 struct kvm_cpuid_entry2 *feat;
 996
 997                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 998                 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM)))
 999                         return false;
1000         }
1001
1002         return true;
1003 }
1004 EXPORT_SYMBOL_GPL(kvm_valid_efer);
1005
1006 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
1007 {
1008         u64 old_efer = vcpu->arch.efer;
1009
1010         if (!kvm_valid_efer(vcpu, efer))
1011                 return 1;
1012
1013         if (is_paging(vcpu)
1014             && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
1015                 return 1;
1016
1017         efer &= ~EFER_LMA;
1018         efer |= vcpu->arch.efer & EFER_LMA;
1019
1020         kvm_x86_ops->set_efer(vcpu, efer);
1021
1022         /* Update reserved bits */
1023         if ((efer ^ old_efer) & EFER_NX)
1024                 kvm_mmu_reset_context(vcpu);
1025
1026         return 0;
1027 }
1028
1029 void kvm_enable_efer_bits(u64 mask)
1030 {
1031        efer_reserved_bits &= ~mask;
1032 }
1033 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
1034
1035 /*
1036  * Writes msr value into into the appropriate "register".
1037  * Returns 0 on success, non-0 otherwise.
1038  * Assumes vcpu_load() was already called.
1039  */
1040 int kvm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
1041 {
1042         switch (msr->index) {
1043         case MSR_FS_BASE:
1044         case MSR_GS_BASE:
1045         case MSR_KERNEL_GS_BASE:
1046         case MSR_CSTAR:
1047         case MSR_LSTAR:
1048                 if (is_noncanonical_address(msr->data))
1049                         return 1;
1050                 break;
1051         case MSR_IA32_SYSENTER_EIP:
1052         case MSR_IA32_SYSENTER_ESP:
1053                 /*
1054                  * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1055                  * non-canonical address is written on Intel but not on
1056                  * AMD (which ignores the top 32-bits, because it does
1057                  * not implement 64-bit SYSENTER).
1058                  *
1059                  * 64-bit code should hence be able to write a non-canonical
1060                  * value on AMD.  Making the address canonical ensures that
1061                  * vmentry does not fail on Intel after writing a non-canonical
1062                  * value, and that something deterministic happens if the guest
1063                  * invokes 64-bit SYSENTER.
1064                  */
1065                 msr->data = get_canonical(msr->data);
1066         }
1067         return kvm_x86_ops->set_msr(vcpu, msr);
1068 }
1069 EXPORT_SYMBOL_GPL(kvm_set_msr);
1070
1071 /*
1072  * Adapt set_msr() to msr_io()'s calling convention
1073  */
1074 static int do_get_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1075 {
1076         struct msr_data msr;
1077         int r;
1078
1079         msr.index = index;
1080         msr.host_initiated = true;
1081         r = kvm_get_msr(vcpu, &msr);
1082         if (r)
1083                 return r;
1084
1085         *data = msr.data;
1086         return 0;
1087 }
1088
1089 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1090 {
1091         struct msr_data msr;
1092
1093         msr.data = *data;
1094         msr.index = index;
1095         msr.host_initiated = true;
1096         return kvm_set_msr(vcpu, &msr);
1097 }
1098
1099 #ifdef CONFIG_X86_64
1100 struct pvclock_gtod_data {
1101         seqcount_t      seq;
1102
1103         struct { /* extract of a clocksource struct */
1104                 int vclock_mode;
1105                 cycle_t cycle_last;
1106                 cycle_t mask;
1107                 u32     mult;
1108                 u32     shift;
1109         } clock;
1110
1111         u64             boot_ns;
1112         u64             nsec_base;
1113 };
1114
1115 static struct pvclock_gtod_data pvclock_gtod_data;
1116
1117 static void update_pvclock_gtod(struct timekeeper *tk)
1118 {
1119         struct pvclock_gtod_data *vdata = &pvclock_gtod_data;
1120         u64 boot_ns;
1121
1122         boot_ns = ktime_to_ns(ktime_add(tk->tkr_mono.base, tk->offs_boot));
1123
1124         write_seqcount_begin(&vdata->seq);
1125
1126         /* copy pvclock gtod data */
1127         vdata->clock.vclock_mode        = tk->tkr_mono.clock->archdata.vclock_mode;
1128         vdata->clock.cycle_last         = tk->tkr_mono.cycle_last;
1129         vdata->clock.mask               = tk->tkr_mono.mask;
1130         vdata->clock.mult               = tk->tkr_mono.mult;
1131         vdata->clock.shift              = tk->tkr_mono.shift;
1132
1133         vdata->boot_ns                  = boot_ns;
1134         vdata->nsec_base                = tk->tkr_mono.xtime_nsec;
1135
1136         write_seqcount_end(&vdata->seq);
1137 }
1138 #endif
1139
1140 void kvm_set_pending_timer(struct kvm_vcpu *vcpu)
1141 {
1142         /*
1143          * Note: KVM_REQ_PENDING_TIMER is implicitly checked in
1144          * vcpu_enter_guest.  This function is only called from
1145          * the physical CPU that is running vcpu.
1146          */
1147         kvm_make_request(KVM_REQ_PENDING_TIMER, vcpu);
1148 }
1149
1150 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
1151 {
1152         int version;
1153         int r;
1154         struct pvclock_wall_clock wc;
1155         struct timespec boot;
1156
1157         if (!wall_clock)
1158                 return;
1159
1160         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
1161         if (r)
1162                 return;
1163
1164         if (version & 1)
1165                 ++version;  /* first time write, random junk */
1166
1167         ++version;
1168
1169         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
1170
1171         /*
1172          * The guest calculates current wall clock time by adding
1173          * system time (updated by kvm_guest_time_update below) to the
1174          * wall clock specified here.  guest system time equals host
1175          * system time for us, thus we must fill in host boot time here.
1176          */
1177         getboottime(&boot);
1178
1179         if (kvm->arch.kvmclock_offset) {
1180                 struct timespec ts = ns_to_timespec(kvm->arch.kvmclock_offset);
1181                 boot = timespec_sub(boot, ts);
1182         }
1183         wc.sec = boot.tv_sec;
1184         wc.nsec = boot.tv_nsec;
1185         wc.version = version;
1186
1187         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
1188
1189         version++;
1190         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
1191 }
1192
1193 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
1194 {
1195         uint32_t quotient, remainder;
1196
1197         /* Don't try to replace with do_div(), this one calculates
1198          * "(dividend << 32) / divisor" */
1199         __asm__ ( "divl %4"
1200                   : "=a" (quotient), "=d" (remainder)
1201                   : "0" (0), "1" (dividend), "r" (divisor) );
1202         return quotient;
1203 }
1204
1205 static void kvm_get_time_scale(uint32_t scaled_khz, uint32_t base_khz,
1206                                s8 *pshift, u32 *pmultiplier)
1207 {
1208         uint64_t scaled64;
1209         int32_t  shift = 0;
1210         uint64_t tps64;
1211         uint32_t tps32;
1212
1213         tps64 = base_khz * 1000LL;
1214         scaled64 = scaled_khz * 1000LL;
1215         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
1216                 tps64 >>= 1;
1217                 shift--;
1218         }
1219
1220         tps32 = (uint32_t)tps64;
1221         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
1222                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
1223                         scaled64 >>= 1;
1224                 else
1225                         tps32 <<= 1;
1226                 shift++;
1227         }
1228
1229         *pshift = shift;
1230         *pmultiplier = div_frac(scaled64, tps32);
1231
1232         pr_debug("%s: base_khz %u => %u, shift %d, mul %u\n",
1233                  __func__, base_khz, scaled_khz, shift, *pmultiplier);
1234 }
1235
1236 #ifdef CONFIG_X86_64
1237 static atomic_t kvm_guest_has_master_clock = ATOMIC_INIT(0);
1238 #endif
1239
1240 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
1241 static unsigned long max_tsc_khz;
1242
1243 static inline u64 nsec_to_cycles(struct kvm_vcpu *vcpu, u64 nsec)
1244 {
1245         return pvclock_scale_delta(nsec, vcpu->arch.virtual_tsc_mult,
1246                                    vcpu->arch.virtual_tsc_shift);
1247 }
1248
1249 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
1250 {
1251         u64 v = (u64)khz * (1000000 + ppm);
1252         do_div(v, 1000000);
1253         return v;
1254 }
1255
1256 static int set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz, bool scale)
1257 {
1258         u64 ratio;
1259
1260         /* Guest TSC same frequency as host TSC? */
1261         if (!scale) {
1262                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
1263                 return 0;
1264         }
1265
1266         /* TSC scaling supported? */
1267         if (!kvm_has_tsc_control) {
1268                 if (user_tsc_khz > tsc_khz) {
1269                         vcpu->arch.tsc_catchup = 1;
1270                         vcpu->arch.tsc_always_catchup = 1;
1271                         return 0;
1272                 } else {
1273                         WARN(1, "user requested TSC rate below hardware speed\n");
1274                         return -1;
1275                 }
1276         }
1277
1278         /* TSC scaling required  - calculate ratio */
1279         ratio = mul_u64_u32_div(1ULL << kvm_tsc_scaling_ratio_frac_bits,
1280                                 user_tsc_khz, tsc_khz);
1281
1282         if (ratio == 0 || ratio >= kvm_max_tsc_scaling_ratio) {
1283                 WARN_ONCE(1, "Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
1284                           user_tsc_khz);
1285                 return -1;
1286         }
1287
1288         vcpu->arch.tsc_scaling_ratio = ratio;
1289         return 0;
1290 }
1291
1292 static int kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 this_tsc_khz)
1293 {
1294         u32 thresh_lo, thresh_hi;
1295         int use_scaling = 0;
1296
1297         /* tsc_khz can be zero if TSC calibration fails */
1298         if (this_tsc_khz == 0) {
1299                 /* set tsc_scaling_ratio to a safe value */
1300                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
1301                 return -1;
1302         }
1303
1304         /* Compute a scale to convert nanoseconds in TSC cycles */
1305         kvm_get_time_scale(this_tsc_khz, NSEC_PER_SEC / 1000,
1306                            &vcpu->arch.virtual_tsc_shift,
1307                            &vcpu->arch.virtual_tsc_mult);
1308         vcpu->arch.virtual_tsc_khz = this_tsc_khz;
1309
1310         /*
1311          * Compute the variation in TSC rate which is acceptable
1312          * within the range of tolerance and decide if the
1313          * rate being applied is within that bounds of the hardware
1314          * rate.  If so, no scaling or compensation need be done.
1315          */
1316         thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
1317         thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
1318         if (this_tsc_khz < thresh_lo || this_tsc_khz > thresh_hi) {
1319                 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", this_tsc_khz, thresh_lo, thresh_hi);
1320                 use_scaling = 1;
1321         }
1322         return set_tsc_khz(vcpu, this_tsc_khz, use_scaling);
1323 }
1324
1325 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
1326 {
1327         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
1328                                       vcpu->arch.virtual_tsc_mult,
1329                                       vcpu->arch.virtual_tsc_shift);
1330         tsc += vcpu->arch.this_tsc_write;
1331         return tsc;
1332 }
1333
1334 static void kvm_track_tsc_matching(struct kvm_vcpu *vcpu)
1335 {
1336 #ifdef CONFIG_X86_64
1337         bool vcpus_matched;
1338         struct kvm_arch *ka = &vcpu->kvm->arch;
1339         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1340
1341         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1342                          atomic_read(&vcpu->kvm->online_vcpus));
1343
1344         /*
1345          * Once the masterclock is enabled, always perform request in
1346          * order to update it.
1347          *
1348          * In order to enable masterclock, the host clocksource must be TSC
1349          * and the vcpus need to have matched TSCs.  When that happens,
1350          * perform request to enable masterclock.
1351          */
1352         if (ka->use_master_clock ||
1353             (gtod->clock.vclock_mode == VCLOCK_TSC && vcpus_matched))
1354                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
1355
1356         trace_kvm_track_tsc(vcpu->vcpu_id, ka->nr_vcpus_matched_tsc,
1357                             atomic_read(&vcpu->kvm->online_vcpus),
1358                             ka->use_master_clock, gtod->clock.vclock_mode);
1359 #endif
1360 }
1361
1362 static void update_ia32_tsc_adjust_msr(struct kvm_vcpu *vcpu, s64 offset)
1363 {
1364         u64 curr_offset = kvm_x86_ops->read_tsc_offset(vcpu);
1365         vcpu->arch.ia32_tsc_adjust_msr += offset - curr_offset;
1366 }
1367
1368 /*
1369  * Multiply tsc by a fixed point number represented by ratio.
1370  *
1371  * The most significant 64-N bits (mult) of ratio represent the
1372  * integral part of the fixed point number; the remaining N bits
1373  * (frac) represent the fractional part, ie. ratio represents a fixed
1374  * point number (mult + frac * 2^(-N)).
1375  *
1376  * N equals to kvm_tsc_scaling_ratio_frac_bits.
1377  */
1378 static inline u64 __scale_tsc(u64 ratio, u64 tsc)
1379 {
1380         return mul_u64_u64_shr(tsc, ratio, kvm_tsc_scaling_ratio_frac_bits);
1381 }
1382
1383 u64 kvm_scale_tsc(struct kvm_vcpu *vcpu, u64 tsc)
1384 {
1385         u64 _tsc = tsc;
1386         u64 ratio = vcpu->arch.tsc_scaling_ratio;
1387
1388         if (ratio != kvm_default_tsc_scaling_ratio)
1389                 _tsc = __scale_tsc(ratio, tsc);
1390
1391         return _tsc;
1392 }
1393 EXPORT_SYMBOL_GPL(kvm_scale_tsc);
1394
1395 static u64 kvm_compute_tsc_offset(struct kvm_vcpu *vcpu, u64 target_tsc)
1396 {
1397         u64 tsc;
1398
1399         tsc = kvm_scale_tsc(vcpu, rdtsc());
1400
1401         return target_tsc - tsc;
1402 }
1403
1404 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc)
1405 {
1406         return kvm_x86_ops->read_l1_tsc(vcpu, kvm_scale_tsc(vcpu, host_tsc));
1407 }
1408 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc);
1409
1410 void kvm_write_tsc(struct kvm_vcpu *vcpu, struct msr_data *msr)
1411 {
1412         struct kvm *kvm = vcpu->kvm;
1413         u64 offset, ns, elapsed;
1414         unsigned long flags;
1415         s64 usdiff;
1416         bool matched;
1417         bool already_matched;
1418         u64 data = msr->data;
1419
1420         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1421         offset = kvm_compute_tsc_offset(vcpu, data);
1422         ns = get_kernel_ns();
1423         elapsed = ns - kvm->arch.last_tsc_nsec;
1424
1425         if (vcpu->arch.virtual_tsc_khz) {
1426                 int faulted = 0;
1427
1428                 /* n.b - signed multiplication and division required */
1429                 usdiff = data - kvm->arch.last_tsc_write;
1430 #ifdef CONFIG_X86_64
1431                 usdiff = (usdiff * 1000) / vcpu->arch.virtual_tsc_khz;
1432 #else
1433                 /* do_div() only does unsigned */
1434                 asm("1: idivl %[divisor]\n"
1435                     "2: xor %%edx, %%edx\n"
1436                     "   movl $0, %[faulted]\n"
1437                     "3:\n"
1438                     ".section .fixup,\"ax\"\n"
1439                     "4: movl $1, %[faulted]\n"
1440                     "   jmp  3b\n"
1441                     ".previous\n"
1442
1443                 _ASM_EXTABLE(1b, 4b)
1444
1445                 : "=A"(usdiff), [faulted] "=r" (faulted)
1446                 : "A"(usdiff * 1000), [divisor] "rm"(vcpu->arch.virtual_tsc_khz));
1447
1448 #endif
1449                 do_div(elapsed, 1000);
1450                 usdiff -= elapsed;
1451                 if (usdiff < 0)
1452                         usdiff = -usdiff;
1453
1454                 /* idivl overflow => difference is larger than USEC_PER_SEC */
1455                 if (faulted)
1456                         usdiff = USEC_PER_SEC;
1457         } else
1458                 usdiff = USEC_PER_SEC; /* disable TSC match window below */
1459
1460         /*
1461          * Special case: TSC write with a small delta (1 second) of virtual
1462          * cycle time against real time is interpreted as an attempt to
1463          * synchronize the CPU.
1464          *
1465          * For a reliable TSC, we can match TSC offsets, and for an unstable
1466          * TSC, we add elapsed time in this computation.  We could let the
1467          * compensation code attempt to catch up if we fall behind, but
1468          * it's better to try to match offsets from the beginning.
1469          */
1470         if (usdiff < USEC_PER_SEC &&
1471             vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
1472                 if (!check_tsc_unstable()) {
1473                         offset = kvm->arch.cur_tsc_offset;
1474                         pr_debug("kvm: matched tsc offset for %llu\n", data);
1475                 } else {
1476                         u64 delta = nsec_to_cycles(vcpu, elapsed);
1477                         data += delta;
1478                         offset = kvm_compute_tsc_offset(vcpu, data);
1479                         pr_debug("kvm: adjusted tsc offset by %llu\n", delta);
1480                 }
1481                 matched = true;
1482                 already_matched = (vcpu->arch.this_tsc_generation == kvm->arch.cur_tsc_generation);
1483         } else {
1484                 /*
1485                  * We split periods of matched TSC writes into generations.
1486                  * For each generation, we track the original measured
1487                  * nanosecond time, offset, and write, so if TSCs are in
1488                  * sync, we can match exact offset, and if not, we can match
1489                  * exact software computation in compute_guest_tsc()
1490                  *
1491                  * These values are tracked in kvm->arch.cur_xxx variables.
1492                  */
1493                 kvm->arch.cur_tsc_generation++;
1494                 kvm->arch.cur_tsc_nsec = ns;
1495                 kvm->arch.cur_tsc_write = data;
1496                 kvm->arch.cur_tsc_offset = offset;
1497                 matched = false;
1498                 pr_debug("kvm: new tsc generation %llu, clock %llu\n",
1499                          kvm->arch.cur_tsc_generation, data);
1500         }
1501
1502         /*
1503          * We also track th most recent recorded KHZ, write and time to
1504          * allow the matching interval to be extended at each write.
1505          */
1506         kvm->arch.last_tsc_nsec = ns;
1507         kvm->arch.last_tsc_write = data;
1508         kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
1509
1510         vcpu->arch.last_guest_tsc = data;
1511
1512         /* Keep track of which generation this VCPU has synchronized to */
1513         vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
1514         vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
1515         vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
1516
1517         if (guest_cpuid_has_tsc_adjust(vcpu) && !msr->host_initiated)
1518                 update_ia32_tsc_adjust_msr(vcpu, offset);
1519         kvm_x86_ops->write_tsc_offset(vcpu, offset);
1520         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1521
1522         spin_lock(&kvm->arch.pvclock_gtod_sync_lock);
1523         if (!matched) {
1524                 kvm->arch.nr_vcpus_matched_tsc = 0;
1525         } else if (!already_matched) {
1526                 kvm->arch.nr_vcpus_matched_tsc++;
1527         }
1528
1529         kvm_track_tsc_matching(vcpu);
1530         spin_unlock(&kvm->arch.pvclock_gtod_sync_lock);
1531 }
1532
1533 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1534
1535 static inline void adjust_tsc_offset_guest(struct kvm_vcpu *vcpu,
1536                                            s64 adjustment)
1537 {
1538         kvm_x86_ops->adjust_tsc_offset_guest(vcpu, adjustment);
1539 }
1540
1541 static inline void adjust_tsc_offset_host(struct kvm_vcpu *vcpu, s64 adjustment)
1542 {
1543         if (vcpu->arch.tsc_scaling_ratio != kvm_default_tsc_scaling_ratio)
1544                 WARN_ON(adjustment < 0);
1545         adjustment = kvm_scale_tsc(vcpu, (u64) adjustment);
1546         kvm_x86_ops->adjust_tsc_offset_guest(vcpu, adjustment);
1547 }
1548
1549 #ifdef CONFIG_X86_64
1550
1551 static cycle_t read_tsc(void)
1552 {
1553         cycle_t ret = (cycle_t)rdtsc_ordered();
1554         u64 last = pvclock_gtod_data.clock.cycle_last;
1555
1556         if (likely(ret >= last))
1557                 return ret;
1558
1559         /*
1560          * GCC likes to generate cmov here, but this branch is extremely
1561          * predictable (it's just a funciton of time and the likely is
1562          * very likely) and there's a data dependence, so force GCC
1563          * to generate a branch instead.  I don't barrier() because
1564          * we don't actually need a barrier, and if this function
1565          * ever gets inlined it will generate worse code.
1566          */
1567         asm volatile ("");
1568         return last;
1569 }
1570
1571 static inline u64 vgettsc(cycle_t *cycle_now)
1572 {
1573         long v;
1574         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1575
1576         *cycle_now = read_tsc();
1577
1578         v = (*cycle_now - gtod->clock.cycle_last) & gtod->clock.mask;
1579         return v * gtod->clock.mult;
1580 }
1581
1582 static int do_monotonic_boot(s64 *t, cycle_t *cycle_now)
1583 {
1584         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1585         unsigned long seq;
1586         int mode;
1587         u64 ns;
1588
1589         do {
1590                 seq = read_seqcount_begin(&gtod->seq);
1591                 mode = gtod->clock.vclock_mode;
1592                 ns = gtod->nsec_base;
1593                 ns += vgettsc(cycle_now);
1594                 ns >>= gtod->clock.shift;
1595                 ns += gtod->boot_ns;
1596         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
1597         *t = ns;
1598
1599         return mode;
1600 }
1601
1602 /* returns true if host is using tsc clocksource */
1603 static bool kvm_get_time_and_clockread(s64 *kernel_ns, cycle_t *cycle_now)
1604 {
1605         /* checked again under seqlock below */
1606         if (pvclock_gtod_data.clock.vclock_mode != VCLOCK_TSC)
1607                 return false;
1608
1609         return do_monotonic_boot(kernel_ns, cycle_now) == VCLOCK_TSC;
1610 }
1611 #endif
1612
1613 /*
1614  *
1615  * Assuming a stable TSC across physical CPUS, and a stable TSC
1616  * across virtual CPUs, the following condition is possible.
1617  * Each numbered line represents an event visible to both
1618  * CPUs at the next numbered event.
1619  *
1620  * "timespecX" represents host monotonic time. "tscX" represents
1621  * RDTSC value.
1622  *
1623  *              VCPU0 on CPU0           |       VCPU1 on CPU1
1624  *
1625  * 1.  read timespec0,tsc0
1626  * 2.                                   | timespec1 = timespec0 + N
1627  *                                      | tsc1 = tsc0 + M
1628  * 3. transition to guest               | transition to guest
1629  * 4. ret0 = timespec0 + (rdtsc - tsc0) |
1630  * 5.                                   | ret1 = timespec1 + (rdtsc - tsc1)
1631  *                                      | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
1632  *
1633  * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
1634  *
1635  *      - ret0 < ret1
1636  *      - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
1637  *              ...
1638  *      - 0 < N - M => M < N
1639  *
1640  * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
1641  * always the case (the difference between two distinct xtime instances
1642  * might be smaller then the difference between corresponding TSC reads,
1643  * when updating guest vcpus pvclock areas).
1644  *
1645  * To avoid that problem, do not allow visibility of distinct
1646  * system_timestamp/tsc_timestamp values simultaneously: use a master
1647  * copy of host monotonic time values. Update that master copy
1648  * in lockstep.
1649  *
1650  * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
1651  *
1652  */
1653
1654 static void pvclock_update_vm_gtod_copy(struct kvm *kvm)
1655 {
1656 #ifdef CONFIG_X86_64
1657         struct kvm_arch *ka = &kvm->arch;
1658         int vclock_mode;
1659         bool host_tsc_clocksource, vcpus_matched;
1660
1661         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1662                         atomic_read(&kvm->online_vcpus));
1663
1664         /*
1665          * If the host uses TSC clock, then passthrough TSC as stable
1666          * to the guest.
1667          */
1668         host_tsc_clocksource = kvm_get_time_and_clockread(
1669                                         &ka->master_kernel_ns,
1670                                         &ka->master_cycle_now);
1671
1672         ka->use_master_clock = host_tsc_clocksource && vcpus_matched
1673                                 && !backwards_tsc_observed
1674                                 && !ka->boot_vcpu_runs_old_kvmclock;
1675
1676         if (ka->use_master_clock)
1677                 atomic_set(&kvm_guest_has_master_clock, 1);
1678
1679         vclock_mode = pvclock_gtod_data.clock.vclock_mode;
1680         trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode,
1681                                         vcpus_matched);
1682 #endif
1683 }
1684
1685 static void kvm_gen_update_masterclock(struct kvm *kvm)
1686 {
1687 #ifdef CONFIG_X86_64
1688         int i;
1689         struct kvm_vcpu *vcpu;
1690         struct kvm_arch *ka = &kvm->arch;
1691
1692         spin_lock(&ka->pvclock_gtod_sync_lock);
1693         kvm_make_mclock_inprogress_request(kvm);
1694         /* no guest entries from this point */
1695         pvclock_update_vm_gtod_copy(kvm);
1696
1697         kvm_for_each_vcpu(i, vcpu, kvm)
1698                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1699
1700         /* guest entries allowed */
1701         kvm_for_each_vcpu(i, vcpu, kvm)
1702                 clear_bit(KVM_REQ_MCLOCK_INPROGRESS, &vcpu->requests);
1703
1704         spin_unlock(&ka->pvclock_gtod_sync_lock);
1705 #endif
1706 }
1707
1708 static int kvm_guest_time_update(struct kvm_vcpu *v)
1709 {
1710         unsigned long flags, this_tsc_khz, tgt_tsc_khz;
1711         struct kvm_vcpu_arch *vcpu = &v->arch;
1712         struct kvm_arch *ka = &v->kvm->arch;
1713         s64 kernel_ns;
1714         u64 tsc_timestamp, host_tsc;
1715         struct pvclock_vcpu_time_info guest_hv_clock;
1716         u8 pvclock_flags;
1717         bool use_master_clock;
1718
1719         kernel_ns = 0;
1720         host_tsc = 0;
1721
1722         /*
1723          * If the host uses TSC clock, then passthrough TSC as stable
1724          * to the guest.
1725          */
1726         spin_lock(&ka->pvclock_gtod_sync_lock);
1727         use_master_clock = ka->use_master_clock;
1728         if (use_master_clock) {
1729                 host_tsc = ka->master_cycle_now;
1730                 kernel_ns = ka->master_kernel_ns;
1731         }
1732         spin_unlock(&ka->pvclock_gtod_sync_lock);
1733
1734         /* Keep irq disabled to prevent changes to the clock */
1735         local_irq_save(flags);
1736         this_tsc_khz = __this_cpu_read(cpu_tsc_khz);
1737         if (unlikely(this_tsc_khz == 0)) {
1738                 local_irq_restore(flags);
1739                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1740                 return 1;
1741         }
1742         if (!use_master_clock) {
1743                 host_tsc = rdtsc();
1744                 kernel_ns = get_kernel_ns();
1745         }
1746
1747         tsc_timestamp = kvm_read_l1_tsc(v, host_tsc);
1748
1749         /*
1750          * We may have to catch up the TSC to match elapsed wall clock
1751          * time for two reasons, even if kvmclock is used.
1752          *   1) CPU could have been running below the maximum TSC rate
1753          *   2) Broken TSC compensation resets the base at each VCPU
1754          *      entry to avoid unknown leaps of TSC even when running
1755          *      again on the same CPU.  This may cause apparent elapsed
1756          *      time to disappear, and the guest to stand still or run
1757          *      very slowly.
1758          */
1759         if (vcpu->tsc_catchup) {
1760                 u64 tsc = compute_guest_tsc(v, kernel_ns);
1761                 if (tsc > tsc_timestamp) {
1762                         adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
1763                         tsc_timestamp = tsc;
1764                 }
1765         }
1766
1767         local_irq_restore(flags);
1768
1769         if (!vcpu->pv_time_enabled)
1770                 return 0;
1771
1772         if (unlikely(vcpu->hw_tsc_khz != this_tsc_khz)) {
1773                 tgt_tsc_khz = kvm_has_tsc_control ?
1774                         vcpu->virtual_tsc_khz : this_tsc_khz;
1775                 kvm_get_time_scale(NSEC_PER_SEC / 1000, tgt_tsc_khz,
1776                                    &vcpu->hv_clock.tsc_shift,
1777                                    &vcpu->hv_clock.tsc_to_system_mul);
1778                 vcpu->hw_tsc_khz = this_tsc_khz;
1779         }
1780
1781         /* With all the info we got, fill in the values */
1782         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
1783         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
1784         vcpu->last_guest_tsc = tsc_timestamp;
1785
1786         if (unlikely(kvm_read_guest_cached(v->kvm, &vcpu->pv_time,
1787                 &guest_hv_clock, sizeof(guest_hv_clock))))
1788                 return 0;
1789
1790         /* This VCPU is paused, but it's legal for a guest to read another
1791          * VCPU's kvmclock, so we really have to follow the specification where
1792          * it says that version is odd if data is being modified, and even after
1793          * it is consistent.
1794          *
1795          * Version field updates must be kept separate.  This is because
1796          * kvm_write_guest_cached might use a "rep movs" instruction, and
1797          * writes within a string instruction are weakly ordered.  So there
1798          * are three writes overall.
1799          *
1800          * As a small optimization, only write the version field in the first
1801          * and third write.  The vcpu->pv_time cache is still valid, because the
1802          * version field is the first in the struct.
1803          */
1804         BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info, version) != 0);
1805
1806         vcpu->hv_clock.version = guest_hv_clock.version + 1;
1807         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1808                                 &vcpu->hv_clock,
1809                                 sizeof(vcpu->hv_clock.version));
1810
1811         smp_wmb();
1812
1813         /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
1814         pvclock_flags = (guest_hv_clock.flags & PVCLOCK_GUEST_STOPPED);
1815
1816         if (vcpu->pvclock_set_guest_stopped_request) {
1817                 pvclock_flags |= PVCLOCK_GUEST_STOPPED;
1818                 vcpu->pvclock_set_guest_stopped_request = false;
1819         }
1820
1821         /* If the host uses TSC clocksource, then it is stable */
1822         if (use_master_clock)
1823                 pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;
1824
1825         vcpu->hv_clock.flags = pvclock_flags;
1826
1827         trace_kvm_pvclock_update(v->vcpu_id, &vcpu->hv_clock);
1828
1829         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1830                                 &vcpu->hv_clock,
1831                                 sizeof(vcpu->hv_clock));
1832
1833         smp_wmb();
1834
1835         vcpu->hv_clock.version++;
1836         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1837                                 &vcpu->hv_clock,
1838                                 sizeof(vcpu->hv_clock.version));
1839         return 0;
1840 }
1841
1842 /*
1843  * kvmclock updates which are isolated to a given vcpu, such as
1844  * vcpu->cpu migration, should not allow system_timestamp from
1845  * the rest of the vcpus to remain static. Otherwise ntp frequency
1846  * correction applies to one vcpu's system_timestamp but not
1847  * the others.
1848  *
1849  * So in those cases, request a kvmclock update for all vcpus.
1850  * We need to rate-limit these requests though, as they can
1851  * considerably slow guests that have a large number of vcpus.
1852  * The time for a remote vcpu to update its kvmclock is bound
1853  * by the delay we use to rate-limit the updates.
1854  */
1855
1856 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
1857
1858 static void kvmclock_update_fn(struct work_struct *work)
1859 {
1860         int i;
1861         struct delayed_work *dwork = to_delayed_work(work);
1862         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
1863                                            kvmclock_update_work);
1864         struct kvm *kvm = container_of(ka, struct kvm, arch);
1865         struct kvm_vcpu *vcpu;
1866
1867         kvm_for_each_vcpu(i, vcpu, kvm) {
1868                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1869                 kvm_vcpu_kick(vcpu);
1870         }
1871 }
1872
1873 static void kvm_gen_kvmclock_update(struct kvm_vcpu *v)
1874 {
1875         struct kvm *kvm = v->kvm;
1876
1877         kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1878         schedule_delayed_work(&kvm->arch.kvmclock_update_work,
1879                                         KVMCLOCK_UPDATE_DELAY);
1880 }
1881
1882 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
1883
1884 static void kvmclock_sync_fn(struct work_struct *work)
1885 {
1886         struct delayed_work *dwork = to_delayed_work(work);
1887         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
1888                                            kvmclock_sync_work);
1889         struct kvm *kvm = container_of(ka, struct kvm, arch);
1890
1891         if (!kvmclock_periodic_sync)
1892                 return;
1893
1894         schedule_delayed_work(&kvm->arch.kvmclock_update_work, 0);
1895         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
1896                                         KVMCLOCK_SYNC_PERIOD);
1897 }
1898
1899 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1900 {
1901         u64 mcg_cap = vcpu->arch.mcg_cap;
1902         unsigned bank_num = mcg_cap & 0xff;
1903
1904         switch (msr) {
1905         case MSR_IA32_MCG_STATUS:
1906                 vcpu->arch.mcg_status = data;
1907                 break;
1908         case MSR_IA32_MCG_CTL:
1909                 if (!(mcg_cap & MCG_CTL_P))
1910                         return 1;
1911                 if (data != 0 && data != ~(u64)0)
1912                         return -1;
1913                 vcpu->arch.mcg_ctl = data;
1914                 break;
1915         default:
1916                 if (msr >= MSR_IA32_MC0_CTL &&
1917                     msr < MSR_IA32_MCx_CTL(bank_num)) {
1918                         u32 offset = msr - MSR_IA32_MC0_CTL;
1919                         /* only 0 or all 1s can be written to IA32_MCi_CTL
1920                          * some Linux kernels though clear bit 10 in bank 4 to
1921                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1922                          * this to avoid an uncatched #GP in the guest
1923                          */
1924                         if ((offset & 0x3) == 0 &&
1925                             data != 0 && (data | (1 << 10)) != ~(u64)0)
1926                                 return -1;
1927                         vcpu->arch.mce_banks[offset] = data;
1928                         break;
1929                 }
1930                 return 1;
1931         }
1932         return 0;
1933 }
1934
1935 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
1936 {
1937         struct kvm *kvm = vcpu->kvm;
1938         int lm = is_long_mode(vcpu);
1939         u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
1940                 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
1941         u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
1942                 : kvm->arch.xen_hvm_config.blob_size_32;
1943         u32 page_num = data & ~PAGE_MASK;
1944         u64 page_addr = data & PAGE_MASK;
1945         u8 *page;
1946         int r;
1947
1948         r = -E2BIG;
1949         if (page_num >= blob_size)
1950                 goto out;
1951         r = -ENOMEM;
1952         page = memdup_user(blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE);
1953         if (IS_ERR(page)) {
1954                 r = PTR_ERR(page);
1955                 goto out;
1956         }
1957         if (kvm_vcpu_write_guest(vcpu, page_addr, page, PAGE_SIZE))
1958                 goto out_free;
1959         r = 0;
1960 out_free:
1961         kfree(page);
1962 out:
1963         return r;
1964 }
1965
1966 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
1967 {
1968         gpa_t gpa = data & ~0x3f;
1969
1970         /* Bits 2:5 are reserved, Should be zero */
1971         if (data & 0x3c)
1972                 return 1;
1973
1974         vcpu->arch.apf.msr_val = data;
1975
1976         if (!(data & KVM_ASYNC_PF_ENABLED)) {
1977                 kvm_clear_async_pf_completion_queue(vcpu);
1978                 kvm_async_pf_hash_reset(vcpu);
1979                 return 0;
1980         }
1981
1982         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa,
1983                                         sizeof(u32)))
1984                 return 1;
1985
1986         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
1987         kvm_async_pf_wakeup_all(vcpu);
1988         return 0;
1989 }
1990
1991 static void kvmclock_reset(struct kvm_vcpu *vcpu)
1992 {
1993         vcpu->arch.pv_time_enabled = false;
1994 }
1995
1996 static void accumulate_steal_time(struct kvm_vcpu *vcpu)
1997 {
1998         u64 delta;
1999
2000         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
2001                 return;
2002
2003         delta = current->sched_info.run_delay - vcpu->arch.st.last_steal;
2004         vcpu->arch.st.last_steal = current->sched_info.run_delay;
2005         vcpu->arch.st.accum_steal = delta;
2006 }
2007
2008 static void record_steal_time(struct kvm_vcpu *vcpu)
2009 {
2010         accumulate_steal_time(vcpu);
2011
2012         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
2013                 return;
2014
2015         if (unlikely(kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2016                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time))))
2017                 return;
2018
2019         vcpu->arch.st.steal.steal += vcpu->arch.st.accum_steal;
2020         vcpu->arch.st.steal.version += 2;
2021         vcpu->arch.st.accum_steal = 0;
2022
2023         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2024                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2025 }
2026
2027 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2028 {
2029         bool pr = false;
2030         u32 msr = msr_info->index;
2031         u64 data = msr_info->data;
2032
2033         switch (msr) {
2034         case MSR_AMD64_NB_CFG:
2035         case MSR_IA32_UCODE_REV:
2036         case MSR_IA32_UCODE_WRITE:
2037         case MSR_VM_HSAVE_PA:
2038         case MSR_AMD64_PATCH_LOADER:
2039         case MSR_AMD64_BU_CFG2:
2040                 break;
2041
2042         case MSR_EFER:
2043                 return set_efer(vcpu, data);
2044         case MSR_K7_HWCR:
2045                 data &= ~(u64)0x40;     /* ignore flush filter disable */
2046                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
2047                 data &= ~(u64)0x8;      /* ignore TLB cache disable */
2048                 data &= ~(u64)0x40000;  /* ignore Mc status write enable */
2049                 if (data != 0) {
2050                         vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
2051                                     data);
2052                         return 1;
2053                 }
2054                 break;
2055         case MSR_FAM10H_MMIO_CONF_BASE:
2056                 if (data != 0) {
2057                         vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
2058                                     "0x%llx\n", data);
2059                         return 1;
2060                 }
2061                 break;
2062         case MSR_IA32_DEBUGCTLMSR:
2063                 if (!data) {
2064                         /* We support the non-activated case already */
2065                         break;
2066                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
2067                         /* Values other than LBR and BTF are vendor-specific,
2068                            thus reserved and should throw a #GP */
2069                         return 1;
2070                 }
2071                 vcpu_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
2072                             __func__, data);
2073                 break;
2074         case 0x200 ... 0x2ff:
2075                 return kvm_mtrr_set_msr(vcpu, msr, data);
2076         case MSR_IA32_APICBASE:
2077                 return kvm_set_apic_base(vcpu, msr_info);
2078         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2079                 return kvm_x2apic_msr_write(vcpu, msr, data);
2080         case MSR_IA32_TSCDEADLINE:
2081                 kvm_set_lapic_tscdeadline_msr(vcpu, data);
2082                 break;
2083         case MSR_IA32_TSC_ADJUST:
2084                 if (guest_cpuid_has_tsc_adjust(vcpu)) {
2085                         if (!msr_info->host_initiated) {
2086                                 s64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;
2087                                 adjust_tsc_offset_guest(vcpu, adj);
2088                         }
2089                         vcpu->arch.ia32_tsc_adjust_msr = data;
2090                 }
2091                 break;
2092         case MSR_IA32_MISC_ENABLE:
2093                 vcpu->arch.ia32_misc_enable_msr = data;
2094                 break;
2095         case MSR_IA32_SMBASE:
2096                 if (!msr_info->host_initiated)
2097                         return 1;
2098                 vcpu->arch.smbase = data;
2099                 break;
2100         case MSR_KVM_WALL_CLOCK_NEW:
2101         case MSR_KVM_WALL_CLOCK:
2102                 vcpu->kvm->arch.wall_clock = data;
2103                 kvm_write_wall_clock(vcpu->kvm, data);
2104                 break;
2105         case MSR_KVM_SYSTEM_TIME_NEW:
2106         case MSR_KVM_SYSTEM_TIME: {
2107                 u64 gpa_offset;
2108                 struct kvm_arch *ka = &vcpu->kvm->arch;
2109
2110                 kvmclock_reset(vcpu);
2111
2112                 if (vcpu->vcpu_id == 0 && !msr_info->host_initiated) {
2113                         bool tmp = (msr == MSR_KVM_SYSTEM_TIME);
2114
2115                         if (ka->boot_vcpu_runs_old_kvmclock != tmp)
2116                                 set_bit(KVM_REQ_MASTERCLOCK_UPDATE,
2117                                         &vcpu->requests);
2118
2119                         ka->boot_vcpu_runs_old_kvmclock = tmp;
2120                 }
2121
2122                 vcpu->arch.time = data;
2123                 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2124
2125                 /* we verify if the enable bit is set... */
2126                 if (!(data & 1))
2127                         break;
2128
2129                 gpa_offset = data & ~(PAGE_MASK | 1);
2130
2131                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm,
2132                      &vcpu->arch.pv_time, data & ~1ULL,
2133                      sizeof(struct pvclock_vcpu_time_info)))
2134                         vcpu->arch.pv_time_enabled = false;
2135                 else
2136                         vcpu->arch.pv_time_enabled = true;
2137
2138                 break;
2139         }
2140         case MSR_KVM_ASYNC_PF_EN:
2141                 if (kvm_pv_enable_async_pf(vcpu, data))
2142                         return 1;
2143                 break;
2144         case MSR_KVM_STEAL_TIME:
2145
2146                 if (unlikely(!sched_info_on()))
2147                         return 1;
2148
2149                 if (data & KVM_STEAL_RESERVED_MASK)
2150                         return 1;
2151
2152                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.st.stime,
2153                                                 data & KVM_STEAL_VALID_BITS,
2154                                                 sizeof(struct kvm_steal_time)))
2155                         return 1;
2156
2157                 vcpu->arch.st.msr_val = data;
2158
2159                 if (!(data & KVM_MSR_ENABLED))
2160                         break;
2161
2162                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2163
2164                 break;
2165         case MSR_KVM_PV_EOI_EN:
2166                 if (kvm_lapic_enable_pv_eoi(vcpu, data))
2167                         return 1;
2168                 break;
2169
2170         case MSR_IA32_MCG_CTL:
2171         case MSR_IA32_MCG_STATUS:
2172         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
2173                 return set_msr_mce(vcpu, msr, data);
2174
2175         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
2176         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
2177                 pr = true; /* fall through */
2178         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
2179         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
2180                 if (kvm_pmu_is_valid_msr(vcpu, msr))
2181                         return kvm_pmu_set_msr(vcpu, msr_info);
2182
2183                 if (pr || data != 0)
2184                         vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
2185                                     "0x%x data 0x%llx\n", msr, data);
2186                 break;
2187         case MSR_K7_CLK_CTL:
2188                 /*
2189                  * Ignore all writes to this no longer documented MSR.
2190                  * Writes are only relevant for old K7 processors,
2191                  * all pre-dating SVM, but a recommended workaround from
2192                  * AMD for these chips. It is possible to specify the
2193                  * affected processor models on the command line, hence
2194                  * the need to ignore the workaround.
2195                  */
2196                 break;
2197         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2198         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
2199         case HV_X64_MSR_CRASH_CTL:
2200                 return kvm_hv_set_msr_common(vcpu, msr, data,
2201                                              msr_info->host_initiated);
2202         case MSR_IA32_BBL_CR_CTL3:
2203                 /* Drop writes to this legacy MSR -- see rdmsr
2204                  * counterpart for further detail.
2205                  */
2206                 vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n", msr, data);
2207                 break;
2208         case MSR_AMD64_OSVW_ID_LENGTH:
2209                 if (!guest_cpuid_has_osvw(vcpu))
2210                         return 1;
2211                 vcpu->arch.osvw.length = data;
2212                 break;
2213         case MSR_AMD64_OSVW_STATUS:
2214                 if (!guest_cpuid_has_osvw(vcpu))
2215                         return 1;
2216                 vcpu->arch.osvw.status = data;
2217                 break;
2218         default:
2219                 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
2220                         return xen_hvm_config(vcpu, data);
2221                 if (kvm_pmu_is_valid_msr(vcpu, msr))
2222                         return kvm_pmu_set_msr(vcpu, msr_info);
2223                 if (!ignore_msrs) {
2224                         vcpu_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
2225                                     msr, data);
2226                         return 1;
2227                 } else {
2228                         vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
2229                                     msr, data);
2230                         break;
2231                 }
2232         }
2233         return 0;
2234 }
2235 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
2236
2237
2238 /*
2239  * Reads an msr value (of 'msr_index') into 'pdata'.
2240  * Returns 0 on success, non-0 otherwise.
2241  * Assumes vcpu_load() was already called.
2242  */
2243 int kvm_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
2244 {
2245         return kvm_x86_ops->get_msr(vcpu, msr);
2246 }
2247 EXPORT_SYMBOL_GPL(kvm_get_msr);
2248
2249 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2250 {
2251         u64 data;
2252         u64 mcg_cap = vcpu->arch.mcg_cap;
2253         unsigned bank_num = mcg_cap & 0xff;
2254
2255         switch (msr) {
2256         case MSR_IA32_P5_MC_ADDR:
2257         case MSR_IA32_P5_MC_TYPE:
2258                 data = 0;
2259                 break;
2260         case MSR_IA32_MCG_CAP:
2261                 data = vcpu->arch.mcg_cap;
2262                 break;
2263         case MSR_IA32_MCG_CTL:
2264                 if (!(mcg_cap & MCG_CTL_P))
2265                         return 1;
2266                 data = vcpu->arch.mcg_ctl;
2267                 break;
2268         case MSR_IA32_MCG_STATUS:
2269                 data = vcpu->arch.mcg_status;
2270                 break;
2271         default:
2272                 if (msr >= MSR_IA32_MC0_CTL &&
2273                     msr < MSR_IA32_MCx_CTL(bank_num)) {
2274                         u32 offset = msr - MSR_IA32_MC0_CTL;
2275                         data = vcpu->arch.mce_banks[offset];
2276                         break;
2277                 }
2278                 return 1;
2279         }
2280         *pdata = data;
2281         return 0;
2282 }
2283
2284 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2285 {
2286         switch (msr_info->index) {
2287         case MSR_IA32_PLATFORM_ID:
2288         case MSR_IA32_EBL_CR_POWERON:
2289         case MSR_IA32_DEBUGCTLMSR:
2290         case MSR_IA32_LASTBRANCHFROMIP:
2291         case MSR_IA32_LASTBRANCHTOIP:
2292         case MSR_IA32_LASTINTFROMIP:
2293         case MSR_IA32_LASTINTTOIP:
2294         case MSR_K8_SYSCFG:
2295         case MSR_K8_TSEG_ADDR:
2296         case MSR_K8_TSEG_MASK:
2297         case MSR_K7_HWCR:
2298         case MSR_VM_HSAVE_PA:
2299         case MSR_K8_INT_PENDING_MSG:
2300         case MSR_AMD64_NB_CFG:
2301         case MSR_FAM10H_MMIO_CONF_BASE:
2302         case MSR_AMD64_BU_CFG2:
2303                 msr_info->data = 0;
2304                 break;
2305         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
2306         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
2307         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
2308         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
2309                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
2310                         return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);
2311                 msr_info->data = 0;
2312                 break;
2313         case MSR_IA32_UCODE_REV:
2314                 msr_info->data = 0x100000000ULL;
2315                 break;
2316         case MSR_MTRRcap:
2317         case 0x200 ... 0x2ff:
2318                 return kvm_mtrr_get_msr(vcpu, msr_info->index, &msr_info->data);
2319         case 0xcd: /* fsb frequency */
2320                 msr_info->data = 3;
2321                 break;
2322                 /*
2323                  * MSR_EBC_FREQUENCY_ID
2324                  * Conservative value valid for even the basic CPU models.
2325                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
2326                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
2327                  * and 266MHz for model 3, or 4. Set Core Clock
2328                  * Frequency to System Bus Frequency Ratio to 1 (bits
2329                  * 31:24) even though these are only valid for CPU
2330                  * models > 2, however guests may end up dividing or
2331                  * multiplying by zero otherwise.
2332                  */
2333         case MSR_EBC_FREQUENCY_ID:
2334                 msr_info->data = 1 << 24;
2335                 break;
2336         case MSR_IA32_APICBASE:
2337                 msr_info->data = kvm_get_apic_base(vcpu);
2338                 break;
2339         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2340                 return kvm_x2apic_msr_read(vcpu, msr_info->index, &msr_info->data);
2341                 break;
2342         case MSR_IA32_TSCDEADLINE:
2343                 msr_info->data = kvm_get_lapic_tscdeadline_msr(vcpu);
2344                 break;
2345         case MSR_IA32_TSC_ADJUST:
2346                 msr_info->data = (u64)vcpu->arch.ia32_tsc_adjust_msr;
2347                 break;
2348         case MSR_IA32_MISC_ENABLE:
2349                 msr_info->data = vcpu->arch.ia32_misc_enable_msr;
2350                 break;
2351         case MSR_IA32_SMBASE:
2352                 if (!msr_info->host_initiated)
2353                         return 1;
2354                 msr_info->data = vcpu->arch.smbase;
2355                 break;
2356         case MSR_IA32_PERF_STATUS:
2357                 /* TSC increment by tick */
2358                 msr_info->data = 1000ULL;
2359                 /* CPU multiplier */
2360                 msr_info->data |= (((uint64_t)4ULL) << 40);
2361                 break;
2362         case MSR_EFER:
2363                 msr_info->data = vcpu->arch.efer;
2364                 break;
2365         case MSR_KVM_WALL_CLOCK:
2366         case MSR_KVM_WALL_CLOCK_NEW:
2367                 msr_info->data = vcpu->kvm->arch.wall_clock;
2368                 break;
2369         case MSR_KVM_SYSTEM_TIME:
2370         case MSR_KVM_SYSTEM_TIME_NEW:
2371                 msr_info->data = vcpu->arch.time;
2372                 break;
2373         case MSR_KVM_ASYNC_PF_EN:
2374                 msr_info->data = vcpu->arch.apf.msr_val;
2375                 break;
2376         case MSR_KVM_STEAL_TIME:
2377                 msr_info->data = vcpu->arch.st.msr_val;
2378                 break;
2379         case MSR_KVM_PV_EOI_EN:
2380                 msr_info->data = vcpu->arch.pv_eoi.msr_val;
2381                 break;
2382         case MSR_IA32_P5_MC_ADDR:
2383         case MSR_IA32_P5_MC_TYPE:
2384         case MSR_IA32_MCG_CAP:
2385         case MSR_IA32_MCG_CTL:
2386         case MSR_IA32_MCG_STATUS:
2387         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
2388                 return get_msr_mce(vcpu, msr_info->index, &msr_info->data);
2389         case MSR_K7_CLK_CTL:
2390                 /*
2391                  * Provide expected ramp-up count for K7. All other
2392                  * are set to zero, indicating minimum divisors for
2393                  * every field.
2394                  *
2395                  * This prevents guest kernels on AMD host with CPU
2396                  * type 6, model 8 and higher from exploding due to
2397                  * the rdmsr failing.
2398                  */
2399                 msr_info->data = 0x20000000;
2400                 break;
2401         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2402         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
2403         case HV_X64_MSR_CRASH_CTL:
2404                 return kvm_hv_get_msr_common(vcpu,
2405                                              msr_info->index, &msr_info->data);
2406                 break;
2407         case MSR_IA32_BBL_CR_CTL3:
2408                 /* This legacy MSR exists but isn't fully documented in current
2409                  * silicon.  It is however accessed by winxp in very narrow
2410                  * scenarios where it sets bit #19, itself documented as
2411                  * a "reserved" bit.  Best effort attempt to source coherent
2412                  * read data here should the balance of the register be
2413                  * interpreted by the guest:
2414                  *
2415                  * L2 cache control register 3: 64GB range, 256KB size,
2416                  * enabled, latency 0x1, configured
2417                  */
2418                 msr_info->data = 0xbe702111;
2419                 break;
2420         case MSR_AMD64_OSVW_ID_LENGTH:
2421                 if (!guest_cpuid_has_osvw(vcpu))
2422                         return 1;
2423                 msr_info->data = vcpu->arch.osvw.length;
2424                 break;
2425         case MSR_AMD64_OSVW_STATUS:
2426                 if (!guest_cpuid_has_osvw(vcpu))
2427                         return 1;
2428                 msr_info->data = vcpu->arch.osvw.status;
2429                 break;
2430         default:
2431                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
2432                         return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);
2433                 if (!ignore_msrs) {
2434                         vcpu_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr_info->index);
2435                         return 1;
2436                 } else {
2437                         vcpu_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr_info->index);
2438                         msr_info->data = 0;
2439                 }
2440                 break;
2441         }
2442         return 0;
2443 }
2444 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
2445
2446 /*
2447  * Read or write a bunch of msrs. All parameters are kernel addresses.
2448  *
2449  * @return number of msrs set successfully.
2450  */
2451 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
2452                     struct kvm_msr_entry *entries,
2453                     int (*do_msr)(struct kvm_vcpu *vcpu,
2454                                   unsigned index, u64 *data))
2455 {
2456         int i, idx;
2457
2458         idx = srcu_read_lock(&vcpu->kvm->srcu);
2459         for (i = 0; i < msrs->nmsrs; ++i)
2460                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
2461                         break;
2462         srcu_read_unlock(&vcpu->kvm->srcu, idx);
2463
2464         return i;
2465 }
2466
2467 /*
2468  * Read or write a bunch of msrs. Parameters are user addresses.
2469  *
2470  * @return number of msrs set successfully.
2471  */
2472 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
2473                   int (*do_msr)(struct kvm_vcpu *vcpu,
2474                                 unsigned index, u64 *data),
2475                   int writeback)
2476 {
2477         struct kvm_msrs msrs;
2478         struct kvm_msr_entry *entries;
2479         int r, n;
2480         unsigned size;
2481
2482         r = -EFAULT;
2483         if (copy_from_user(&msrs, user_msrs, sizeof msrs))
2484                 goto out;
2485
2486         r = -E2BIG;
2487         if (msrs.nmsrs >= MAX_IO_MSRS)
2488                 goto out;
2489
2490         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
2491         entries = memdup_user(user_msrs->entries, size);
2492         if (IS_ERR(entries)) {
2493                 r = PTR_ERR(entries);
2494                 goto out;
2495         }
2496
2497         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
2498         if (r < 0)
2499                 goto out_free;
2500
2501         r = -EFAULT;
2502         if (writeback && copy_to_user(user_msrs->entries, entries, size))
2503                 goto out_free;
2504
2505         r = n;
2506
2507 out_free:
2508         kfree(entries);
2509 out:
2510         return r;
2511 }
2512
2513 int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
2514 {
2515         int r;
2516
2517         switch (ext) {
2518         case KVM_CAP_IRQCHIP:
2519         case KVM_CAP_HLT:
2520         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
2521         case KVM_CAP_SET_TSS_ADDR:
2522         case KVM_CAP_EXT_CPUID:
2523         case KVM_CAP_EXT_EMUL_CPUID:
2524         case KVM_CAP_CLOCKSOURCE:
2525         case KVM_CAP_PIT:
2526         case KVM_CAP_NOP_IO_DELAY:
2527         case KVM_CAP_MP_STATE:
2528         case KVM_CAP_SYNC_MMU:
2529         case KVM_CAP_USER_NMI:
2530         case KVM_CAP_REINJECT_CONTROL:
2531         case KVM_CAP_IRQ_INJECT_STATUS:
2532         case KVM_CAP_IOEVENTFD:
2533         case KVM_CAP_IOEVENTFD_NO_LENGTH:
2534         case KVM_CAP_PIT2:
2535         case KVM_CAP_PIT_STATE2:
2536         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
2537         case KVM_CAP_XEN_HVM:
2538         case KVM_CAP_ADJUST_CLOCK:
2539         case KVM_CAP_VCPU_EVENTS:
2540         case KVM_CAP_HYPERV:
2541         case KVM_CAP_HYPERV_VAPIC:
2542         case KVM_CAP_HYPERV_SPIN:
2543         case KVM_CAP_PCI_SEGMENT:
2544         case KVM_CAP_DEBUGREGS:
2545         case KVM_CAP_X86_ROBUST_SINGLESTEP:
2546         case KVM_CAP_XSAVE:
2547         case KVM_CAP_ASYNC_PF:
2548         case KVM_CAP_GET_TSC_KHZ:
2549         case KVM_CAP_KVMCLOCK_CTRL:
2550         case KVM_CAP_READONLY_MEM:
2551         case KVM_CAP_HYPERV_TIME:
2552         case KVM_CAP_IOAPIC_POLARITY_IGNORED:
2553         case KVM_CAP_TSC_DEADLINE_TIMER:
2554         case KVM_CAP_ENABLE_CAP_VM:
2555         case KVM_CAP_DISABLE_QUIRKS:
2556         case KVM_CAP_SET_BOOT_CPU_ID:
2557         case KVM_CAP_SPLIT_IRQCHIP:
2558 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2559         case KVM_CAP_ASSIGN_DEV_IRQ:
2560         case KVM_CAP_PCI_2_3:
2561 #endif
2562                 r = 1;
2563                 break;
2564         case KVM_CAP_X86_SMM:
2565                 /* SMBASE is usually relocated above 1M on modern chipsets,
2566                  * and SMM handlers might indeed rely on 4G segment limits,
2567                  * so do not report SMM to be available if real mode is
2568                  * emulated via vm86 mode.  Still, do not go to great lengths
2569                  * to avoid userspace's usage of the feature, because it is a
2570                  * fringe case that is not enabled except via specific settings
2571                  * of the module parameters.
2572                  */
2573                 r = kvm_x86_ops->cpu_has_high_real_mode_segbase();
2574                 break;
2575         case KVM_CAP_COALESCED_MMIO:
2576                 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
2577                 break;
2578         case KVM_CAP_VAPIC:
2579                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
2580                 break;
2581         case KVM_CAP_NR_VCPUS:
2582                 r = KVM_SOFT_MAX_VCPUS;
2583                 break;
2584         case KVM_CAP_MAX_VCPUS:
2585                 r = KVM_MAX_VCPUS;
2586                 break;
2587         case KVM_CAP_NR_MEMSLOTS:
2588                 r = KVM_USER_MEM_SLOTS;
2589                 break;
2590         case KVM_CAP_PV_MMU:    /* obsolete */
2591                 r = 0;
2592                 break;
2593 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2594         case KVM_CAP_IOMMU:
2595                 r = iommu_present(&pci_bus_type);
2596                 break;
2597 #endif
2598         case KVM_CAP_MCE:
2599                 r = KVM_MAX_MCE_BANKS;
2600                 break;
2601         case KVM_CAP_XCRS:
2602                 r = cpu_has_xsave;
2603                 break;
2604         case KVM_CAP_TSC_CONTROL:
2605                 r = kvm_has_tsc_control;
2606                 break;
2607         default:
2608                 r = 0;
2609                 break;
2610         }
2611         return r;
2612
2613 }
2614
2615 long kvm_arch_dev_ioctl(struct file *filp,
2616                         unsigned int ioctl, unsigned long arg)
2617 {
2618         void __user *argp = (void __user *)arg;
2619         long r;
2620
2621         switch (ioctl) {
2622         case KVM_GET_MSR_INDEX_LIST: {
2623                 struct kvm_msr_list __user *user_msr_list = argp;
2624                 struct kvm_msr_list msr_list;
2625                 unsigned n;
2626
2627                 r = -EFAULT;
2628                 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
2629                         goto out;
2630                 n = msr_list.nmsrs;
2631                 msr_list.nmsrs = num_msrs_to_save + num_emulated_msrs;
2632                 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
2633                         goto out;
2634                 r = -E2BIG;
2635                 if (n < msr_list.nmsrs)
2636                         goto out;
2637                 r = -EFAULT;
2638                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
2639                                  num_msrs_to_save * sizeof(u32)))
2640                         goto out;
2641                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
2642                                  &emulated_msrs,
2643                                  num_emulated_msrs * sizeof(u32)))
2644                         goto out;
2645                 r = 0;
2646                 break;
2647         }
2648         case KVM_GET_SUPPORTED_CPUID:
2649         case KVM_GET_EMULATED_CPUID: {
2650                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2651                 struct kvm_cpuid2 cpuid;
2652
2653                 r = -EFAULT;
2654                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2655                         goto out;
2656
2657                 r = kvm_dev_ioctl_get_cpuid(&cpuid, cpuid_arg->entries,
2658                                             ioctl);
2659                 if (r)
2660                         goto out;
2661
2662                 r = -EFAULT;
2663                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2664                         goto out;
2665                 r = 0;
2666                 break;
2667         }
2668         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
2669                 u64 mce_cap;
2670
2671                 mce_cap = KVM_MCE_CAP_SUPPORTED;
2672                 r = -EFAULT;
2673                 if (copy_to_user(argp, &mce_cap, sizeof mce_cap))
2674                         goto out;
2675                 r = 0;
2676                 break;
2677         }
2678         default:
2679                 r = -EINVAL;
2680         }
2681 out:
2682         return r;
2683 }
2684
2685 static void wbinvd_ipi(void *garbage)
2686 {
2687         wbinvd();
2688 }
2689
2690 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
2691 {
2692         return kvm_arch_has_noncoherent_dma(vcpu->kvm);
2693 }
2694
2695 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
2696 {
2697         /* Address WBINVD may be executed by guest */
2698         if (need_emulate_wbinvd(vcpu)) {
2699                 if (kvm_x86_ops->has_wbinvd_exit())
2700                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
2701                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
2702                         smp_call_function_single(vcpu->cpu,
2703                                         wbinvd_ipi, NULL, 1);
2704         }
2705
2706         kvm_x86_ops->vcpu_load(vcpu, cpu);
2707
2708         /* Apply any externally detected TSC adjustments (due to suspend) */
2709         if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
2710                 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
2711                 vcpu->arch.tsc_offset_adjustment = 0;
2712                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2713         }
2714
2715         if (unlikely(vcpu->cpu != cpu) || check_tsc_unstable()) {
2716                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
2717                                 rdtsc() - vcpu->arch.last_host_tsc;
2718                 if (tsc_delta < 0)
2719                         mark_tsc_unstable("KVM discovered backwards TSC");
2720                 if (check_tsc_unstable()) {
2721                         u64 offset = kvm_compute_tsc_offset(vcpu,
2722                                                 vcpu->arch.last_guest_tsc);
2723                         kvm_x86_ops->write_tsc_offset(vcpu, offset);
2724                         vcpu->arch.tsc_catchup = 1;
2725                 }
2726                 /*
2727                  * On a host with synchronized TSC, there is no need to update
2728                  * kvmclock on vcpu->cpu migration
2729                  */
2730                 if (!vcpu->kvm->arch.use_master_clock || vcpu->cpu == -1)
2731                         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2732                 if (vcpu->cpu != cpu)
2733                         kvm_migrate_timers(vcpu);
2734                 vcpu->cpu = cpu;
2735         }
2736
2737         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2738 }
2739
2740 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
2741 {
2742         kvm_x86_ops->vcpu_put(vcpu);
2743         kvm_put_guest_fpu(vcpu);
2744         vcpu->arch.last_host_tsc = rdtsc();
2745 }
2746
2747 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
2748                                     struct kvm_lapic_state *s)
2749 {
2750         kvm_x86_ops->sync_pir_to_irr(vcpu);
2751         memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
2752
2753         return 0;
2754 }
2755
2756 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
2757                                     struct kvm_lapic_state *s)
2758 {
2759         kvm_apic_post_state_restore(vcpu, s);
2760         update_cr8_intercept(vcpu);
2761
2762         return 0;
2763 }
2764
2765 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
2766                                     struct kvm_interrupt *irq)
2767 {
2768         if (irq->irq >= KVM_NR_INTERRUPTS)
2769                 return -EINVAL;
2770
2771         if (!irqchip_in_kernel(vcpu->kvm)) {
2772                 kvm_queue_interrupt(vcpu, irq->irq, false);
2773                 kvm_make_request(KVM_REQ_EVENT, vcpu);
2774                 return 0;
2775         }
2776
2777         /*
2778          * With in-kernel LAPIC, we only use this to inject EXTINT, so
2779          * fail for in-kernel 8259.
2780          */
2781         if (pic_in_kernel(vcpu->kvm))
2782                 return -ENXIO;
2783
2784         if (vcpu->arch.pending_external_vector != -1)
2785                 return -EEXIST;
2786
2787         vcpu->arch.pending_external_vector = irq->irq;
2788         return 0;
2789 }
2790
2791 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
2792 {
2793         kvm_inject_nmi(vcpu);
2794
2795         return 0;
2796 }
2797
2798 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu *vcpu)
2799 {
2800         kvm_make_request(KVM_REQ_SMI, vcpu);
2801
2802         return 0;
2803 }
2804
2805 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
2806                                            struct kvm_tpr_access_ctl *tac)
2807 {
2808         if (tac->flags)
2809                 return -EINVAL;
2810         vcpu->arch.tpr_access_reporting = !!tac->enabled;
2811         return 0;
2812 }
2813
2814 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
2815                                         u64 mcg_cap)
2816 {
2817         int r;
2818         unsigned bank_num = mcg_cap & 0xff, bank;
2819
2820         r = -EINVAL;
2821         if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
2822                 goto out;
2823         if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000))
2824                 goto out;
2825         r = 0;
2826         vcpu->arch.mcg_cap = mcg_cap;
2827         /* Init IA32_MCG_CTL to all 1s */
2828         if (mcg_cap & MCG_CTL_P)
2829                 vcpu->arch.mcg_ctl = ~(u64)0;
2830         /* Init IA32_MCi_CTL to all 1s */
2831         for (bank = 0; bank < bank_num; bank++)
2832                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
2833 out:
2834         return r;
2835 }
2836
2837 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
2838                                       struct kvm_x86_mce *mce)
2839 {
2840         u64 mcg_cap = vcpu->arch.mcg_cap;
2841         unsigned bank_num = mcg_cap & 0xff;
2842         u64 *banks = vcpu->arch.mce_banks;
2843
2844         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
2845                 return -EINVAL;
2846         /*
2847          * if IA32_MCG_CTL is not all 1s, the uncorrected error
2848          * reporting is disabled
2849          */
2850         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
2851             vcpu->arch.mcg_ctl != ~(u64)0)
2852                 return 0;
2853         banks += 4 * mce->bank;
2854         /*
2855          * if IA32_MCi_CTL is not all 1s, the uncorrected error
2856          * reporting is disabled for the bank
2857          */
2858         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
2859                 return 0;
2860         if (mce->status & MCI_STATUS_UC) {
2861                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
2862                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
2863                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
2864                         return 0;
2865                 }
2866                 if (banks[1] & MCI_STATUS_VAL)
2867                         mce->status |= MCI_STATUS_OVER;
2868                 banks[2] = mce->addr;
2869                 banks[3] = mce->misc;
2870                 vcpu->arch.mcg_status = mce->mcg_status;
2871                 banks[1] = mce->status;
2872                 kvm_queue_exception(vcpu, MC_VECTOR);
2873         } else if (!(banks[1] & MCI_STATUS_VAL)
2874                    || !(banks[1] & MCI_STATUS_UC)) {
2875                 if (banks[1] & MCI_STATUS_VAL)
2876                         mce->status |= MCI_STATUS_OVER;
2877                 banks[2] = mce->addr;
2878                 banks[3] = mce->misc;
2879                 banks[1] = mce->status;
2880         } else
2881                 banks[1] |= MCI_STATUS_OVER;
2882         return 0;
2883 }
2884
2885 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
2886                                                struct kvm_vcpu_events *events)
2887 {
2888         process_nmi(vcpu);
2889         events->exception.injected =
2890                 vcpu->arch.exception.pending &&
2891                 !kvm_exception_is_soft(vcpu->arch.exception.nr);
2892         events->exception.nr = vcpu->arch.exception.nr;
2893         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
2894         events->exception.pad = 0;
2895         events->exception.error_code = vcpu->arch.exception.error_code;
2896
2897         events->interrupt.injected =
2898                 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
2899         events->interrupt.nr = vcpu->arch.interrupt.nr;
2900         events->interrupt.soft = 0;
2901         events->interrupt.shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
2902
2903         events->nmi.injected = vcpu->arch.nmi_injected;
2904         events->nmi.pending = vcpu->arch.nmi_pending != 0;
2905         events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
2906         events->nmi.pad = 0;
2907
2908         events->sipi_vector = 0; /* never valid when reporting to user space */
2909
2910         events->smi.smm = is_smm(vcpu);
2911         events->smi.pending = vcpu->arch.smi_pending;
2912         events->smi.smm_inside_nmi =
2913                 !!(vcpu->arch.hflags & HF_SMM_INSIDE_NMI_MASK);
2914         events->smi.latched_init = kvm_lapic_latched_init(vcpu);
2915
2916         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
2917                          | KVM_VCPUEVENT_VALID_SHADOW
2918                          | KVM_VCPUEVENT_VALID_SMM);
2919         memset(&events->reserved, 0, sizeof(events->reserved));
2920 }
2921
2922 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
2923                                               struct kvm_vcpu_events *events)
2924 {
2925         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2926                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2927                               | KVM_VCPUEVENT_VALID_SHADOW
2928                               | KVM_VCPUEVENT_VALID_SMM))
2929                 return -EINVAL;
2930
2931         process_nmi(vcpu);
2932         vcpu->arch.exception.pending = events->exception.injected;
2933         vcpu->arch.exception.nr = events->exception.nr;
2934         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
2935         vcpu->arch.exception.error_code = events->exception.error_code;
2936
2937         vcpu->arch.interrupt.pending = events->interrupt.injected;
2938         vcpu->arch.interrupt.nr = events->interrupt.nr;
2939         vcpu->arch.interrupt.soft = events->interrupt.soft;
2940         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
2941                 kvm_x86_ops->set_interrupt_shadow(vcpu,
2942                                                   events->interrupt.shadow);
2943
2944         vcpu->arch.nmi_injected = events->nmi.injected;
2945         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
2946                 vcpu->arch.nmi_pending = events->nmi.pending;
2947         kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
2948
2949         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR &&
2950             kvm_vcpu_has_lapic(vcpu))
2951                 vcpu->arch.apic->sipi_vector = events->sipi_vector;
2952
2953         if (events->flags & KVM_VCPUEVENT_VALID_SMM) {
2954                 if (events->smi.smm)
2955                         vcpu->arch.hflags |= HF_SMM_MASK;
2956                 else
2957                         vcpu->arch.hflags &= ~HF_SMM_MASK;
2958                 vcpu->arch.smi_pending = events->smi.pending;
2959                 if (events->smi.smm_inside_nmi)
2960                         vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
2961                 else
2962                         vcpu->arch.hflags &= ~HF_SMM_INSIDE_NMI_MASK;
2963                 if (kvm_vcpu_has_lapic(vcpu)) {
2964                         if (events->smi.latched_init)
2965                                 set_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
2966                         else
2967                                 clear_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
2968                 }
2969         }
2970
2971         kvm_make_request(KVM_REQ_EVENT, vcpu);
2972
2973         return 0;
2974 }
2975
2976 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
2977                                              struct kvm_debugregs *dbgregs)
2978 {
2979         unsigned long val;
2980
2981         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
2982         kvm_get_dr(vcpu, 6, &val);
2983         dbgregs->dr6 = val;
2984         dbgregs->dr7 = vcpu->arch.dr7;
2985         dbgregs->flags = 0;
2986         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
2987 }
2988
2989 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
2990                                             struct kvm_debugregs *dbgregs)
2991 {
2992         if (dbgregs->flags)
2993                 return -EINVAL;
2994
2995         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
2996         kvm_update_dr0123(vcpu);
2997         vcpu->arch.dr6 = dbgregs->dr6;
2998         kvm_update_dr6(vcpu);
2999         vcpu->arch.dr7 = dbgregs->dr7;
3000         kvm_update_dr7(vcpu);
3001
3002         return 0;
3003 }
3004
3005 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
3006
3007 static void fill_xsave(u8 *dest, struct kvm_vcpu *vcpu)
3008 {
3009         struct xregs_state *xsave = &vcpu->arch.guest_fpu.state.xsave;
3010         u64 xstate_bv = xsave->header.xfeatures;
3011         u64 valid;
3012
3013         /*
3014          * Copy legacy XSAVE area, to avoid complications with CPUID
3015          * leaves 0 and 1 in the loop below.
3016          */
3017         memcpy(dest, xsave, XSAVE_HDR_OFFSET);
3018
3019         /* Set XSTATE_BV */
3020         *(u64 *)(dest + XSAVE_HDR_OFFSET) = xstate_bv;
3021
3022         /*
3023          * Copy each region from the possibly compacted offset to the
3024          * non-compacted offset.
3025          */
3026         valid = xstate_bv & ~XSTATE_FPSSE;
3027         while (valid) {
3028                 u64 feature = valid & -valid;
3029                 int index = fls64(feature) - 1;
3030                 void *src = get_xsave_addr(xsave, feature);
3031
3032                 if (src) {
3033                         u32 size, offset, ecx, edx;
3034                         cpuid_count(XSTATE_CPUID, index,
3035                                     &size, &offset, &ecx, &edx);
3036                         memcpy(dest + offset, src, size);
3037                 }
3038
3039                 valid -= feature;
3040         }
3041 }
3042
3043 static void load_xsave(struct kvm_vcpu *vcpu, u8 *src)
3044 {
3045         struct xregs_state *xsave = &vcpu->arch.guest_fpu.state.xsave;
3046         u64 xstate_bv = *(u64 *)(src + XSAVE_HDR_OFFSET);
3047         u64 valid;
3048
3049         /*
3050          * Copy legacy XSAVE area, to avoid complications with CPUID
3051          * leaves 0 and 1 in the loop below.
3052          */
3053         memcpy(xsave, src, XSAVE_HDR_OFFSET);
3054
3055         /* Set XSTATE_BV and possibly XCOMP_BV.  */
3056         xsave->header.xfeatures = xstate_bv;
3057         if (cpu_has_xsaves)
3058                 xsave->header.xcomp_bv = host_xcr0 | XSTATE_COMPACTION_ENABLED;
3059
3060         /*
3061          * Copy each region from the non-compacted offset to the
3062          * possibly compacted offset.
3063          */
3064         valid = xstate_bv & ~XSTATE_FPSSE;
3065         while (valid) {
3066                 u64 feature = valid & -valid;
3067                 int index = fls64(feature) - 1;
3068                 void *dest = get_xsave_addr(xsave, feature);
3069
3070                 if (dest) {
3071                         u32 size, offset, ecx, edx;
3072                         cpuid_count(XSTATE_CPUID, index,
3073                                     &size, &offset, &ecx, &edx);
3074                         memcpy(dest, src + offset, size);
3075                 }
3076
3077                 valid -= feature;
3078         }
3079 }
3080
3081 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
3082                                          struct kvm_xsave *guest_xsave)
3083 {
3084         if (cpu_has_xsave) {
3085                 memset(guest_xsave, 0, sizeof(struct kvm_xsave));
3086                 fill_xsave((u8 *) guest_xsave->region, vcpu);
3087         } else {
3088                 memcpy(guest_xsave->region,
3089                         &vcpu->arch.guest_fpu.state.fxsave,
3090                         sizeof(struct fxregs_state));
3091                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
3092                         XSTATE_FPSSE;
3093         }
3094 }
3095
3096 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
3097                                         struct kvm_xsave *guest_xsave)
3098 {
3099         u64 xstate_bv =
3100                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
3101
3102         if (cpu_has_xsave) {
3103                 /*
3104                  * Here we allow setting states that are not present in
3105                  * CPUID leaf 0xD, index 0, EDX:EAX.  This is for compatibility
3106                  * with old userspace.
3107                  */
3108                 if (xstate_bv & ~kvm_supported_xcr0())
3109                         return -EINVAL;
3110                 load_xsave(vcpu, (u8 *)guest_xsave->region);
3111         } else {
3112                 if (xstate_bv & ~XSTATE_FPSSE)
3113                         return -EINVAL;
3114                 memcpy(&vcpu->arch.guest_fpu.state.fxsave,
3115                         guest_xsave->region, sizeof(struct fxregs_state));
3116         }
3117         return 0;
3118 }
3119
3120 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
3121                                         struct kvm_xcrs *guest_xcrs)
3122 {
3123         if (!cpu_has_xsave) {
3124                 guest_xcrs->nr_xcrs = 0;
3125                 return;
3126         }
3127
3128         guest_xcrs->nr_xcrs = 1;
3129         guest_xcrs->flags = 0;
3130         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
3131         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
3132 }
3133
3134 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
3135                                        struct kvm_xcrs *guest_xcrs)
3136 {
3137         int i, r = 0;
3138
3139         if (!cpu_has_xsave)
3140                 return -EINVAL;
3141
3142         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
3143                 return -EINVAL;
3144
3145         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
3146                 /* Only support XCR0 currently */
3147                 if (guest_xcrs->xcrs[i].xcr == XCR_XFEATURE_ENABLED_MASK) {
3148                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
3149                                 guest_xcrs->xcrs[i].value);
3150                         break;
3151                 }
3152         if (r)
3153                 r = -EINVAL;
3154         return r;
3155 }
3156
3157 /*
3158  * kvm_set_guest_paused() indicates to the guest kernel that it has been
3159  * stopped by the hypervisor.  This function will be called from the host only.
3160  * EINVAL is returned when the host attempts to set the flag for a guest that
3161  * does not support pv clocks.
3162  */
3163 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
3164 {
3165         if (!vcpu->arch.pv_time_enabled)
3166                 return -EINVAL;
3167         vcpu->arch.pvclock_set_guest_stopped_request = true;
3168         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3169         return 0;
3170 }
3171
3172 long kvm_arch_vcpu_ioctl(struct file *filp,
3173                          unsigned int ioctl, unsigned long arg)
3174 {
3175         struct kvm_vcpu *vcpu = filp->private_data;
3176         void __user *argp = (void __user *)arg;
3177         int r;
3178         union {
3179                 struct kvm_lapic_state *lapic;
3180                 struct kvm_xsave *xsave;
3181                 struct kvm_xcrs *xcrs;
3182                 void *buffer;
3183         } u;
3184
3185         u.buffer = NULL;
3186         switch (ioctl) {
3187         case KVM_GET_LAPIC: {
3188                 r = -EINVAL;
3189                 if (!vcpu->arch.apic)
3190                         goto out;
3191                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
3192
3193                 r = -ENOMEM;
3194                 if (!u.lapic)
3195                         goto out;
3196                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
3197                 if (r)
3198                         goto out;
3199                 r = -EFAULT;
3200                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
3201                         goto out;
3202                 r = 0;
3203                 break;
3204         }
3205         case KVM_SET_LAPIC: {
3206                 r = -EINVAL;
3207                 if (!vcpu->arch.apic)
3208                         goto out;
3209                 u.lapic = memdup_user(argp, sizeof(*u.lapic));
3210                 if (IS_ERR(u.lapic))
3211                         return PTR_ERR(u.lapic);
3212
3213                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
3214                 break;
3215         }
3216         case KVM_INTERRUPT: {
3217                 struct kvm_interrupt irq;
3218
3219                 r = -EFAULT;
3220                 if (copy_from_user(&irq, argp, sizeof irq))
3221                         goto out;
3222                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
3223                 break;
3224         }
3225         case KVM_NMI: {
3226                 r = kvm_vcpu_ioctl_nmi(vcpu);
3227                 break;
3228         }
3229         case KVM_SMI: {
3230                 r = kvm_vcpu_ioctl_smi(vcpu);
3231                 break;
3232         }
3233         case KVM_SET_CPUID: {
3234                 struct kvm_cpuid __user *cpuid_arg = argp;
3235                 struct kvm_cpuid cpuid;
3236
3237                 r = -EFAULT;
3238                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3239                         goto out;
3240                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
3241                 break;
3242         }
3243         case KVM_SET_CPUID2: {
3244                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3245                 struct kvm_cpuid2 cpuid;
3246
3247                 r = -EFAULT;
3248                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3249                         goto out;
3250                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
3251                                               cpuid_arg->entries);
3252                 break;
3253         }
3254         case KVM_GET_CPUID2: {
3255                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3256                 struct kvm_cpuid2 cpuid;
3257
3258                 r = -EFAULT;
3259                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3260                         goto out;
3261                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
3262                                               cpuid_arg->entries);
3263                 if (r)
3264                         goto out;
3265                 r = -EFAULT;
3266                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
3267                         goto out;
3268                 r = 0;
3269                 break;
3270         }
3271         case KVM_GET_MSRS:
3272                 r = msr_io(vcpu, argp, do_get_msr, 1);
3273                 break;
3274         case KVM_SET_MSRS:
3275                 r = msr_io(vcpu, argp, do_set_msr, 0);
3276                 break;
3277         case KVM_TPR_ACCESS_REPORTING: {
3278                 struct kvm_tpr_access_ctl tac;
3279
3280                 r = -EFAULT;
3281                 if (copy_from_user(&tac, argp, sizeof tac))
3282                         goto out;
3283                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
3284                 if (r)
3285                         goto out;
3286                 r = -EFAULT;
3287                 if (copy_to_user(argp, &tac, sizeof tac))
3288                         goto out;
3289                 r = 0;
3290                 break;
3291         };
3292         case KVM_SET_VAPIC_ADDR: {
3293                 struct kvm_vapic_addr va;
3294
3295                 r = -EINVAL;
3296                 if (!lapic_in_kernel(vcpu))
3297                         goto out;
3298                 r = -EFAULT;
3299                 if (copy_from_user(&va, argp, sizeof va))
3300                         goto out;
3301                 r = kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
3302                 break;
3303         }
3304         case KVM_X86_SETUP_MCE: {
3305                 u64 mcg_cap;
3306
3307                 r = -EFAULT;
3308                 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
3309                         goto out;
3310                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
3311                 break;
3312         }
3313         case KVM_X86_SET_MCE: {
3314                 struct kvm_x86_mce mce;
3315
3316                 r = -EFAULT;
3317                 if (copy_from_user(&mce, argp, sizeof mce))
3318                         goto out;
3319                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
3320                 break;
3321         }
3322         case KVM_GET_VCPU_EVENTS: {
3323                 struct kvm_vcpu_events events;
3324
3325                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
3326
3327                 r = -EFAULT;
3328                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
3329                         break;
3330                 r = 0;
3331                 break;
3332         }
3333         case KVM_SET_VCPU_EVENTS: {
3334                 struct kvm_vcpu_events events;
3335
3336                 r = -EFAULT;
3337                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
3338                         break;
3339
3340                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
3341                 break;
3342         }
3343         case KVM_GET_DEBUGREGS: {
3344                 struct kvm_debugregs dbgregs;
3345
3346                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
3347
3348                 r = -EFAULT;
3349                 if (copy_to_user(argp, &dbgregs,
3350                                  sizeof(struct kvm_debugregs)))
3351                         break;
3352                 r = 0;
3353                 break;
3354         }
3355         case KVM_SET_DEBUGREGS: {
3356                 struct kvm_debugregs dbgregs;
3357
3358                 r = -EFAULT;
3359                 if (copy_from_user(&dbgregs, argp,
3360                                    sizeof(struct kvm_debugregs)))
3361                         break;
3362
3363                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
3364                 break;
3365         }
3366         case KVM_GET_XSAVE: {
3367                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
3368                 r = -ENOMEM;
3369                 if (!u.xsave)
3370                         break;
3371
3372                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
3373
3374                 r = -EFAULT;
3375                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
3376                         break;
3377                 r = 0;
3378                 break;
3379         }
3380         case KVM_SET_XSAVE: {
3381                 u.xsave = memdup_user(argp, sizeof(*u.xsave));
3382                 if (IS_ERR(u.xsave))
3383                         return PTR_ERR(u.xsave);
3384
3385                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
3386                 break;
3387         }
3388         case KVM_GET_XCRS: {
3389                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
3390                 r = -ENOMEM;
3391                 if (!u.xcrs)
3392                         break;
3393
3394                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
3395
3396                 r = -EFAULT;
3397                 if (copy_to_user(argp, u.xcrs,
3398                                  sizeof(struct kvm_xcrs)))
3399                         break;
3400                 r = 0;
3401                 break;
3402         }
3403         case KVM_SET_XCRS: {
3404                 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
3405                 if (IS_ERR(u.xcrs))
3406                         return PTR_ERR(u.xcrs);
3407
3408                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
3409                 break;
3410         }
3411         case KVM_SET_TSC_KHZ: {
3412                 u32 user_tsc_khz;
3413
3414                 r = -EINVAL;
3415                 user_tsc_khz = (u32)arg;
3416
3417                 if (user_tsc_khz >= kvm_max_guest_tsc_khz)
3418                         goto out;
3419
3420                 if (user_tsc_khz == 0)
3421                         user_tsc_khz = tsc_khz;
3422
3423                 if (!kvm_set_tsc_khz(vcpu, user_tsc_khz))
3424                         r = 0;
3425
3426                 goto out;
3427         }
3428         case KVM_GET_TSC_KHZ: {
3429                 r = vcpu->arch.virtual_tsc_khz;
3430                 goto out;
3431         }
3432         case KVM_KVMCLOCK_CTRL: {
3433                 r = kvm_set_guest_paused(vcpu);
3434                 goto out;
3435         }
3436         default:
3437                 r = -EINVAL;
3438         }
3439 out:
3440         kfree(u.buffer);
3441         return r;
3442 }
3443
3444 int kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
3445 {
3446         return VM_FAULT_SIGBUS;
3447 }
3448
3449 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
3450 {
3451         int ret;
3452
3453         if (addr > (unsigned int)(-3 * PAGE_SIZE))
3454                 return -EINVAL;
3455         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
3456         return ret;
3457 }
3458
3459 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
3460                                               u64 ident_addr)
3461 {
3462         kvm->arch.ept_identity_map_addr = ident_addr;
3463         return 0;
3464 }
3465
3466 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
3467                                           u32 kvm_nr_mmu_pages)
3468 {
3469         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
3470                 return -EINVAL;
3471
3472         mutex_lock(&kvm->slots_lock);
3473
3474         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
3475         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
3476
3477         mutex_unlock(&kvm->slots_lock);
3478         return 0;
3479 }
3480
3481 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
3482 {
3483         return kvm->arch.n_max_mmu_pages;
3484 }
3485
3486 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3487 {
3488         int r;
3489
3490         r = 0;
3491         switch (chip->chip_id) {
3492         case KVM_IRQCHIP_PIC_MASTER:
3493                 memcpy(&chip->chip.pic,
3494                         &pic_irqchip(kvm)->pics[0],
3495                         sizeof(struct kvm_pic_state));
3496                 break;
3497         case KVM_IRQCHIP_PIC_SLAVE:
3498                 memcpy(&chip->chip.pic,
3499                         &pic_irqchip(kvm)->pics[1],
3500                         sizeof(struct kvm_pic_state));
3501                 break;
3502         case KVM_IRQCHIP_IOAPIC:
3503                 r = kvm_get_ioapic(kvm, &chip->chip.ioapic);
3504                 break;
3505         default:
3506                 r = -EINVAL;
3507                 break;
3508         }
3509         return r;
3510 }
3511
3512 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3513 {
3514         int r;
3515
3516         r = 0;
3517         switch (chip->chip_id) {
3518         case KVM_IRQCHIP_PIC_MASTER:
3519                 spin_lock(&pic_irqchip(kvm)->lock);
3520                 memcpy(&pic_irqchip(kvm)->pics[0],
3521                         &chip->chip.pic,
3522                         sizeof(struct kvm_pic_state));
3523                 spin_unlock(&pic_irqchip(kvm)->lock);
3524                 break;
3525         case KVM_IRQCHIP_PIC_SLAVE:
3526                 spin_lock(&pic_irqchip(kvm)->lock);
3527                 memcpy(&pic_irqchip(kvm)->pics[1],
3528                         &chip->chip.pic,
3529                         sizeof(struct kvm_pic_state));
3530                 spin_unlock(&pic_irqchip(kvm)->lock);
3531                 break;
3532         case KVM_IRQCHIP_IOAPIC:
3533                 r = kvm_set_ioapic(kvm, &chip->chip.ioapic);
3534                 break;
3535         default:
3536                 r = -EINVAL;
3537                 break;
3538         }
3539         kvm_pic_update_irq(pic_irqchip(kvm));
3540         return r;
3541 }
3542
3543 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3544 {
3545         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3546         memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
3547         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3548         return 0;
3549 }
3550
3551 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3552 {
3553         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3554         memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
3555         kvm_pit_load_count(kvm, 0, ps->channels[0].count, 0);
3556         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3557         return 0;
3558 }
3559
3560 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3561 {
3562         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3563         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
3564                 sizeof(ps->channels));
3565         ps->flags = kvm->arch.vpit->pit_state.flags;
3566         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3567         memset(&ps->reserved, 0, sizeof(ps->reserved));
3568         return 0;
3569 }
3570
3571 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3572 {
3573         int start = 0;
3574         u32 prev_legacy, cur_legacy;
3575         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3576         prev_legacy = kvm->arch.vpit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
3577         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
3578         if (!prev_legacy && cur_legacy)
3579                 start = 1;
3580         memcpy(&kvm->arch.vpit->pit_state.channels, &ps->channels,
3581                sizeof(kvm->arch.vpit->pit_state.channels));
3582         kvm->arch.vpit->pit_state.flags = ps->flags;
3583         kvm_pit_load_count(kvm, 0, kvm->arch.vpit->pit_state.channels[0].count, start);
3584         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3585         return 0;
3586 }
3587
3588 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
3589                                  struct kvm_reinject_control *control)
3590 {
3591         if (!kvm->arch.vpit)
3592                 return -ENXIO;
3593         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3594         kvm->arch.vpit->pit_state.reinject = control->pit_reinject;
3595         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3596         return 0;
3597 }
3598
3599 /**
3600  * kvm_vm_ioctl_get_dirty_log - get and clear the log of dirty pages in a slot
3601  * @kvm: kvm instance
3602  * @log: slot id and address to which we copy the log
3603  *
3604  * Steps 1-4 below provide general overview of dirty page logging. See
3605  * kvm_get_dirty_log_protect() function description for additional details.
3606  *
3607  * We call kvm_get_dirty_log_protect() to handle steps 1-3, upon return we
3608  * always flush the TLB (step 4) even if previous step failed  and the dirty
3609  * bitmap may be corrupt. Regardless of previous outcome the KVM logging API
3610  * does not preclude user space subsequent dirty log read. Flushing TLB ensures
3611  * writes will be marked dirty for next log read.
3612  *
3613  *   1. Take a snapshot of the bit and clear it if needed.
3614  *   2. Write protect the corresponding page.
3615  *   3. Copy the snapshot to the userspace.
3616  *   4. Flush TLB's if needed.
3617  */
3618 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
3619 {
3620         bool is_dirty = false;
3621         int r;
3622
3623         mutex_lock(&kvm->slots_lock);
3624
3625         /*
3626          * Flush potentially hardware-cached dirty pages to dirty_bitmap.
3627          */
3628         if (kvm_x86_ops->flush_log_dirty)
3629                 kvm_x86_ops->flush_log_dirty(kvm);
3630
3631         r = kvm_get_dirty_log_protect(kvm, log, &is_dirty);
3632
3633         /*
3634          * All the TLBs can be flushed out of mmu lock, see the comments in
3635          * kvm_mmu_slot_remove_write_access().
3636          */
3637         lockdep_assert_held(&kvm->slots_lock);
3638         if (is_dirty)
3639                 kvm_flush_remote_tlbs(kvm);
3640
3641         mutex_unlock(&kvm->slots_lock);
3642         return r;
3643 }
3644
3645 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
3646                         bool line_status)
3647 {
3648         if (!irqchip_in_kernel(kvm))
3649                 return -ENXIO;
3650
3651         irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
3652                                         irq_event->irq, irq_event->level,
3653                                         line_status);
3654         return 0;
3655 }
3656
3657 static int kvm_vm_ioctl_enable_cap(struct kvm *kvm,
3658                                    struct kvm_enable_cap *cap)
3659 {
3660         int r;
3661
3662         if (cap->flags)
3663                 return -EINVAL;
3664
3665         switch (cap->cap) {
3666         case KVM_CAP_DISABLE_QUIRKS:
3667                 kvm->arch.disabled_quirks = cap->args[0];
3668                 r = 0;
3669                 break;
3670         case KVM_CAP_SPLIT_IRQCHIP: {
3671                 mutex_lock(&kvm->lock);
3672                 r = -EINVAL;
3673                 if (cap->args[0] > MAX_NR_RESERVED_IOAPIC_PINS)
3674                         goto split_irqchip_unlock;
3675                 r = -EEXIST;
3676                 if (irqchip_in_kernel(kvm))
3677                         goto split_irqchip_unlock;
3678                 if (atomic_read(&kvm->online_vcpus))
3679                         goto split_irqchip_unlock;
3680                 r = kvm_setup_empty_irq_routing(kvm);
3681                 if (r)
3682                         goto split_irqchip_unlock;
3683                 /* Pairs with irqchip_in_kernel. */
3684                 smp_wmb();
3685                 kvm->arch.irqchip_split = true;
3686                 kvm->arch.nr_reserved_ioapic_pins = cap->args[0];
3687                 r = 0;
3688 split_irqchip_unlock:
3689                 mutex_unlock(&kvm->lock);
3690                 break;
3691         }
3692         default:
3693                 r = -EINVAL;
3694                 break;
3695         }
3696         return r;
3697 }
3698
3699 long kvm_arch_vm_ioctl(struct file *filp,
3700                        unsigned int ioctl, unsigned long arg)
3701 {
3702         struct kvm *kvm = filp->private_data;
3703         void __user *argp = (void __user *)arg;
3704         int r = -ENOTTY;
3705         /*
3706          * This union makes it completely explicit to gcc-3.x
3707          * that these two variables' stack usage should be
3708          * combined, not added together.
3709          */
3710         union {
3711                 struct kvm_pit_state ps;
3712                 struct kvm_pit_state2 ps2;
3713                 struct kvm_pit_config pit_config;
3714         } u;
3715
3716         switch (ioctl) {
3717         case KVM_SET_TSS_ADDR:
3718                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
3719                 break;
3720         case KVM_SET_IDENTITY_MAP_ADDR: {
3721                 u64 ident_addr;
3722
3723                 r = -EFAULT;
3724                 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
3725                         goto out;
3726                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
3727                 break;
3728         }
3729         case KVM_SET_NR_MMU_PAGES:
3730                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
3731                 break;
3732         case KVM_GET_NR_MMU_PAGES:
3733                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
3734                 break;
3735         case KVM_CREATE_IRQCHIP: {
3736                 struct kvm_pic *vpic;
3737
3738                 mutex_lock(&kvm->lock);
3739                 r = -EEXIST;
3740                 if (kvm->arch.vpic)
3741                         goto create_irqchip_unlock;
3742                 r = -EINVAL;
3743                 if (atomic_read(&kvm->online_vcpus))
3744                         goto create_irqchip_unlock;
3745                 r = -ENOMEM;
3746                 vpic = kvm_create_pic(kvm);
3747                 if (vpic) {
3748                         r = kvm_ioapic_init(kvm);
3749                         if (r) {
3750                                 mutex_lock(&kvm->slots_lock);
3751                                 kvm_destroy_pic(vpic);
3752                                 mutex_unlock(&kvm->slots_lock);
3753                                 goto create_irqchip_unlock;
3754                         }
3755                 } else
3756                         goto create_irqchip_unlock;
3757                 r = kvm_setup_default_irq_routing(kvm);
3758                 if (r) {
3759                         mutex_lock(&kvm->slots_lock);
3760                         mutex_lock(&kvm->irq_lock);
3761                         kvm_ioapic_destroy(kvm);
3762                         kvm_destroy_pic(vpic);
3763                         mutex_unlock(&kvm->irq_lock);
3764                         mutex_unlock(&kvm->slots_lock);
3765                         goto create_irqchip_unlock;
3766                 }
3767                 /* Write kvm->irq_routing before kvm->arch.vpic.  */
3768                 smp_wmb();
3769                 kvm->arch.vpic = vpic;
3770         create_irqchip_unlock:
3771                 mutex_unlock(&kvm->lock);
3772                 break;
3773         }
3774         case KVM_CREATE_PIT:
3775                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
3776                 goto create_pit;
3777         case KVM_CREATE_PIT2:
3778                 r = -EFAULT;
3779                 if (copy_from_user(&u.pit_config, argp,
3780                                    sizeof(struct kvm_pit_config)))
3781                         goto out;
3782         create_pit:
3783                 mutex_lock(&kvm->slots_lock);
3784                 r = -EEXIST;
3785                 if (kvm->arch.vpit)
3786                         goto create_pit_unlock;
3787                 r = -ENOMEM;
3788                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
3789                 if (kvm->arch.vpit)
3790                         r = 0;
3791         create_pit_unlock:
3792                 mutex_unlock(&kvm->slots_lock);
3793                 break;
3794         case KVM_GET_IRQCHIP: {
3795                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3796                 struct kvm_irqchip *chip;
3797
3798                 chip = memdup_user(argp, sizeof(*chip));
3799                 if (IS_ERR(chip)) {
3800                         r = PTR_ERR(chip);
3801                         goto out;
3802                 }
3803
3804                 r = -ENXIO;
3805                 if (!irqchip_in_kernel(kvm) || irqchip_split(kvm))
3806                         goto get_irqchip_out;
3807                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
3808                 if (r)
3809                         goto get_irqchip_out;
3810                 r = -EFAULT;
3811                 if (copy_to_user(argp, chip, sizeof *chip))
3812                         goto get_irqchip_out;
3813                 r = 0;
3814         get_irqchip_out:
3815                 kfree(chip);
3816                 break;
3817         }
3818         case KVM_SET_IRQCHIP: {
3819                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3820                 struct kvm_irqchip *chip;
3821
3822                 chip = memdup_user(argp, sizeof(*chip));
3823                 if (IS_ERR(chip)) {
3824                         r = PTR_ERR(chip);
3825                         goto out;
3826                 }
3827
3828                 r = -ENXIO;
3829                 if (!irqchip_in_kernel(kvm) || irqchip_split(kvm))
3830                         goto set_irqchip_out;
3831                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
3832                 if (r)
3833                         goto set_irqchip_out;
3834                 r = 0;
3835         set_irqchip_out:
3836                 kfree(chip);
3837                 break;
3838         }
3839         case KVM_GET_PIT: {
3840                 r = -EFAULT;
3841                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
3842                         goto out;
3843                 r = -ENXIO;
3844                 if (!kvm->arch.vpit)
3845                         goto out;
3846                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
3847                 if (r)
3848                         goto out;
3849                 r = -EFAULT;
3850                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
3851                         goto out;
3852                 r = 0;
3853                 break;
3854         }
3855         case KVM_SET_PIT: {
3856                 r = -EFAULT;
3857                 if (copy_from_user(&u.ps, argp, sizeof u.ps))
3858                         goto out;
3859                 r = -ENXIO;
3860                 if (!kvm->arch.vpit)
3861                         goto out;
3862                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
3863                 break;
3864         }
3865         case KVM_GET_PIT2: {
3866                 r = -ENXIO;
3867                 if (!kvm->arch.vpit)
3868                         goto out;
3869                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
3870                 if (r)
3871                         goto out;
3872                 r = -EFAULT;
3873                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
3874                         goto out;
3875                 r = 0;
3876                 break;
3877         }
3878         case KVM_SET_PIT2: {
3879                 r = -EFAULT;
3880                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
3881                         goto out;
3882                 r = -ENXIO;
3883                 if (!kvm->arch.vpit)
3884                         goto out;
3885                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
3886                 break;
3887         }
3888         case KVM_REINJECT_CONTROL: {
3889                 struct kvm_reinject_control control;
3890                 r =  -EFAULT;
3891                 if (copy_from_user(&control, argp, sizeof(control)))
3892                         goto out;
3893                 r = kvm_vm_ioctl_reinject(kvm, &control);
3894                 break;
3895         }
3896         case KVM_SET_BOOT_CPU_ID:
3897                 r = 0;
3898                 mutex_lock(&kvm->lock);
3899                 if (atomic_read(&kvm->online_vcpus) != 0)
3900                         r = -EBUSY;
3901                 else
3902                         kvm->arch.bsp_vcpu_id = arg;
3903                 mutex_unlock(&kvm->lock);
3904                 break;
3905         case KVM_XEN_HVM_CONFIG: {
3906                 r = -EFAULT;
3907                 if (copy_from_user(&kvm->arch.xen_hvm_config, argp,
3908                                    sizeof(struct kvm_xen_hvm_config)))
3909                         goto out;
3910                 r = -EINVAL;
3911                 if (kvm->arch.xen_hvm_config.flags)
3912                         goto out;
3913                 r = 0;
3914                 break;
3915         }
3916         case KVM_SET_CLOCK: {
3917                 struct kvm_clock_data user_ns;
3918                 u64 now_ns;
3919                 s64 delta;
3920
3921                 r = -EFAULT;
3922                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
3923                         goto out;
3924
3925                 r = -EINVAL;
3926                 if (user_ns.flags)
3927                         goto out;
3928
3929                 r = 0;
3930                 local_irq_disable();
3931                 now_ns = get_kernel_ns();
3932                 delta = user_ns.clock - now_ns;
3933                 local_irq_enable();
3934                 kvm->arch.kvmclock_offset = delta;
3935                 kvm_gen_update_masterclock(kvm);
3936                 break;
3937         }
3938         case KVM_GET_CLOCK: {
3939                 struct kvm_clock_data user_ns;
3940                 u64 now_ns;
3941
3942                 local_irq_disable();
3943                 now_ns = get_kernel_ns();
3944                 user_ns.clock = kvm->arch.kvmclock_offset + now_ns;
3945                 local_irq_enable();
3946                 user_ns.flags = 0;
3947                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
3948
3949                 r = -EFAULT;
3950                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
3951                         goto out;
3952                 r = 0;
3953                 break;
3954         }
3955         case KVM_ENABLE_CAP: {
3956                 struct kvm_enable_cap cap;
3957
3958                 r = -EFAULT;
3959                 if (copy_from_user(&cap, argp, sizeof(cap)))
3960                         goto out;
3961                 r = kvm_vm_ioctl_enable_cap(kvm, &cap);
3962                 break;
3963         }
3964         default:
3965                 r = kvm_vm_ioctl_assigned_device(kvm, ioctl, arg);
3966         }
3967 out:
3968         return r;
3969 }
3970
3971 static void kvm_init_msr_list(void)
3972 {
3973         u32 dummy[2];
3974         unsigned i, j;
3975
3976         for (i = j = 0; i < ARRAY_SIZE(msrs_to_save); i++) {
3977                 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
3978                         continue;
3979
3980                 /*
3981                  * Even MSRs that are valid in the host may not be exposed
3982                  * to the guests in some cases.  We could work around this
3983                  * in VMX with the generic MSR save/load machinery, but it
3984                  * is not really worthwhile since it will really only
3985                  * happen with nested virtualization.
3986                  */
3987                 switch (msrs_to_save[i]) {
3988                 case MSR_IA32_BNDCFGS:
3989                         if (!kvm_x86_ops->mpx_supported())
3990                                 continue;
3991                         break;
3992                 default:
3993                         break;
3994                 }
3995
3996                 if (j < i)
3997                         msrs_to_save[j] = msrs_to_save[i];
3998                 j++;
3999         }
4000         num_msrs_to_save = j;
4001
4002         for (i = j = 0; i < ARRAY_SIZE(emulated_msrs); i++) {
4003                 switch (emulated_msrs[i]) {
4004                 case MSR_IA32_SMBASE:
4005                         if (!kvm_x86_ops->cpu_has_high_real_mode_segbase())
4006                                 continue;
4007                         break;
4008                 default:
4009                         break;
4010                 }
4011
4012                 if (j < i)
4013                         emulated_msrs[j] = emulated_msrs[i];
4014                 j++;
4015         }
4016         num_emulated_msrs = j;
4017 }
4018
4019 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
4020                            const void *v)
4021 {
4022         int handled = 0;
4023         int n;
4024
4025         do {
4026                 n = min(len, 8);
4027                 if (!(vcpu->arch.apic &&
4028                       !kvm_iodevice_write(vcpu, &vcpu->arch.apic->dev, addr, n, v))
4029                     && kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, n, v))
4030                         break;
4031                 handled += n;
4032                 addr += n;
4033                 len -= n;
4034                 v += n;
4035         } while (len);
4036
4037         return handled;
4038 }
4039
4040 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
4041 {
4042         int handled = 0;
4043         int n;
4044
4045         do {
4046                 n = min(len, 8);
4047                 if (!(vcpu->arch.apic &&
4048                       !kvm_iodevice_read(vcpu, &vcpu->arch.apic->dev,
4049                                          addr, n, v))
4050                     && kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, n, v))
4051                         break;
4052                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, *(u64 *)v);
4053                 handled += n;
4054                 addr += n;
4055                 len -= n;
4056                 v += n;
4057         } while (len);
4058
4059         return handled;
4060 }
4061
4062 static void kvm_set_segment(struct kvm_vcpu *vcpu,
4063                         struct kvm_segment *var, int seg)
4064 {
4065         kvm_x86_ops->set_segment(vcpu, var, seg);
4066 }
4067
4068 void kvm_get_segment(struct kvm_vcpu *vcpu,
4069                      struct kvm_segment *var, int seg)
4070 {
4071         kvm_x86_ops->get_segment(vcpu, var, seg);
4072 }
4073
4074 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
4075                            struct x86_exception *exception)
4076 {
4077         gpa_t t_gpa;
4078
4079         BUG_ON(!mmu_is_nested(vcpu));
4080
4081         /* NPT walks are always user-walks */
4082         access |= PFERR_USER_MASK;
4083         t_gpa  = vcpu->arch.mmu.gva_to_gpa(vcpu, gpa, access, exception);
4084
4085         return t_gpa;
4086 }
4087
4088 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
4089                               struct x86_exception *exception)
4090 {
4091         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4092         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4093 }
4094
4095  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
4096                                 struct x86_exception *exception)
4097 {
4098         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4099         access |= PFERR_FETCH_MASK;
4100         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4101 }
4102
4103 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
4104                                struct x86_exception *exception)
4105 {
4106         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4107         access |= PFERR_WRITE_MASK;
4108         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4109 }
4110
4111 /* uses this to access any guest's mapped memory without checking CPL */
4112 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
4113                                 struct x86_exception *exception)
4114 {
4115         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
4116 }
4117
4118 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
4119                                       struct kvm_vcpu *vcpu, u32 access,
4120                                       struct x86_exception *exception)
4121 {
4122         void *data = val;
4123         int r = X86EMUL_CONTINUE;
4124
4125         while (bytes) {
4126                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
4127                                                             exception);
4128                 unsigned offset = addr & (PAGE_SIZE-1);
4129                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
4130                 int ret;
4131
4132                 if (gpa == UNMAPPED_GVA)
4133                         return X86EMUL_PROPAGATE_FAULT;
4134                 ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, data,
4135                                                offset, toread);
4136                 if (ret < 0) {
4137                         r = X86EMUL_IO_NEEDED;
4138                         goto out;
4139                 }
4140
4141                 bytes -= toread;
4142                 data += toread;
4143                 addr += toread;
4144         }
4145 out:
4146         return r;
4147 }
4148
4149 /* used for instruction fetching */
4150 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
4151                                 gva_t addr, void *val, unsigned int bytes,
4152                                 struct x86_exception *exception)
4153 {
4154         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4155         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4156         unsigned offset;
4157         int ret;
4158
4159         /* Inline kvm_read_guest_virt_helper for speed.  */
4160         gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access|PFERR_FETCH_MASK,
4161                                                     exception);
4162         if (unlikely(gpa == UNMAPPED_GVA))
4163                 return X86EMUL_PROPAGATE_FAULT;
4164
4165         offset = addr & (PAGE_SIZE-1);
4166         if (WARN_ON(offset + bytes > PAGE_SIZE))
4167                 bytes = (unsigned)PAGE_SIZE - offset;
4168         ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, val,
4169                                        offset, bytes);
4170         if (unlikely(ret < 0))
4171                 return X86EMUL_IO_NEEDED;
4172
4173         return X86EMUL_CONTINUE;
4174 }
4175
4176 int kvm_read_guest_virt(struct x86_emulate_ctxt *ctxt,
4177                                gva_t addr, void *val, unsigned int bytes,
4178                                struct x86_exception *exception)
4179 {
4180         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4181         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4182
4183         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
4184                                           exception);
4185 }
4186 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
4187
4188 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt *ctxt,
4189                                       gva_t addr, void *val, unsigned int bytes,
4190                                       struct x86_exception *exception)
4191 {
4192         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4193         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, exception);
4194 }
4195
4196 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt *ctxt,
4197                 unsigned long addr, void *val, unsigned int bytes)
4198 {
4199         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4200         int r = kvm_vcpu_read_guest(vcpu, addr, val, bytes);
4201
4202         return r < 0 ? X86EMUL_IO_NEEDED : X86EMUL_CONTINUE;
4203 }
4204
4205 int kvm_write_guest_virt_system(struct x86_emulate_ctxt *ctxt,
4206                                        gva_t addr, void *val,
4207                                        unsigned int bytes,
4208                                        struct x86_exception *exception)
4209 {
4210         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4211         void *data = val;
4212         int r = X86EMUL_CONTINUE;
4213
4214         while (bytes) {
4215                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
4216                                                              PFERR_WRITE_MASK,
4217                                                              exception);
4218                 unsigned offset = addr & (PAGE_SIZE-1);
4219                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
4220                 int ret;
4221
4222                 if (gpa == UNMAPPED_GVA)
4223                         return X86EMUL_PROPAGATE_FAULT;
4224                 ret = kvm_vcpu_write_guest(vcpu, gpa, data, towrite);
4225                 if (ret < 0) {
4226                         r = X86EMUL_IO_NEEDED;
4227                         goto out;
4228                 }
4229
4230                 bytes -= towrite;
4231                 data += towrite;
4232                 addr += towrite;
4233         }
4234 out:
4235         return r;
4236 }
4237 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
4238
4239 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
4240                                 gpa_t *gpa, struct x86_exception *exception,
4241                                 bool write)
4242 {
4243         u32 access = ((kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0)
4244                 | (write ? PFERR_WRITE_MASK : 0);
4245
4246         if (vcpu_match_mmio_gva(vcpu, gva)
4247             && !permission_fault(vcpu, vcpu->arch.walk_mmu,
4248                                  vcpu->arch.access, access)) {
4249                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
4250                                         (gva & (PAGE_SIZE - 1));
4251                 trace_vcpu_match_mmio(gva, *gpa, write, false);
4252                 return 1;
4253         }
4254
4255         *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4256
4257         if (*gpa == UNMAPPED_GVA)
4258                 return -1;
4259
4260         /* For APIC access vmexit */
4261         if ((*gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4262                 return 1;
4263
4264         if (vcpu_match_mmio_gpa(vcpu, *gpa)) {
4265                 trace_vcpu_match_mmio(gva, *gpa, write, true);
4266                 return 1;
4267         }
4268
4269         return 0;
4270 }
4271
4272 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
4273                         const void *val, int bytes)
4274 {
4275         int ret;
4276
4277         ret = kvm_vcpu_write_guest(vcpu, gpa, val, bytes);
4278         if (ret < 0)
4279                 return 0;
4280         kvm_mmu_pte_write(vcpu, gpa, val, bytes);
4281         return 1;
4282 }
4283
4284 struct read_write_emulator_ops {
4285         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
4286                                   int bytes);
4287         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
4288                                   void *val, int bytes);
4289         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4290                                int bytes, void *val);
4291         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4292                                     void *val, int bytes);
4293         bool write;
4294 };
4295
4296 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
4297 {
4298         if (vcpu->mmio_read_completed) {
4299                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
4300                                vcpu->mmio_fragments[0].gpa, *(u64 *)val);
4301                 vcpu->mmio_read_completed = 0;
4302                 return 1;
4303         }
4304
4305         return 0;
4306 }
4307
4308 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4309                         void *val, int bytes)
4310 {
4311         return !kvm_vcpu_read_guest(vcpu, gpa, val, bytes);
4312 }
4313
4314 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4315                          void *val, int bytes)
4316 {
4317         return emulator_write_phys(vcpu, gpa, val, bytes);
4318 }
4319
4320 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
4321 {
4322         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
4323         return vcpu_mmio_write(vcpu, gpa, bytes, val);
4324 }
4325
4326 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4327                           void *val, int bytes)
4328 {
4329         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
4330         return X86EMUL_IO_NEEDED;
4331 }
4332
4333 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4334                            void *val, int bytes)
4335 {
4336         struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
4337
4338         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
4339         return X86EMUL_CONTINUE;
4340 }
4341
4342 static const struct read_write_emulator_ops read_emultor = {
4343         .read_write_prepare = read_prepare,
4344         .read_write_emulate = read_emulate,
4345         .read_write_mmio = vcpu_mmio_read,
4346         .read_write_exit_mmio = read_exit_mmio,
4347 };
4348
4349 static const struct read_write_emulator_ops write_emultor = {
4350         .read_write_emulate = write_emulate,
4351         .read_write_mmio = write_mmio,
4352         .read_write_exit_mmio = write_exit_mmio,
4353         .write = true,
4354 };
4355
4356 static int emulator_read_write_onepage(unsigned long addr, void *val,
4357                                        unsigned int bytes,
4358                                        struct x86_exception *exception,
4359                                        struct kvm_vcpu *vcpu,
4360                                        const struct read_write_emulator_ops *ops)
4361 {
4362         gpa_t gpa;
4363         int handled, ret;
4364         bool write = ops->write;
4365         struct kvm_mmio_fragment *frag;
4366
4367         ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
4368
4369         if (ret < 0)
4370                 return X86EMUL_PROPAGATE_FAULT;
4371
4372         /* For APIC access vmexit */
4373         if (ret)
4374                 goto mmio;
4375
4376         if (ops->read_write_emulate(vcpu, gpa, val, bytes))
4377                 return X86EMUL_CONTINUE;
4378
4379 mmio:
4380         /*
4381          * Is this MMIO handled locally?
4382          */
4383         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
4384         if (handled == bytes)
4385                 return X86EMUL_CONTINUE;
4386
4387         gpa += handled;
4388         bytes -= handled;
4389         val += handled;
4390
4391         WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS);
4392         frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
4393         frag->gpa = gpa;
4394         frag->data = val;
4395         frag->len = bytes;
4396         return X86EMUL_CONTINUE;
4397 }
4398
4399 static int emulator_read_write(struct x86_emulate_ctxt *ctxt,
4400                         unsigned long addr,
4401                         void *val, unsigned int bytes,
4402                         struct x86_exception *exception,
4403                         const struct read_write_emulator_ops *ops)
4404 {
4405         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4406         gpa_t gpa;
4407         int rc;
4408
4409         if (ops->read_write_prepare &&
4410                   ops->read_write_prepare(vcpu, val, bytes))
4411                 return X86EMUL_CONTINUE;
4412
4413         vcpu->mmio_nr_fragments = 0;
4414
4415         /* Crossing a page boundary? */
4416         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
4417                 int now;
4418
4419                 now = -addr & ~PAGE_MASK;
4420                 rc = emulator_read_write_onepage(addr, val, now, exception,
4421                                                  vcpu, ops);
4422
4423                 if (rc != X86EMUL_CONTINUE)
4424                         return rc;
4425                 addr += now;
4426                 if (ctxt->mode != X86EMUL_MODE_PROT64)
4427                         addr = (u32)addr;
4428                 val += now;
4429                 bytes -= now;
4430         }
4431
4432         rc = emulator_read_write_onepage(addr, val, bytes, exception,
4433                                          vcpu, ops);
4434         if (rc != X86EMUL_CONTINUE)
4435                 return rc;
4436
4437         if (!vcpu->mmio_nr_fragments)
4438                 return rc;
4439
4440         gpa = vcpu->mmio_fragments[0].gpa;
4441
4442         vcpu->mmio_needed = 1;
4443         vcpu->mmio_cur_fragment = 0;
4444
4445         vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len);
4446         vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
4447         vcpu->run->exit_reason = KVM_EXIT_MMIO;
4448         vcpu->run->mmio.phys_addr = gpa;
4449
4450         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
4451 }
4452
4453 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
4454                                   unsigned long addr,
4455                                   void *val,
4456                                   unsigned int bytes,
4457                                   struct x86_exception *exception)
4458 {
4459         return emulator_read_write(ctxt, addr, val, bytes,
4460                                    exception, &read_emultor);
4461 }
4462
4463 static int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
4464                             unsigned long addr,
4465                             const void *val,
4466                             unsigned int bytes,
4467                             struct x86_exception *exception)
4468 {
4469         return emulator_read_write(ctxt, addr, (void *)val, bytes,
4470                                    exception, &write_emultor);
4471 }
4472
4473 #define CMPXCHG_TYPE(t, ptr, old, new) \
4474         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
4475
4476 #ifdef CONFIG_X86_64
4477 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
4478 #else
4479 #  define CMPXCHG64(ptr, old, new) \
4480         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
4481 #endif
4482
4483 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
4484                                      unsigned long addr,
4485                                      const void *old,
4486                                      const void *new,
4487                                      unsigned int bytes,
4488                                      struct x86_exception *exception)
4489 {
4490         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4491         gpa_t gpa;
4492         struct page *page;
4493         char *kaddr;
4494         bool exchanged;
4495
4496         /* guests cmpxchg8b have to be emulated atomically */
4497         if (bytes > 8 || (bytes & (bytes - 1)))
4498                 goto emul_write;
4499
4500         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
4501
4502         if (gpa == UNMAPPED_GVA ||
4503             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4504                 goto emul_write;
4505
4506         if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
4507                 goto emul_write;
4508
4509         page = kvm_vcpu_gfn_to_page(vcpu, gpa >> PAGE_SHIFT);
4510         if (is_error_page(page))
4511                 goto emul_write;
4512
4513         kaddr = kmap_atomic(page);
4514         kaddr += offset_in_page(gpa);
4515         switch (bytes) {
4516         case 1:
4517                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
4518                 break;
4519         case 2:
4520                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
4521                 break;
4522         case 4:
4523                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
4524                 break;
4525         case 8:
4526                 exchanged = CMPXCHG64(kaddr, old, new);
4527                 break;
4528         default:
4529                 BUG();
4530         }
4531         kunmap_atomic(kaddr);
4532         kvm_release_page_dirty(page);
4533
4534         if (!exchanged)
4535                 return X86EMUL_CMPXCHG_FAILED;
4536
4537         kvm_vcpu_mark_page_dirty(vcpu, gpa >> PAGE_SHIFT);
4538         kvm_mmu_pte_write(vcpu, gpa, new, bytes);
4539
4540         return X86EMUL_CONTINUE;
4541
4542 emul_write:
4543         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
4544
4545         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
4546 }
4547
4548 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
4549 {
4550         /* TODO: String I/O for in kernel device */
4551         int r;
4552
4553         if (vcpu->arch.pio.in)
4554                 r = kvm_io_bus_read(vcpu, KVM_PIO_BUS, vcpu->arch.pio.port,
4555                                     vcpu->arch.pio.size, pd);
4556         else
4557                 r = kvm_io_bus_write(vcpu, KVM_PIO_BUS,
4558                                      vcpu->arch.pio.port, vcpu->arch.pio.size,
4559                                      pd);
4560         return r;
4561 }
4562
4563 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
4564                                unsigned short port, void *val,
4565                                unsigned int count, bool in)
4566 {
4567         vcpu->arch.pio.port = port;
4568         vcpu->arch.pio.in = in;
4569         vcpu->arch.pio.count  = count;
4570         vcpu->arch.pio.size = size;
4571
4572         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
4573                 vcpu->arch.pio.count = 0;
4574                 return 1;
4575         }
4576
4577         vcpu->run->exit_reason = KVM_EXIT_IO;
4578         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
4579         vcpu->run->io.size = size;
4580         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
4581         vcpu->run->io.count = count;
4582         vcpu->run->io.port = port;
4583
4584         return 0;
4585 }
4586
4587 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
4588                                     int size, unsigned short port, void *val,
4589                                     unsigned int count)
4590 {
4591         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4592         int ret;
4593
4594         if (vcpu->arch.pio.count)
4595                 goto data_avail;
4596
4597         ret = emulator_pio_in_out(vcpu, size, port, val, count, true);
4598         if (ret) {
4599 data_avail:
4600                 memcpy(val, vcpu->arch.pio_data, size * count);
4601                 trace_kvm_pio(KVM_PIO_IN, port, size, count, vcpu->arch.pio_data);
4602                 vcpu->arch.pio.count = 0;
4603                 return 1;
4604         }
4605
4606         return 0;
4607 }
4608
4609 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
4610                                      int size, unsigned short port,
4611                                      const void *val, unsigned int count)
4612 {
4613         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4614
4615         memcpy(vcpu->arch.pio_data, val, size * count);
4616         trace_kvm_pio(KVM_PIO_OUT, port, size, count, vcpu->arch.pio_data);
4617         return emulator_pio_in_out(vcpu, size, port, (void *)val, count, false);
4618 }
4619
4620 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
4621 {
4622         return kvm_x86_ops->get_segment_base(vcpu, seg);
4623 }
4624
4625 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
4626 {
4627         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
4628 }
4629
4630 int kvm_emulate_wbinvd_noskip(struct kvm_vcpu *vcpu)
4631 {
4632         if (!need_emulate_wbinvd(vcpu))
4633                 return X86EMUL_CONTINUE;
4634
4635         if (kvm_x86_ops->has_wbinvd_exit()) {
4636                 int cpu = get_cpu();
4637
4638                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
4639                 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
4640                                 wbinvd_ipi, NULL, 1);
4641                 put_cpu();
4642                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
4643         } else
4644                 wbinvd();
4645         return X86EMUL_CONTINUE;
4646 }
4647
4648 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
4649 {
4650         kvm_x86_ops->skip_emulated_instruction(vcpu);
4651         return kvm_emulate_wbinvd_noskip(vcpu);
4652 }
4653 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
4654
4655
4656
4657 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
4658 {
4659         kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt));
4660 }
4661
4662 static int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr,
4663                            unsigned long *dest)
4664 {
4665         return kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
4666 }
4667
4668 static int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
4669                            unsigned long value)
4670 {
4671
4672         return __kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
4673 }
4674
4675 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
4676 {
4677         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
4678 }
4679
4680 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
4681 {
4682         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4683         unsigned long value;
4684
4685         switch (cr) {
4686         case 0:
4687                 value = kvm_read_cr0(vcpu);
4688                 break;
4689         case 2:
4690                 value = vcpu->arch.cr2;
4691                 break;
4692         case 3:
4693                 value = kvm_read_cr3(vcpu);
4694                 break;
4695         case 4:
4696                 value = kvm_read_cr4(vcpu);
4697                 break;
4698         case 8:
4699                 value = kvm_get_cr8(vcpu);
4700                 break;
4701         default:
4702                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
4703                 return 0;
4704         }
4705
4706         return value;
4707 }
4708
4709 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
4710 {
4711         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4712         int res = 0;
4713
4714         switch (cr) {
4715         case 0:
4716                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
4717                 break;
4718         case 2:
4719                 vcpu->arch.cr2 = val;
4720                 break;
4721         case 3:
4722                 res = kvm_set_cr3(vcpu, val);
4723                 break;
4724         case 4:
4725                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
4726                 break;
4727         case 8:
4728                 res = kvm_set_cr8(vcpu, val);
4729                 break;
4730         default:
4731                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
4732                 res = -1;
4733         }
4734
4735         return res;
4736 }
4737
4738 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
4739 {
4740         return kvm_x86_ops->get_cpl(emul_to_vcpu(ctxt));
4741 }
4742
4743 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4744 {
4745         kvm_x86_ops->get_gdt(emul_to_vcpu(ctxt), dt);
4746 }
4747
4748 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4749 {
4750         kvm_x86_ops->get_idt(emul_to_vcpu(ctxt), dt);
4751 }
4752
4753 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4754 {
4755         kvm_x86_ops->set_gdt(emul_to_vcpu(ctxt), dt);
4756 }
4757
4758 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4759 {
4760         kvm_x86_ops->set_idt(emul_to_vcpu(ctxt), dt);
4761 }
4762
4763 static unsigned long emulator_get_cached_segment_base(
4764         struct x86_emulate_ctxt *ctxt, int seg)
4765 {
4766         return get_segment_base(emul_to_vcpu(ctxt), seg);
4767 }
4768
4769 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
4770                                  struct desc_struct *desc, u32 *base3,
4771                                  int seg)
4772 {
4773         struct kvm_segment var;
4774
4775         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
4776         *selector = var.selector;
4777
4778         if (var.unusable) {
4779                 memset(desc, 0, sizeof(*desc));
4780                 return false;
4781         }
4782
4783         if (var.g)
4784                 var.limit >>= 12;
4785         set_desc_limit(desc, var.limit);
4786         set_desc_base(desc, (unsigned long)var.base);
4787 #ifdef CONFIG_X86_64
4788         if (base3)
4789                 *base3 = var.base >> 32;
4790 #endif
4791         desc->type = var.type;
4792         desc->s = var.s;
4793         desc->dpl = var.dpl;
4794         desc->p = var.present;
4795         desc->avl = var.avl;
4796         desc->l = var.l;
4797         desc->d = var.db;
4798         desc->g = var.g;
4799
4800         return true;
4801 }
4802
4803 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
4804                                  struct desc_struct *desc, u32 base3,
4805                                  int seg)
4806 {
4807         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4808         struct kvm_segment var;
4809
4810         var.selector = selector;
4811         var.base = get_desc_base(desc);
4812 #ifdef CONFIG_X86_64
4813         var.base |= ((u64)base3) << 32;
4814 #endif
4815         var.limit = get_desc_limit(desc);
4816         if (desc->g)
4817                 var.limit = (var.limit << 12) | 0xfff;
4818         var.type = desc->type;
4819         var.dpl = desc->dpl;
4820         var.db = desc->d;
4821         var.s = desc->s;
4822         var.l = desc->l;
4823         var.g = desc->g;
4824         var.avl = desc->avl;
4825         var.present = desc->p;
4826         var.unusable = !var.present;
4827         var.padding = 0;
4828
4829         kvm_set_segment(vcpu, &var, seg);
4830         return;
4831 }
4832
4833 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
4834                             u32 msr_index, u64 *pdata)
4835 {
4836         struct msr_data msr;
4837         int r;
4838
4839         msr.index = msr_index;
4840         msr.host_initiated = false;
4841         r = kvm_get_msr(emul_to_vcpu(ctxt), &msr);
4842         if (r)
4843                 return r;
4844
4845         *pdata = msr.data;
4846         return 0;
4847 }
4848
4849 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
4850                             u32 msr_index, u64 data)
4851 {
4852         struct msr_data msr;
4853
4854         msr.data = data;
4855         msr.index = msr_index;
4856         msr.host_initiated = false;
4857         return kvm_set_msr(emul_to_vcpu(ctxt), &msr);
4858 }
4859
4860 static u64 emulator_get_smbase(struct x86_emulate_ctxt *ctxt)
4861 {
4862         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4863
4864         return vcpu->arch.smbase;
4865 }
4866
4867 static void emulator_set_smbase(struct x86_emulate_ctxt *ctxt, u64 smbase)
4868 {
4869         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4870
4871         vcpu->arch.smbase = smbase;
4872 }
4873
4874 static int emulator_check_pmc(struct x86_emulate_ctxt *ctxt,
4875                               u32 pmc)
4876 {
4877         return kvm_pmu_is_valid_msr_idx(emul_to_vcpu(ctxt), pmc);
4878 }
4879
4880 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
4881                              u32 pmc, u64 *pdata)
4882 {
4883         return kvm_pmu_rdpmc(emul_to_vcpu(ctxt), pmc, pdata);
4884 }
4885
4886 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
4887 {
4888         emul_to_vcpu(ctxt)->arch.halt_request = 1;
4889 }
4890
4891 static void emulator_get_fpu(struct x86_emulate_ctxt *ctxt)
4892 {
4893         preempt_disable();
4894         kvm_load_guest_fpu(emul_to_vcpu(ctxt));
4895         /*
4896          * CR0.TS may reference the host fpu state, not the guest fpu state,
4897          * so it may be clear at this point.
4898          */
4899         clts();
4900 }
4901
4902 static void emulator_put_fpu(struct x86_emulate_ctxt *ctxt)
4903 {
4904         preempt_enable();
4905 }
4906
4907 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
4908                               struct x86_instruction_info *info,
4909                               enum x86_intercept_stage stage)
4910 {
4911         return kvm_x86_ops->check_intercept(emul_to_vcpu(ctxt), info, stage);
4912 }
4913
4914 static void emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
4915                                u32 *eax, u32 *ebx, u32 *ecx, u32 *edx)
4916 {
4917         kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx);
4918 }
4919
4920 static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
4921 {
4922         return kvm_register_read(emul_to_vcpu(ctxt), reg);
4923 }
4924
4925 static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
4926 {
4927         kvm_register_write(emul_to_vcpu(ctxt), reg, val);
4928 }
4929
4930 static void emulator_set_nmi_mask(struct x86_emulate_ctxt *ctxt, bool masked)
4931 {
4932         kvm_x86_ops->set_nmi_mask(emul_to_vcpu(ctxt), masked);
4933 }
4934
4935 static const struct x86_emulate_ops emulate_ops = {
4936         .read_gpr            = emulator_read_gpr,
4937         .write_gpr           = emulator_write_gpr,
4938         .read_std            = kvm_read_guest_virt_system,
4939         .write_std           = kvm_write_guest_virt_system,
4940         .read_phys           = kvm_read_guest_phys_system,
4941         .fetch               = kvm_fetch_guest_virt,
4942         .read_emulated       = emulator_read_emulated,
4943         .write_emulated      = emulator_write_emulated,
4944         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
4945         .invlpg              = emulator_invlpg,
4946         .pio_in_emulated     = emulator_pio_in_emulated,
4947         .pio_out_emulated    = emulator_pio_out_emulated,
4948         .get_segment         = emulator_get_segment,
4949         .set_segment         = emulator_set_segment,
4950         .get_cached_segment_base = emulator_get_cached_segment_base,
4951         .get_gdt             = emulator_get_gdt,
4952         .get_idt             = emulator_get_idt,
4953         .set_gdt             = emulator_set_gdt,
4954         .set_idt             = emulator_set_idt,
4955         .get_cr              = emulator_get_cr,
4956         .set_cr              = emulator_set_cr,
4957         .cpl                 = emulator_get_cpl,
4958         .get_dr              = emulator_get_dr,
4959         .set_dr              = emulator_set_dr,
4960         .get_smbase          = emulator_get_smbase,
4961         .set_smbase          = emulator_set_smbase,
4962         .set_msr             = emulator_set_msr,
4963         .get_msr             = emulator_get_msr,
4964         .check_pmc           = emulator_check_pmc,
4965         .read_pmc            = emulator_read_pmc,
4966         .halt                = emulator_halt,
4967         .wbinvd              = emulator_wbinvd,
4968         .fix_hypercall       = emulator_fix_hypercall,
4969         .get_fpu             = emulator_get_fpu,
4970         .put_fpu             = emulator_put_fpu,
4971         .intercept           = emulator_intercept,
4972         .get_cpuid           = emulator_get_cpuid,
4973         .set_nmi_mask        = emulator_set_nmi_mask,
4974 };
4975
4976 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
4977 {
4978         u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
4979         /*
4980          * an sti; sti; sequence only disable interrupts for the first
4981          * instruction. So, if the last instruction, be it emulated or
4982          * not, left the system with the INT_STI flag enabled, it
4983          * means that the last instruction is an sti. We should not
4984          * leave the flag on in this case. The same goes for mov ss
4985          */
4986         if (int_shadow & mask)
4987                 mask = 0;
4988         if (unlikely(int_shadow || mask)) {
4989                 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
4990                 if (!mask)
4991                         kvm_make_request(KVM_REQ_EVENT, vcpu);
4992         }
4993 }
4994
4995 static bool inject_emulated_exception(struct kvm_vcpu *vcpu)
4996 {
4997         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4998         if (ctxt->exception.vector == PF_VECTOR)
4999                 return kvm_propagate_fault(vcpu, &ctxt->exception);
5000
5001         if (ctxt->exception.error_code_valid)
5002                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
5003                                       ctxt->exception.error_code);
5004         else
5005                 kvm_queue_exception(vcpu, ctxt->exception.vector);
5006         return false;
5007 }
5008
5009 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
5010 {
5011         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5012         int cs_db, cs_l;
5013
5014         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
5015
5016         ctxt->eflags = kvm_get_rflags(vcpu);
5017         ctxt->eip = kvm_rip_read(vcpu);
5018         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
5019                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
5020                      (cs_l && is_long_mode(vcpu))       ? X86EMUL_MODE_PROT64 :
5021                      cs_db                              ? X86EMUL_MODE_PROT32 :
5022                                                           X86EMUL_MODE_PROT16;
5023         BUILD_BUG_ON(HF_GUEST_MASK != X86EMUL_GUEST_MASK);
5024         BUILD_BUG_ON(HF_SMM_MASK != X86EMUL_SMM_MASK);
5025         BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK != X86EMUL_SMM_INSIDE_NMI_MASK);
5026         ctxt->emul_flags = vcpu->arch.hflags;
5027
5028         init_decode_cache(ctxt);
5029         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
5030 }
5031
5032 int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
5033 {
5034         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5035         int ret;
5036
5037         init_emulate_ctxt(vcpu);
5038
5039         ctxt->op_bytes = 2;
5040         ctxt->ad_bytes = 2;
5041         ctxt->_eip = ctxt->eip + inc_eip;
5042         ret = emulate_int_real(ctxt, irq);
5043
5044         if (ret != X86EMUL_CONTINUE)
5045                 return EMULATE_FAIL;
5046
5047         ctxt->eip = ctxt->_eip;
5048         kvm_rip_write(vcpu, ctxt->eip);
5049         kvm_set_rflags(vcpu, ctxt->eflags);
5050
5051         if (irq == NMI_VECTOR)
5052                 vcpu->arch.nmi_pending = 0;
5053         else
5054                 vcpu->arch.interrupt.pending = false;
5055
5056         return EMULATE_DONE;
5057 }
5058 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
5059
5060 static int handle_emulation_failure(struct kvm_vcpu *vcpu)
5061 {
5062         int r = EMULATE_DONE;
5063
5064         ++vcpu->stat.insn_emulation_fail;
5065         trace_kvm_emulate_insn_failed(vcpu);
5066         if (!is_guest_mode(vcpu) && kvm_x86_ops->get_cpl(vcpu) == 0) {
5067                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
5068                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
5069                 vcpu->run->internal.ndata = 0;
5070                 r = EMULATE_FAIL;
5071         }
5072         kvm_queue_exception(vcpu, UD_VECTOR);
5073
5074         return r;
5075 }
5076
5077 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t cr2,
5078                                   bool write_fault_to_shadow_pgtable,
5079                                   int emulation_type)
5080 {
5081         gpa_t gpa = cr2;
5082         pfn_t pfn;
5083
5084         if (emulation_type & EMULTYPE_NO_REEXECUTE)
5085                 return false;
5086
5087         if (!vcpu->arch.mmu.direct_map) {
5088                 /*
5089                  * Write permission should be allowed since only
5090                  * write access need to be emulated.
5091                  */
5092                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
5093
5094                 /*
5095                  * If the mapping is invalid in guest, let cpu retry
5096                  * it to generate fault.
5097                  */
5098                 if (gpa == UNMAPPED_GVA)
5099                         return true;
5100         }
5101
5102         /*
5103          * Do not retry the unhandleable instruction if it faults on the
5104          * readonly host memory, otherwise it will goto a infinite loop:
5105          * retry instruction -> write #PF -> emulation fail -> retry
5106          * instruction -> ...
5107          */
5108         pfn = gfn_to_pfn(vcpu->kvm, gpa_to_gfn(gpa));
5109
5110         /*
5111          * If the instruction failed on the error pfn, it can not be fixed,
5112          * report the error to userspace.
5113          */
5114         if (is_error_noslot_pfn(pfn))
5115                 return false;
5116
5117         kvm_release_pfn_clean(pfn);
5118
5119         /* The instructions are well-emulated on direct mmu. */
5120         if (vcpu->arch.mmu.direct_map) {
5121                 unsigned int indirect_shadow_pages;
5122
5123                 spin_lock(&vcpu->kvm->mmu_lock);
5124                 indirect_shadow_pages = vcpu->kvm->arch.indirect_shadow_pages;
5125                 spin_unlock(&vcpu->kvm->mmu_lock);
5126
5127                 if (indirect_shadow_pages)
5128                         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5129
5130                 return true;
5131         }
5132
5133         /*
5134          * if emulation was due to access to shadowed page table
5135          * and it failed try to unshadow page and re-enter the
5136          * guest to let CPU execute the instruction.
5137          */
5138         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5139
5140         /*
5141          * If the access faults on its page table, it can not
5142          * be fixed by unprotecting shadow page and it should
5143          * be reported to userspace.
5144          */
5145         return !write_fault_to_shadow_pgtable;
5146 }
5147
5148 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
5149                               unsigned long cr2,  int emulation_type)
5150 {
5151         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5152         unsigned long last_retry_eip, last_retry_addr, gpa = cr2;
5153
5154         last_retry_eip = vcpu->arch.last_retry_eip;
5155         last_retry_addr = vcpu->arch.last_retry_addr;
5156
5157         /*
5158          * If the emulation is caused by #PF and it is non-page_table
5159          * writing instruction, it means the VM-EXIT is caused by shadow
5160          * page protected, we can zap the shadow page and retry this
5161          * instruction directly.
5162          *
5163          * Note: if the guest uses a non-page-table modifying instruction
5164          * on the PDE that points to the instruction, then we will unmap
5165          * the instruction and go to an infinite loop. So, we cache the
5166          * last retried eip and the last fault address, if we meet the eip
5167          * and the address again, we can break out of the potential infinite
5168          * loop.
5169          */
5170         vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
5171
5172         if (!(emulation_type & EMULTYPE_RETRY))
5173                 return false;
5174
5175         if (x86_page_table_writing_insn(ctxt))
5176                 return false;
5177
5178         if (ctxt->eip == last_retry_eip && last_retry_addr == cr2)
5179                 return false;
5180
5181         vcpu->arch.last_retry_eip = ctxt->eip;
5182         vcpu->arch.last_retry_addr = cr2;
5183
5184         if (!vcpu->arch.mmu.direct_map)
5185                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
5186
5187         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5188
5189         return true;
5190 }
5191
5192 static int complete_emulated_mmio(struct kvm_vcpu *vcpu);
5193 static int complete_emulated_pio(struct kvm_vcpu *vcpu);
5194
5195 static void kvm_smm_changed(struct kvm_vcpu *vcpu)
5196 {
5197         if (!(vcpu->arch.hflags & HF_SMM_MASK)) {
5198                 /* This is a good place to trace that we are exiting SMM.  */
5199                 trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, false);
5200
5201                 if (unlikely(vcpu->arch.smi_pending)) {
5202                         kvm_make_request(KVM_REQ_SMI, vcpu);
5203                         vcpu->arch.smi_pending = 0;
5204                 } else {
5205                         /* Process a latched INIT, if any.  */
5206                         kvm_make_request(KVM_REQ_EVENT, vcpu);
5207                 }
5208         }
5209
5210         kvm_mmu_reset_context(vcpu);
5211 }
5212
5213 static void kvm_set_hflags(struct kvm_vcpu *vcpu, unsigned emul_flags)
5214 {
5215         unsigned changed = vcpu->arch.hflags ^ emul_flags;
5216
5217         vcpu->arch.hflags = emul_flags;
5218
5219         if (changed & HF_SMM_MASK)
5220                 kvm_smm_changed(vcpu);
5221 }
5222
5223 static int kvm_vcpu_check_hw_bp(unsigned long addr, u32 type, u32 dr7,
5224                                 unsigned long *db)
5225 {
5226         u32 dr6 = 0;
5227         int i;
5228         u32 enable, rwlen;
5229
5230         enable = dr7;
5231         rwlen = dr7 >> 16;
5232         for (i = 0; i < 4; i++, enable >>= 2, rwlen >>= 4)
5233                 if ((enable & 3) && (rwlen & 15) == type && db[i] == addr)
5234                         dr6 |= (1 << i);
5235         return dr6;
5236 }
5237
5238 static void kvm_vcpu_check_singlestep(struct kvm_vcpu *vcpu, unsigned long rflags, int *r)
5239 {
5240         struct kvm_run *kvm_run = vcpu->run;
5241
5242         /*
5243          * rflags is the old, "raw" value of the flags.  The new value has
5244          * not been saved yet.
5245          *
5246          * This is correct even for TF set by the guest, because "the
5247          * processor will not generate this exception after the instruction
5248          * that sets the TF flag".
5249          */
5250         if (unlikely(rflags & X86_EFLAGS_TF)) {
5251                 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
5252                         kvm_run->debug.arch.dr6 = DR6_BS | DR6_FIXED_1 |
5253                                                   DR6_RTM;
5254                         kvm_run->debug.arch.pc = vcpu->arch.singlestep_rip;
5255                         kvm_run->debug.arch.exception = DB_VECTOR;
5256                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
5257                         *r = EMULATE_USER_EXIT;
5258                 } else {
5259                         vcpu->arch.emulate_ctxt.eflags &= ~X86_EFLAGS_TF;
5260                         /*
5261                          * "Certain debug exceptions may clear bit 0-3.  The
5262                          * remaining contents of the DR6 register are never
5263                          * cleared by the processor".
5264                          */
5265                         vcpu->arch.dr6 &= ~15;
5266                         vcpu->arch.dr6 |= DR6_BS | DR6_RTM;
5267                         kvm_queue_exception(vcpu, DB_VECTOR);
5268                 }
5269         }
5270 }
5271
5272 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu *vcpu, int *r)
5273 {
5274         if (unlikely(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) &&
5275             (vcpu->arch.guest_debug_dr7 & DR7_BP_EN_MASK)) {
5276                 struct kvm_run *kvm_run = vcpu->run;
5277                 unsigned long eip = kvm_get_linear_rip(vcpu);
5278                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
5279                                            vcpu->arch.guest_debug_dr7,
5280                                            vcpu->arch.eff_db);
5281
5282                 if (dr6 != 0) {
5283                         kvm_run->debug.arch.dr6 = dr6 | DR6_FIXED_1 | DR6_RTM;
5284                         kvm_run->debug.arch.pc = eip;
5285                         kvm_run->debug.arch.exception = DB_VECTOR;
5286                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
5287                         *r = EMULATE_USER_EXIT;
5288                         return true;
5289                 }
5290         }
5291
5292         if (unlikely(vcpu->arch.dr7 & DR7_BP_EN_MASK) &&
5293             !(kvm_get_rflags(vcpu) & X86_EFLAGS_RF)) {
5294                 unsigned long eip = kvm_get_linear_rip(vcpu);
5295                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
5296                                            vcpu->arch.dr7,
5297                                            vcpu->arch.db);
5298
5299                 if (dr6 != 0) {
5300                         vcpu->arch.dr6 &= ~15;
5301                         vcpu->arch.dr6 |= dr6 | DR6_RTM;
5302                         kvm_queue_exception(vcpu, DB_VECTOR);
5303                         *r = EMULATE_DONE;
5304                         return true;
5305                 }
5306         }
5307
5308         return false;
5309 }
5310
5311 int x86_emulate_instruction(struct kvm_vcpu *vcpu,
5312                             unsigned long cr2,
5313                             int emulation_type,
5314                             void *insn,
5315                             int insn_len)
5316 {
5317         int r;
5318         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5319         bool writeback = true;
5320         bool write_fault_to_spt = vcpu->arch.write_fault_to_shadow_pgtable;
5321
5322         /*
5323          * Clear write_fault_to_shadow_pgtable here to ensure it is
5324          * never reused.
5325          */
5326         vcpu->arch.write_fault_to_shadow_pgtable = false;
5327         kvm_clear_exception_queue(vcpu);
5328
5329         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
5330                 init_emulate_ctxt(vcpu);
5331
5332                 /*
5333                  * We will reenter on the same instruction since
5334                  * we do not set complete_userspace_io.  This does not
5335                  * handle watchpoints yet, those would be handled in
5336                  * the emulate_ops.
5337                  */
5338                 if (kvm_vcpu_check_breakpoint(vcpu, &r))
5339                         return r;
5340
5341                 ctxt->interruptibility = 0;
5342                 ctxt->have_exception = false;
5343                 ctxt->exception.vector = -1;
5344                 ctxt->perm_ok = false;
5345
5346                 ctxt->ud = emulation_type & EMULTYPE_TRAP_UD;
5347
5348                 r = x86_decode_insn(ctxt, insn, insn_len);
5349
5350                 trace_kvm_emulate_insn_start(vcpu);
5351                 ++vcpu->stat.insn_emulation;
5352                 if (r != EMULATION_OK)  {
5353                         if (emulation_type & EMULTYPE_TRAP_UD)
5354                                 return EMULATE_FAIL;
5355                         if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
5356                                                 emulation_type))
5357                                 return EMULATE_DONE;
5358                         if (emulation_type & EMULTYPE_SKIP)
5359                                 return EMULATE_FAIL;
5360                         return handle_emulation_failure(vcpu);
5361                 }
5362         }
5363
5364         if (emulation_type & EMULTYPE_SKIP) {
5365                 kvm_rip_write(vcpu, ctxt->_eip);
5366                 if (ctxt->eflags & X86_EFLAGS_RF)
5367                         kvm_set_rflags(vcpu, ctxt->eflags & ~X86_EFLAGS_RF);
5368                 return EMULATE_DONE;
5369         }
5370
5371         if (retry_instruction(ctxt, cr2, emulation_type))
5372                 return EMULATE_DONE;
5373
5374         /* this is needed for vmware backdoor interface to work since it
5375            changes registers values  during IO operation */
5376         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
5377                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
5378                 emulator_invalidate_register_cache(ctxt);
5379         }
5380
5381 restart:
5382         r = x86_emulate_insn(ctxt);
5383
5384         if (r == EMULATION_INTERCEPTED)
5385                 return EMULATE_DONE;
5386
5387         if (r == EMULATION_FAILED) {
5388                 if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
5389                                         emulation_type))
5390                         return EMULATE_DONE;
5391
5392                 return handle_emulation_failure(vcpu);
5393         }
5394
5395         if (ctxt->have_exception) {
5396                 r = EMULATE_DONE;
5397                 if (inject_emulated_exception(vcpu))
5398                         return r;
5399         } else if (vcpu->arch.pio.count) {
5400                 if (!vcpu->arch.pio.in) {
5401                         /* FIXME: return into emulator if single-stepping.  */
5402                         vcpu->arch.pio.count = 0;
5403                 } else {
5404                         writeback = false;
5405                         vcpu->arch.complete_userspace_io = complete_emulated_pio;
5406                 }
5407                 r = EMULATE_USER_EXIT;
5408         } else if (vcpu->mmio_needed) {
5409                 if (!vcpu->mmio_is_write)
5410                         writeback = false;
5411                 r = EMULATE_USER_EXIT;
5412                 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
5413         } else if (r == EMULATION_RESTART)
5414                 goto restart;
5415         else
5416                 r = EMULATE_DONE;
5417
5418         if (writeback) {
5419                 unsigned long rflags = kvm_x86_ops->get_rflags(vcpu);
5420                 toggle_interruptibility(vcpu, ctxt->interruptibility);
5421                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
5422                 if (vcpu->arch.hflags != ctxt->emul_flags)
5423                         kvm_set_hflags(vcpu, ctxt->emul_flags);
5424                 kvm_rip_write(vcpu, ctxt->eip);
5425                 if (r == EMULATE_DONE)
5426                         kvm_vcpu_check_singlestep(vcpu, rflags, &r);
5427                 if (!ctxt->have_exception ||
5428                     exception_type(ctxt->exception.vector) == EXCPT_TRAP)
5429                         __kvm_set_rflags(vcpu, ctxt->eflags);
5430
5431                 /*
5432                  * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
5433                  * do nothing, and it will be requested again as soon as
5434                  * the shadow expires.  But we still need to check here,
5435                  * because POPF has no interrupt shadow.
5436                  */
5437                 if (unlikely((ctxt->eflags & ~rflags) & X86_EFLAGS_IF))
5438                         kvm_make_request(KVM_REQ_EVENT, vcpu);
5439         } else
5440                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
5441
5442         return r;
5443 }
5444 EXPORT_SYMBOL_GPL(x86_emulate_instruction);
5445
5446 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port)
5447 {
5448         unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
5449         int ret = emulator_pio_out_emulated(&vcpu->arch.emulate_ctxt,
5450                                             size, port, &val, 1);
5451         /* do not return to emulator after return from userspace */
5452         vcpu->arch.pio.count = 0;
5453         return ret;
5454 }
5455 EXPORT_SYMBOL_GPL(kvm_fast_pio_out);
5456
5457 static void tsc_bad(void *info)
5458 {
5459         __this_cpu_write(cpu_tsc_khz, 0);
5460 }
5461
5462 static void tsc_khz_changed(void *data)
5463 {
5464         struct cpufreq_freqs *freq = data;
5465         unsigned long khz = 0;
5466
5467         if (data)
5468                 khz = freq->new;
5469         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
5470                 khz = cpufreq_quick_get(raw_smp_processor_id());
5471         if (!khz)
5472                 khz = tsc_khz;
5473         __this_cpu_write(cpu_tsc_khz, khz);
5474 }
5475
5476 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
5477                                      void *data)
5478 {
5479         struct cpufreq_freqs *freq = data;
5480         struct kvm *kvm;
5481         struct kvm_vcpu *vcpu;
5482         int i, send_ipi = 0;
5483
5484         /*
5485          * We allow guests to temporarily run on slowing clocks,
5486          * provided we notify them after, or to run on accelerating
5487          * clocks, provided we notify them before.  Thus time never
5488          * goes backwards.
5489          *
5490          * However, we have a problem.  We can't atomically update
5491          * the frequency of a given CPU from this function; it is
5492          * merely a notifier, which can be called from any CPU.
5493          * Changing the TSC frequency at arbitrary points in time
5494          * requires a recomputation of local variables related to
5495          * the TSC for each VCPU.  We must flag these local variables
5496          * to be updated and be sure the update takes place with the
5497          * new frequency before any guests proceed.
5498          *
5499          * Unfortunately, the combination of hotplug CPU and frequency
5500          * change creates an intractable locking scenario; the order
5501          * of when these callouts happen is undefined with respect to
5502          * CPU hotplug, and they can race with each other.  As such,
5503          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
5504          * undefined; you can actually have a CPU frequency change take
5505          * place in between the computation of X and the setting of the
5506          * variable.  To protect against this problem, all updates of
5507          * the per_cpu tsc_khz variable are done in an interrupt
5508          * protected IPI, and all callers wishing to update the value
5509          * must wait for a synchronous IPI to complete (which is trivial
5510          * if the caller is on the CPU already).  This establishes the
5511          * necessary total order on variable updates.
5512          *
5513          * Note that because a guest time update may take place
5514          * anytime after the setting of the VCPU's request bit, the
5515          * correct TSC value must be set before the request.  However,
5516          * to ensure the update actually makes it to any guest which
5517          * starts running in hardware virtualization between the set
5518          * and the acquisition of the spinlock, we must also ping the
5519          * CPU after setting the request bit.
5520          *
5521          */
5522
5523         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
5524                 return 0;
5525         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
5526                 return 0;
5527
5528         smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5529
5530         spin_lock(&kvm_lock);
5531         list_for_each_entry(kvm, &vm_list, vm_list) {
5532                 kvm_for_each_vcpu(i, vcpu, kvm) {
5533                         if (vcpu->cpu != freq->cpu)
5534                                 continue;
5535                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
5536                         if (vcpu->cpu != smp_processor_id())
5537                                 send_ipi = 1;
5538                 }
5539         }
5540         spin_unlock(&kvm_lock);
5541
5542         if (freq->old < freq->new && send_ipi) {
5543                 /*
5544                  * We upscale the frequency.  Must make the guest
5545                  * doesn't see old kvmclock values while running with
5546                  * the new frequency, otherwise we risk the guest sees
5547                  * time go backwards.
5548                  *
5549                  * In case we update the frequency for another cpu
5550                  * (which might be in guest context) send an interrupt
5551                  * to kick the cpu out of guest context.  Next time
5552                  * guest context is entered kvmclock will be updated,
5553                  * so the guest will not see stale values.
5554                  */
5555                 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5556         }
5557         return 0;
5558 }
5559
5560 static struct notifier_block kvmclock_cpufreq_notifier_block = {
5561         .notifier_call  = kvmclock_cpufreq_notifier
5562 };
5563
5564 static int kvmclock_cpu_notifier(struct notifier_block *nfb,
5565                                         unsigned long action, void *hcpu)
5566 {
5567         unsigned int cpu = (unsigned long)hcpu;
5568
5569         switch (action) {
5570                 case CPU_ONLINE:
5571                 case CPU_DOWN_FAILED:
5572                         smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
5573                         break;
5574                 case CPU_DOWN_PREPARE:
5575                         smp_call_function_single(cpu, tsc_bad, NULL, 1);
5576                         break;
5577         }
5578         return NOTIFY_OK;
5579 }
5580
5581 static struct notifier_block kvmclock_cpu_notifier_block = {
5582         .notifier_call  = kvmclock_cpu_notifier,
5583         .priority = -INT_MAX
5584 };
5585
5586 static void kvm_timer_init(void)
5587 {
5588         int cpu;
5589
5590         max_tsc_khz = tsc_khz;
5591
5592         cpu_notifier_register_begin();
5593         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
5594 #ifdef CONFIG_CPU_FREQ
5595                 struct cpufreq_policy policy;
5596                 memset(&policy, 0, sizeof(policy));
5597                 cpu = get_cpu();
5598                 cpufreq_get_policy(&policy, cpu);
5599                 if (policy.cpuinfo.max_freq)
5600                         max_tsc_khz = policy.cpuinfo.max_freq;
5601                 put_cpu();
5602 #endif
5603                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
5604                                           CPUFREQ_TRANSITION_NOTIFIER);
5605         }
5606         pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz);
5607         for_each_online_cpu(cpu)
5608                 smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
5609
5610         __register_hotcpu_notifier(&kvmclock_cpu_notifier_block);
5611         cpu_notifier_register_done();
5612
5613 }
5614
5615 static DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
5616
5617 int kvm_is_in_guest(void)
5618 {
5619         return __this_cpu_read(current_vcpu) != NULL;
5620 }
5621
5622 static int kvm_is_user_mode(void)
5623 {
5624         int user_mode = 3;
5625
5626         if (__this_cpu_read(current_vcpu))
5627                 user_mode = kvm_x86_ops->get_cpl(__this_cpu_read(current_vcpu));
5628
5629         return user_mode != 0;
5630 }
5631
5632 static unsigned long kvm_get_guest_ip(void)
5633 {
5634         unsigned long ip = 0;
5635
5636         if (__this_cpu_read(current_vcpu))
5637                 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
5638
5639         return ip;
5640 }
5641
5642 static struct perf_guest_info_callbacks kvm_guest_cbs = {
5643         .is_in_guest            = kvm_is_in_guest,
5644         .is_user_mode           = kvm_is_user_mode,
5645         .get_guest_ip           = kvm_get_guest_ip,
5646 };
5647
5648 void kvm_before_handle_nmi(struct kvm_vcpu *vcpu)
5649 {
5650         __this_cpu_write(current_vcpu, vcpu);
5651 }
5652 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi);
5653
5654 void kvm_after_handle_nmi(struct kvm_vcpu *vcpu)
5655 {
5656         __this_cpu_write(current_vcpu, NULL);
5657 }
5658 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi);
5659
5660 static void kvm_set_mmio_spte_mask(void)
5661 {
5662         u64 mask;
5663         int maxphyaddr = boot_cpu_data.x86_phys_bits;
5664
5665         /*
5666          * Set the reserved bits and the present bit of an paging-structure
5667          * entry to generate page fault with PFER.RSV = 1.
5668          */
5669          /* Mask the reserved physical address bits. */
5670         mask = rsvd_bits(maxphyaddr, 51);
5671
5672         /* Bit 62 is always reserved for 32bit host. */
5673         mask |= 0x3ull << 62;
5674
5675         /* Set the present bit. */
5676         mask |= 1ull;
5677
5678 #ifdef CONFIG_X86_64
5679         /*
5680          * If reserved bit is not supported, clear the present bit to disable
5681          * mmio page fault.
5682          */
5683         if (maxphyaddr == 52)
5684                 mask &= ~1ull;
5685 #endif
5686
5687         kvm_mmu_set_mmio_spte_mask(mask);
5688 }
5689
5690 #ifdef CONFIG_X86_64
5691 static void pvclock_gtod_update_fn(struct work_struct *work)
5692 {
5693         struct kvm *kvm;
5694
5695         struct kvm_vcpu *vcpu;
5696         int i;
5697
5698         spin_lock(&kvm_lock);
5699         list_for_each_entry(kvm, &vm_list, vm_list)
5700                 kvm_for_each_vcpu(i, vcpu, kvm)
5701                         kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
5702         atomic_set(&kvm_guest_has_master_clock, 0);
5703         spin_unlock(&kvm_lock);
5704 }
5705
5706 static DECLARE_WORK(pvclock_gtod_work, pvclock_gtod_update_fn);
5707
5708 /*
5709  * Notification about pvclock gtod data update.
5710  */
5711 static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused,
5712                                void *priv)
5713 {
5714         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
5715         struct timekeeper *tk = priv;
5716
5717         update_pvclock_gtod(tk);
5718
5719         /* disable master clock if host does not trust, or does not
5720          * use, TSC clocksource
5721          */
5722         if (gtod->clock.vclock_mode != VCLOCK_TSC &&
5723             atomic_read(&kvm_guest_has_master_clock) != 0)
5724                 queue_work(system_long_wq, &pvclock_gtod_work);
5725
5726         return 0;
5727 }
5728
5729 static struct notifier_block pvclock_gtod_notifier = {
5730         .notifier_call = pvclock_gtod_notify,
5731 };
5732 #endif
5733
5734 int kvm_arch_init(void *opaque)
5735 {
5736         int r;
5737         struct kvm_x86_ops *ops = opaque;
5738
5739         if (kvm_x86_ops) {
5740                 printk(KERN_ERR "kvm: already loaded the other module\n");
5741                 r = -EEXIST;
5742                 goto out;
5743         }
5744
5745         if (!ops->cpu_has_kvm_support()) {
5746                 printk(KERN_ERR "kvm: no hardware support\n");
5747                 r = -EOPNOTSUPP;
5748                 goto out;
5749         }
5750         if (ops->disabled_by_bios()) {
5751                 printk(KERN_ERR "kvm: disabled by bios\n");
5752                 r = -EOPNOTSUPP;
5753                 goto out;
5754         }
5755
5756         r = -ENOMEM;
5757         shared_msrs = alloc_percpu(struct kvm_shared_msrs);
5758         if (!shared_msrs) {
5759                 printk(KERN_ERR "kvm: failed to allocate percpu kvm_shared_msrs\n");
5760                 goto out;
5761         }
5762
5763         r = kvm_mmu_module_init();
5764         if (r)
5765                 goto out_free_percpu;
5766
5767         kvm_set_mmio_spte_mask();
5768
5769         kvm_x86_ops = ops;
5770
5771         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
5772                         PT_DIRTY_MASK, PT64_NX_MASK, 0);
5773
5774         kvm_timer_init();
5775
5776         perf_register_guest_info_callbacks(&kvm_guest_cbs);
5777
5778         if (cpu_has_xsave)
5779                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
5780
5781         kvm_lapic_init();
5782 #ifdef CONFIG_X86_64
5783         pvclock_gtod_register_notifier(&pvclock_gtod_notifier);
5784 #endif
5785
5786         return 0;
5787
5788 out_free_percpu:
5789         free_percpu(shared_msrs);
5790 out:
5791         return r;
5792 }
5793
5794 void kvm_arch_exit(void)
5795 {
5796         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
5797
5798         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
5799                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
5800                                             CPUFREQ_TRANSITION_NOTIFIER);
5801         unregister_hotcpu_notifier(&kvmclock_cpu_notifier_block);
5802 #ifdef CONFIG_X86_64
5803         pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier);
5804 #endif
5805         kvm_x86_ops = NULL;
5806         kvm_mmu_module_exit();
5807         free_percpu(shared_msrs);
5808 }
5809
5810 int kvm_vcpu_halt(struct kvm_vcpu *vcpu)
5811 {
5812         ++vcpu->stat.halt_exits;
5813         if (lapic_in_kernel(vcpu)) {
5814                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
5815                 return 1;
5816         } else {
5817                 vcpu->run->exit_reason = KVM_EXIT_HLT;
5818                 return 0;
5819         }
5820 }
5821 EXPORT_SYMBOL_GPL(kvm_vcpu_halt);
5822
5823 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
5824 {
5825         kvm_x86_ops->skip_emulated_instruction(vcpu);
5826         return kvm_vcpu_halt(vcpu);
5827 }
5828 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
5829
5830 /*
5831  * kvm_pv_kick_cpu_op:  Kick a vcpu.
5832  *
5833  * @apicid - apicid of vcpu to be kicked.
5834  */
5835 static void kvm_pv_kick_cpu_op(struct kvm *kvm, unsigned long flags, int apicid)
5836 {
5837         struct kvm_lapic_irq lapic_irq;
5838
5839         lapic_irq.shorthand = 0;
5840         lapic_irq.dest_mode = 0;
5841         lapic_irq.dest_id = apicid;
5842         lapic_irq.msi_redir_hint = false;
5843
5844         lapic_irq.delivery_mode = APIC_DM_REMRD;
5845         kvm_irq_delivery_to_apic(kvm, NULL, &lapic_irq, NULL);
5846 }
5847
5848 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
5849 {
5850         unsigned long nr, a0, a1, a2, a3, ret;
5851         int op_64_bit, r = 1;
5852
5853         kvm_x86_ops->skip_emulated_instruction(vcpu);
5854
5855         if (kvm_hv_hypercall_enabled(vcpu->kvm))
5856                 return kvm_hv_hypercall(vcpu);
5857
5858         nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
5859         a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
5860         a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
5861         a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
5862         a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
5863
5864         trace_kvm_hypercall(nr, a0, a1, a2, a3);
5865
5866         op_64_bit = is_64_bit_mode(vcpu);
5867         if (!op_64_bit) {
5868                 nr &= 0xFFFFFFFF;
5869                 a0 &= 0xFFFFFFFF;
5870                 a1 &= 0xFFFFFFFF;
5871                 a2 &= 0xFFFFFFFF;
5872                 a3 &= 0xFFFFFFFF;
5873         }
5874
5875         if (kvm_x86_ops->get_cpl(vcpu) != 0) {
5876                 ret = -KVM_EPERM;
5877                 goto out;
5878         }
5879
5880         switch (nr) {
5881         case KVM_HC_VAPIC_POLL_IRQ:
5882                 ret = 0;
5883                 break;
5884         case KVM_HC_KICK_CPU:
5885                 kvm_pv_kick_cpu_op(vcpu->kvm, a0, a1);
5886                 ret = 0;
5887                 break;
5888         default:
5889                 ret = -KVM_ENOSYS;
5890                 break;
5891         }
5892 out:
5893         if (!op_64_bit)
5894                 ret = (u32)ret;
5895         kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
5896         ++vcpu->stat.hypercalls;
5897         return r;
5898 }
5899 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
5900
5901 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
5902 {
5903         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5904         char instruction[3];
5905         unsigned long rip = kvm_rip_read(vcpu);
5906
5907         kvm_x86_ops->patch_hypercall(vcpu, instruction);
5908
5909         return emulator_write_emulated(ctxt, rip, instruction, 3, NULL);
5910 }
5911
5912 /*
5913  * Check if userspace requested an interrupt window, and that the
5914  * interrupt window is open.
5915  *
5916  * No need to exit to userspace if we already have an interrupt queued.
5917  */
5918 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
5919 {
5920         if (!vcpu->run->request_interrupt_window || pic_in_kernel(vcpu->kvm))
5921                 return false;
5922
5923         if (kvm_cpu_has_interrupt(vcpu))
5924                 return false;
5925
5926         return (irqchip_split(vcpu->kvm)
5927                 ? kvm_apic_accept_pic_intr(vcpu)
5928                 : kvm_arch_interrupt_allowed(vcpu));
5929 }
5930
5931 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
5932 {
5933         struct kvm_run *kvm_run = vcpu->run;
5934
5935         kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
5936         kvm_run->flags = is_smm(vcpu) ? KVM_RUN_X86_SMM : 0;
5937         kvm_run->cr8 = kvm_get_cr8(vcpu);
5938         kvm_run->apic_base = kvm_get_apic_base(vcpu);
5939         if (!irqchip_in_kernel(vcpu->kvm))
5940                 kvm_run->ready_for_interrupt_injection =
5941                         kvm_arch_interrupt_allowed(vcpu) &&
5942                         !kvm_cpu_has_interrupt(vcpu) &&
5943                         !kvm_event_needs_reinjection(vcpu);
5944         else if (!pic_in_kernel(vcpu->kvm))
5945                 kvm_run->ready_for_interrupt_injection =
5946                         kvm_apic_accept_pic_intr(vcpu) &&
5947                         !kvm_cpu_has_interrupt(vcpu);
5948         else
5949                 kvm_run->ready_for_interrupt_injection = 1;
5950 }
5951
5952 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
5953 {
5954         int max_irr, tpr;
5955
5956         if (!kvm_x86_ops->update_cr8_intercept)
5957                 return;
5958
5959         if (!vcpu->arch.apic)
5960                 return;
5961
5962         if (!vcpu->arch.apic->vapic_addr)
5963                 max_irr = kvm_lapic_find_highest_irr(vcpu);
5964         else
5965                 max_irr = -1;
5966
5967         if (max_irr != -1)
5968                 max_irr >>= 4;
5969
5970         tpr = kvm_lapic_get_cr8(vcpu);
5971
5972         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
5973 }
5974
5975 static int inject_pending_event(struct kvm_vcpu *vcpu, bool req_int_win)
5976 {
5977         int r;
5978
5979         /* try to reinject previous events if any */
5980         if (vcpu->arch.exception.pending) {
5981                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
5982                                         vcpu->arch.exception.has_error_code,
5983                                         vcpu->arch.exception.error_code);
5984
5985                 if (exception_type(vcpu->arch.exception.nr) == EXCPT_FAULT)
5986                         __kvm_set_rflags(vcpu, kvm_get_rflags(vcpu) |
5987                                              X86_EFLAGS_RF);
5988
5989                 if (vcpu->arch.exception.nr == DB_VECTOR &&
5990                     (vcpu->arch.dr7 & DR7_GD)) {
5991                         vcpu->arch.dr7 &= ~DR7_GD;
5992                         kvm_update_dr7(vcpu);
5993                 }
5994
5995                 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
5996                                           vcpu->arch.exception.has_error_code,
5997                                           vcpu->arch.exception.error_code,
5998                                           vcpu->arch.exception.reinject);
5999                 return 0;
6000         }
6001
6002         if (vcpu->arch.nmi_injected) {
6003                 kvm_x86_ops->set_nmi(vcpu);
6004                 return 0;
6005         }
6006
6007         if (vcpu->arch.interrupt.pending) {
6008                 kvm_x86_ops->set_irq(vcpu);
6009                 return 0;
6010         }
6011
6012         if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
6013                 r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
6014                 if (r != 0)
6015                         return r;
6016         }
6017
6018         /* try to inject new event if pending */
6019         if (vcpu->arch.nmi_pending) {
6020                 if (kvm_x86_ops->nmi_allowed(vcpu)) {
6021                         --vcpu->arch.nmi_pending;
6022                         vcpu->arch.nmi_injected = true;
6023                         kvm_x86_ops->set_nmi(vcpu);
6024                 }
6025         } else if (kvm_cpu_has_injectable_intr(vcpu)) {
6026                 /*
6027                  * Because interrupts can be injected asynchronously, we are
6028                  * calling check_nested_events again here to avoid a race condition.
6029                  * See https://lkml.org/lkml/2014/7/2/60 for discussion about this
6030                  * proposal and current concerns.  Perhaps we should be setting
6031                  * KVM_REQ_EVENT only on certain events and not unconditionally?
6032                  */
6033                 if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
6034                         r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
6035                         if (r != 0)
6036                                 return r;
6037                 }
6038                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
6039                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
6040                                             false);
6041                         kvm_x86_ops->set_irq(vcpu);
6042                 }
6043         }
6044         return 0;
6045 }
6046
6047 static void process_nmi(struct kvm_vcpu *vcpu)
6048 {
6049         unsigned limit = 2;
6050
6051         /*
6052          * x86 is limited to one NMI running, and one NMI pending after it.
6053          * If an NMI is already in progress, limit further NMIs to just one.
6054          * Otherwise, allow two (and we'll inject the first one immediately).
6055          */
6056         if (kvm_x86_ops->get_nmi_mask(vcpu) || vcpu->arch.nmi_injected)
6057                 limit = 1;
6058
6059         vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
6060         vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
6061         kvm_make_request(KVM_REQ_EVENT, vcpu);
6062 }
6063
6064 #define put_smstate(type, buf, offset, val)                       \
6065         *(type *)((buf) + (offset) - 0x7e00) = val
6066
6067 static u32 process_smi_get_segment_flags(struct kvm_segment *seg)
6068 {
6069         u32 flags = 0;
6070         flags |= seg->g       << 23;
6071         flags |= seg->db      << 22;
6072         flags |= seg->l       << 21;
6073         flags |= seg->avl     << 20;
6074         flags |= seg->present << 15;
6075         flags |= seg->dpl     << 13;
6076         flags |= seg->s       << 12;
6077         flags |= seg->type    << 8;
6078         return flags;
6079 }
6080
6081 static void process_smi_save_seg_32(struct kvm_vcpu *vcpu, char *buf, int n)
6082 {
6083         struct kvm_segment seg;
6084         int offset;
6085
6086         kvm_get_segment(vcpu, &seg, n);
6087         put_smstate(u32, buf, 0x7fa8 + n * 4, seg.selector);
6088
6089         if (n < 3)
6090                 offset = 0x7f84 + n * 12;
6091         else
6092                 offset = 0x7f2c + (n - 3) * 12;
6093
6094         put_smstate(u32, buf, offset + 8, seg.base);
6095         put_smstate(u32, buf, offset + 4, seg.limit);
6096         put_smstate(u32, buf, offset, process_smi_get_segment_flags(&seg));
6097 }
6098
6099 #ifdef CONFIG_X86_64
6100 static void process_smi_save_seg_64(struct kvm_vcpu *vcpu, char *buf, int n)
6101 {
6102         struct kvm_segment seg;
6103         int offset;
6104         u16 flags;
6105
6106         kvm_get_segment(vcpu, &seg, n);
6107         offset = 0x7e00 + n * 16;
6108
6109         flags = process_smi_get_segment_flags(&seg) >> 8;
6110         put_smstate(u16, buf, offset, seg.selector);
6111         put_smstate(u16, buf, offset + 2, flags);
6112         put_smstate(u32, buf, offset + 4, seg.limit);
6113         put_smstate(u64, buf, offset + 8, seg.base);
6114 }
6115 #endif
6116
6117 static void process_smi_save_state_32(struct kvm_vcpu *vcpu, char *buf)
6118 {
6119         struct desc_ptr dt;
6120         struct kvm_segment seg;
6121         unsigned long val;
6122         int i;
6123
6124         put_smstate(u32, buf, 0x7ffc, kvm_read_cr0(vcpu));
6125         put_smstate(u32, buf, 0x7ff8, kvm_read_cr3(vcpu));
6126         put_smstate(u32, buf, 0x7ff4, kvm_get_rflags(vcpu));
6127         put_smstate(u32, buf, 0x7ff0, kvm_rip_read(vcpu));
6128
6129         for (i = 0; i < 8; i++)
6130                 put_smstate(u32, buf, 0x7fd0 + i * 4, kvm_register_read(vcpu, i));
6131
6132         kvm_get_dr(vcpu, 6, &val);
6133         put_smstate(u32, buf, 0x7fcc, (u32)val);
6134         kvm_get_dr(vcpu, 7, &val);
6135         put_smstate(u32, buf, 0x7fc8, (u32)val);
6136
6137         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
6138         put_smstate(u32, buf, 0x7fc4, seg.selector);
6139         put_smstate(u32, buf, 0x7f64, seg.base);
6140         put_smstate(u32, buf, 0x7f60, seg.limit);
6141         put_smstate(u32, buf, 0x7f5c, process_smi_get_segment_flags(&seg));
6142
6143         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
6144         put_smstate(u32, buf, 0x7fc0, seg.selector);
6145         put_smstate(u32, buf, 0x7f80, seg.base);
6146         put_smstate(u32, buf, 0x7f7c, seg.limit);
6147         put_smstate(u32, buf, 0x7f78, process_smi_get_segment_flags(&seg));
6148
6149         kvm_x86_ops->get_gdt(vcpu, &dt);
6150         put_smstate(u32, buf, 0x7f74, dt.address);
6151         put_smstate(u32, buf, 0x7f70, dt.size);
6152
6153         kvm_x86_ops->get_idt(vcpu, &dt);
6154         put_smstate(u32, buf, 0x7f58, dt.address);
6155         put_smstate(u32, buf, 0x7f54, dt.size);
6156
6157         for (i = 0; i < 6; i++)
6158                 process_smi_save_seg_32(vcpu, buf, i);
6159
6160         put_smstate(u32, buf, 0x7f14, kvm_read_cr4(vcpu));
6161
6162         /* revision id */
6163         put_smstate(u32, buf, 0x7efc, 0x00020000);
6164         put_smstate(u32, buf, 0x7ef8, vcpu->arch.smbase);
6165 }
6166
6167 static void process_smi_save_state_64(struct kvm_vcpu *vcpu, char *buf)
6168 {
6169 #ifdef CONFIG_X86_64
6170         struct desc_ptr dt;
6171         struct kvm_segment seg;
6172         unsigned long val;
6173         int i;
6174
6175         for (i = 0; i < 16; i++)
6176                 put_smstate(u64, buf, 0x7ff8 - i * 8, kvm_register_read(vcpu, i));
6177
6178         put_smstate(u64, buf, 0x7f78, kvm_rip_read(vcpu));
6179         put_smstate(u32, buf, 0x7f70, kvm_get_rflags(vcpu));
6180
6181         kvm_get_dr(vcpu, 6, &val);
6182         put_smstate(u64, buf, 0x7f68, val);
6183         kvm_get_dr(vcpu, 7, &val);
6184         put_smstate(u64, buf, 0x7f60, val);
6185
6186         put_smstate(u64, buf, 0x7f58, kvm_read_cr0(vcpu));
6187         put_smstate(u64, buf, 0x7f50, kvm_read_cr3(vcpu));
6188         put_smstate(u64, buf, 0x7f48, kvm_read_cr4(vcpu));
6189
6190         put_smstate(u32, buf, 0x7f00, vcpu->arch.smbase);
6191
6192         /* revision id */
6193         put_smstate(u32, buf, 0x7efc, 0x00020064);
6194
6195         put_smstate(u64, buf, 0x7ed0, vcpu->arch.efer);
6196
6197         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
6198         put_smstate(u16, buf, 0x7e90, seg.selector);
6199         put_smstate(u16, buf, 0x7e92, process_smi_get_segment_flags(&seg) >> 8);
6200         put_smstate(u32, buf, 0x7e94, seg.limit);
6201         put_smstate(u64, buf, 0x7e98, seg.base);
6202
6203         kvm_x86_ops->get_idt(vcpu, &dt);
6204         put_smstate(u32, buf, 0x7e84, dt.size);
6205         put_smstate(u64, buf, 0x7e88, dt.address);
6206
6207         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
6208         put_smstate(u16, buf, 0x7e70, seg.selector);
6209         put_smstate(u16, buf, 0x7e72, process_smi_get_segment_flags(&seg) >> 8);
6210         put_smstate(u32, buf, 0x7e74, seg.limit);
6211         put_smstate(u64, buf, 0x7e78, seg.base);
6212
6213         kvm_x86_ops->get_gdt(vcpu, &dt);
6214         put_smstate(u32, buf, 0x7e64, dt.size);
6215         put_smstate(u64, buf, 0x7e68, dt.address);
6216
6217         for (i = 0; i < 6; i++)
6218                 process_smi_save_seg_64(vcpu, buf, i);
6219 #else
6220         WARN_ON_ONCE(1);
6221 #endif
6222 }
6223
6224 static void process_smi(struct kvm_vcpu *vcpu)
6225 {
6226         struct kvm_segment cs, ds;
6227         struct desc_ptr dt;
6228         char buf[512];
6229         u32 cr0;
6230
6231         if (is_smm(vcpu)) {
6232                 vcpu->arch.smi_pending = true;
6233                 return;
6234         }
6235
6236         trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, true);
6237         vcpu->arch.hflags |= HF_SMM_MASK;
6238         memset(buf, 0, 512);
6239         if (guest_cpuid_has_longmode(vcpu))
6240                 process_smi_save_state_64(vcpu, buf);
6241         else
6242                 process_smi_save_state_32(vcpu, buf);
6243
6244         kvm_vcpu_write_guest(vcpu, vcpu->arch.smbase + 0xfe00, buf, sizeof(buf));
6245
6246         if (kvm_x86_ops->get_nmi_mask(vcpu))
6247                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
6248         else
6249                 kvm_x86_ops->set_nmi_mask(vcpu, true);
6250
6251         kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
6252         kvm_rip_write(vcpu, 0x8000);
6253
6254         cr0 = vcpu->arch.cr0 & ~(X86_CR0_PE | X86_CR0_EM | X86_CR0_TS | X86_CR0_PG);
6255         kvm_x86_ops->set_cr0(vcpu, cr0);
6256         vcpu->arch.cr0 = cr0;
6257
6258         kvm_x86_ops->set_cr4(vcpu, 0);
6259
6260         /* Undocumented: IDT limit is set to zero on entry to SMM.  */
6261         dt.address = dt.size = 0;
6262         kvm_x86_ops->set_idt(vcpu, &dt);
6263
6264         __kvm_set_dr(vcpu, 7, DR7_FIXED_1);
6265
6266         cs.selector = (vcpu->arch.smbase >> 4) & 0xffff;
6267         cs.base = vcpu->arch.smbase;
6268
6269         ds.selector = 0;
6270         ds.base = 0;
6271
6272         cs.limit    = ds.limit = 0xffffffff;
6273         cs.type     = ds.type = 0x3;
6274         cs.dpl      = ds.dpl = 0;
6275         cs.db       = ds.db = 0;
6276         cs.s        = ds.s = 1;
6277         cs.l        = ds.l = 0;
6278         cs.g        = ds.g = 1;
6279         cs.avl      = ds.avl = 0;
6280         cs.present  = ds.present = 1;
6281         cs.unusable = ds.unusable = 0;
6282         cs.padding  = ds.padding = 0;
6283
6284         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
6285         kvm_set_segment(vcpu, &ds, VCPU_SREG_DS);
6286         kvm_set_segment(vcpu, &ds, VCPU_SREG_ES);
6287         kvm_set_segment(vcpu, &ds, VCPU_SREG_FS);
6288         kvm_set_segment(vcpu, &ds, VCPU_SREG_GS);
6289         kvm_set_segment(vcpu, &ds, VCPU_SREG_SS);
6290
6291         if (guest_cpuid_has_longmode(vcpu))
6292                 kvm_x86_ops->set_efer(vcpu, 0);
6293
6294         kvm_update_cpuid(vcpu);
6295         kvm_mmu_reset_context(vcpu);
6296 }
6297
6298 static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu)
6299 {
6300         if (!kvm_apic_hw_enabled(vcpu->arch.apic))
6301                 return;
6302
6303         memset(vcpu->arch.eoi_exit_bitmap, 0, 256 / 8);
6304
6305         if (irqchip_split(vcpu->kvm))
6306                 kvm_scan_ioapic_routes(vcpu, vcpu->arch.eoi_exit_bitmap);
6307         else {
6308                 kvm_x86_ops->sync_pir_to_irr(vcpu);
6309                 kvm_ioapic_scan_entry(vcpu, vcpu->arch.eoi_exit_bitmap);
6310         }
6311         kvm_x86_ops->load_eoi_exitmap(vcpu);
6312 }
6313
6314 static void kvm_vcpu_flush_tlb(struct kvm_vcpu *vcpu)
6315 {
6316         ++vcpu->stat.tlb_flush;
6317         kvm_x86_ops->tlb_flush(vcpu);
6318 }
6319
6320 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu)
6321 {
6322         struct page *page = NULL;
6323
6324         if (!lapic_in_kernel(vcpu))
6325                 return;
6326
6327         if (!kvm_x86_ops->set_apic_access_page_addr)
6328                 return;
6329
6330         page = gfn_to_page(vcpu->kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
6331         if (is_error_page(page))
6332                 return;
6333         kvm_x86_ops->set_apic_access_page_addr(vcpu, page_to_phys(page));
6334
6335         /*
6336          * Do not pin apic access page in memory, the MMU notifier
6337          * will call us again if it is migrated or swapped out.
6338          */
6339         put_page(page);
6340 }
6341 EXPORT_SYMBOL_GPL(kvm_vcpu_reload_apic_access_page);
6342
6343 void kvm_arch_mmu_notifier_invalidate_page(struct kvm *kvm,
6344                                            unsigned long address)
6345 {
6346         /*
6347          * The physical address of apic access page is stored in the VMCS.
6348          * Update it when it becomes invalid.
6349          */
6350         if (address == gfn_to_hva(kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT))
6351                 kvm_make_all_cpus_request(kvm, KVM_REQ_APIC_PAGE_RELOAD);
6352 }
6353
6354 /*
6355  * Returns 1 to let vcpu_run() continue the guest execution loop without
6356  * exiting to the userspace.  Otherwise, the value will be returned to the
6357  * userspace.
6358  */
6359 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
6360 {
6361         int r;
6362         bool req_int_win = !lapic_in_kernel(vcpu) &&
6363                 vcpu->run->request_interrupt_window;
6364         bool req_immediate_exit = false;
6365
6366         if (vcpu->requests) {
6367                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
6368                         kvm_mmu_unload(vcpu);
6369                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
6370                         __kvm_migrate_timers(vcpu);
6371                 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu))
6372                         kvm_gen_update_masterclock(vcpu->kvm);
6373                 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu))
6374                         kvm_gen_kvmclock_update(vcpu);
6375                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
6376                         r = kvm_guest_time_update(vcpu);
6377                         if (unlikely(r))
6378                                 goto out;
6379                 }
6380                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
6381                         kvm_mmu_sync_roots(vcpu);
6382                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
6383                         kvm_vcpu_flush_tlb(vcpu);
6384                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
6385                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
6386                         r = 0;
6387                         goto out;
6388                 }
6389                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
6390                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
6391                         r = 0;
6392                         goto out;
6393                 }
6394                 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU, vcpu)) {
6395                         vcpu->fpu_active = 0;
6396                         kvm_x86_ops->fpu_deactivate(vcpu);
6397                 }
6398                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
6399                         /* Page is swapped out. Do synthetic halt */
6400                         vcpu->arch.apf.halted = true;
6401                         r = 1;
6402                         goto out;
6403                 }
6404                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
6405                         record_steal_time(vcpu);
6406                 if (kvm_check_request(KVM_REQ_SMI, vcpu))
6407                         process_smi(vcpu);
6408                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
6409                         process_nmi(vcpu);
6410                 if (kvm_check_request(KVM_REQ_PMU, vcpu))
6411                         kvm_pmu_handle_event(vcpu);
6412                 if (kvm_check_request(KVM_REQ_PMI, vcpu))
6413                         kvm_pmu_deliver_pmi(vcpu);
6414                 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT, vcpu)) {
6415                         BUG_ON(vcpu->arch.pending_ioapic_eoi > 255);
6416                         if (test_bit(vcpu->arch.pending_ioapic_eoi,
6417                                      (void *) vcpu->arch.eoi_exit_bitmap)) {
6418                                 vcpu->run->exit_reason = KVM_EXIT_IOAPIC_EOI;
6419                                 vcpu->run->eoi.vector =
6420                                                 vcpu->arch.pending_ioapic_eoi;
6421                                 r = 0;
6422                                 goto out;
6423                         }
6424                 }
6425                 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC, vcpu))
6426                         vcpu_scan_ioapic(vcpu);
6427                 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD, vcpu))
6428                         kvm_vcpu_reload_apic_access_page(vcpu);
6429                 if (kvm_check_request(KVM_REQ_HV_CRASH, vcpu)) {
6430                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
6431                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_CRASH;
6432                         r = 0;
6433                         goto out;
6434                 }
6435                 if (kvm_check_request(KVM_REQ_HV_RESET, vcpu)) {
6436                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
6437                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_RESET;
6438                         r = 0;
6439                         goto out;
6440                 }
6441         }
6442
6443         /*
6444          * KVM_REQ_EVENT is not set when posted interrupts are set by
6445          * VT-d hardware, so we have to update RVI unconditionally.
6446          */
6447         if (kvm_lapic_enabled(vcpu)) {
6448                 /*
6449                  * Update architecture specific hints for APIC
6450                  * virtual interrupt delivery.
6451                  */
6452                 if (kvm_x86_ops->hwapic_irr_update)
6453                         kvm_x86_ops->hwapic_irr_update(vcpu,
6454                                 kvm_lapic_find_highest_irr(vcpu));
6455         }
6456
6457         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
6458                 kvm_apic_accept_events(vcpu);
6459                 if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
6460                         r = 1;
6461                         goto out;
6462                 }
6463
6464                 if (inject_pending_event(vcpu, req_int_win) != 0)
6465                         req_immediate_exit = true;
6466                 /* enable NMI/IRQ window open exits if needed */
6467                 else if (vcpu->arch.nmi_pending)
6468                         kvm_x86_ops->enable_nmi_window(vcpu);
6469                 else if (kvm_cpu_has_injectable_intr(vcpu) || req_int_win)
6470                         kvm_x86_ops->enable_irq_window(vcpu);
6471
6472                 if (kvm_lapic_enabled(vcpu)) {
6473                         update_cr8_intercept(vcpu);
6474                         kvm_lapic_sync_to_vapic(vcpu);
6475                 }
6476         }
6477
6478         r = kvm_mmu_reload(vcpu);
6479         if (unlikely(r)) {
6480                 goto cancel_injection;
6481         }
6482
6483         preempt_disable();
6484
6485         kvm_x86_ops->prepare_guest_switch(vcpu);
6486         if (vcpu->fpu_active)
6487                 kvm_load_guest_fpu(vcpu);
6488         kvm_load_guest_xcr0(vcpu);
6489
6490         vcpu->mode = IN_GUEST_MODE;
6491
6492         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
6493
6494         /* We should set ->mode before check ->requests,
6495          * see the comment in make_all_cpus_request.
6496          */
6497         smp_mb__after_srcu_read_unlock();
6498
6499         local_irq_disable();
6500
6501         if (vcpu->mode == EXITING_GUEST_MODE || vcpu->requests
6502             || need_resched() || signal_pending(current)) {
6503                 vcpu->mode = OUTSIDE_GUEST_MODE;
6504                 smp_wmb();
6505                 local_irq_enable();
6506                 preempt_enable();
6507                 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
6508                 r = 1;
6509                 goto cancel_injection;
6510         }
6511
6512         if (req_immediate_exit)
6513                 smp_send_reschedule(vcpu->cpu);
6514
6515         __kvm_guest_enter();
6516
6517         if (unlikely(vcpu->arch.switch_db_regs)) {
6518                 set_debugreg(0, 7);
6519                 set_debugreg(vcpu->arch.eff_db[0], 0);
6520                 set_debugreg(vcpu->arch.eff_db[1], 1);
6521                 set_debugreg(vcpu->arch.eff_db[2], 2);
6522                 set_debugreg(vcpu->arch.eff_db[3], 3);
6523                 set_debugreg(vcpu->arch.dr6, 6);
6524                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
6525         }
6526
6527         trace_kvm_entry(vcpu->vcpu_id);
6528         wait_lapic_expire(vcpu);
6529         kvm_x86_ops->run(vcpu);
6530
6531         /*
6532          * Do this here before restoring debug registers on the host.  And
6533          * since we do this before handling the vmexit, a DR access vmexit
6534          * can (a) read the correct value of the debug registers, (b) set
6535          * KVM_DEBUGREG_WONT_EXIT again.
6536          */
6537         if (unlikely(vcpu->arch.switch_db_regs & KVM_DEBUGREG_WONT_EXIT)) {
6538                 int i;
6539
6540                 WARN_ON(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP);
6541                 kvm_x86_ops->sync_dirty_debug_regs(vcpu);
6542                 for (i = 0; i < KVM_NR_DB_REGS; i++)
6543                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
6544         }
6545
6546         /*
6547          * If the guest has used debug registers, at least dr7
6548          * will be disabled while returning to the host.
6549          * If we don't have active breakpoints in the host, we don't
6550          * care about the messed up debug address registers. But if
6551          * we have some of them active, restore the old state.
6552          */
6553         if (hw_breakpoint_active())
6554                 hw_breakpoint_restore();
6555
6556         vcpu->arch.last_guest_tsc = kvm_read_l1_tsc(vcpu, rdtsc());
6557
6558         vcpu->mode = OUTSIDE_GUEST_MODE;
6559         smp_wmb();
6560
6561         /* Interrupt is enabled by handle_external_intr() */
6562         kvm_x86_ops->handle_external_intr(vcpu);
6563
6564         ++vcpu->stat.exits;
6565
6566         /*
6567          * We must have an instruction between local_irq_enable() and
6568          * kvm_guest_exit(), so the timer interrupt isn't delayed by
6569          * the interrupt shadow.  The stat.exits increment will do nicely.
6570          * But we need to prevent reordering, hence this barrier():
6571          */
6572         barrier();
6573
6574         kvm_guest_exit();
6575
6576         preempt_enable();
6577
6578         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
6579
6580         /*
6581          * Profile KVM exit RIPs:
6582          */
6583         if (unlikely(prof_on == KVM_PROFILING)) {
6584                 unsigned long rip = kvm_rip_read(vcpu);
6585                 profile_hit(KVM_PROFILING, (void *)rip);
6586         }
6587
6588         if (unlikely(vcpu->arch.tsc_always_catchup))
6589                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
6590
6591         if (vcpu->arch.apic_attention)
6592                 kvm_lapic_sync_from_vapic(vcpu);
6593
6594         r = kvm_x86_ops->handle_exit(vcpu);
6595         return r;
6596
6597 cancel_injection:
6598         kvm_x86_ops->cancel_injection(vcpu);
6599         if (unlikely(vcpu->arch.apic_attention))
6600                 kvm_lapic_sync_from_vapic(vcpu);
6601 out:
6602         return r;
6603 }
6604
6605 static inline int vcpu_block(struct kvm *kvm, struct kvm_vcpu *vcpu)
6606 {
6607         if (!kvm_arch_vcpu_runnable(vcpu) &&
6608             (!kvm_x86_ops->pre_block || kvm_x86_ops->pre_block(vcpu) == 0)) {
6609                 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
6610                 kvm_vcpu_block(vcpu);
6611                 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
6612
6613                 if (kvm_x86_ops->post_block)
6614                         kvm_x86_ops->post_block(vcpu);
6615
6616                 if (!kvm_check_request(KVM_REQ_UNHALT, vcpu))
6617                         return 1;
6618         }
6619
6620         kvm_apic_accept_events(vcpu);
6621         switch(vcpu->arch.mp_state) {
6622         case KVM_MP_STATE_HALTED:
6623                 vcpu->arch.pv.pv_unhalted = false;
6624                 vcpu->arch.mp_state =
6625                         KVM_MP_STATE_RUNNABLE;
6626         case KVM_MP_STATE_RUNNABLE:
6627                 vcpu->arch.apf.halted = false;
6628                 break;
6629         case KVM_MP_STATE_INIT_RECEIVED:
6630                 break;
6631         default:
6632                 return -EINTR;
6633                 break;
6634         }
6635         return 1;
6636 }
6637
6638 static inline bool kvm_vcpu_running(struct kvm_vcpu *vcpu)
6639 {
6640         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
6641                 !vcpu->arch.apf.halted);
6642 }
6643
6644 static int vcpu_run(struct kvm_vcpu *vcpu)
6645 {
6646         int r;
6647         struct kvm *kvm = vcpu->kvm;
6648
6649         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
6650
6651         for (;;) {
6652                 if (kvm_vcpu_running(vcpu)) {
6653                         r = vcpu_enter_guest(vcpu);
6654                 } else {
6655                         r = vcpu_block(kvm, vcpu);
6656                 }
6657
6658                 if (r <= 0)
6659                         break;
6660
6661                 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
6662                 if (kvm_cpu_has_pending_timer(vcpu))
6663                         kvm_inject_pending_timer_irqs(vcpu);
6664
6665                 if (dm_request_for_irq_injection(vcpu)) {
6666                         r = 0;
6667                         vcpu->run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
6668                         ++vcpu->stat.request_irq_exits;
6669                         break;
6670                 }
6671
6672                 kvm_check_async_pf_completion(vcpu);
6673
6674                 if (signal_pending(current)) {
6675                         r = -EINTR;
6676                         vcpu->run->exit_reason = KVM_EXIT_INTR;
6677                         ++vcpu->stat.signal_exits;
6678                         break;
6679                 }
6680                 if (need_resched()) {
6681                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
6682                         cond_resched();
6683                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
6684                 }
6685         }
6686
6687         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
6688
6689         return r;
6690 }
6691
6692 static inline int complete_emulated_io(struct kvm_vcpu *vcpu)
6693 {
6694         int r;
6695         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
6696         r = emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
6697         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
6698         if (r != EMULATE_DONE)
6699                 return 0;
6700         return 1;
6701 }
6702
6703 static int complete_emulated_pio(struct kvm_vcpu *vcpu)
6704 {
6705         BUG_ON(!vcpu->arch.pio.count);
6706
6707         return complete_emulated_io(vcpu);
6708 }
6709
6710 /*
6711  * Implements the following, as a state machine:
6712  *
6713  * read:
6714  *   for each fragment
6715  *     for each mmio piece in the fragment
6716  *       write gpa, len
6717  *       exit
6718  *       copy data
6719  *   execute insn
6720  *
6721  * write:
6722  *   for each fragment
6723  *     for each mmio piece in the fragment
6724  *       write gpa, len
6725  *       copy data
6726  *       exit
6727  */
6728 static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
6729 {
6730         struct kvm_run *run = vcpu->run;
6731         struct kvm_mmio_fragment *frag;
6732         unsigned len;
6733
6734         BUG_ON(!vcpu->mmio_needed);
6735
6736         /* Complete previous fragment */
6737         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
6738         len = min(8u, frag->len);
6739         if (!vcpu->mmio_is_write)
6740                 memcpy(frag->data, run->mmio.data, len);
6741
6742         if (frag->len <= 8) {
6743                 /* Switch to the next fragment. */
6744                 frag++;
6745                 vcpu->mmio_cur_fragment++;
6746         } else {
6747                 /* Go forward to the next mmio piece. */
6748                 frag->data += len;
6749                 frag->gpa += len;
6750                 frag->len -= len;
6751         }
6752
6753         if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
6754                 vcpu->mmio_needed = 0;
6755
6756                 /* FIXME: return into emulator if single-stepping.  */
6757                 if (vcpu->mmio_is_write)
6758                         return 1;
6759                 vcpu->mmio_read_completed = 1;
6760                 return complete_emulated_io(vcpu);
6761         }
6762
6763         run->exit_reason = KVM_EXIT_MMIO;
6764         run->mmio.phys_addr = frag->gpa;
6765         if (vcpu->mmio_is_write)
6766                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
6767         run->mmio.len = min(8u, frag->len);
6768         run->mmio.is_write = vcpu->mmio_is_write;
6769         vcpu->arch.complete_userspace_io = complete_emulated_mmio;
6770         return 0;
6771 }
6772
6773
6774 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
6775 {
6776         struct fpu *fpu = &current->thread.fpu;
6777         int r;
6778         sigset_t sigsaved;
6779
6780         fpu__activate_curr(fpu);
6781
6782         if (vcpu->sigset_active)
6783                 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
6784
6785         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
6786                 kvm_vcpu_block(vcpu);
6787                 kvm_apic_accept_events(vcpu);
6788                 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
6789                 r = -EAGAIN;
6790                 goto out;
6791         }
6792
6793         /* re-sync apic's tpr */
6794         if (!lapic_in_kernel(vcpu)) {
6795                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
6796                         r = -EINVAL;
6797                         goto out;
6798                 }
6799         }
6800
6801         if (unlikely(vcpu->arch.complete_userspace_io)) {
6802                 int (*cui)(struct kvm_vcpu *) = vcpu->arch.complete_userspace_io;
6803                 vcpu->arch.complete_userspace_io = NULL;
6804                 r = cui(vcpu);
6805                 if (r <= 0)
6806                         goto out;
6807         } else
6808                 WARN_ON(vcpu->arch.pio.count || vcpu->mmio_needed);
6809
6810         r = vcpu_run(vcpu);
6811
6812 out:
6813         post_kvm_run_save(vcpu);
6814         if (vcpu->sigset_active)
6815                 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
6816
6817         return r;
6818 }
6819
6820 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
6821 {
6822         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
6823                 /*
6824                  * We are here if userspace calls get_regs() in the middle of
6825                  * instruction emulation. Registers state needs to be copied
6826                  * back from emulation context to vcpu. Userspace shouldn't do
6827                  * that usually, but some bad designed PV devices (vmware
6828                  * backdoor interface) need this to work
6829                  */
6830                 emulator_writeback_register_cache(&vcpu->arch.emulate_ctxt);
6831                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
6832         }
6833         regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
6834         regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
6835         regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
6836         regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
6837         regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
6838         regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
6839         regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
6840         regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
6841 #ifdef CONFIG_X86_64
6842         regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
6843         regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
6844         regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
6845         regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
6846         regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
6847         regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
6848         regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
6849         regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
6850 #endif
6851
6852         regs->rip = kvm_rip_read(vcpu);
6853         regs->rflags = kvm_get_rflags(vcpu);
6854
6855         return 0;
6856 }
6857
6858 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
6859 {
6860         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
6861         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
6862
6863         kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
6864         kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
6865         kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
6866         kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
6867         kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
6868         kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
6869         kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
6870         kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
6871 #ifdef CONFIG_X86_64
6872         kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
6873         kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
6874         kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
6875         kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
6876         kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
6877         kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
6878         kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
6879         kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
6880 #endif
6881
6882         kvm_rip_write(vcpu, regs->rip);
6883         kvm_set_rflags(vcpu, regs->rflags);
6884
6885         vcpu->arch.exception.pending = false;
6886
6887         kvm_make_request(KVM_REQ_EVENT, vcpu);
6888
6889         return 0;
6890 }
6891
6892 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
6893 {
6894         struct kvm_segment cs;
6895
6896         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
6897         *db = cs.db;
6898         *l = cs.l;
6899 }
6900 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
6901
6902 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
6903                                   struct kvm_sregs *sregs)
6904 {
6905         struct desc_ptr dt;
6906
6907         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
6908         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
6909         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
6910         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
6911         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
6912         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
6913
6914         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
6915         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
6916
6917         kvm_x86_ops->get_idt(vcpu, &dt);
6918         sregs->idt.limit = dt.size;
6919         sregs->idt.base = dt.address;
6920         kvm_x86_ops->get_gdt(vcpu, &dt);
6921         sregs->gdt.limit = dt.size;
6922         sregs->gdt.base = dt.address;
6923
6924         sregs->cr0 = kvm_read_cr0(vcpu);
6925         sregs->cr2 = vcpu->arch.cr2;
6926         sregs->cr3 = kvm_read_cr3(vcpu);
6927         sregs->cr4 = kvm_read_cr4(vcpu);
6928         sregs->cr8 = kvm_get_cr8(vcpu);
6929         sregs->efer = vcpu->arch.efer;
6930         sregs->apic_base = kvm_get_apic_base(vcpu);
6931
6932         memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
6933
6934         if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
6935                 set_bit(vcpu->arch.interrupt.nr,
6936                         (unsigned long *)sregs->interrupt_bitmap);
6937
6938         return 0;
6939 }
6940
6941 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
6942                                     struct kvm_mp_state *mp_state)
6943 {
6944         kvm_apic_accept_events(vcpu);
6945         if (vcpu->arch.mp_state == KVM_MP_STATE_HALTED &&
6946                                         vcpu->arch.pv.pv_unhalted)
6947                 mp_state->mp_state = KVM_MP_STATE_RUNNABLE;
6948         else
6949                 mp_state->mp_state = vcpu->arch.mp_state;
6950
6951         return 0;
6952 }
6953
6954 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
6955                                     struct kvm_mp_state *mp_state)
6956 {
6957         if (!kvm_vcpu_has_lapic(vcpu) &&
6958             mp_state->mp_state != KVM_MP_STATE_RUNNABLE)
6959                 return -EINVAL;
6960
6961         if (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED) {
6962                 vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
6963                 set_bit(KVM_APIC_SIPI, &vcpu->arch.apic->pending_events);
6964         } else
6965                 vcpu->arch.mp_state = mp_state->mp_state;
6966         kvm_make_request(KVM_REQ_EVENT, vcpu);
6967         return 0;
6968 }
6969
6970 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
6971                     int reason, bool has_error_code, u32 error_code)
6972 {
6973         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
6974         int ret;
6975
6976         init_emulate_ctxt(vcpu);
6977
6978         ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
6979                                    has_error_code, error_code);
6980
6981         if (ret)
6982                 return EMULATE_FAIL;
6983
6984         kvm_rip_write(vcpu, ctxt->eip);
6985         kvm_set_rflags(vcpu, ctxt->eflags);
6986         kvm_make_request(KVM_REQ_EVENT, vcpu);
6987         return EMULATE_DONE;
6988 }
6989 EXPORT_SYMBOL_GPL(kvm_task_switch);
6990
6991 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
6992                                   struct kvm_sregs *sregs)
6993 {
6994         struct msr_data apic_base_msr;
6995         int mmu_reset_needed = 0;
6996         int pending_vec, max_bits, idx;
6997         struct desc_ptr dt;
6998
6999         if (!guest_cpuid_has_xsave(vcpu) && (sregs->cr4 & X86_CR4_OSXSAVE))
7000                 return -EINVAL;
7001
7002         dt.size = sregs->idt.limit;
7003         dt.address = sregs->idt.base;
7004         kvm_x86_ops->set_idt(vcpu, &dt);
7005         dt.size = sregs->gdt.limit;
7006         dt.address = sregs->gdt.base;
7007         kvm_x86_ops->set_gdt(vcpu, &dt);
7008
7009         vcpu->arch.cr2 = sregs->cr2;
7010         mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
7011         vcpu->arch.cr3 = sregs->cr3;
7012         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
7013
7014         kvm_set_cr8(vcpu, sregs->cr8);
7015
7016         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
7017         kvm_x86_ops->set_efer(vcpu, sregs->efer);
7018         apic_base_msr.data = sregs->apic_base;
7019         apic_base_msr.host_initiated = true;
7020         kvm_set_apic_base(vcpu, &apic_base_msr);
7021
7022         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
7023         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
7024         vcpu->arch.cr0 = sregs->cr0;
7025
7026         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
7027         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
7028         if (sregs->cr4 & X86_CR4_OSXSAVE)
7029                 kvm_update_cpuid(vcpu);
7030
7031         idx = srcu_read_lock(&vcpu->kvm->srcu);
7032         if (!is_long_mode(vcpu) && is_pae(vcpu)) {
7033                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
7034                 mmu_reset_needed = 1;
7035         }
7036         srcu_read_unlock(&vcpu->kvm->srcu, idx);
7037
7038         if (mmu_reset_needed)
7039                 kvm_mmu_reset_context(vcpu);
7040
7041         max_bits = KVM_NR_INTERRUPTS;
7042         pending_vec = find_first_bit(
7043                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
7044         if (pending_vec < max_bits) {
7045                 kvm_queue_interrupt(vcpu, pending_vec, false);
7046                 pr_debug("Set back pending irq %d\n", pending_vec);
7047         }
7048
7049         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
7050         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
7051         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
7052         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
7053         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
7054         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
7055
7056         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
7057         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
7058
7059         update_cr8_intercept(vcpu);
7060
7061         /* Older userspace won't unhalt the vcpu on reset. */
7062         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
7063             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
7064             !is_protmode(vcpu))
7065                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
7066
7067         kvm_make_request(KVM_REQ_EVENT, vcpu);
7068
7069         return 0;
7070 }
7071
7072 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
7073                                         struct kvm_guest_debug *dbg)
7074 {
7075         unsigned long rflags;
7076         int i, r;
7077
7078         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
7079                 r = -EBUSY;
7080                 if (vcpu->arch.exception.pending)
7081                         goto out;
7082                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
7083                         kvm_queue_exception(vcpu, DB_VECTOR);
7084                 else
7085                         kvm_queue_exception(vcpu, BP_VECTOR);
7086         }
7087
7088         /*
7089          * Read rflags as long as potentially injected trace flags are still
7090          * filtered out.
7091          */
7092         rflags = kvm_get_rflags(vcpu);
7093
7094         vcpu->guest_debug = dbg->control;
7095         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
7096                 vcpu->guest_debug = 0;
7097
7098         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
7099                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
7100                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
7101                 vcpu->arch.guest_debug_dr7 = dbg->arch.debugreg[7];
7102         } else {
7103                 for (i = 0; i < KVM_NR_DB_REGS; i++)
7104                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
7105         }
7106         kvm_update_dr7(vcpu);
7107
7108         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
7109                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
7110                         get_segment_base(vcpu, VCPU_SREG_CS);
7111
7112         /*
7113          * Trigger an rflags update that will inject or remove the trace
7114          * flags.
7115          */
7116         kvm_set_rflags(vcpu, rflags);
7117
7118         kvm_x86_ops->update_db_bp_intercept(vcpu);
7119
7120         r = 0;
7121
7122 out:
7123
7124         return r;
7125 }
7126
7127 /*
7128  * Translate a guest virtual address to a guest physical address.
7129  */
7130 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
7131                                     struct kvm_translation *tr)
7132 {
7133         unsigned long vaddr = tr->linear_address;
7134         gpa_t gpa;
7135         int idx;
7136
7137         idx = srcu_read_lock(&vcpu->kvm->srcu);
7138         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
7139         srcu_read_unlock(&vcpu->kvm->srcu, idx);
7140         tr->physical_address = gpa;
7141         tr->valid = gpa != UNMAPPED_GVA;
7142         tr->writeable = 1;
7143         tr->usermode = 0;
7144
7145         return 0;
7146 }
7147
7148 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
7149 {
7150         struct fxregs_state *fxsave =
7151                         &vcpu->arch.guest_fpu.state.fxsave;
7152
7153         memcpy(fpu->fpr, fxsave->st_space, 128);
7154         fpu->fcw = fxsave->cwd;
7155         fpu->fsw = fxsave->swd;
7156         fpu->ftwx = fxsave->twd;
7157         fpu->last_opcode = fxsave->fop;
7158         fpu->last_ip = fxsave->rip;
7159         fpu->last_dp = fxsave->rdp;
7160         memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
7161
7162         return 0;
7163 }
7164
7165 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
7166 {
7167         struct fxregs_state *fxsave =
7168                         &vcpu->arch.guest_fpu.state.fxsave;
7169
7170         memcpy(fxsave->st_space, fpu->fpr, 128);
7171         fxsave->cwd = fpu->fcw;
7172         fxsave->swd = fpu->fsw;
7173         fxsave->twd = fpu->ftwx;
7174         fxsave->fop = fpu->last_opcode;
7175         fxsave->rip = fpu->last_ip;
7176         fxsave->rdp = fpu->last_dp;
7177         memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
7178
7179         return 0;
7180 }
7181
7182 static void fx_init(struct kvm_vcpu *vcpu)
7183 {
7184         fpstate_init(&vcpu->arch.guest_fpu.state);
7185         if (cpu_has_xsaves)
7186                 vcpu->arch.guest_fpu.state.xsave.header.xcomp_bv =
7187                         host_xcr0 | XSTATE_COMPACTION_ENABLED;
7188
7189         /*
7190          * Ensure guest xcr0 is valid for loading
7191          */
7192         vcpu->arch.xcr0 = XSTATE_FP;
7193
7194         vcpu->arch.cr0 |= X86_CR0_ET;
7195 }
7196
7197 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
7198 {
7199         if (vcpu->guest_fpu_loaded)
7200                 return;
7201
7202         /*
7203          * Restore all possible states in the guest,
7204          * and assume host would use all available bits.
7205          * Guest xcr0 would be loaded later.
7206          */
7207         kvm_put_guest_xcr0(vcpu);
7208         vcpu->guest_fpu_loaded = 1;
7209         __kernel_fpu_begin();
7210         __copy_kernel_to_fpregs(&vcpu->arch.guest_fpu.state);
7211         trace_kvm_fpu(1);
7212 }
7213
7214 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
7215 {
7216         kvm_put_guest_xcr0(vcpu);
7217
7218         if (!vcpu->guest_fpu_loaded) {
7219                 vcpu->fpu_counter = 0;
7220                 return;
7221         }
7222
7223         vcpu->guest_fpu_loaded = 0;
7224         copy_fpregs_to_fpstate(&vcpu->arch.guest_fpu);
7225         __kernel_fpu_end();
7226         ++vcpu->stat.fpu_reload;
7227         /*
7228          * If using eager FPU mode, or if the guest is a frequent user
7229          * of the FPU, just leave the FPU active for next time.
7230          * Every 255 times fpu_counter rolls over to 0; a guest that uses
7231          * the FPU in bursts will revert to loading it on demand.
7232          */
7233         if (!vcpu->arch.eager_fpu) {
7234                 if (++vcpu->fpu_counter < 5)
7235                         kvm_make_request(KVM_REQ_DEACTIVATE_FPU, vcpu);
7236         }
7237         trace_kvm_fpu(0);
7238 }
7239
7240 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
7241 {
7242         kvmclock_reset(vcpu);
7243
7244         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
7245         kvm_x86_ops->vcpu_free(vcpu);
7246 }
7247
7248 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
7249                                                 unsigned int id)
7250 {
7251         struct kvm_vcpu *vcpu;
7252
7253         if (check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
7254                 printk_once(KERN_WARNING
7255                 "kvm: SMP vm created on host with unstable TSC; "
7256                 "guest TSC will not be reliable\n");
7257
7258         vcpu = kvm_x86_ops->vcpu_create(kvm, id);
7259
7260         return vcpu;
7261 }
7262
7263 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
7264 {
7265         int r;
7266
7267         kvm_vcpu_mtrr_init(vcpu);
7268         r = vcpu_load(vcpu);
7269         if (r)
7270                 return r;
7271         kvm_vcpu_reset(vcpu, false);
7272         kvm_mmu_setup(vcpu);
7273         vcpu_put(vcpu);
7274         return r;
7275 }
7276
7277 void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
7278 {
7279         struct msr_data msr;
7280         struct kvm *kvm = vcpu->kvm;
7281
7282         if (vcpu_load(vcpu))
7283                 return;
7284         msr.data = 0x0;
7285         msr.index = MSR_IA32_TSC;
7286         msr.host_initiated = true;
7287         kvm_write_tsc(vcpu, &msr);
7288         vcpu_put(vcpu);
7289
7290         if (!kvmclock_periodic_sync)
7291                 return;
7292
7293         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
7294                                         KVMCLOCK_SYNC_PERIOD);
7295 }
7296
7297 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
7298 {
7299         int r;
7300         vcpu->arch.apf.msr_val = 0;
7301
7302         r = vcpu_load(vcpu);
7303         BUG_ON(r);
7304         kvm_mmu_unload(vcpu);
7305         vcpu_put(vcpu);
7306
7307         kvm_x86_ops->vcpu_free(vcpu);
7308 }
7309
7310 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)
7311 {
7312         vcpu->arch.hflags = 0;
7313
7314         atomic_set(&vcpu->arch.nmi_queued, 0);
7315         vcpu->arch.nmi_pending = 0;
7316         vcpu->arch.nmi_injected = false;
7317         kvm_clear_interrupt_queue(vcpu);
7318         kvm_clear_exception_queue(vcpu);
7319
7320         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
7321         kvm_update_dr0123(vcpu);
7322         vcpu->arch.dr6 = DR6_INIT;
7323         kvm_update_dr6(vcpu);
7324         vcpu->arch.dr7 = DR7_FIXED_1;
7325         kvm_update_dr7(vcpu);
7326
7327         vcpu->arch.cr2 = 0;
7328
7329         kvm_make_request(KVM_REQ_EVENT, vcpu);
7330         vcpu->arch.apf.msr_val = 0;
7331         vcpu->arch.st.msr_val = 0;
7332
7333         kvmclock_reset(vcpu);
7334
7335         kvm_clear_async_pf_completion_queue(vcpu);
7336         kvm_async_pf_hash_reset(vcpu);
7337         vcpu->arch.apf.halted = false;
7338
7339         if (!init_event) {
7340                 kvm_pmu_reset(vcpu);
7341                 vcpu->arch.smbase = 0x30000;
7342         }
7343
7344         memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
7345         vcpu->arch.regs_avail = ~0;
7346         vcpu->arch.regs_dirty = ~0;
7347
7348         kvm_x86_ops->vcpu_reset(vcpu, init_event);
7349 }
7350
7351 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector)
7352 {
7353         struct kvm_segment cs;
7354
7355         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
7356         cs.selector = vector << 8;
7357         cs.base = vector << 12;
7358         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
7359         kvm_rip_write(vcpu, 0);
7360 }
7361
7362 int kvm_arch_hardware_enable(void)
7363 {
7364         struct kvm *kvm;
7365         struct kvm_vcpu *vcpu;
7366         int i;
7367         int ret;
7368         u64 local_tsc;
7369         u64 max_tsc = 0;
7370         bool stable, backwards_tsc = false;
7371
7372         kvm_shared_msr_cpu_online();
7373         ret = kvm_x86_ops->hardware_enable();
7374         if (ret != 0)
7375                 return ret;
7376
7377         local_tsc = rdtsc();
7378         stable = !check_tsc_unstable();
7379         list_for_each_entry(kvm, &vm_list, vm_list) {
7380                 kvm_for_each_vcpu(i, vcpu, kvm) {
7381                         if (!stable && vcpu->cpu == smp_processor_id())
7382                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
7383                         if (stable && vcpu->arch.last_host_tsc > local_tsc) {
7384                                 backwards_tsc = true;
7385                                 if (vcpu->arch.last_host_tsc > max_tsc)
7386                                         max_tsc = vcpu->arch.last_host_tsc;
7387                         }
7388                 }
7389         }
7390
7391         /*
7392          * Sometimes, even reliable TSCs go backwards.  This happens on
7393          * platforms that reset TSC during suspend or hibernate actions, but
7394          * maintain synchronization.  We must compensate.  Fortunately, we can
7395          * detect that condition here, which happens early in CPU bringup,
7396          * before any KVM threads can be running.  Unfortunately, we can't
7397          * bring the TSCs fully up to date with real time, as we aren't yet far
7398          * enough into CPU bringup that we know how much real time has actually
7399          * elapsed; our helper function, get_kernel_ns() will be using boot
7400          * variables that haven't been updated yet.
7401          *
7402          * So we simply find the maximum observed TSC above, then record the
7403          * adjustment to TSC in each VCPU.  When the VCPU later gets loaded,
7404          * the adjustment will be applied.  Note that we accumulate
7405          * adjustments, in case multiple suspend cycles happen before some VCPU
7406          * gets a chance to run again.  In the event that no KVM threads get a
7407          * chance to run, we will miss the entire elapsed period, as we'll have
7408          * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
7409          * loose cycle time.  This isn't too big a deal, since the loss will be
7410          * uniform across all VCPUs (not to mention the scenario is extremely
7411          * unlikely). It is possible that a second hibernate recovery happens
7412          * much faster than a first, causing the observed TSC here to be
7413          * smaller; this would require additional padding adjustment, which is
7414          * why we set last_host_tsc to the local tsc observed here.
7415          *
7416          * N.B. - this code below runs only on platforms with reliable TSC,
7417          * as that is the only way backwards_tsc is set above.  Also note
7418          * that this runs for ALL vcpus, which is not a bug; all VCPUs should
7419          * have the same delta_cyc adjustment applied if backwards_tsc
7420          * is detected.  Note further, this adjustment is only done once,
7421          * as we reset last_host_tsc on all VCPUs to stop this from being
7422          * called multiple times (one for each physical CPU bringup).
7423          *
7424          * Platforms with unreliable TSCs don't have to deal with this, they
7425          * will be compensated by the logic in vcpu_load, which sets the TSC to
7426          * catchup mode.  This will catchup all VCPUs to real time, but cannot
7427          * guarantee that they stay in perfect synchronization.
7428          */
7429         if (backwards_tsc) {
7430                 u64 delta_cyc = max_tsc - local_tsc;
7431                 backwards_tsc_observed = true;
7432                 list_for_each_entry(kvm, &vm_list, vm_list) {
7433                         kvm_for_each_vcpu(i, vcpu, kvm) {
7434                                 vcpu->arch.tsc_offset_adjustment += delta_cyc;
7435                                 vcpu->arch.last_host_tsc = local_tsc;
7436                                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
7437                         }
7438
7439                         /*
7440                          * We have to disable TSC offset matching.. if you were
7441                          * booting a VM while issuing an S4 host suspend....
7442                          * you may have some problem.  Solving this issue is
7443                          * left as an exercise to the reader.
7444                          */
7445                         kvm->arch.last_tsc_nsec = 0;
7446                         kvm->arch.last_tsc_write = 0;
7447                 }
7448
7449         }
7450         return 0;
7451 }
7452
7453 void kvm_arch_hardware_disable(void)
7454 {
7455         kvm_x86_ops->hardware_disable();
7456         drop_user_return_notifiers();
7457 }
7458
7459 int kvm_arch_hardware_setup(void)
7460 {
7461         int r;
7462
7463         r = kvm_x86_ops->hardware_setup();
7464         if (r != 0)
7465                 return r;
7466
7467         if (kvm_has_tsc_control) {
7468                 /*
7469                  * Make sure the user can only configure tsc_khz values that
7470                  * fit into a signed integer.
7471                  * A min value is not calculated needed because it will always
7472                  * be 1 on all machines.
7473                  */
7474                 u64 max = min(0x7fffffffULL,
7475                               __scale_tsc(kvm_max_tsc_scaling_ratio, tsc_khz));
7476                 kvm_max_guest_tsc_khz = max;
7477
7478                 kvm_default_tsc_scaling_ratio = 1ULL << kvm_tsc_scaling_ratio_frac_bits;
7479         }
7480
7481         kvm_init_msr_list();
7482         return 0;
7483 }
7484
7485 void kvm_arch_hardware_unsetup(void)
7486 {
7487         kvm_x86_ops->hardware_unsetup();
7488 }
7489
7490 void kvm_arch_check_processor_compat(void *rtn)
7491 {
7492         kvm_x86_ops->check_processor_compatibility(rtn);
7493 }
7494
7495 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu)
7496 {
7497         return vcpu->kvm->arch.bsp_vcpu_id == vcpu->vcpu_id;
7498 }
7499 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp);
7500
7501 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu)
7502 {
7503         return (vcpu->arch.apic_base & MSR_IA32_APICBASE_BSP) != 0;
7504 }
7505
7506 bool kvm_vcpu_compatible(struct kvm_vcpu *vcpu)
7507 {
7508         return irqchip_in_kernel(vcpu->kvm) == lapic_in_kernel(vcpu);
7509 }
7510
7511 struct static_key kvm_no_apic_vcpu __read_mostly;
7512
7513 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
7514 {
7515         struct page *page;
7516         struct kvm *kvm;
7517         int r;
7518
7519         BUG_ON(vcpu->kvm == NULL);
7520         kvm = vcpu->kvm;
7521
7522         vcpu->arch.pv.pv_unhalted = false;
7523         vcpu->arch.emulate_ctxt.ops = &emulate_ops;
7524         if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_reset_bsp(vcpu))
7525                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
7526         else
7527                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
7528
7529         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
7530         if (!page) {
7531                 r = -ENOMEM;
7532                 goto fail;
7533         }
7534         vcpu->arch.pio_data = page_address(page);
7535
7536         kvm_set_tsc_khz(vcpu, max_tsc_khz);
7537
7538         r = kvm_mmu_create(vcpu);
7539         if (r < 0)
7540                 goto fail_free_pio_data;
7541
7542         if (irqchip_in_kernel(kvm)) {
7543                 r = kvm_create_lapic(vcpu);
7544                 if (r < 0)
7545                         goto fail_mmu_destroy;
7546         } else
7547                 static_key_slow_inc(&kvm_no_apic_vcpu);
7548
7549         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
7550                                        GFP_KERNEL);
7551         if (!vcpu->arch.mce_banks) {
7552                 r = -ENOMEM;
7553                 goto fail_free_lapic;
7554         }
7555         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
7556
7557         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask, GFP_KERNEL)) {
7558                 r = -ENOMEM;
7559                 goto fail_free_mce_banks;
7560         }
7561
7562         fx_init(vcpu);
7563
7564         vcpu->arch.ia32_tsc_adjust_msr = 0x0;
7565         vcpu->arch.pv_time_enabled = false;
7566
7567         vcpu->arch.guest_supported_xcr0 = 0;
7568         vcpu->arch.guest_xstate_size = XSAVE_HDR_SIZE + XSAVE_HDR_OFFSET;
7569
7570         vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu);
7571
7572         vcpu->arch.pat = MSR_IA32_CR_PAT_DEFAULT;
7573
7574         kvm_async_pf_hash_reset(vcpu);
7575         kvm_pmu_init(vcpu);
7576
7577         vcpu->arch.pending_external_vector = -1;
7578
7579         return 0;
7580
7581 fail_free_mce_banks:
7582         kfree(vcpu->arch.mce_banks);
7583 fail_free_lapic:
7584         kvm_free_lapic(vcpu);
7585 fail_mmu_destroy:
7586         kvm_mmu_destroy(vcpu);
7587 fail_free_pio_data:
7588         free_page((unsigned long)vcpu->arch.pio_data);
7589 fail:
7590         return r;
7591 }
7592
7593 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
7594 {
7595         int idx;
7596
7597         kvm_pmu_destroy(vcpu);
7598         kfree(vcpu->arch.mce_banks);
7599         kvm_free_lapic(vcpu);
7600         idx = srcu_read_lock(&vcpu->kvm->srcu);
7601         kvm_mmu_destroy(vcpu);
7602         srcu_read_unlock(&vcpu->kvm->srcu, idx);
7603         free_page((unsigned long)vcpu->arch.pio_data);
7604         if (!lapic_in_kernel(vcpu))
7605                 static_key_slow_dec(&kvm_no_apic_vcpu);
7606 }
7607
7608 void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu)
7609 {
7610         kvm_x86_ops->sched_in(vcpu, cpu);
7611 }
7612
7613 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
7614 {
7615         if (type)
7616                 return -EINVAL;
7617
7618         INIT_HLIST_HEAD(&kvm->arch.mask_notifier_list);
7619         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
7620         INIT_LIST_HEAD(&kvm->arch.zapped_obsolete_pages);
7621         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
7622         atomic_set(&kvm->arch.noncoherent_dma_count, 0);
7623
7624         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
7625         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
7626         /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
7627         set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID,
7628                 &kvm->arch.irq_sources_bitmap);
7629
7630         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
7631         mutex_init(&kvm->arch.apic_map_lock);
7632         spin_lock_init(&kvm->arch.pvclock_gtod_sync_lock);
7633
7634         pvclock_update_vm_gtod_copy(kvm);
7635
7636         INIT_DELAYED_WORK(&kvm->arch.kvmclock_update_work, kvmclock_update_fn);
7637         INIT_DELAYED_WORK(&kvm->arch.kvmclock_sync_work, kvmclock_sync_fn);
7638
7639         return 0;
7640 }
7641
7642 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
7643 {
7644         int r;
7645         r = vcpu_load(vcpu);
7646         BUG_ON(r);
7647         kvm_mmu_unload(vcpu);
7648         vcpu_put(vcpu);
7649 }
7650
7651 static void kvm_free_vcpus(struct kvm *kvm)
7652 {
7653         unsigned int i;
7654         struct kvm_vcpu *vcpu;
7655
7656         /*
7657          * Unpin any mmu pages first.
7658          */
7659         kvm_for_each_vcpu(i, vcpu, kvm) {
7660                 kvm_clear_async_pf_completion_queue(vcpu);
7661                 kvm_unload_vcpu_mmu(vcpu);
7662         }
7663         kvm_for_each_vcpu(i, vcpu, kvm)
7664                 kvm_arch_vcpu_free(vcpu);
7665
7666         mutex_lock(&kvm->lock);
7667         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
7668                 kvm->vcpus[i] = NULL;
7669
7670         atomic_set(&kvm->online_vcpus, 0);
7671         mutex_unlock(&kvm->lock);
7672 }
7673
7674 void kvm_arch_sync_events(struct kvm *kvm)
7675 {
7676         cancel_delayed_work_sync(&kvm->arch.kvmclock_sync_work);
7677         cancel_delayed_work_sync(&kvm->arch.kvmclock_update_work);
7678         kvm_free_all_assigned_devices(kvm);
7679         kvm_free_pit(kvm);
7680 }
7681
7682 int __x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size)
7683 {
7684         int i, r;
7685         unsigned long hva;
7686         struct kvm_memslots *slots = kvm_memslots(kvm);
7687         struct kvm_memory_slot *slot, old;
7688
7689         /* Called with kvm->slots_lock held.  */
7690         if (WARN_ON(id >= KVM_MEM_SLOTS_NUM))
7691                 return -EINVAL;
7692
7693         slot = id_to_memslot(slots, id);
7694         if (size) {
7695                 if (WARN_ON(slot->npages))
7696                         return -EEXIST;
7697
7698                 /*
7699                  * MAP_SHARED to prevent internal slot pages from being moved
7700                  * by fork()/COW.
7701                  */
7702                 hva = vm_mmap(NULL, 0, size, PROT_READ | PROT_WRITE,
7703                               MAP_SHARED | MAP_ANONYMOUS, 0);
7704                 if (IS_ERR((void *)hva))
7705                         return PTR_ERR((void *)hva);
7706         } else {
7707                 if (!slot->npages)
7708                         return 0;
7709
7710                 hva = 0;
7711         }
7712
7713         old = *slot;
7714         for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
7715                 struct kvm_userspace_memory_region m;
7716
7717                 m.slot = id | (i << 16);
7718                 m.flags = 0;
7719                 m.guest_phys_addr = gpa;
7720                 m.userspace_addr = hva;
7721                 m.memory_size = size;
7722                 r = __kvm_set_memory_region(kvm, &m);
7723                 if (r < 0)
7724                         return r;
7725         }
7726
7727         if (!size) {
7728                 r = vm_munmap(old.userspace_addr, old.npages * PAGE_SIZE);
7729                 WARN_ON(r < 0);
7730         }
7731
7732         return 0;
7733 }
7734 EXPORT_SYMBOL_GPL(__x86_set_memory_region);
7735
7736 int x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size)
7737 {
7738         int r;
7739
7740         mutex_lock(&kvm->slots_lock);
7741         r = __x86_set_memory_region(kvm, id, gpa, size);
7742         mutex_unlock(&kvm->slots_lock);
7743
7744         return r;
7745 }
7746 EXPORT_SYMBOL_GPL(x86_set_memory_region);
7747
7748 void kvm_arch_destroy_vm(struct kvm *kvm)
7749 {
7750         if (current->mm == kvm->mm) {
7751                 /*
7752                  * Free memory regions allocated on behalf of userspace,
7753                  * unless the the memory map has changed due to process exit
7754                  * or fd copying.
7755                  */
7756                 x86_set_memory_region(kvm, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT, 0, 0);
7757                 x86_set_memory_region(kvm, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT, 0, 0);
7758                 x86_set_memory_region(kvm, TSS_PRIVATE_MEMSLOT, 0, 0);
7759         }
7760         kvm_iommu_unmap_guest(kvm);
7761         kfree(kvm->arch.vpic);
7762         kfree(kvm->arch.vioapic);
7763         kvm_free_vcpus(kvm);
7764         kfree(rcu_dereference_check(kvm->arch.apic_map, 1));
7765 }
7766
7767 void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *free,
7768                            struct kvm_memory_slot *dont)
7769 {
7770         int i;
7771
7772         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
7773                 if (!dont || free->arch.rmap[i] != dont->arch.rmap[i]) {
7774                         kvfree(free->arch.rmap[i]);
7775                         free->arch.rmap[i] = NULL;
7776                 }
7777                 if (i == 0)
7778                         continue;
7779
7780                 if (!dont || free->arch.lpage_info[i - 1] !=
7781                              dont->arch.lpage_info[i - 1]) {
7782                         kvfree(free->arch.lpage_info[i - 1]);
7783                         free->arch.lpage_info[i - 1] = NULL;
7784                 }
7785         }
7786 }
7787
7788 int kvm_arch_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot,
7789                             unsigned long npages)
7790 {
7791         int i;
7792
7793         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
7794                 unsigned long ugfn;
7795                 int lpages;
7796                 int level = i + 1;
7797
7798                 lpages = gfn_to_index(slot->base_gfn + npages - 1,
7799                                       slot->base_gfn, level) + 1;
7800
7801                 slot->arch.rmap[i] =
7802                         kvm_kvzalloc(lpages * sizeof(*slot->arch.rmap[i]));
7803                 if (!slot->arch.rmap[i])
7804                         goto out_free;
7805                 if (i == 0)
7806                         continue;
7807
7808                 slot->arch.lpage_info[i - 1] = kvm_kvzalloc(lpages *
7809                                         sizeof(*slot->arch.lpage_info[i - 1]));
7810                 if (!slot->arch.lpage_info[i - 1])
7811                         goto out_free;
7812
7813                 if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
7814                         slot->arch.lpage_info[i - 1][0].write_count = 1;
7815                 if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
7816                         slot->arch.lpage_info[i - 1][lpages - 1].write_count = 1;
7817                 ugfn = slot->userspace_addr >> PAGE_SHIFT;
7818                 /*
7819                  * If the gfn and userspace address are not aligned wrt each
7820                  * other, or if explicitly asked to, disable large page
7821                  * support for this slot
7822                  */
7823                 if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1) ||
7824                     !kvm_largepages_enabled()) {
7825                         unsigned long j;
7826
7827                         for (j = 0; j < lpages; ++j)
7828                                 slot->arch.lpage_info[i - 1][j].write_count = 1;
7829                 }
7830         }
7831
7832         return 0;
7833
7834 out_free:
7835         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
7836                 kvfree(slot->arch.rmap[i]);
7837                 slot->arch.rmap[i] = NULL;
7838                 if (i == 0)
7839                         continue;
7840
7841                 kvfree(slot->arch.lpage_info[i - 1]);
7842                 slot->arch.lpage_info[i - 1] = NULL;
7843         }
7844         return -ENOMEM;
7845 }
7846
7847 void kvm_arch_memslots_updated(struct kvm *kvm, struct kvm_memslots *slots)
7848 {
7849         /*
7850          * memslots->generation has been incremented.
7851          * mmio generation may have reached its maximum value.
7852          */
7853         kvm_mmu_invalidate_mmio_sptes(kvm, slots);
7854 }
7855
7856 int kvm_arch_prepare_memory_region(struct kvm *kvm,
7857                                 struct kvm_memory_slot *memslot,
7858                                 const struct kvm_userspace_memory_region *mem,
7859                                 enum kvm_mr_change change)
7860 {
7861         return 0;
7862 }
7863
7864 static void kvm_mmu_slot_apply_flags(struct kvm *kvm,
7865                                      struct kvm_memory_slot *new)
7866 {
7867         /* Still write protect RO slot */
7868         if (new->flags & KVM_MEM_READONLY) {
7869                 kvm_mmu_slot_remove_write_access(kvm, new);
7870                 return;
7871         }
7872
7873         /*
7874          * Call kvm_x86_ops dirty logging hooks when they are valid.
7875          *
7876          * kvm_x86_ops->slot_disable_log_dirty is called when:
7877          *
7878          *  - KVM_MR_CREATE with dirty logging is disabled
7879          *  - KVM_MR_FLAGS_ONLY with dirty logging is disabled in new flag
7880          *
7881          * The reason is, in case of PML, we need to set D-bit for any slots
7882          * with dirty logging disabled in order to eliminate unnecessary GPA
7883          * logging in PML buffer (and potential PML buffer full VMEXT). This
7884          * guarantees leaving PML enabled during guest's lifetime won't have
7885          * any additonal overhead from PML when guest is running with dirty
7886          * logging disabled for memory slots.
7887          *
7888          * kvm_x86_ops->slot_enable_log_dirty is called when switching new slot
7889          * to dirty logging mode.
7890          *
7891          * If kvm_x86_ops dirty logging hooks are invalid, use write protect.
7892          *
7893          * In case of write protect:
7894          *
7895          * Write protect all pages for dirty logging.
7896          *
7897          * All the sptes including the large sptes which point to this
7898          * slot are set to readonly. We can not create any new large
7899          * spte on this slot until the end of the logging.
7900          *
7901          * See the comments in fast_page_fault().
7902          */
7903         if (new->flags & KVM_MEM_LOG_DIRTY_PAGES) {
7904                 if (kvm_x86_ops->slot_enable_log_dirty)
7905                         kvm_x86_ops->slot_enable_log_dirty(kvm, new);
7906                 else
7907                         kvm_mmu_slot_remove_write_access(kvm, new);
7908         } else {
7909                 if (kvm_x86_ops->slot_disable_log_dirty)
7910                         kvm_x86_ops->slot_disable_log_dirty(kvm, new);
7911         }
7912 }
7913
7914 void kvm_arch_commit_memory_region(struct kvm *kvm,
7915                                 const struct kvm_userspace_memory_region *mem,
7916                                 const struct kvm_memory_slot *old,
7917                                 const struct kvm_memory_slot *new,
7918                                 enum kvm_mr_change change)
7919 {
7920         int nr_mmu_pages = 0;
7921
7922         if (!kvm->arch.n_requested_mmu_pages)
7923                 nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
7924
7925         if (nr_mmu_pages)
7926                 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
7927
7928         /*
7929          * Dirty logging tracks sptes in 4k granularity, meaning that large
7930          * sptes have to be split.  If live migration is successful, the guest
7931          * in the source machine will be destroyed and large sptes will be
7932          * created in the destination. However, if the guest continues to run
7933          * in the source machine (for example if live migration fails), small
7934          * sptes will remain around and cause bad performance.
7935          *
7936          * Scan sptes if dirty logging has been stopped, dropping those
7937          * which can be collapsed into a single large-page spte.  Later
7938          * page faults will create the large-page sptes.
7939          */
7940         if ((change != KVM_MR_DELETE) &&
7941                 (old->flags & KVM_MEM_LOG_DIRTY_PAGES) &&
7942                 !(new->flags & KVM_MEM_LOG_DIRTY_PAGES))
7943                 kvm_mmu_zap_collapsible_sptes(kvm, new);
7944
7945         /*
7946          * Set up write protection and/or dirty logging for the new slot.
7947          *
7948          * For KVM_MR_DELETE and KVM_MR_MOVE, the shadow pages of old slot have
7949          * been zapped so no dirty logging staff is needed for old slot. For
7950          * KVM_MR_FLAGS_ONLY, the old slot is essentially the same one as the
7951          * new and it's also covered when dealing with the new slot.
7952          *
7953          * FIXME: const-ify all uses of struct kvm_memory_slot.
7954          */
7955         if (change != KVM_MR_DELETE)
7956                 kvm_mmu_slot_apply_flags(kvm, (struct kvm_memory_slot *) new);
7957 }
7958
7959 void kvm_arch_flush_shadow_all(struct kvm *kvm)
7960 {
7961         kvm_mmu_invalidate_zap_all_pages(kvm);
7962 }
7963
7964 void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
7965                                    struct kvm_memory_slot *slot)
7966 {
7967         kvm_mmu_invalidate_zap_all_pages(kvm);
7968 }
7969
7970 static inline bool kvm_vcpu_has_events(struct kvm_vcpu *vcpu)
7971 {
7972         if (!list_empty_careful(&vcpu->async_pf.done))
7973                 return true;
7974
7975         if (kvm_apic_has_events(vcpu))
7976                 return true;
7977
7978         if (vcpu->arch.pv.pv_unhalted)
7979                 return true;
7980
7981         if (atomic_read(&vcpu->arch.nmi_queued))
7982                 return true;
7983
7984         if (test_bit(KVM_REQ_SMI, &vcpu->requests))
7985                 return true;
7986
7987         if (kvm_arch_interrupt_allowed(vcpu) &&
7988             kvm_cpu_has_interrupt(vcpu))
7989                 return true;
7990
7991         return false;
7992 }
7993
7994 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
7995 {
7996         if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events)
7997                 kvm_x86_ops->check_nested_events(vcpu, false);
7998
7999         return kvm_vcpu_running(vcpu) || kvm_vcpu_has_events(vcpu);
8000 }
8001
8002 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
8003 {
8004         return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
8005 }
8006
8007 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
8008 {
8009         return kvm_x86_ops->interrupt_allowed(vcpu);
8010 }
8011
8012 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu)
8013 {
8014         if (is_64_bit_mode(vcpu))
8015                 return kvm_rip_read(vcpu);
8016         return (u32)(get_segment_base(vcpu, VCPU_SREG_CS) +
8017                      kvm_rip_read(vcpu));
8018 }
8019 EXPORT_SYMBOL_GPL(kvm_get_linear_rip);
8020
8021 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
8022 {
8023         return kvm_get_linear_rip(vcpu) == linear_rip;
8024 }
8025 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
8026
8027 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
8028 {
8029         unsigned long rflags;
8030
8031         rflags = kvm_x86_ops->get_rflags(vcpu);
8032         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
8033                 rflags &= ~X86_EFLAGS_TF;
8034         return rflags;
8035 }
8036 EXPORT_SYMBOL_GPL(kvm_get_rflags);
8037
8038 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
8039 {
8040         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
8041             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
8042                 rflags |= X86_EFLAGS_TF;
8043         kvm_x86_ops->set_rflags(vcpu, rflags);
8044 }
8045
8046 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
8047 {
8048         __kvm_set_rflags(vcpu, rflags);
8049         kvm_make_request(KVM_REQ_EVENT, vcpu);
8050 }
8051 EXPORT_SYMBOL_GPL(kvm_set_rflags);
8052
8053 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
8054 {
8055         int r;
8056
8057         if ((vcpu->arch.mmu.direct_map != work->arch.direct_map) ||
8058               work->wakeup_all)
8059                 return;
8060
8061         r = kvm_mmu_reload(vcpu);
8062         if (unlikely(r))
8063                 return;
8064
8065         if (!vcpu->arch.mmu.direct_map &&
8066               work->arch.cr3 != vcpu->arch.mmu.get_cr3(vcpu))
8067                 return;
8068
8069         vcpu->arch.mmu.page_fault(vcpu, work->gva, 0, true);
8070 }
8071
8072 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
8073 {
8074         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
8075 }
8076
8077 static inline u32 kvm_async_pf_next_probe(u32 key)
8078 {
8079         return (key + 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU) - 1);
8080 }
8081
8082 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
8083 {
8084         u32 key = kvm_async_pf_hash_fn(gfn);
8085
8086         while (vcpu->arch.apf.gfns[key] != ~0)
8087                 key = kvm_async_pf_next_probe(key);
8088
8089         vcpu->arch.apf.gfns[key] = gfn;
8090 }
8091
8092 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
8093 {
8094         int i;
8095         u32 key = kvm_async_pf_hash_fn(gfn);
8096
8097         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU) &&
8098                      (vcpu->arch.apf.gfns[key] != gfn &&
8099                       vcpu->arch.apf.gfns[key] != ~0); i++)
8100                 key = kvm_async_pf_next_probe(key);
8101
8102         return key;
8103 }
8104
8105 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
8106 {
8107         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
8108 }
8109
8110 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
8111 {
8112         u32 i, j, k;
8113
8114         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
8115         while (true) {
8116                 vcpu->arch.apf.gfns[i] = ~0;
8117                 do {
8118                         j = kvm_async_pf_next_probe(j);
8119                         if (vcpu->arch.apf.gfns[j] == ~0)
8120                                 return;
8121                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
8122                         /*
8123                          * k lies cyclically in ]i,j]
8124                          * |    i.k.j |
8125                          * |....j i.k.| or  |.k..j i...|
8126                          */
8127                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
8128                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
8129                 i = j;
8130         }
8131 }
8132
8133 static int apf_put_user(struct kvm_vcpu *vcpu, u32 val)
8134 {
8135
8136         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &val,
8137                                       sizeof(val));
8138 }
8139
8140 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
8141                                      struct kvm_async_pf *work)
8142 {
8143         struct x86_exception fault;
8144
8145         trace_kvm_async_pf_not_present(work->arch.token, work->gva);
8146         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
8147
8148         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) ||
8149             (vcpu->arch.apf.send_user_only &&
8150              kvm_x86_ops->get_cpl(vcpu) == 0))
8151                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
8152         else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_NOT_PRESENT)) {
8153                 fault.vector = PF_VECTOR;
8154                 fault.error_code_valid = true;
8155                 fault.error_code = 0;
8156                 fault.nested_page_fault = false;
8157                 fault.address = work->arch.token;
8158                 kvm_inject_page_fault(vcpu, &fault);
8159         }
8160 }
8161
8162 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
8163                                  struct kvm_async_pf *work)
8164 {
8165         struct x86_exception fault;
8166
8167         trace_kvm_async_pf_ready(work->arch.token, work->gva);
8168         if (work->wakeup_all)
8169                 work->arch.token = ~0; /* broadcast wakeup */
8170         else
8171                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
8172
8173         if ((vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) &&
8174             !apf_put_user(vcpu, KVM_PV_REASON_PAGE_READY)) {
8175                 fault.vector = PF_VECTOR;
8176                 fault.error_code_valid = true;
8177                 fault.error_code = 0;
8178                 fault.nested_page_fault = false;
8179                 fault.address = work->arch.token;
8180                 kvm_inject_page_fault(vcpu, &fault);
8181         }
8182         vcpu->arch.apf.halted = false;
8183         vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
8184 }
8185
8186 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu)
8187 {
8188         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED))
8189                 return true;
8190         else
8191                 return !kvm_event_needs_reinjection(vcpu) &&
8192                         kvm_x86_ops->interrupt_allowed(vcpu);
8193 }
8194
8195 void kvm_arch_start_assignment(struct kvm *kvm)
8196 {
8197         atomic_inc(&kvm->arch.assigned_device_count);
8198 }
8199 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment);
8200
8201 void kvm_arch_end_assignment(struct kvm *kvm)
8202 {
8203         atomic_dec(&kvm->arch.assigned_device_count);
8204 }
8205 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment);
8206
8207 bool kvm_arch_has_assigned_device(struct kvm *kvm)
8208 {
8209         return atomic_read(&kvm->arch.assigned_device_count);
8210 }
8211 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device);
8212
8213 void kvm_arch_register_noncoherent_dma(struct kvm *kvm)
8214 {
8215         atomic_inc(&kvm->arch.noncoherent_dma_count);
8216 }
8217 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma);
8218
8219 void kvm_arch_unregister_noncoherent_dma(struct kvm *kvm)
8220 {
8221         atomic_dec(&kvm->arch.noncoherent_dma_count);
8222 }
8223 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma);
8224
8225 bool kvm_arch_has_noncoherent_dma(struct kvm *kvm)
8226 {
8227         return atomic_read(&kvm->arch.noncoherent_dma_count);
8228 }
8229 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma);
8230
8231 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer *cons,
8232                                       struct irq_bypass_producer *prod)
8233 {
8234         struct kvm_kernel_irqfd *irqfd =
8235                 container_of(cons, struct kvm_kernel_irqfd, consumer);
8236
8237         if (kvm_x86_ops->update_pi_irte) {
8238                 irqfd->producer = prod;
8239                 return kvm_x86_ops->update_pi_irte(irqfd->kvm,
8240                                 prod->irq, irqfd->gsi, 1);
8241         }
8242
8243         return -EINVAL;
8244 }
8245
8246 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer *cons,
8247                                       struct irq_bypass_producer *prod)
8248 {
8249         int ret;
8250         struct kvm_kernel_irqfd *irqfd =
8251                 container_of(cons, struct kvm_kernel_irqfd, consumer);
8252
8253         if (!kvm_x86_ops->update_pi_irte) {
8254                 WARN_ON(irqfd->producer != NULL);
8255                 return;
8256         }
8257
8258         WARN_ON(irqfd->producer != prod);
8259         irqfd->producer = NULL;
8260
8261         /*
8262          * When producer of consumer is unregistered, we change back to
8263          * remapped mode, so we can re-use the current implementation
8264          * when the irq is masked/disabed or the consumer side (KVM
8265          * int this case doesn't want to receive the interrupts.
8266         */
8267         ret = kvm_x86_ops->update_pi_irte(irqfd->kvm, prod->irq, irqfd->gsi, 0);
8268         if (ret)
8269                 printk(KERN_INFO "irq bypass consumer (token %p) unregistration"
8270                        " fails: %d\n", irqfd->consumer.token, ret);
8271 }
8272
8273 int kvm_arch_update_irqfd_routing(struct kvm *kvm, unsigned int host_irq,
8274                                    uint32_t guest_irq, bool set)
8275 {
8276         if (!kvm_x86_ops->update_pi_irte)
8277                 return -EINVAL;
8278
8279         return kvm_x86_ops->update_pi_irte(kvm, host_irq, guest_irq, set);
8280 }
8281
8282 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
8283 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio);
8284 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
8285 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
8286 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
8287 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
8288 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
8289 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
8290 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
8291 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
8292 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
8293 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
8294 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);
8295 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset);
8296 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window);
8297 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full);
8298 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update);