2 * Kernel-based Virtual Machine driver for Linux
4 * derived from drivers/kvm/kvm_main.c
6 * Copyright (C) 2006 Qumranet, Inc.
7 * Copyright (C) 2008 Qumranet, Inc.
8 * Copyright IBM Corporation, 2008
9 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
12 * Avi Kivity <avi@qumranet.com>
13 * Yaniv Kamay <yaniv@qumranet.com>
14 * Amit Shah <amit.shah@qumranet.com>
15 * Ben-Ami Yassour <benami@il.ibm.com>
17 * This work is licensed under the terms of the GNU GPL, version 2. See
18 * the COPYING file in the top-level directory.
22 #include <linux/kvm_host.h>
27 #include "kvm_cache_regs.h"
30 #include "assigned-dev.h"
34 #include <linux/clocksource.h>
35 #include <linux/interrupt.h>
36 #include <linux/kvm.h>
38 #include <linux/vmalloc.h>
39 #include <linux/module.h>
40 #include <linux/mman.h>
41 #include <linux/highmem.h>
42 #include <linux/iommu.h>
43 #include <linux/intel-iommu.h>
44 #include <linux/cpufreq.h>
45 #include <linux/user-return-notifier.h>
46 #include <linux/srcu.h>
47 #include <linux/slab.h>
48 #include <linux/perf_event.h>
49 #include <linux/uaccess.h>
50 #include <linux/hash.h>
51 #include <linux/pci.h>
52 #include <linux/timekeeper_internal.h>
53 #include <linux/pvclock_gtod.h>
54 #include <linux/kvm_irqfd.h>
55 #include <linux/irqbypass.h>
56 #include <trace/events/kvm.h>
58 #define CREATE_TRACE_POINTS
61 #include <asm/debugreg.h>
65 #include <linux/kernel_stat.h>
66 #include <asm/fpu/internal.h> /* Ugh! */
67 #include <asm/pvclock.h>
68 #include <asm/div64.h>
69 #include <asm/irq_remapping.h>
71 #define MAX_IO_MSRS 256
72 #define KVM_MAX_MCE_BANKS 32
73 #define KVM_MCE_CAP_SUPPORTED (MCG_CTL_P | MCG_SER_P)
75 #define emul_to_vcpu(ctxt) \
76 container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
79 * - enable syscall per default because its emulated by KVM
80 * - enable LME and LMA per default on 64 bit KVM
84 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
86 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
89 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
90 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
92 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
93 static void process_nmi(struct kvm_vcpu *vcpu);
94 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
96 struct kvm_x86_ops *kvm_x86_ops __read_mostly;
97 EXPORT_SYMBOL_GPL(kvm_x86_ops);
99 static bool __read_mostly ignore_msrs = 0;
100 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
102 unsigned int min_timer_period_us = 500;
103 module_param(min_timer_period_us, uint, S_IRUGO | S_IWUSR);
105 static bool __read_mostly kvmclock_periodic_sync = true;
106 module_param(kvmclock_periodic_sync, bool, S_IRUGO);
108 bool __read_mostly kvm_has_tsc_control;
109 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
110 u32 __read_mostly kvm_max_guest_tsc_khz;
111 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
112 u8 __read_mostly kvm_tsc_scaling_ratio_frac_bits;
113 EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits);
114 u64 __read_mostly kvm_max_tsc_scaling_ratio;
115 EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio);
116 static u64 __read_mostly kvm_default_tsc_scaling_ratio;
118 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
119 static u32 __read_mostly tsc_tolerance_ppm = 250;
120 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
122 /* lapic timer advance (tscdeadline mode only) in nanoseconds */
123 unsigned int __read_mostly lapic_timer_advance_ns = 0;
124 module_param(lapic_timer_advance_ns, uint, S_IRUGO | S_IWUSR);
126 static bool __read_mostly backwards_tsc_observed = false;
128 #define KVM_NR_SHARED_MSRS 16
130 struct kvm_shared_msrs_global {
132 u32 msrs[KVM_NR_SHARED_MSRS];
135 struct kvm_shared_msrs {
136 struct user_return_notifier urn;
138 struct kvm_shared_msr_values {
141 } values[KVM_NR_SHARED_MSRS];
144 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
145 static struct kvm_shared_msrs __percpu *shared_msrs;
147 struct kvm_stats_debugfs_item debugfs_entries[] = {
148 { "pf_fixed", VCPU_STAT(pf_fixed) },
149 { "pf_guest", VCPU_STAT(pf_guest) },
150 { "tlb_flush", VCPU_STAT(tlb_flush) },
151 { "invlpg", VCPU_STAT(invlpg) },
152 { "exits", VCPU_STAT(exits) },
153 { "io_exits", VCPU_STAT(io_exits) },
154 { "mmio_exits", VCPU_STAT(mmio_exits) },
155 { "signal_exits", VCPU_STAT(signal_exits) },
156 { "irq_window", VCPU_STAT(irq_window_exits) },
157 { "nmi_window", VCPU_STAT(nmi_window_exits) },
158 { "halt_exits", VCPU_STAT(halt_exits) },
159 { "halt_successful_poll", VCPU_STAT(halt_successful_poll) },
160 { "halt_attempted_poll", VCPU_STAT(halt_attempted_poll) },
161 { "halt_wakeup", VCPU_STAT(halt_wakeup) },
162 { "hypercalls", VCPU_STAT(hypercalls) },
163 { "request_irq", VCPU_STAT(request_irq_exits) },
164 { "irq_exits", VCPU_STAT(irq_exits) },
165 { "host_state_reload", VCPU_STAT(host_state_reload) },
166 { "efer_reload", VCPU_STAT(efer_reload) },
167 { "fpu_reload", VCPU_STAT(fpu_reload) },
168 { "insn_emulation", VCPU_STAT(insn_emulation) },
169 { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
170 { "irq_injections", VCPU_STAT(irq_injections) },
171 { "nmi_injections", VCPU_STAT(nmi_injections) },
172 { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
173 { "mmu_pte_write", VM_STAT(mmu_pte_write) },
174 { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
175 { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
176 { "mmu_flooded", VM_STAT(mmu_flooded) },
177 { "mmu_recycled", VM_STAT(mmu_recycled) },
178 { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
179 { "mmu_unsync", VM_STAT(mmu_unsync) },
180 { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
181 { "largepages", VM_STAT(lpages) },
185 u64 __read_mostly host_xcr0;
187 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
189 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
192 for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU); i++)
193 vcpu->arch.apf.gfns[i] = ~0;
196 static void kvm_on_user_return(struct user_return_notifier *urn)
199 struct kvm_shared_msrs *locals
200 = container_of(urn, struct kvm_shared_msrs, urn);
201 struct kvm_shared_msr_values *values;
203 for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
204 values = &locals->values[slot];
205 if (values->host != values->curr) {
206 wrmsrl(shared_msrs_global.msrs[slot], values->host);
207 values->curr = values->host;
210 locals->registered = false;
211 user_return_notifier_unregister(urn);
214 static void shared_msr_update(unsigned slot, u32 msr)
217 unsigned int cpu = smp_processor_id();
218 struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
220 /* only read, and nobody should modify it at this time,
221 * so don't need lock */
222 if (slot >= shared_msrs_global.nr) {
223 printk(KERN_ERR "kvm: invalid MSR slot!");
226 rdmsrl_safe(msr, &value);
227 smsr->values[slot].host = value;
228 smsr->values[slot].curr = value;
231 void kvm_define_shared_msr(unsigned slot, u32 msr)
233 BUG_ON(slot >= KVM_NR_SHARED_MSRS);
234 shared_msrs_global.msrs[slot] = msr;
235 if (slot >= shared_msrs_global.nr)
236 shared_msrs_global.nr = slot + 1;
238 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
240 static void kvm_shared_msr_cpu_online(void)
244 for (i = 0; i < shared_msrs_global.nr; ++i)
245 shared_msr_update(i, shared_msrs_global.msrs[i]);
248 int kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
250 unsigned int cpu = smp_processor_id();
251 struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
254 if (((value ^ smsr->values[slot].curr) & mask) == 0)
256 smsr->values[slot].curr = value;
257 err = wrmsrl_safe(shared_msrs_global.msrs[slot], value);
261 if (!smsr->registered) {
262 smsr->urn.on_user_return = kvm_on_user_return;
263 user_return_notifier_register(&smsr->urn);
264 smsr->registered = true;
268 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
270 static void drop_user_return_notifiers(void)
272 unsigned int cpu = smp_processor_id();
273 struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
275 if (smsr->registered)
276 kvm_on_user_return(&smsr->urn);
279 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
281 return vcpu->arch.apic_base;
283 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
285 int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
287 u64 old_state = vcpu->arch.apic_base &
288 (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE);
289 u64 new_state = msr_info->data &
290 (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE);
291 u64 reserved_bits = ((~0ULL) << cpuid_maxphyaddr(vcpu)) |
292 0x2ff | (guest_cpuid_has_x2apic(vcpu) ? 0 : X2APIC_ENABLE);
294 if (!msr_info->host_initiated &&
295 ((msr_info->data & reserved_bits) != 0 ||
296 new_state == X2APIC_ENABLE ||
297 (new_state == MSR_IA32_APICBASE_ENABLE &&
298 old_state == (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE)) ||
299 (new_state == (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE) &&
303 kvm_lapic_set_base(vcpu, msr_info->data);
306 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
308 asmlinkage __visible void kvm_spurious_fault(void)
310 /* Fault while not rebooting. We want the trace. */
313 EXPORT_SYMBOL_GPL(kvm_spurious_fault);
315 #define EXCPT_BENIGN 0
316 #define EXCPT_CONTRIBUTORY 1
319 static int exception_class(int vector)
329 return EXCPT_CONTRIBUTORY;
336 #define EXCPT_FAULT 0
338 #define EXCPT_ABORT 2
339 #define EXCPT_INTERRUPT 3
341 static int exception_type(int vector)
345 if (WARN_ON(vector > 31 || vector == NMI_VECTOR))
346 return EXCPT_INTERRUPT;
350 /* #DB is trap, as instruction watchpoints are handled elsewhere */
351 if (mask & ((1 << DB_VECTOR) | (1 << BP_VECTOR) | (1 << OF_VECTOR)))
354 if (mask & ((1 << DF_VECTOR) | (1 << MC_VECTOR)))
357 /* Reserved exceptions will result in fault */
361 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
362 unsigned nr, bool has_error, u32 error_code,
368 kvm_make_request(KVM_REQ_EVENT, vcpu);
370 if (!vcpu->arch.exception.pending) {
372 if (has_error && !is_protmode(vcpu))
374 vcpu->arch.exception.pending = true;
375 vcpu->arch.exception.has_error_code = has_error;
376 vcpu->arch.exception.nr = nr;
377 vcpu->arch.exception.error_code = error_code;
378 vcpu->arch.exception.reinject = reinject;
382 /* to check exception */
383 prev_nr = vcpu->arch.exception.nr;
384 if (prev_nr == DF_VECTOR) {
385 /* triple fault -> shutdown */
386 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
389 class1 = exception_class(prev_nr);
390 class2 = exception_class(nr);
391 if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
392 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
393 /* generate double fault per SDM Table 5-5 */
394 vcpu->arch.exception.pending = true;
395 vcpu->arch.exception.has_error_code = true;
396 vcpu->arch.exception.nr = DF_VECTOR;
397 vcpu->arch.exception.error_code = 0;
399 /* replace previous exception with a new one in a hope
400 that instruction re-execution will regenerate lost
405 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
407 kvm_multiple_exception(vcpu, nr, false, 0, false);
409 EXPORT_SYMBOL_GPL(kvm_queue_exception);
411 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
413 kvm_multiple_exception(vcpu, nr, false, 0, true);
415 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
417 void kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
420 kvm_inject_gp(vcpu, 0);
422 kvm_x86_ops->skip_emulated_instruction(vcpu);
424 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
426 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
428 ++vcpu->stat.pf_guest;
429 vcpu->arch.cr2 = fault->address;
430 kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
432 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
434 static bool kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
436 if (mmu_is_nested(vcpu) && !fault->nested_page_fault)
437 vcpu->arch.nested_mmu.inject_page_fault(vcpu, fault);
439 vcpu->arch.mmu.inject_page_fault(vcpu, fault);
441 return fault->nested_page_fault;
444 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
446 atomic_inc(&vcpu->arch.nmi_queued);
447 kvm_make_request(KVM_REQ_NMI, vcpu);
449 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
451 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
453 kvm_multiple_exception(vcpu, nr, true, error_code, false);
455 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
457 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
459 kvm_multiple_exception(vcpu, nr, true, error_code, true);
461 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
464 * Checks if cpl <= required_cpl; if true, return true. Otherwise queue
465 * a #GP and return false.
467 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
469 if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
471 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
474 EXPORT_SYMBOL_GPL(kvm_require_cpl);
476 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr)
478 if ((dr != 4 && dr != 5) || !kvm_read_cr4_bits(vcpu, X86_CR4_DE))
481 kvm_queue_exception(vcpu, UD_VECTOR);
484 EXPORT_SYMBOL_GPL(kvm_require_dr);
487 * This function will be used to read from the physical memory of the currently
488 * running guest. The difference to kvm_vcpu_read_guest_page is that this function
489 * can read from guest physical or from the guest's guest physical memory.
491 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
492 gfn_t ngfn, void *data, int offset, int len,
495 struct x86_exception exception;
499 ngpa = gfn_to_gpa(ngfn);
500 real_gfn = mmu->translate_gpa(vcpu, ngpa, access, &exception);
501 if (real_gfn == UNMAPPED_GVA)
504 real_gfn = gpa_to_gfn(real_gfn);
506 return kvm_vcpu_read_guest_page(vcpu, real_gfn, data, offset, len);
508 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
510 static int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
511 void *data, int offset, int len, u32 access)
513 return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
514 data, offset, len, access);
518 * Load the pae pdptrs. Return true is they are all valid.
520 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
522 gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
523 unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
526 u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
528 ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
529 offset * sizeof(u64), sizeof(pdpte),
530 PFERR_USER_MASK|PFERR_WRITE_MASK);
535 for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
536 if (is_present_gpte(pdpte[i]) &&
538 vcpu->arch.mmu.guest_rsvd_check.rsvd_bits_mask[0][2])) {
545 memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
546 __set_bit(VCPU_EXREG_PDPTR,
547 (unsigned long *)&vcpu->arch.regs_avail);
548 __set_bit(VCPU_EXREG_PDPTR,
549 (unsigned long *)&vcpu->arch.regs_dirty);
554 EXPORT_SYMBOL_GPL(load_pdptrs);
556 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
558 u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
564 if (is_long_mode(vcpu) || !is_pae(vcpu))
567 if (!test_bit(VCPU_EXREG_PDPTR,
568 (unsigned long *)&vcpu->arch.regs_avail))
571 gfn = (kvm_read_cr3(vcpu) & ~31u) >> PAGE_SHIFT;
572 offset = (kvm_read_cr3(vcpu) & ~31u) & (PAGE_SIZE - 1);
573 r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
574 PFERR_USER_MASK | PFERR_WRITE_MASK);
577 changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
583 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
585 unsigned long old_cr0 = kvm_read_cr0(vcpu);
586 unsigned long update_bits = X86_CR0_PG | X86_CR0_WP;
591 if (cr0 & 0xffffffff00000000UL)
595 cr0 &= ~CR0_RESERVED_BITS;
597 if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
600 if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
603 if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
605 if ((vcpu->arch.efer & EFER_LME)) {
610 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
615 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
620 if (!(cr0 & X86_CR0_PG) && kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
623 kvm_x86_ops->set_cr0(vcpu, cr0);
625 if ((cr0 ^ old_cr0) & X86_CR0_PG) {
626 kvm_clear_async_pf_completion_queue(vcpu);
627 kvm_async_pf_hash_reset(vcpu);
630 if ((cr0 ^ old_cr0) & update_bits)
631 kvm_mmu_reset_context(vcpu);
633 if (((cr0 ^ old_cr0) & X86_CR0_CD) &&
634 kvm_arch_has_noncoherent_dma(vcpu->kvm) &&
635 !kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_CD_NW_CLEARED))
636 kvm_zap_gfn_range(vcpu->kvm, 0, ~0ULL);
640 EXPORT_SYMBOL_GPL(kvm_set_cr0);
642 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
644 (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
646 EXPORT_SYMBOL_GPL(kvm_lmsw);
648 static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
650 if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
651 !vcpu->guest_xcr0_loaded) {
652 /* kvm_set_xcr() also depends on this */
653 xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
654 vcpu->guest_xcr0_loaded = 1;
658 static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
660 if (vcpu->guest_xcr0_loaded) {
661 if (vcpu->arch.xcr0 != host_xcr0)
662 xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
663 vcpu->guest_xcr0_loaded = 0;
667 static int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
670 u64 old_xcr0 = vcpu->arch.xcr0;
673 /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now */
674 if (index != XCR_XFEATURE_ENABLED_MASK)
676 if (!(xcr0 & XFEATURE_MASK_FP))
678 if ((xcr0 & XFEATURE_MASK_YMM) && !(xcr0 & XFEATURE_MASK_SSE))
682 * Do not allow the guest to set bits that we do not support
683 * saving. However, xcr0 bit 0 is always set, even if the
684 * emulated CPU does not support XSAVE (see fx_init).
686 valid_bits = vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FP;
687 if (xcr0 & ~valid_bits)
690 if ((!(xcr0 & XFEATURE_MASK_BNDREGS)) !=
691 (!(xcr0 & XFEATURE_MASK_BNDCSR)))
694 if (xcr0 & XFEATURE_MASK_AVX512) {
695 if (!(xcr0 & XFEATURE_MASK_YMM))
697 if ((xcr0 & XFEATURE_MASK_AVX512) != XFEATURE_MASK_AVX512)
700 kvm_put_guest_xcr0(vcpu);
701 vcpu->arch.xcr0 = xcr0;
703 if ((xcr0 ^ old_xcr0) & XFEATURE_MASK_EXTEND)
704 kvm_update_cpuid(vcpu);
708 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
710 if (kvm_x86_ops->get_cpl(vcpu) != 0 ||
711 __kvm_set_xcr(vcpu, index, xcr)) {
712 kvm_inject_gp(vcpu, 0);
717 EXPORT_SYMBOL_GPL(kvm_set_xcr);
719 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
721 unsigned long old_cr4 = kvm_read_cr4(vcpu);
722 unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE |
723 X86_CR4_SMEP | X86_CR4_SMAP;
725 if (cr4 & CR4_RESERVED_BITS)
728 if (!guest_cpuid_has_xsave(vcpu) && (cr4 & X86_CR4_OSXSAVE))
731 if (!guest_cpuid_has_smep(vcpu) && (cr4 & X86_CR4_SMEP))
734 if (!guest_cpuid_has_smap(vcpu) && (cr4 & X86_CR4_SMAP))
737 if (!guest_cpuid_has_fsgsbase(vcpu) && (cr4 & X86_CR4_FSGSBASE))
740 if (is_long_mode(vcpu)) {
741 if (!(cr4 & X86_CR4_PAE))
743 } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
744 && ((cr4 ^ old_cr4) & pdptr_bits)
745 && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
749 if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
750 if (!guest_cpuid_has_pcid(vcpu))
753 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
754 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_MASK) || !is_long_mode(vcpu))
758 if (kvm_x86_ops->set_cr4(vcpu, cr4))
761 if (((cr4 ^ old_cr4) & pdptr_bits) ||
762 (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
763 kvm_mmu_reset_context(vcpu);
765 if ((cr4 ^ old_cr4) & X86_CR4_OSXSAVE)
766 kvm_update_cpuid(vcpu);
770 EXPORT_SYMBOL_GPL(kvm_set_cr4);
772 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
775 cr3 &= ~CR3_PCID_INVD;
778 if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
779 kvm_mmu_sync_roots(vcpu);
780 kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu);
784 if (is_long_mode(vcpu)) {
785 if (cr3 & CR3_L_MODE_RESERVED_BITS)
787 } else if (is_pae(vcpu) && is_paging(vcpu) &&
788 !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
791 vcpu->arch.cr3 = cr3;
792 __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
793 kvm_mmu_new_cr3(vcpu);
796 EXPORT_SYMBOL_GPL(kvm_set_cr3);
798 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
800 if (cr8 & CR8_RESERVED_BITS)
802 if (lapic_in_kernel(vcpu))
803 kvm_lapic_set_tpr(vcpu, cr8);
805 vcpu->arch.cr8 = cr8;
808 EXPORT_SYMBOL_GPL(kvm_set_cr8);
810 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
812 if (lapic_in_kernel(vcpu))
813 return kvm_lapic_get_cr8(vcpu);
815 return vcpu->arch.cr8;
817 EXPORT_SYMBOL_GPL(kvm_get_cr8);
819 static void kvm_update_dr0123(struct kvm_vcpu *vcpu)
823 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
824 for (i = 0; i < KVM_NR_DB_REGS; i++)
825 vcpu->arch.eff_db[i] = vcpu->arch.db[i];
826 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_RELOAD;
830 static void kvm_update_dr6(struct kvm_vcpu *vcpu)
832 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
833 kvm_x86_ops->set_dr6(vcpu, vcpu->arch.dr6);
836 static void kvm_update_dr7(struct kvm_vcpu *vcpu)
840 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
841 dr7 = vcpu->arch.guest_debug_dr7;
843 dr7 = vcpu->arch.dr7;
844 kvm_x86_ops->set_dr7(vcpu, dr7);
845 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_BP_ENABLED;
846 if (dr7 & DR7_BP_EN_MASK)
847 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_BP_ENABLED;
850 static u64 kvm_dr6_fixed(struct kvm_vcpu *vcpu)
852 u64 fixed = DR6_FIXED_1;
854 if (!guest_cpuid_has_rtm(vcpu))
859 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
863 vcpu->arch.db[dr] = val;
864 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
865 vcpu->arch.eff_db[dr] = val;
870 if (val & 0xffffffff00000000ULL)
872 vcpu->arch.dr6 = (val & DR6_VOLATILE) | kvm_dr6_fixed(vcpu);
873 kvm_update_dr6(vcpu);
878 if (val & 0xffffffff00000000ULL)
880 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
881 kvm_update_dr7(vcpu);
888 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
890 if (__kvm_set_dr(vcpu, dr, val)) {
891 kvm_inject_gp(vcpu, 0);
896 EXPORT_SYMBOL_GPL(kvm_set_dr);
898 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
902 *val = vcpu->arch.db[dr];
907 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
908 *val = vcpu->arch.dr6;
910 *val = kvm_x86_ops->get_dr6(vcpu);
915 *val = vcpu->arch.dr7;
920 EXPORT_SYMBOL_GPL(kvm_get_dr);
922 bool kvm_rdpmc(struct kvm_vcpu *vcpu)
924 u32 ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
928 err = kvm_pmu_rdpmc(vcpu, ecx, &data);
931 kvm_register_write(vcpu, VCPU_REGS_RAX, (u32)data);
932 kvm_register_write(vcpu, VCPU_REGS_RDX, data >> 32);
935 EXPORT_SYMBOL_GPL(kvm_rdpmc);
938 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
939 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
941 * This list is modified at module load time to reflect the
942 * capabilities of the host cpu. This capabilities test skips MSRs that are
943 * kvm-specific. Those are put in emulated_msrs; filtering of emulated_msrs
944 * may depend on host virtualization features rather than host cpu features.
947 static u32 msrs_to_save[] = {
948 MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
951 MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
953 MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA,
954 MSR_IA32_FEATURE_CONTROL, MSR_IA32_BNDCFGS, MSR_TSC_AUX,
957 static unsigned num_msrs_to_save;
959 static u32 emulated_msrs[] = {
960 MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
961 MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
962 HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
963 HV_X64_MSR_TIME_REF_COUNT, HV_X64_MSR_REFERENCE_TSC,
964 HV_X64_MSR_CRASH_P0, HV_X64_MSR_CRASH_P1, HV_X64_MSR_CRASH_P2,
965 HV_X64_MSR_CRASH_P3, HV_X64_MSR_CRASH_P4, HV_X64_MSR_CRASH_CTL,
968 HV_X64_MSR_VP_RUNTIME,
969 HV_X64_MSR_APIC_ASSIST_PAGE, MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
973 MSR_IA32_TSCDEADLINE,
974 MSR_IA32_MISC_ENABLE,
980 static unsigned num_emulated_msrs;
982 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
984 if (efer & efer_reserved_bits)
987 if (efer & EFER_FFXSR) {
988 struct kvm_cpuid_entry2 *feat;
990 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
991 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT)))
995 if (efer & EFER_SVME) {
996 struct kvm_cpuid_entry2 *feat;
998 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
999 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM)))
1005 EXPORT_SYMBOL_GPL(kvm_valid_efer);
1007 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
1009 u64 old_efer = vcpu->arch.efer;
1011 if (!kvm_valid_efer(vcpu, efer))
1015 && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
1019 efer |= vcpu->arch.efer & EFER_LMA;
1021 kvm_x86_ops->set_efer(vcpu, efer);
1023 /* Update reserved bits */
1024 if ((efer ^ old_efer) & EFER_NX)
1025 kvm_mmu_reset_context(vcpu);
1030 void kvm_enable_efer_bits(u64 mask)
1032 efer_reserved_bits &= ~mask;
1034 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
1037 * Writes msr value into into the appropriate "register".
1038 * Returns 0 on success, non-0 otherwise.
1039 * Assumes vcpu_load() was already called.
1041 int kvm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
1043 switch (msr->index) {
1046 case MSR_KERNEL_GS_BASE:
1049 if (is_noncanonical_address(msr->data))
1052 case MSR_IA32_SYSENTER_EIP:
1053 case MSR_IA32_SYSENTER_ESP:
1055 * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1056 * non-canonical address is written on Intel but not on
1057 * AMD (which ignores the top 32-bits, because it does
1058 * not implement 64-bit SYSENTER).
1060 * 64-bit code should hence be able to write a non-canonical
1061 * value on AMD. Making the address canonical ensures that
1062 * vmentry does not fail on Intel after writing a non-canonical
1063 * value, and that something deterministic happens if the guest
1064 * invokes 64-bit SYSENTER.
1066 msr->data = get_canonical(msr->data);
1068 return kvm_x86_ops->set_msr(vcpu, msr);
1070 EXPORT_SYMBOL_GPL(kvm_set_msr);
1073 * Adapt set_msr() to msr_io()'s calling convention
1075 static int do_get_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1077 struct msr_data msr;
1081 msr.host_initiated = true;
1082 r = kvm_get_msr(vcpu, &msr);
1090 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1092 struct msr_data msr;
1096 msr.host_initiated = true;
1097 return kvm_set_msr(vcpu, &msr);
1100 #ifdef CONFIG_X86_64
1101 struct pvclock_gtod_data {
1104 struct { /* extract of a clocksource struct */
1116 static struct pvclock_gtod_data pvclock_gtod_data;
1118 static void update_pvclock_gtod(struct timekeeper *tk)
1120 struct pvclock_gtod_data *vdata = &pvclock_gtod_data;
1123 boot_ns = ktime_to_ns(ktime_add(tk->tkr_mono.base, tk->offs_boot));
1125 write_seqcount_begin(&vdata->seq);
1127 /* copy pvclock gtod data */
1128 vdata->clock.vclock_mode = tk->tkr_mono.clock->archdata.vclock_mode;
1129 vdata->clock.cycle_last = tk->tkr_mono.cycle_last;
1130 vdata->clock.mask = tk->tkr_mono.mask;
1131 vdata->clock.mult = tk->tkr_mono.mult;
1132 vdata->clock.shift = tk->tkr_mono.shift;
1134 vdata->boot_ns = boot_ns;
1135 vdata->nsec_base = tk->tkr_mono.xtime_nsec;
1137 write_seqcount_end(&vdata->seq);
1141 void kvm_set_pending_timer(struct kvm_vcpu *vcpu)
1144 * Note: KVM_REQ_PENDING_TIMER is implicitly checked in
1145 * vcpu_enter_guest. This function is only called from
1146 * the physical CPU that is running vcpu.
1148 kvm_make_request(KVM_REQ_PENDING_TIMER, vcpu);
1151 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
1155 struct pvclock_wall_clock wc;
1156 struct timespec boot;
1161 r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
1166 ++version; /* first time write, random junk */
1170 kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
1173 * The guest calculates current wall clock time by adding
1174 * system time (updated by kvm_guest_time_update below) to the
1175 * wall clock specified here. guest system time equals host
1176 * system time for us, thus we must fill in host boot time here.
1180 if (kvm->arch.kvmclock_offset) {
1181 struct timespec ts = ns_to_timespec(kvm->arch.kvmclock_offset);
1182 boot = timespec_sub(boot, ts);
1184 wc.sec = boot.tv_sec;
1185 wc.nsec = boot.tv_nsec;
1186 wc.version = version;
1188 kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
1191 kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
1194 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
1196 uint32_t quotient, remainder;
1198 /* Don't try to replace with do_div(), this one calculates
1199 * "(dividend << 32) / divisor" */
1201 : "=a" (quotient), "=d" (remainder)
1202 : "0" (0), "1" (dividend), "r" (divisor) );
1206 static void kvm_get_time_scale(uint32_t scaled_khz, uint32_t base_khz,
1207 s8 *pshift, u32 *pmultiplier)
1214 tps64 = base_khz * 1000LL;
1215 scaled64 = scaled_khz * 1000LL;
1216 while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
1221 tps32 = (uint32_t)tps64;
1222 while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
1223 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
1231 *pmultiplier = div_frac(scaled64, tps32);
1233 pr_debug("%s: base_khz %u => %u, shift %d, mul %u\n",
1234 __func__, base_khz, scaled_khz, shift, *pmultiplier);
1237 #ifdef CONFIG_X86_64
1238 static atomic_t kvm_guest_has_master_clock = ATOMIC_INIT(0);
1241 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
1242 static unsigned long max_tsc_khz;
1244 static inline u64 nsec_to_cycles(struct kvm_vcpu *vcpu, u64 nsec)
1246 return pvclock_scale_delta(nsec, vcpu->arch.virtual_tsc_mult,
1247 vcpu->arch.virtual_tsc_shift);
1250 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
1252 u64 v = (u64)khz * (1000000 + ppm);
1257 static int set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz, bool scale)
1261 /* Guest TSC same frequency as host TSC? */
1263 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
1267 /* TSC scaling supported? */
1268 if (!kvm_has_tsc_control) {
1269 if (user_tsc_khz > tsc_khz) {
1270 vcpu->arch.tsc_catchup = 1;
1271 vcpu->arch.tsc_always_catchup = 1;
1274 WARN(1, "user requested TSC rate below hardware speed\n");
1279 /* TSC scaling required - calculate ratio */
1280 ratio = mul_u64_u32_div(1ULL << kvm_tsc_scaling_ratio_frac_bits,
1281 user_tsc_khz, tsc_khz);
1283 if (ratio == 0 || ratio >= kvm_max_tsc_scaling_ratio) {
1284 WARN_ONCE(1, "Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
1289 vcpu->arch.tsc_scaling_ratio = ratio;
1293 static int kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 this_tsc_khz)
1295 u32 thresh_lo, thresh_hi;
1296 int use_scaling = 0;
1298 /* tsc_khz can be zero if TSC calibration fails */
1299 if (this_tsc_khz == 0) {
1300 /* set tsc_scaling_ratio to a safe value */
1301 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
1305 /* Compute a scale to convert nanoseconds in TSC cycles */
1306 kvm_get_time_scale(this_tsc_khz, NSEC_PER_SEC / 1000,
1307 &vcpu->arch.virtual_tsc_shift,
1308 &vcpu->arch.virtual_tsc_mult);
1309 vcpu->arch.virtual_tsc_khz = this_tsc_khz;
1312 * Compute the variation in TSC rate which is acceptable
1313 * within the range of tolerance and decide if the
1314 * rate being applied is within that bounds of the hardware
1315 * rate. If so, no scaling or compensation need be done.
1317 thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
1318 thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
1319 if (this_tsc_khz < thresh_lo || this_tsc_khz > thresh_hi) {
1320 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", this_tsc_khz, thresh_lo, thresh_hi);
1323 return set_tsc_khz(vcpu, this_tsc_khz, use_scaling);
1326 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
1328 u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
1329 vcpu->arch.virtual_tsc_mult,
1330 vcpu->arch.virtual_tsc_shift);
1331 tsc += vcpu->arch.this_tsc_write;
1335 static void kvm_track_tsc_matching(struct kvm_vcpu *vcpu)
1337 #ifdef CONFIG_X86_64
1339 struct kvm_arch *ka = &vcpu->kvm->arch;
1340 struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1342 vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1343 atomic_read(&vcpu->kvm->online_vcpus));
1346 * Once the masterclock is enabled, always perform request in
1347 * order to update it.
1349 * In order to enable masterclock, the host clocksource must be TSC
1350 * and the vcpus need to have matched TSCs. When that happens,
1351 * perform request to enable masterclock.
1353 if (ka->use_master_clock ||
1354 (gtod->clock.vclock_mode == VCLOCK_TSC && vcpus_matched))
1355 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
1357 trace_kvm_track_tsc(vcpu->vcpu_id, ka->nr_vcpus_matched_tsc,
1358 atomic_read(&vcpu->kvm->online_vcpus),
1359 ka->use_master_clock, gtod->clock.vclock_mode);
1363 static void update_ia32_tsc_adjust_msr(struct kvm_vcpu *vcpu, s64 offset)
1365 u64 curr_offset = kvm_x86_ops->read_tsc_offset(vcpu);
1366 vcpu->arch.ia32_tsc_adjust_msr += offset - curr_offset;
1370 * Multiply tsc by a fixed point number represented by ratio.
1372 * The most significant 64-N bits (mult) of ratio represent the
1373 * integral part of the fixed point number; the remaining N bits
1374 * (frac) represent the fractional part, ie. ratio represents a fixed
1375 * point number (mult + frac * 2^(-N)).
1377 * N equals to kvm_tsc_scaling_ratio_frac_bits.
1379 static inline u64 __scale_tsc(u64 ratio, u64 tsc)
1381 return mul_u64_u64_shr(tsc, ratio, kvm_tsc_scaling_ratio_frac_bits);
1384 u64 kvm_scale_tsc(struct kvm_vcpu *vcpu, u64 tsc)
1387 u64 ratio = vcpu->arch.tsc_scaling_ratio;
1389 if (ratio != kvm_default_tsc_scaling_ratio)
1390 _tsc = __scale_tsc(ratio, tsc);
1394 EXPORT_SYMBOL_GPL(kvm_scale_tsc);
1396 static u64 kvm_compute_tsc_offset(struct kvm_vcpu *vcpu, u64 target_tsc)
1400 tsc = kvm_scale_tsc(vcpu, rdtsc());
1402 return target_tsc - tsc;
1405 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc)
1407 return kvm_x86_ops->read_l1_tsc(vcpu, kvm_scale_tsc(vcpu, host_tsc));
1409 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc);
1411 void kvm_write_tsc(struct kvm_vcpu *vcpu, struct msr_data *msr)
1413 struct kvm *kvm = vcpu->kvm;
1414 u64 offset, ns, elapsed;
1415 unsigned long flags;
1418 bool already_matched;
1419 u64 data = msr->data;
1421 raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1422 offset = kvm_compute_tsc_offset(vcpu, data);
1423 ns = get_kernel_ns();
1424 elapsed = ns - kvm->arch.last_tsc_nsec;
1426 if (vcpu->arch.virtual_tsc_khz) {
1429 /* n.b - signed multiplication and division required */
1430 usdiff = data - kvm->arch.last_tsc_write;
1431 #ifdef CONFIG_X86_64
1432 usdiff = (usdiff * 1000) / vcpu->arch.virtual_tsc_khz;
1434 /* do_div() only does unsigned */
1435 asm("1: idivl %[divisor]\n"
1436 "2: xor %%edx, %%edx\n"
1437 " movl $0, %[faulted]\n"
1439 ".section .fixup,\"ax\"\n"
1440 "4: movl $1, %[faulted]\n"
1444 _ASM_EXTABLE(1b, 4b)
1446 : "=A"(usdiff), [faulted] "=r" (faulted)
1447 : "A"(usdiff * 1000), [divisor] "rm"(vcpu->arch.virtual_tsc_khz));
1450 do_div(elapsed, 1000);
1455 /* idivl overflow => difference is larger than USEC_PER_SEC */
1457 usdiff = USEC_PER_SEC;
1459 usdiff = USEC_PER_SEC; /* disable TSC match window below */
1462 * Special case: TSC write with a small delta (1 second) of virtual
1463 * cycle time against real time is interpreted as an attempt to
1464 * synchronize the CPU.
1466 * For a reliable TSC, we can match TSC offsets, and for an unstable
1467 * TSC, we add elapsed time in this computation. We could let the
1468 * compensation code attempt to catch up if we fall behind, but
1469 * it's better to try to match offsets from the beginning.
1471 if (usdiff < USEC_PER_SEC &&
1472 vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
1473 if (!check_tsc_unstable()) {
1474 offset = kvm->arch.cur_tsc_offset;
1475 pr_debug("kvm: matched tsc offset for %llu\n", data);
1477 u64 delta = nsec_to_cycles(vcpu, elapsed);
1479 offset = kvm_compute_tsc_offset(vcpu, data);
1480 pr_debug("kvm: adjusted tsc offset by %llu\n", delta);
1483 already_matched = (vcpu->arch.this_tsc_generation == kvm->arch.cur_tsc_generation);
1486 * We split periods of matched TSC writes into generations.
1487 * For each generation, we track the original measured
1488 * nanosecond time, offset, and write, so if TSCs are in
1489 * sync, we can match exact offset, and if not, we can match
1490 * exact software computation in compute_guest_tsc()
1492 * These values are tracked in kvm->arch.cur_xxx variables.
1494 kvm->arch.cur_tsc_generation++;
1495 kvm->arch.cur_tsc_nsec = ns;
1496 kvm->arch.cur_tsc_write = data;
1497 kvm->arch.cur_tsc_offset = offset;
1499 pr_debug("kvm: new tsc generation %llu, clock %llu\n",
1500 kvm->arch.cur_tsc_generation, data);
1504 * We also track th most recent recorded KHZ, write and time to
1505 * allow the matching interval to be extended at each write.
1507 kvm->arch.last_tsc_nsec = ns;
1508 kvm->arch.last_tsc_write = data;
1509 kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
1511 vcpu->arch.last_guest_tsc = data;
1513 /* Keep track of which generation this VCPU has synchronized to */
1514 vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
1515 vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
1516 vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
1518 if (guest_cpuid_has_tsc_adjust(vcpu) && !msr->host_initiated)
1519 update_ia32_tsc_adjust_msr(vcpu, offset);
1520 kvm_x86_ops->write_tsc_offset(vcpu, offset);
1521 raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1523 spin_lock(&kvm->arch.pvclock_gtod_sync_lock);
1525 kvm->arch.nr_vcpus_matched_tsc = 0;
1526 } else if (!already_matched) {
1527 kvm->arch.nr_vcpus_matched_tsc++;
1530 kvm_track_tsc_matching(vcpu);
1531 spin_unlock(&kvm->arch.pvclock_gtod_sync_lock);
1534 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1536 static inline void adjust_tsc_offset_guest(struct kvm_vcpu *vcpu,
1539 kvm_x86_ops->adjust_tsc_offset_guest(vcpu, adjustment);
1542 static inline void adjust_tsc_offset_host(struct kvm_vcpu *vcpu, s64 adjustment)
1544 if (vcpu->arch.tsc_scaling_ratio != kvm_default_tsc_scaling_ratio)
1545 WARN_ON(adjustment < 0);
1546 adjustment = kvm_scale_tsc(vcpu, (u64) adjustment);
1547 kvm_x86_ops->adjust_tsc_offset_guest(vcpu, adjustment);
1550 #ifdef CONFIG_X86_64
1552 static cycle_t read_tsc(void)
1554 cycle_t ret = (cycle_t)rdtsc_ordered();
1555 u64 last = pvclock_gtod_data.clock.cycle_last;
1557 if (likely(ret >= last))
1561 * GCC likes to generate cmov here, but this branch is extremely
1562 * predictable (it's just a funciton of time and the likely is
1563 * very likely) and there's a data dependence, so force GCC
1564 * to generate a branch instead. I don't barrier() because
1565 * we don't actually need a barrier, and if this function
1566 * ever gets inlined it will generate worse code.
1572 static inline u64 vgettsc(cycle_t *cycle_now)
1575 struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1577 *cycle_now = read_tsc();
1579 v = (*cycle_now - gtod->clock.cycle_last) & gtod->clock.mask;
1580 return v * gtod->clock.mult;
1583 static int do_monotonic_boot(s64 *t, cycle_t *cycle_now)
1585 struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1591 seq = read_seqcount_begin(>od->seq);
1592 mode = gtod->clock.vclock_mode;
1593 ns = gtod->nsec_base;
1594 ns += vgettsc(cycle_now);
1595 ns >>= gtod->clock.shift;
1596 ns += gtod->boot_ns;
1597 } while (unlikely(read_seqcount_retry(>od->seq, seq)));
1603 /* returns true if host is using tsc clocksource */
1604 static bool kvm_get_time_and_clockread(s64 *kernel_ns, cycle_t *cycle_now)
1606 /* checked again under seqlock below */
1607 if (pvclock_gtod_data.clock.vclock_mode != VCLOCK_TSC)
1610 return do_monotonic_boot(kernel_ns, cycle_now) == VCLOCK_TSC;
1616 * Assuming a stable TSC across physical CPUS, and a stable TSC
1617 * across virtual CPUs, the following condition is possible.
1618 * Each numbered line represents an event visible to both
1619 * CPUs at the next numbered event.
1621 * "timespecX" represents host monotonic time. "tscX" represents
1624 * VCPU0 on CPU0 | VCPU1 on CPU1
1626 * 1. read timespec0,tsc0
1627 * 2. | timespec1 = timespec0 + N
1629 * 3. transition to guest | transition to guest
1630 * 4. ret0 = timespec0 + (rdtsc - tsc0) |
1631 * 5. | ret1 = timespec1 + (rdtsc - tsc1)
1632 * | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
1634 * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
1637 * - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
1639 * - 0 < N - M => M < N
1641 * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
1642 * always the case (the difference between two distinct xtime instances
1643 * might be smaller then the difference between corresponding TSC reads,
1644 * when updating guest vcpus pvclock areas).
1646 * To avoid that problem, do not allow visibility of distinct
1647 * system_timestamp/tsc_timestamp values simultaneously: use a master
1648 * copy of host monotonic time values. Update that master copy
1651 * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
1655 static void pvclock_update_vm_gtod_copy(struct kvm *kvm)
1657 #ifdef CONFIG_X86_64
1658 struct kvm_arch *ka = &kvm->arch;
1660 bool host_tsc_clocksource, vcpus_matched;
1662 vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1663 atomic_read(&kvm->online_vcpus));
1666 * If the host uses TSC clock, then passthrough TSC as stable
1669 host_tsc_clocksource = kvm_get_time_and_clockread(
1670 &ka->master_kernel_ns,
1671 &ka->master_cycle_now);
1673 ka->use_master_clock = host_tsc_clocksource && vcpus_matched
1674 && !backwards_tsc_observed
1675 && !ka->boot_vcpu_runs_old_kvmclock;
1677 if (ka->use_master_clock)
1678 atomic_set(&kvm_guest_has_master_clock, 1);
1680 vclock_mode = pvclock_gtod_data.clock.vclock_mode;
1681 trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode,
1686 static void kvm_gen_update_masterclock(struct kvm *kvm)
1688 #ifdef CONFIG_X86_64
1690 struct kvm_vcpu *vcpu;
1691 struct kvm_arch *ka = &kvm->arch;
1693 spin_lock(&ka->pvclock_gtod_sync_lock);
1694 kvm_make_mclock_inprogress_request(kvm);
1695 /* no guest entries from this point */
1696 pvclock_update_vm_gtod_copy(kvm);
1698 kvm_for_each_vcpu(i, vcpu, kvm)
1699 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1701 /* guest entries allowed */
1702 kvm_for_each_vcpu(i, vcpu, kvm)
1703 clear_bit(KVM_REQ_MCLOCK_INPROGRESS, &vcpu->requests);
1705 spin_unlock(&ka->pvclock_gtod_sync_lock);
1709 static int kvm_guest_time_update(struct kvm_vcpu *v)
1711 unsigned long flags, this_tsc_khz, tgt_tsc_khz;
1712 struct kvm_vcpu_arch *vcpu = &v->arch;
1713 struct kvm_arch *ka = &v->kvm->arch;
1715 u64 tsc_timestamp, host_tsc;
1716 struct pvclock_vcpu_time_info guest_hv_clock;
1718 bool use_master_clock;
1724 * If the host uses TSC clock, then passthrough TSC as stable
1727 spin_lock(&ka->pvclock_gtod_sync_lock);
1728 use_master_clock = ka->use_master_clock;
1729 if (use_master_clock) {
1730 host_tsc = ka->master_cycle_now;
1731 kernel_ns = ka->master_kernel_ns;
1733 spin_unlock(&ka->pvclock_gtod_sync_lock);
1735 /* Keep irq disabled to prevent changes to the clock */
1736 local_irq_save(flags);
1737 this_tsc_khz = __this_cpu_read(cpu_tsc_khz);
1738 if (unlikely(this_tsc_khz == 0)) {
1739 local_irq_restore(flags);
1740 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1743 if (!use_master_clock) {
1745 kernel_ns = get_kernel_ns();
1748 tsc_timestamp = kvm_read_l1_tsc(v, host_tsc);
1751 * We may have to catch up the TSC to match elapsed wall clock
1752 * time for two reasons, even if kvmclock is used.
1753 * 1) CPU could have been running below the maximum TSC rate
1754 * 2) Broken TSC compensation resets the base at each VCPU
1755 * entry to avoid unknown leaps of TSC even when running
1756 * again on the same CPU. This may cause apparent elapsed
1757 * time to disappear, and the guest to stand still or run
1760 if (vcpu->tsc_catchup) {
1761 u64 tsc = compute_guest_tsc(v, kernel_ns);
1762 if (tsc > tsc_timestamp) {
1763 adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
1764 tsc_timestamp = tsc;
1768 local_irq_restore(flags);
1770 if (!vcpu->pv_time_enabled)
1773 if (unlikely(vcpu->hw_tsc_khz != this_tsc_khz)) {
1774 tgt_tsc_khz = kvm_has_tsc_control ?
1775 vcpu->virtual_tsc_khz : this_tsc_khz;
1776 kvm_get_time_scale(NSEC_PER_SEC / 1000, tgt_tsc_khz,
1777 &vcpu->hv_clock.tsc_shift,
1778 &vcpu->hv_clock.tsc_to_system_mul);
1779 vcpu->hw_tsc_khz = this_tsc_khz;
1782 /* With all the info we got, fill in the values */
1783 vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
1784 vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
1785 vcpu->last_guest_tsc = tsc_timestamp;
1787 if (unlikely(kvm_read_guest_cached(v->kvm, &vcpu->pv_time,
1788 &guest_hv_clock, sizeof(guest_hv_clock))))
1791 /* This VCPU is paused, but it's legal for a guest to read another
1792 * VCPU's kvmclock, so we really have to follow the specification where
1793 * it says that version is odd if data is being modified, and even after
1796 * Version field updates must be kept separate. This is because
1797 * kvm_write_guest_cached might use a "rep movs" instruction, and
1798 * writes within a string instruction are weakly ordered. So there
1799 * are three writes overall.
1801 * As a small optimization, only write the version field in the first
1802 * and third write. The vcpu->pv_time cache is still valid, because the
1803 * version field is the first in the struct.
1805 BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info, version) != 0);
1807 vcpu->hv_clock.version = guest_hv_clock.version + 1;
1808 kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1810 sizeof(vcpu->hv_clock.version));
1814 /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
1815 pvclock_flags = (guest_hv_clock.flags & PVCLOCK_GUEST_STOPPED);
1817 if (vcpu->pvclock_set_guest_stopped_request) {
1818 pvclock_flags |= PVCLOCK_GUEST_STOPPED;
1819 vcpu->pvclock_set_guest_stopped_request = false;
1822 /* If the host uses TSC clocksource, then it is stable */
1823 if (use_master_clock)
1824 pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;
1826 vcpu->hv_clock.flags = pvclock_flags;
1828 trace_kvm_pvclock_update(v->vcpu_id, &vcpu->hv_clock);
1830 kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1832 sizeof(vcpu->hv_clock));
1836 vcpu->hv_clock.version++;
1837 kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1839 sizeof(vcpu->hv_clock.version));
1844 * kvmclock updates which are isolated to a given vcpu, such as
1845 * vcpu->cpu migration, should not allow system_timestamp from
1846 * the rest of the vcpus to remain static. Otherwise ntp frequency
1847 * correction applies to one vcpu's system_timestamp but not
1850 * So in those cases, request a kvmclock update for all vcpus.
1851 * We need to rate-limit these requests though, as they can
1852 * considerably slow guests that have a large number of vcpus.
1853 * The time for a remote vcpu to update its kvmclock is bound
1854 * by the delay we use to rate-limit the updates.
1857 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
1859 static void kvmclock_update_fn(struct work_struct *work)
1862 struct delayed_work *dwork = to_delayed_work(work);
1863 struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
1864 kvmclock_update_work);
1865 struct kvm *kvm = container_of(ka, struct kvm, arch);
1866 struct kvm_vcpu *vcpu;
1868 kvm_for_each_vcpu(i, vcpu, kvm) {
1869 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1870 kvm_vcpu_kick(vcpu);
1874 static void kvm_gen_kvmclock_update(struct kvm_vcpu *v)
1876 struct kvm *kvm = v->kvm;
1878 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1879 schedule_delayed_work(&kvm->arch.kvmclock_update_work,
1880 KVMCLOCK_UPDATE_DELAY);
1883 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
1885 static void kvmclock_sync_fn(struct work_struct *work)
1887 struct delayed_work *dwork = to_delayed_work(work);
1888 struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
1889 kvmclock_sync_work);
1890 struct kvm *kvm = container_of(ka, struct kvm, arch);
1892 if (!kvmclock_periodic_sync)
1895 schedule_delayed_work(&kvm->arch.kvmclock_update_work, 0);
1896 schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
1897 KVMCLOCK_SYNC_PERIOD);
1900 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1902 u64 mcg_cap = vcpu->arch.mcg_cap;
1903 unsigned bank_num = mcg_cap & 0xff;
1906 case MSR_IA32_MCG_STATUS:
1907 vcpu->arch.mcg_status = data;
1909 case MSR_IA32_MCG_CTL:
1910 if (!(mcg_cap & MCG_CTL_P))
1912 if (data != 0 && data != ~(u64)0)
1914 vcpu->arch.mcg_ctl = data;
1917 if (msr >= MSR_IA32_MC0_CTL &&
1918 msr < MSR_IA32_MCx_CTL(bank_num)) {
1919 u32 offset = msr - MSR_IA32_MC0_CTL;
1920 /* only 0 or all 1s can be written to IA32_MCi_CTL
1921 * some Linux kernels though clear bit 10 in bank 4 to
1922 * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1923 * this to avoid an uncatched #GP in the guest
1925 if ((offset & 0x3) == 0 &&
1926 data != 0 && (data | (1 << 10)) != ~(u64)0)
1928 vcpu->arch.mce_banks[offset] = data;
1936 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
1938 struct kvm *kvm = vcpu->kvm;
1939 int lm = is_long_mode(vcpu);
1940 u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
1941 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
1942 u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
1943 : kvm->arch.xen_hvm_config.blob_size_32;
1944 u32 page_num = data & ~PAGE_MASK;
1945 u64 page_addr = data & PAGE_MASK;
1950 if (page_num >= blob_size)
1953 page = memdup_user(blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE);
1958 if (kvm_vcpu_write_guest(vcpu, page_addr, page, PAGE_SIZE))
1967 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
1969 gpa_t gpa = data & ~0x3f;
1971 /* Bits 2:5 are reserved, Should be zero */
1975 vcpu->arch.apf.msr_val = data;
1977 if (!(data & KVM_ASYNC_PF_ENABLED)) {
1978 kvm_clear_async_pf_completion_queue(vcpu);
1979 kvm_async_pf_hash_reset(vcpu);
1983 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa,
1987 vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
1988 kvm_async_pf_wakeup_all(vcpu);
1992 static void kvmclock_reset(struct kvm_vcpu *vcpu)
1994 vcpu->arch.pv_time_enabled = false;
1997 static void accumulate_steal_time(struct kvm_vcpu *vcpu)
2001 if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
2004 delta = current->sched_info.run_delay - vcpu->arch.st.last_steal;
2005 vcpu->arch.st.last_steal = current->sched_info.run_delay;
2006 vcpu->arch.st.accum_steal = delta;
2009 static void record_steal_time(struct kvm_vcpu *vcpu)
2011 accumulate_steal_time(vcpu);
2013 if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
2016 if (unlikely(kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2017 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time))))
2020 vcpu->arch.st.steal.steal += vcpu->arch.st.accum_steal;
2021 vcpu->arch.st.steal.version += 2;
2022 vcpu->arch.st.accum_steal = 0;
2024 kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2025 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2028 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2031 u32 msr = msr_info->index;
2032 u64 data = msr_info->data;
2035 case MSR_AMD64_NB_CFG:
2036 case MSR_IA32_UCODE_REV:
2037 case MSR_IA32_UCODE_WRITE:
2038 case MSR_VM_HSAVE_PA:
2039 case MSR_AMD64_PATCH_LOADER:
2040 case MSR_AMD64_BU_CFG2:
2044 return set_efer(vcpu, data);
2046 data &= ~(u64)0x40; /* ignore flush filter disable */
2047 data &= ~(u64)0x100; /* ignore ignne emulation enable */
2048 data &= ~(u64)0x8; /* ignore TLB cache disable */
2049 data &= ~(u64)0x40000; /* ignore Mc status write enable */
2051 vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
2056 case MSR_FAM10H_MMIO_CONF_BASE:
2058 vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
2063 case MSR_IA32_DEBUGCTLMSR:
2065 /* We support the non-activated case already */
2067 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
2068 /* Values other than LBR and BTF are vendor-specific,
2069 thus reserved and should throw a #GP */
2072 vcpu_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
2075 case 0x200 ... 0x2ff:
2076 return kvm_mtrr_set_msr(vcpu, msr, data);
2077 case MSR_IA32_APICBASE:
2078 return kvm_set_apic_base(vcpu, msr_info);
2079 case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2080 return kvm_x2apic_msr_write(vcpu, msr, data);
2081 case MSR_IA32_TSCDEADLINE:
2082 kvm_set_lapic_tscdeadline_msr(vcpu, data);
2084 case MSR_IA32_TSC_ADJUST:
2085 if (guest_cpuid_has_tsc_adjust(vcpu)) {
2086 if (!msr_info->host_initiated) {
2087 s64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;
2088 adjust_tsc_offset_guest(vcpu, adj);
2090 vcpu->arch.ia32_tsc_adjust_msr = data;
2093 case MSR_IA32_MISC_ENABLE:
2094 vcpu->arch.ia32_misc_enable_msr = data;
2096 case MSR_IA32_SMBASE:
2097 if (!msr_info->host_initiated)
2099 vcpu->arch.smbase = data;
2101 case MSR_KVM_WALL_CLOCK_NEW:
2102 case MSR_KVM_WALL_CLOCK:
2103 vcpu->kvm->arch.wall_clock = data;
2104 kvm_write_wall_clock(vcpu->kvm, data);
2106 case MSR_KVM_SYSTEM_TIME_NEW:
2107 case MSR_KVM_SYSTEM_TIME: {
2109 struct kvm_arch *ka = &vcpu->kvm->arch;
2111 kvmclock_reset(vcpu);
2113 if (vcpu->vcpu_id == 0 && !msr_info->host_initiated) {
2114 bool tmp = (msr == MSR_KVM_SYSTEM_TIME);
2116 if (ka->boot_vcpu_runs_old_kvmclock != tmp)
2117 set_bit(KVM_REQ_MASTERCLOCK_UPDATE,
2120 ka->boot_vcpu_runs_old_kvmclock = tmp;
2123 vcpu->arch.time = data;
2124 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2126 /* we verify if the enable bit is set... */
2130 gpa_offset = data & ~(PAGE_MASK | 1);
2132 if (kvm_gfn_to_hva_cache_init(vcpu->kvm,
2133 &vcpu->arch.pv_time, data & ~1ULL,
2134 sizeof(struct pvclock_vcpu_time_info)))
2135 vcpu->arch.pv_time_enabled = false;
2137 vcpu->arch.pv_time_enabled = true;
2141 case MSR_KVM_ASYNC_PF_EN:
2142 if (kvm_pv_enable_async_pf(vcpu, data))
2145 case MSR_KVM_STEAL_TIME:
2147 if (unlikely(!sched_info_on()))
2150 if (data & KVM_STEAL_RESERVED_MASK)
2153 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.st.stime,
2154 data & KVM_STEAL_VALID_BITS,
2155 sizeof(struct kvm_steal_time)))
2158 vcpu->arch.st.msr_val = data;
2160 if (!(data & KVM_MSR_ENABLED))
2163 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2166 case MSR_KVM_PV_EOI_EN:
2167 if (kvm_lapic_enable_pv_eoi(vcpu, data))
2171 case MSR_IA32_MCG_CTL:
2172 case MSR_IA32_MCG_STATUS:
2173 case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
2174 return set_msr_mce(vcpu, msr, data);
2176 case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
2177 case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
2178 pr = true; /* fall through */
2179 case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
2180 case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
2181 if (kvm_pmu_is_valid_msr(vcpu, msr))
2182 return kvm_pmu_set_msr(vcpu, msr_info);
2184 if (pr || data != 0)
2185 vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
2186 "0x%x data 0x%llx\n", msr, data);
2188 case MSR_K7_CLK_CTL:
2190 * Ignore all writes to this no longer documented MSR.
2191 * Writes are only relevant for old K7 processors,
2192 * all pre-dating SVM, but a recommended workaround from
2193 * AMD for these chips. It is possible to specify the
2194 * affected processor models on the command line, hence
2195 * the need to ignore the workaround.
2198 case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2199 case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
2200 case HV_X64_MSR_CRASH_CTL:
2201 return kvm_hv_set_msr_common(vcpu, msr, data,
2202 msr_info->host_initiated);
2203 case MSR_IA32_BBL_CR_CTL3:
2204 /* Drop writes to this legacy MSR -- see rdmsr
2205 * counterpart for further detail.
2207 vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n", msr, data);
2209 case MSR_AMD64_OSVW_ID_LENGTH:
2210 if (!guest_cpuid_has_osvw(vcpu))
2212 vcpu->arch.osvw.length = data;
2214 case MSR_AMD64_OSVW_STATUS:
2215 if (!guest_cpuid_has_osvw(vcpu))
2217 vcpu->arch.osvw.status = data;
2220 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
2221 return xen_hvm_config(vcpu, data);
2222 if (kvm_pmu_is_valid_msr(vcpu, msr))
2223 return kvm_pmu_set_msr(vcpu, msr_info);
2225 vcpu_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
2229 vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
2236 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
2240 * Reads an msr value (of 'msr_index') into 'pdata'.
2241 * Returns 0 on success, non-0 otherwise.
2242 * Assumes vcpu_load() was already called.
2244 int kvm_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
2246 return kvm_x86_ops->get_msr(vcpu, msr);
2248 EXPORT_SYMBOL_GPL(kvm_get_msr);
2250 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2253 u64 mcg_cap = vcpu->arch.mcg_cap;
2254 unsigned bank_num = mcg_cap & 0xff;
2257 case MSR_IA32_P5_MC_ADDR:
2258 case MSR_IA32_P5_MC_TYPE:
2261 case MSR_IA32_MCG_CAP:
2262 data = vcpu->arch.mcg_cap;
2264 case MSR_IA32_MCG_CTL:
2265 if (!(mcg_cap & MCG_CTL_P))
2267 data = vcpu->arch.mcg_ctl;
2269 case MSR_IA32_MCG_STATUS:
2270 data = vcpu->arch.mcg_status;
2273 if (msr >= MSR_IA32_MC0_CTL &&
2274 msr < MSR_IA32_MCx_CTL(bank_num)) {
2275 u32 offset = msr - MSR_IA32_MC0_CTL;
2276 data = vcpu->arch.mce_banks[offset];
2285 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2287 switch (msr_info->index) {
2288 case MSR_IA32_PLATFORM_ID:
2289 case MSR_IA32_EBL_CR_POWERON:
2290 case MSR_IA32_DEBUGCTLMSR:
2291 case MSR_IA32_LASTBRANCHFROMIP:
2292 case MSR_IA32_LASTBRANCHTOIP:
2293 case MSR_IA32_LASTINTFROMIP:
2294 case MSR_IA32_LASTINTTOIP:
2296 case MSR_K8_TSEG_ADDR:
2297 case MSR_K8_TSEG_MASK:
2299 case MSR_VM_HSAVE_PA:
2300 case MSR_K8_INT_PENDING_MSG:
2301 case MSR_AMD64_NB_CFG:
2302 case MSR_FAM10H_MMIO_CONF_BASE:
2303 case MSR_AMD64_BU_CFG2:
2306 case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
2307 case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
2308 case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
2309 case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
2310 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
2311 return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);
2314 case MSR_IA32_UCODE_REV:
2315 msr_info->data = 0x100000000ULL;
2318 case 0x200 ... 0x2ff:
2319 return kvm_mtrr_get_msr(vcpu, msr_info->index, &msr_info->data);
2320 case 0xcd: /* fsb frequency */
2324 * MSR_EBC_FREQUENCY_ID
2325 * Conservative value valid for even the basic CPU models.
2326 * Models 0,1: 000 in bits 23:21 indicating a bus speed of
2327 * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
2328 * and 266MHz for model 3, or 4. Set Core Clock
2329 * Frequency to System Bus Frequency Ratio to 1 (bits
2330 * 31:24) even though these are only valid for CPU
2331 * models > 2, however guests may end up dividing or
2332 * multiplying by zero otherwise.
2334 case MSR_EBC_FREQUENCY_ID:
2335 msr_info->data = 1 << 24;
2337 case MSR_IA32_APICBASE:
2338 msr_info->data = kvm_get_apic_base(vcpu);
2340 case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2341 return kvm_x2apic_msr_read(vcpu, msr_info->index, &msr_info->data);
2343 case MSR_IA32_TSCDEADLINE:
2344 msr_info->data = kvm_get_lapic_tscdeadline_msr(vcpu);
2346 case MSR_IA32_TSC_ADJUST:
2347 msr_info->data = (u64)vcpu->arch.ia32_tsc_adjust_msr;
2349 case MSR_IA32_MISC_ENABLE:
2350 msr_info->data = vcpu->arch.ia32_misc_enable_msr;
2352 case MSR_IA32_SMBASE:
2353 if (!msr_info->host_initiated)
2355 msr_info->data = vcpu->arch.smbase;
2357 case MSR_IA32_PERF_STATUS:
2358 /* TSC increment by tick */
2359 msr_info->data = 1000ULL;
2360 /* CPU multiplier */
2361 msr_info->data |= (((uint64_t)4ULL) << 40);
2364 msr_info->data = vcpu->arch.efer;
2366 case MSR_KVM_WALL_CLOCK:
2367 case MSR_KVM_WALL_CLOCK_NEW:
2368 msr_info->data = vcpu->kvm->arch.wall_clock;
2370 case MSR_KVM_SYSTEM_TIME:
2371 case MSR_KVM_SYSTEM_TIME_NEW:
2372 msr_info->data = vcpu->arch.time;
2374 case MSR_KVM_ASYNC_PF_EN:
2375 msr_info->data = vcpu->arch.apf.msr_val;
2377 case MSR_KVM_STEAL_TIME:
2378 msr_info->data = vcpu->arch.st.msr_val;
2380 case MSR_KVM_PV_EOI_EN:
2381 msr_info->data = vcpu->arch.pv_eoi.msr_val;
2383 case MSR_IA32_P5_MC_ADDR:
2384 case MSR_IA32_P5_MC_TYPE:
2385 case MSR_IA32_MCG_CAP:
2386 case MSR_IA32_MCG_CTL:
2387 case MSR_IA32_MCG_STATUS:
2388 case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
2389 return get_msr_mce(vcpu, msr_info->index, &msr_info->data);
2390 case MSR_K7_CLK_CTL:
2392 * Provide expected ramp-up count for K7. All other
2393 * are set to zero, indicating minimum divisors for
2396 * This prevents guest kernels on AMD host with CPU
2397 * type 6, model 8 and higher from exploding due to
2398 * the rdmsr failing.
2400 msr_info->data = 0x20000000;
2402 case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2403 case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
2404 case HV_X64_MSR_CRASH_CTL:
2405 return kvm_hv_get_msr_common(vcpu,
2406 msr_info->index, &msr_info->data);
2408 case MSR_IA32_BBL_CR_CTL3:
2409 /* This legacy MSR exists but isn't fully documented in current
2410 * silicon. It is however accessed by winxp in very narrow
2411 * scenarios where it sets bit #19, itself documented as
2412 * a "reserved" bit. Best effort attempt to source coherent
2413 * read data here should the balance of the register be
2414 * interpreted by the guest:
2416 * L2 cache control register 3: 64GB range, 256KB size,
2417 * enabled, latency 0x1, configured
2419 msr_info->data = 0xbe702111;
2421 case MSR_AMD64_OSVW_ID_LENGTH:
2422 if (!guest_cpuid_has_osvw(vcpu))
2424 msr_info->data = vcpu->arch.osvw.length;
2426 case MSR_AMD64_OSVW_STATUS:
2427 if (!guest_cpuid_has_osvw(vcpu))
2429 msr_info->data = vcpu->arch.osvw.status;
2432 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
2433 return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);
2435 vcpu_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr_info->index);
2438 vcpu_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr_info->index);
2445 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
2448 * Read or write a bunch of msrs. All parameters are kernel addresses.
2450 * @return number of msrs set successfully.
2452 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
2453 struct kvm_msr_entry *entries,
2454 int (*do_msr)(struct kvm_vcpu *vcpu,
2455 unsigned index, u64 *data))
2459 idx = srcu_read_lock(&vcpu->kvm->srcu);
2460 for (i = 0; i < msrs->nmsrs; ++i)
2461 if (do_msr(vcpu, entries[i].index, &entries[i].data))
2463 srcu_read_unlock(&vcpu->kvm->srcu, idx);
2469 * Read or write a bunch of msrs. Parameters are user addresses.
2471 * @return number of msrs set successfully.
2473 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
2474 int (*do_msr)(struct kvm_vcpu *vcpu,
2475 unsigned index, u64 *data),
2478 struct kvm_msrs msrs;
2479 struct kvm_msr_entry *entries;
2484 if (copy_from_user(&msrs, user_msrs, sizeof msrs))
2488 if (msrs.nmsrs >= MAX_IO_MSRS)
2491 size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
2492 entries = memdup_user(user_msrs->entries, size);
2493 if (IS_ERR(entries)) {
2494 r = PTR_ERR(entries);
2498 r = n = __msr_io(vcpu, &msrs, entries, do_msr);
2503 if (writeback && copy_to_user(user_msrs->entries, entries, size))
2514 int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
2519 case KVM_CAP_IRQCHIP:
2521 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
2522 case KVM_CAP_SET_TSS_ADDR:
2523 case KVM_CAP_EXT_CPUID:
2524 case KVM_CAP_EXT_EMUL_CPUID:
2525 case KVM_CAP_CLOCKSOURCE:
2527 case KVM_CAP_NOP_IO_DELAY:
2528 case KVM_CAP_MP_STATE:
2529 case KVM_CAP_SYNC_MMU:
2530 case KVM_CAP_USER_NMI:
2531 case KVM_CAP_REINJECT_CONTROL:
2532 case KVM_CAP_IRQ_INJECT_STATUS:
2533 case KVM_CAP_IOEVENTFD:
2534 case KVM_CAP_IOEVENTFD_NO_LENGTH:
2536 case KVM_CAP_PIT_STATE2:
2537 case KVM_CAP_SET_IDENTITY_MAP_ADDR:
2538 case KVM_CAP_XEN_HVM:
2539 case KVM_CAP_ADJUST_CLOCK:
2540 case KVM_CAP_VCPU_EVENTS:
2541 case KVM_CAP_HYPERV:
2542 case KVM_CAP_HYPERV_VAPIC:
2543 case KVM_CAP_HYPERV_SPIN:
2544 case KVM_CAP_PCI_SEGMENT:
2545 case KVM_CAP_DEBUGREGS:
2546 case KVM_CAP_X86_ROBUST_SINGLESTEP:
2548 case KVM_CAP_ASYNC_PF:
2549 case KVM_CAP_GET_TSC_KHZ:
2550 case KVM_CAP_KVMCLOCK_CTRL:
2551 case KVM_CAP_READONLY_MEM:
2552 case KVM_CAP_HYPERV_TIME:
2553 case KVM_CAP_IOAPIC_POLARITY_IGNORED:
2554 case KVM_CAP_TSC_DEADLINE_TIMER:
2555 case KVM_CAP_ENABLE_CAP_VM:
2556 case KVM_CAP_DISABLE_QUIRKS:
2557 case KVM_CAP_SET_BOOT_CPU_ID:
2558 case KVM_CAP_SPLIT_IRQCHIP:
2559 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2560 case KVM_CAP_ASSIGN_DEV_IRQ:
2561 case KVM_CAP_PCI_2_3:
2565 case KVM_CAP_X86_SMM:
2566 /* SMBASE is usually relocated above 1M on modern chipsets,
2567 * and SMM handlers might indeed rely on 4G segment limits,
2568 * so do not report SMM to be available if real mode is
2569 * emulated via vm86 mode. Still, do not go to great lengths
2570 * to avoid userspace's usage of the feature, because it is a
2571 * fringe case that is not enabled except via specific settings
2572 * of the module parameters.
2574 r = kvm_x86_ops->cpu_has_high_real_mode_segbase();
2576 case KVM_CAP_COALESCED_MMIO:
2577 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
2580 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
2582 case KVM_CAP_NR_VCPUS:
2583 r = KVM_SOFT_MAX_VCPUS;
2585 case KVM_CAP_MAX_VCPUS:
2588 case KVM_CAP_NR_MEMSLOTS:
2589 r = KVM_USER_MEM_SLOTS;
2591 case KVM_CAP_PV_MMU: /* obsolete */
2594 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2596 r = iommu_present(&pci_bus_type);
2600 r = KVM_MAX_MCE_BANKS;
2605 case KVM_CAP_TSC_CONTROL:
2606 r = kvm_has_tsc_control;
2616 long kvm_arch_dev_ioctl(struct file *filp,
2617 unsigned int ioctl, unsigned long arg)
2619 void __user *argp = (void __user *)arg;
2623 case KVM_GET_MSR_INDEX_LIST: {
2624 struct kvm_msr_list __user *user_msr_list = argp;
2625 struct kvm_msr_list msr_list;
2629 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
2632 msr_list.nmsrs = num_msrs_to_save + num_emulated_msrs;
2633 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
2636 if (n < msr_list.nmsrs)
2639 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
2640 num_msrs_to_save * sizeof(u32)))
2642 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
2644 num_emulated_msrs * sizeof(u32)))
2649 case KVM_GET_SUPPORTED_CPUID:
2650 case KVM_GET_EMULATED_CPUID: {
2651 struct kvm_cpuid2 __user *cpuid_arg = argp;
2652 struct kvm_cpuid2 cpuid;
2655 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2658 r = kvm_dev_ioctl_get_cpuid(&cpuid, cpuid_arg->entries,
2664 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2669 case KVM_X86_GET_MCE_CAP_SUPPORTED: {
2672 mce_cap = KVM_MCE_CAP_SUPPORTED;
2674 if (copy_to_user(argp, &mce_cap, sizeof mce_cap))
2686 static void wbinvd_ipi(void *garbage)
2691 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
2693 return kvm_arch_has_noncoherent_dma(vcpu->kvm);
2696 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
2698 /* Address WBINVD may be executed by guest */
2699 if (need_emulate_wbinvd(vcpu)) {
2700 if (kvm_x86_ops->has_wbinvd_exit())
2701 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
2702 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
2703 smp_call_function_single(vcpu->cpu,
2704 wbinvd_ipi, NULL, 1);
2707 kvm_x86_ops->vcpu_load(vcpu, cpu);
2709 /* Apply any externally detected TSC adjustments (due to suspend) */
2710 if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
2711 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
2712 vcpu->arch.tsc_offset_adjustment = 0;
2713 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2716 if (unlikely(vcpu->cpu != cpu) || check_tsc_unstable()) {
2717 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
2718 rdtsc() - vcpu->arch.last_host_tsc;
2720 mark_tsc_unstable("KVM discovered backwards TSC");
2721 if (check_tsc_unstable()) {
2722 u64 offset = kvm_compute_tsc_offset(vcpu,
2723 vcpu->arch.last_guest_tsc);
2724 kvm_x86_ops->write_tsc_offset(vcpu, offset);
2725 vcpu->arch.tsc_catchup = 1;
2728 * On a host with synchronized TSC, there is no need to update
2729 * kvmclock on vcpu->cpu migration
2731 if (!vcpu->kvm->arch.use_master_clock || vcpu->cpu == -1)
2732 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2733 if (vcpu->cpu != cpu)
2734 kvm_migrate_timers(vcpu);
2738 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2741 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
2743 kvm_x86_ops->vcpu_put(vcpu);
2744 kvm_put_guest_fpu(vcpu);
2745 vcpu->arch.last_host_tsc = rdtsc();
2748 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
2749 struct kvm_lapic_state *s)
2751 kvm_x86_ops->sync_pir_to_irr(vcpu);
2752 memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
2757 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
2758 struct kvm_lapic_state *s)
2760 kvm_apic_post_state_restore(vcpu, s);
2761 update_cr8_intercept(vcpu);
2766 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu *vcpu)
2768 return (!lapic_in_kernel(vcpu) ||
2769 kvm_apic_accept_pic_intr(vcpu));
2773 * if userspace requested an interrupt window, check that the
2774 * interrupt window is open.
2776 * No need to exit to userspace if we already have an interrupt queued.
2778 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu *vcpu)
2780 return kvm_arch_interrupt_allowed(vcpu) &&
2781 !kvm_cpu_has_interrupt(vcpu) &&
2782 !kvm_event_needs_reinjection(vcpu) &&
2783 kvm_cpu_accept_dm_intr(vcpu);
2786 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
2787 struct kvm_interrupt *irq)
2789 if (irq->irq >= KVM_NR_INTERRUPTS)
2792 if (!irqchip_in_kernel(vcpu->kvm)) {
2793 kvm_queue_interrupt(vcpu, irq->irq, false);
2794 kvm_make_request(KVM_REQ_EVENT, vcpu);
2799 * With in-kernel LAPIC, we only use this to inject EXTINT, so
2800 * fail for in-kernel 8259.
2802 if (pic_in_kernel(vcpu->kvm))
2805 if (vcpu->arch.pending_external_vector != -1)
2808 vcpu->arch.pending_external_vector = irq->irq;
2809 kvm_make_request(KVM_REQ_EVENT, vcpu);
2813 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
2815 kvm_inject_nmi(vcpu);
2820 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu *vcpu)
2822 kvm_make_request(KVM_REQ_SMI, vcpu);
2827 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
2828 struct kvm_tpr_access_ctl *tac)
2832 vcpu->arch.tpr_access_reporting = !!tac->enabled;
2836 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
2840 unsigned bank_num = mcg_cap & 0xff, bank;
2843 if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
2845 if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000))
2848 vcpu->arch.mcg_cap = mcg_cap;
2849 /* Init IA32_MCG_CTL to all 1s */
2850 if (mcg_cap & MCG_CTL_P)
2851 vcpu->arch.mcg_ctl = ~(u64)0;
2852 /* Init IA32_MCi_CTL to all 1s */
2853 for (bank = 0; bank < bank_num; bank++)
2854 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
2859 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
2860 struct kvm_x86_mce *mce)
2862 u64 mcg_cap = vcpu->arch.mcg_cap;
2863 unsigned bank_num = mcg_cap & 0xff;
2864 u64 *banks = vcpu->arch.mce_banks;
2866 if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
2869 * if IA32_MCG_CTL is not all 1s, the uncorrected error
2870 * reporting is disabled
2872 if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
2873 vcpu->arch.mcg_ctl != ~(u64)0)
2875 banks += 4 * mce->bank;
2877 * if IA32_MCi_CTL is not all 1s, the uncorrected error
2878 * reporting is disabled for the bank
2880 if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
2882 if (mce->status & MCI_STATUS_UC) {
2883 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
2884 !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
2885 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
2888 if (banks[1] & MCI_STATUS_VAL)
2889 mce->status |= MCI_STATUS_OVER;
2890 banks[2] = mce->addr;
2891 banks[3] = mce->misc;
2892 vcpu->arch.mcg_status = mce->mcg_status;
2893 banks[1] = mce->status;
2894 kvm_queue_exception(vcpu, MC_VECTOR);
2895 } else if (!(banks[1] & MCI_STATUS_VAL)
2896 || !(banks[1] & MCI_STATUS_UC)) {
2897 if (banks[1] & MCI_STATUS_VAL)
2898 mce->status |= MCI_STATUS_OVER;
2899 banks[2] = mce->addr;
2900 banks[3] = mce->misc;
2901 banks[1] = mce->status;
2903 banks[1] |= MCI_STATUS_OVER;
2907 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
2908 struct kvm_vcpu_events *events)
2911 events->exception.injected =
2912 vcpu->arch.exception.pending &&
2913 !kvm_exception_is_soft(vcpu->arch.exception.nr);
2914 events->exception.nr = vcpu->arch.exception.nr;
2915 events->exception.has_error_code = vcpu->arch.exception.has_error_code;
2916 events->exception.pad = 0;
2917 events->exception.error_code = vcpu->arch.exception.error_code;
2919 events->interrupt.injected =
2920 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
2921 events->interrupt.nr = vcpu->arch.interrupt.nr;
2922 events->interrupt.soft = 0;
2923 events->interrupt.shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
2925 events->nmi.injected = vcpu->arch.nmi_injected;
2926 events->nmi.pending = vcpu->arch.nmi_pending != 0;
2927 events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
2928 events->nmi.pad = 0;
2930 events->sipi_vector = 0; /* never valid when reporting to user space */
2932 events->smi.smm = is_smm(vcpu);
2933 events->smi.pending = vcpu->arch.smi_pending;
2934 events->smi.smm_inside_nmi =
2935 !!(vcpu->arch.hflags & HF_SMM_INSIDE_NMI_MASK);
2936 events->smi.latched_init = kvm_lapic_latched_init(vcpu);
2938 events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
2939 | KVM_VCPUEVENT_VALID_SHADOW
2940 | KVM_VCPUEVENT_VALID_SMM);
2941 memset(&events->reserved, 0, sizeof(events->reserved));
2944 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
2945 struct kvm_vcpu_events *events)
2947 if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2948 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2949 | KVM_VCPUEVENT_VALID_SHADOW
2950 | KVM_VCPUEVENT_VALID_SMM))
2954 vcpu->arch.exception.pending = events->exception.injected;
2955 vcpu->arch.exception.nr = events->exception.nr;
2956 vcpu->arch.exception.has_error_code = events->exception.has_error_code;
2957 vcpu->arch.exception.error_code = events->exception.error_code;
2959 vcpu->arch.interrupt.pending = events->interrupt.injected;
2960 vcpu->arch.interrupt.nr = events->interrupt.nr;
2961 vcpu->arch.interrupt.soft = events->interrupt.soft;
2962 if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
2963 kvm_x86_ops->set_interrupt_shadow(vcpu,
2964 events->interrupt.shadow);
2966 vcpu->arch.nmi_injected = events->nmi.injected;
2967 if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
2968 vcpu->arch.nmi_pending = events->nmi.pending;
2969 kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
2971 if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR &&
2972 kvm_vcpu_has_lapic(vcpu))
2973 vcpu->arch.apic->sipi_vector = events->sipi_vector;
2975 if (events->flags & KVM_VCPUEVENT_VALID_SMM) {
2976 if (events->smi.smm)
2977 vcpu->arch.hflags |= HF_SMM_MASK;
2979 vcpu->arch.hflags &= ~HF_SMM_MASK;
2980 vcpu->arch.smi_pending = events->smi.pending;
2981 if (events->smi.smm_inside_nmi)
2982 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
2984 vcpu->arch.hflags &= ~HF_SMM_INSIDE_NMI_MASK;
2985 if (kvm_vcpu_has_lapic(vcpu)) {
2986 if (events->smi.latched_init)
2987 set_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
2989 clear_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
2993 kvm_make_request(KVM_REQ_EVENT, vcpu);
2998 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
2999 struct kvm_debugregs *dbgregs)
3003 memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
3004 kvm_get_dr(vcpu, 6, &val);
3006 dbgregs->dr7 = vcpu->arch.dr7;
3008 memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
3011 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
3012 struct kvm_debugregs *dbgregs)
3017 memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
3018 kvm_update_dr0123(vcpu);
3019 vcpu->arch.dr6 = dbgregs->dr6;
3020 kvm_update_dr6(vcpu);
3021 vcpu->arch.dr7 = dbgregs->dr7;
3022 kvm_update_dr7(vcpu);
3027 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
3029 static void fill_xsave(u8 *dest, struct kvm_vcpu *vcpu)
3031 struct xregs_state *xsave = &vcpu->arch.guest_fpu.state.xsave;
3032 u64 xstate_bv = xsave->header.xfeatures;
3036 * Copy legacy XSAVE area, to avoid complications with CPUID
3037 * leaves 0 and 1 in the loop below.
3039 memcpy(dest, xsave, XSAVE_HDR_OFFSET);
3042 *(u64 *)(dest + XSAVE_HDR_OFFSET) = xstate_bv;
3045 * Copy each region from the possibly compacted offset to the
3046 * non-compacted offset.
3048 valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
3050 u64 feature = valid & -valid;
3051 int index = fls64(feature) - 1;
3052 void *src = get_xsave_addr(xsave, feature);
3055 u32 size, offset, ecx, edx;
3056 cpuid_count(XSTATE_CPUID, index,
3057 &size, &offset, &ecx, &edx);
3058 memcpy(dest + offset, src, size);
3065 static void load_xsave(struct kvm_vcpu *vcpu, u8 *src)
3067 struct xregs_state *xsave = &vcpu->arch.guest_fpu.state.xsave;
3068 u64 xstate_bv = *(u64 *)(src + XSAVE_HDR_OFFSET);
3072 * Copy legacy XSAVE area, to avoid complications with CPUID
3073 * leaves 0 and 1 in the loop below.
3075 memcpy(xsave, src, XSAVE_HDR_OFFSET);
3077 /* Set XSTATE_BV and possibly XCOMP_BV. */
3078 xsave->header.xfeatures = xstate_bv;
3080 xsave->header.xcomp_bv = host_xcr0 | XSTATE_COMPACTION_ENABLED;
3083 * Copy each region from the non-compacted offset to the
3084 * possibly compacted offset.
3086 valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
3088 u64 feature = valid & -valid;
3089 int index = fls64(feature) - 1;
3090 void *dest = get_xsave_addr(xsave, feature);
3093 u32 size, offset, ecx, edx;
3094 cpuid_count(XSTATE_CPUID, index,
3095 &size, &offset, &ecx, &edx);
3096 memcpy(dest, src + offset, size);
3103 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
3104 struct kvm_xsave *guest_xsave)
3106 if (cpu_has_xsave) {
3107 memset(guest_xsave, 0, sizeof(struct kvm_xsave));
3108 fill_xsave((u8 *) guest_xsave->region, vcpu);
3110 memcpy(guest_xsave->region,
3111 &vcpu->arch.guest_fpu.state.fxsave,
3112 sizeof(struct fxregs_state));
3113 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
3114 XFEATURE_MASK_FPSSE;
3118 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
3119 struct kvm_xsave *guest_xsave)
3122 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
3124 if (cpu_has_xsave) {
3126 * Here we allow setting states that are not present in
3127 * CPUID leaf 0xD, index 0, EDX:EAX. This is for compatibility
3128 * with old userspace.
3130 if (xstate_bv & ~kvm_supported_xcr0())
3132 load_xsave(vcpu, (u8 *)guest_xsave->region);
3134 if (xstate_bv & ~XFEATURE_MASK_FPSSE)
3136 memcpy(&vcpu->arch.guest_fpu.state.fxsave,
3137 guest_xsave->region, sizeof(struct fxregs_state));
3142 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
3143 struct kvm_xcrs *guest_xcrs)
3145 if (!cpu_has_xsave) {
3146 guest_xcrs->nr_xcrs = 0;
3150 guest_xcrs->nr_xcrs = 1;
3151 guest_xcrs->flags = 0;
3152 guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
3153 guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
3156 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
3157 struct kvm_xcrs *guest_xcrs)
3164 if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
3167 for (i = 0; i < guest_xcrs->nr_xcrs; i++)
3168 /* Only support XCR0 currently */
3169 if (guest_xcrs->xcrs[i].xcr == XCR_XFEATURE_ENABLED_MASK) {
3170 r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
3171 guest_xcrs->xcrs[i].value);
3180 * kvm_set_guest_paused() indicates to the guest kernel that it has been
3181 * stopped by the hypervisor. This function will be called from the host only.
3182 * EINVAL is returned when the host attempts to set the flag for a guest that
3183 * does not support pv clocks.
3185 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
3187 if (!vcpu->arch.pv_time_enabled)
3189 vcpu->arch.pvclock_set_guest_stopped_request = true;
3190 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3194 long kvm_arch_vcpu_ioctl(struct file *filp,
3195 unsigned int ioctl, unsigned long arg)
3197 struct kvm_vcpu *vcpu = filp->private_data;
3198 void __user *argp = (void __user *)arg;
3201 struct kvm_lapic_state *lapic;
3202 struct kvm_xsave *xsave;
3203 struct kvm_xcrs *xcrs;
3209 case KVM_GET_LAPIC: {
3211 if (!vcpu->arch.apic)
3213 u.lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
3218 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
3222 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
3227 case KVM_SET_LAPIC: {
3229 if (!vcpu->arch.apic)
3231 u.lapic = memdup_user(argp, sizeof(*u.lapic));
3232 if (IS_ERR(u.lapic))
3233 return PTR_ERR(u.lapic);
3235 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
3238 case KVM_INTERRUPT: {
3239 struct kvm_interrupt irq;
3242 if (copy_from_user(&irq, argp, sizeof irq))
3244 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
3248 r = kvm_vcpu_ioctl_nmi(vcpu);
3252 r = kvm_vcpu_ioctl_smi(vcpu);
3255 case KVM_SET_CPUID: {
3256 struct kvm_cpuid __user *cpuid_arg = argp;
3257 struct kvm_cpuid cpuid;
3260 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3262 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
3265 case KVM_SET_CPUID2: {
3266 struct kvm_cpuid2 __user *cpuid_arg = argp;
3267 struct kvm_cpuid2 cpuid;
3270 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3272 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
3273 cpuid_arg->entries);
3276 case KVM_GET_CPUID2: {
3277 struct kvm_cpuid2 __user *cpuid_arg = argp;
3278 struct kvm_cpuid2 cpuid;
3281 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3283 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
3284 cpuid_arg->entries);
3288 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
3294 r = msr_io(vcpu, argp, do_get_msr, 1);
3297 r = msr_io(vcpu, argp, do_set_msr, 0);
3299 case KVM_TPR_ACCESS_REPORTING: {
3300 struct kvm_tpr_access_ctl tac;
3303 if (copy_from_user(&tac, argp, sizeof tac))
3305 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
3309 if (copy_to_user(argp, &tac, sizeof tac))
3314 case KVM_SET_VAPIC_ADDR: {
3315 struct kvm_vapic_addr va;
3318 if (!lapic_in_kernel(vcpu))
3321 if (copy_from_user(&va, argp, sizeof va))
3323 r = kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
3326 case KVM_X86_SETUP_MCE: {
3330 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
3332 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
3335 case KVM_X86_SET_MCE: {
3336 struct kvm_x86_mce mce;
3339 if (copy_from_user(&mce, argp, sizeof mce))
3341 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
3344 case KVM_GET_VCPU_EVENTS: {
3345 struct kvm_vcpu_events events;
3347 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
3350 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
3355 case KVM_SET_VCPU_EVENTS: {
3356 struct kvm_vcpu_events events;
3359 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
3362 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
3365 case KVM_GET_DEBUGREGS: {
3366 struct kvm_debugregs dbgregs;
3368 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
3371 if (copy_to_user(argp, &dbgregs,
3372 sizeof(struct kvm_debugregs)))
3377 case KVM_SET_DEBUGREGS: {
3378 struct kvm_debugregs dbgregs;
3381 if (copy_from_user(&dbgregs, argp,
3382 sizeof(struct kvm_debugregs)))
3385 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
3388 case KVM_GET_XSAVE: {
3389 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
3394 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
3397 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
3402 case KVM_SET_XSAVE: {
3403 u.xsave = memdup_user(argp, sizeof(*u.xsave));
3404 if (IS_ERR(u.xsave))
3405 return PTR_ERR(u.xsave);
3407 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
3410 case KVM_GET_XCRS: {
3411 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
3416 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
3419 if (copy_to_user(argp, u.xcrs,
3420 sizeof(struct kvm_xcrs)))
3425 case KVM_SET_XCRS: {
3426 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
3428 return PTR_ERR(u.xcrs);
3430 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
3433 case KVM_SET_TSC_KHZ: {
3437 user_tsc_khz = (u32)arg;
3439 if (user_tsc_khz >= kvm_max_guest_tsc_khz)
3442 if (user_tsc_khz == 0)
3443 user_tsc_khz = tsc_khz;
3445 if (!kvm_set_tsc_khz(vcpu, user_tsc_khz))
3450 case KVM_GET_TSC_KHZ: {
3451 r = vcpu->arch.virtual_tsc_khz;
3454 case KVM_KVMCLOCK_CTRL: {
3455 r = kvm_set_guest_paused(vcpu);
3466 int kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
3468 return VM_FAULT_SIGBUS;
3471 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
3475 if (addr > (unsigned int)(-3 * PAGE_SIZE))
3477 ret = kvm_x86_ops->set_tss_addr(kvm, addr);
3481 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
3484 kvm->arch.ept_identity_map_addr = ident_addr;
3488 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
3489 u32 kvm_nr_mmu_pages)
3491 if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
3494 mutex_lock(&kvm->slots_lock);
3496 kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
3497 kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
3499 mutex_unlock(&kvm->slots_lock);
3503 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
3505 return kvm->arch.n_max_mmu_pages;
3508 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3513 switch (chip->chip_id) {
3514 case KVM_IRQCHIP_PIC_MASTER:
3515 memcpy(&chip->chip.pic,
3516 &pic_irqchip(kvm)->pics[0],
3517 sizeof(struct kvm_pic_state));
3519 case KVM_IRQCHIP_PIC_SLAVE:
3520 memcpy(&chip->chip.pic,
3521 &pic_irqchip(kvm)->pics[1],
3522 sizeof(struct kvm_pic_state));
3524 case KVM_IRQCHIP_IOAPIC:
3525 r = kvm_get_ioapic(kvm, &chip->chip.ioapic);
3534 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3539 switch (chip->chip_id) {
3540 case KVM_IRQCHIP_PIC_MASTER:
3541 spin_lock(&pic_irqchip(kvm)->lock);
3542 memcpy(&pic_irqchip(kvm)->pics[0],
3544 sizeof(struct kvm_pic_state));
3545 spin_unlock(&pic_irqchip(kvm)->lock);
3547 case KVM_IRQCHIP_PIC_SLAVE:
3548 spin_lock(&pic_irqchip(kvm)->lock);
3549 memcpy(&pic_irqchip(kvm)->pics[1],
3551 sizeof(struct kvm_pic_state));
3552 spin_unlock(&pic_irqchip(kvm)->lock);
3554 case KVM_IRQCHIP_IOAPIC:
3555 r = kvm_set_ioapic(kvm, &chip->chip.ioapic);
3561 kvm_pic_update_irq(pic_irqchip(kvm));
3565 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3567 mutex_lock(&kvm->arch.vpit->pit_state.lock);
3568 memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
3569 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3573 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3576 mutex_lock(&kvm->arch.vpit->pit_state.lock);
3577 memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
3578 for (i = 0; i < 3; i++)
3579 kvm_pit_load_count(kvm, i, ps->channels[i].count, 0);
3580 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3584 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3586 mutex_lock(&kvm->arch.vpit->pit_state.lock);
3587 memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
3588 sizeof(ps->channels));
3589 ps->flags = kvm->arch.vpit->pit_state.flags;
3590 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3591 memset(&ps->reserved, 0, sizeof(ps->reserved));
3595 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3599 u32 prev_legacy, cur_legacy;
3600 mutex_lock(&kvm->arch.vpit->pit_state.lock);
3601 prev_legacy = kvm->arch.vpit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
3602 cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
3603 if (!prev_legacy && cur_legacy)
3605 memcpy(&kvm->arch.vpit->pit_state.channels, &ps->channels,
3606 sizeof(kvm->arch.vpit->pit_state.channels));
3607 kvm->arch.vpit->pit_state.flags = ps->flags;
3608 for (i = 0; i < 3; i++)
3609 kvm_pit_load_count(kvm, i, kvm->arch.vpit->pit_state.channels[i].count,
3611 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3615 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
3616 struct kvm_reinject_control *control)
3618 if (!kvm->arch.vpit)
3620 mutex_lock(&kvm->arch.vpit->pit_state.lock);
3621 kvm->arch.vpit->pit_state.reinject = control->pit_reinject;
3622 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3627 * kvm_vm_ioctl_get_dirty_log - get and clear the log of dirty pages in a slot
3628 * @kvm: kvm instance
3629 * @log: slot id and address to which we copy the log
3631 * Steps 1-4 below provide general overview of dirty page logging. See
3632 * kvm_get_dirty_log_protect() function description for additional details.
3634 * We call kvm_get_dirty_log_protect() to handle steps 1-3, upon return we
3635 * always flush the TLB (step 4) even if previous step failed and the dirty
3636 * bitmap may be corrupt. Regardless of previous outcome the KVM logging API
3637 * does not preclude user space subsequent dirty log read. Flushing TLB ensures
3638 * writes will be marked dirty for next log read.
3640 * 1. Take a snapshot of the bit and clear it if needed.
3641 * 2. Write protect the corresponding page.
3642 * 3. Copy the snapshot to the userspace.
3643 * 4. Flush TLB's if needed.
3645 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
3647 bool is_dirty = false;
3650 mutex_lock(&kvm->slots_lock);
3653 * Flush potentially hardware-cached dirty pages to dirty_bitmap.
3655 if (kvm_x86_ops->flush_log_dirty)
3656 kvm_x86_ops->flush_log_dirty(kvm);
3658 r = kvm_get_dirty_log_protect(kvm, log, &is_dirty);
3661 * All the TLBs can be flushed out of mmu lock, see the comments in
3662 * kvm_mmu_slot_remove_write_access().
3664 lockdep_assert_held(&kvm->slots_lock);
3666 kvm_flush_remote_tlbs(kvm);
3668 mutex_unlock(&kvm->slots_lock);
3672 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
3675 if (!irqchip_in_kernel(kvm))
3678 irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
3679 irq_event->irq, irq_event->level,
3684 static int kvm_vm_ioctl_enable_cap(struct kvm *kvm,
3685 struct kvm_enable_cap *cap)
3693 case KVM_CAP_DISABLE_QUIRKS:
3694 kvm->arch.disabled_quirks = cap->args[0];
3697 case KVM_CAP_SPLIT_IRQCHIP: {
3698 mutex_lock(&kvm->lock);
3700 if (cap->args[0] > MAX_NR_RESERVED_IOAPIC_PINS)
3701 goto split_irqchip_unlock;
3703 if (irqchip_in_kernel(kvm))
3704 goto split_irqchip_unlock;
3705 if (atomic_read(&kvm->online_vcpus))
3706 goto split_irqchip_unlock;
3707 r = kvm_setup_empty_irq_routing(kvm);
3709 goto split_irqchip_unlock;
3710 /* Pairs with irqchip_in_kernel. */
3712 kvm->arch.irqchip_split = true;
3713 kvm->arch.nr_reserved_ioapic_pins = cap->args[0];
3715 split_irqchip_unlock:
3716 mutex_unlock(&kvm->lock);
3726 long kvm_arch_vm_ioctl(struct file *filp,
3727 unsigned int ioctl, unsigned long arg)
3729 struct kvm *kvm = filp->private_data;
3730 void __user *argp = (void __user *)arg;
3733 * This union makes it completely explicit to gcc-3.x
3734 * that these two variables' stack usage should be
3735 * combined, not added together.
3738 struct kvm_pit_state ps;
3739 struct kvm_pit_state2 ps2;
3740 struct kvm_pit_config pit_config;
3744 case KVM_SET_TSS_ADDR:
3745 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
3747 case KVM_SET_IDENTITY_MAP_ADDR: {
3751 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
3753 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
3756 case KVM_SET_NR_MMU_PAGES:
3757 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
3759 case KVM_GET_NR_MMU_PAGES:
3760 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
3762 case KVM_CREATE_IRQCHIP: {
3763 struct kvm_pic *vpic;
3765 mutex_lock(&kvm->lock);
3768 goto create_irqchip_unlock;
3770 if (atomic_read(&kvm->online_vcpus))
3771 goto create_irqchip_unlock;
3773 vpic = kvm_create_pic(kvm);
3775 r = kvm_ioapic_init(kvm);
3777 mutex_lock(&kvm->slots_lock);
3778 kvm_destroy_pic(vpic);
3779 mutex_unlock(&kvm->slots_lock);
3780 goto create_irqchip_unlock;
3783 goto create_irqchip_unlock;
3784 r = kvm_setup_default_irq_routing(kvm);
3786 mutex_lock(&kvm->slots_lock);
3787 mutex_lock(&kvm->irq_lock);
3788 kvm_ioapic_destroy(kvm);
3789 kvm_destroy_pic(vpic);
3790 mutex_unlock(&kvm->irq_lock);
3791 mutex_unlock(&kvm->slots_lock);
3792 goto create_irqchip_unlock;
3794 /* Write kvm->irq_routing before kvm->arch.vpic. */
3796 kvm->arch.vpic = vpic;
3797 create_irqchip_unlock:
3798 mutex_unlock(&kvm->lock);
3801 case KVM_CREATE_PIT:
3802 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
3804 case KVM_CREATE_PIT2:
3806 if (copy_from_user(&u.pit_config, argp,
3807 sizeof(struct kvm_pit_config)))
3810 mutex_lock(&kvm->slots_lock);
3813 goto create_pit_unlock;
3815 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
3819 mutex_unlock(&kvm->slots_lock);
3821 case KVM_GET_IRQCHIP: {
3822 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3823 struct kvm_irqchip *chip;
3825 chip = memdup_user(argp, sizeof(*chip));
3832 if (!irqchip_in_kernel(kvm) || irqchip_split(kvm))
3833 goto get_irqchip_out;
3834 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
3836 goto get_irqchip_out;
3838 if (copy_to_user(argp, chip, sizeof *chip))
3839 goto get_irqchip_out;
3845 case KVM_SET_IRQCHIP: {
3846 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3847 struct kvm_irqchip *chip;
3849 chip = memdup_user(argp, sizeof(*chip));
3856 if (!irqchip_in_kernel(kvm) || irqchip_split(kvm))
3857 goto set_irqchip_out;
3858 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
3860 goto set_irqchip_out;
3868 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
3871 if (!kvm->arch.vpit)
3873 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
3877 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
3884 if (copy_from_user(&u.ps, argp, sizeof u.ps))
3887 if (!kvm->arch.vpit)
3889 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
3892 case KVM_GET_PIT2: {
3894 if (!kvm->arch.vpit)
3896 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
3900 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
3905 case KVM_SET_PIT2: {
3907 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
3910 if (!kvm->arch.vpit)
3912 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
3915 case KVM_REINJECT_CONTROL: {
3916 struct kvm_reinject_control control;
3918 if (copy_from_user(&control, argp, sizeof(control)))
3920 r = kvm_vm_ioctl_reinject(kvm, &control);
3923 case KVM_SET_BOOT_CPU_ID:
3925 mutex_lock(&kvm->lock);
3926 if (atomic_read(&kvm->online_vcpus) != 0)
3929 kvm->arch.bsp_vcpu_id = arg;
3930 mutex_unlock(&kvm->lock);
3932 case KVM_XEN_HVM_CONFIG: {
3934 if (copy_from_user(&kvm->arch.xen_hvm_config, argp,
3935 sizeof(struct kvm_xen_hvm_config)))
3938 if (kvm->arch.xen_hvm_config.flags)
3943 case KVM_SET_CLOCK: {
3944 struct kvm_clock_data user_ns;
3949 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
3957 local_irq_disable();
3958 now_ns = get_kernel_ns();
3959 delta = user_ns.clock - now_ns;
3961 kvm->arch.kvmclock_offset = delta;
3962 kvm_gen_update_masterclock(kvm);
3965 case KVM_GET_CLOCK: {
3966 struct kvm_clock_data user_ns;
3969 local_irq_disable();
3970 now_ns = get_kernel_ns();
3971 user_ns.clock = kvm->arch.kvmclock_offset + now_ns;
3974 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
3977 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
3982 case KVM_ENABLE_CAP: {
3983 struct kvm_enable_cap cap;
3986 if (copy_from_user(&cap, argp, sizeof(cap)))
3988 r = kvm_vm_ioctl_enable_cap(kvm, &cap);
3992 r = kvm_vm_ioctl_assigned_device(kvm, ioctl, arg);
3998 static void kvm_init_msr_list(void)
4003 for (i = j = 0; i < ARRAY_SIZE(msrs_to_save); i++) {
4004 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
4008 * Even MSRs that are valid in the host may not be exposed
4009 * to the guests in some cases.
4011 switch (msrs_to_save[i]) {
4012 case MSR_IA32_BNDCFGS:
4013 if (!kvm_x86_ops->mpx_supported())
4017 if (!kvm_x86_ops->rdtscp_supported())
4025 msrs_to_save[j] = msrs_to_save[i];
4028 num_msrs_to_save = j;
4030 for (i = j = 0; i < ARRAY_SIZE(emulated_msrs); i++) {
4031 switch (emulated_msrs[i]) {
4032 case MSR_IA32_SMBASE:
4033 if (!kvm_x86_ops->cpu_has_high_real_mode_segbase())
4041 emulated_msrs[j] = emulated_msrs[i];
4044 num_emulated_msrs = j;
4047 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
4055 if (!(vcpu->arch.apic &&
4056 !kvm_iodevice_write(vcpu, &vcpu->arch.apic->dev, addr, n, v))
4057 && kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, n, v))
4068 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
4075 if (!(vcpu->arch.apic &&
4076 !kvm_iodevice_read(vcpu, &vcpu->arch.apic->dev,
4078 && kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, n, v))
4080 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, *(u64 *)v);
4090 static void kvm_set_segment(struct kvm_vcpu *vcpu,
4091 struct kvm_segment *var, int seg)
4093 kvm_x86_ops->set_segment(vcpu, var, seg);
4096 void kvm_get_segment(struct kvm_vcpu *vcpu,
4097 struct kvm_segment *var, int seg)
4099 kvm_x86_ops->get_segment(vcpu, var, seg);
4102 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
4103 struct x86_exception *exception)
4107 BUG_ON(!mmu_is_nested(vcpu));
4109 /* NPT walks are always user-walks */
4110 access |= PFERR_USER_MASK;
4111 t_gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gpa, access, exception);
4116 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
4117 struct x86_exception *exception)
4119 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4120 return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4123 gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
4124 struct x86_exception *exception)
4126 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4127 access |= PFERR_FETCH_MASK;
4128 return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4131 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
4132 struct x86_exception *exception)
4134 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4135 access |= PFERR_WRITE_MASK;
4136 return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4139 /* uses this to access any guest's mapped memory without checking CPL */
4140 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
4141 struct x86_exception *exception)
4143 return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
4146 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
4147 struct kvm_vcpu *vcpu, u32 access,
4148 struct x86_exception *exception)
4151 int r = X86EMUL_CONTINUE;
4154 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
4156 unsigned offset = addr & (PAGE_SIZE-1);
4157 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
4160 if (gpa == UNMAPPED_GVA)
4161 return X86EMUL_PROPAGATE_FAULT;
4162 ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, data,
4165 r = X86EMUL_IO_NEEDED;
4177 /* used for instruction fetching */
4178 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
4179 gva_t addr, void *val, unsigned int bytes,
4180 struct x86_exception *exception)
4182 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4183 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4187 /* Inline kvm_read_guest_virt_helper for speed. */
4188 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access|PFERR_FETCH_MASK,
4190 if (unlikely(gpa == UNMAPPED_GVA))
4191 return X86EMUL_PROPAGATE_FAULT;
4193 offset = addr & (PAGE_SIZE-1);
4194 if (WARN_ON(offset + bytes > PAGE_SIZE))
4195 bytes = (unsigned)PAGE_SIZE - offset;
4196 ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, val,
4198 if (unlikely(ret < 0))
4199 return X86EMUL_IO_NEEDED;
4201 return X86EMUL_CONTINUE;
4204 int kvm_read_guest_virt(struct x86_emulate_ctxt *ctxt,
4205 gva_t addr, void *val, unsigned int bytes,
4206 struct x86_exception *exception)
4208 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4209 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4211 return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
4214 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
4216 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt *ctxt,
4217 gva_t addr, void *val, unsigned int bytes,
4218 struct x86_exception *exception)
4220 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4221 return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, exception);
4224 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt *ctxt,
4225 unsigned long addr, void *val, unsigned int bytes)
4227 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4228 int r = kvm_vcpu_read_guest(vcpu, addr, val, bytes);
4230 return r < 0 ? X86EMUL_IO_NEEDED : X86EMUL_CONTINUE;
4233 int kvm_write_guest_virt_system(struct x86_emulate_ctxt *ctxt,
4234 gva_t addr, void *val,
4236 struct x86_exception *exception)
4238 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4240 int r = X86EMUL_CONTINUE;
4243 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
4246 unsigned offset = addr & (PAGE_SIZE-1);
4247 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
4250 if (gpa == UNMAPPED_GVA)
4251 return X86EMUL_PROPAGATE_FAULT;
4252 ret = kvm_vcpu_write_guest(vcpu, gpa, data, towrite);
4254 r = X86EMUL_IO_NEEDED;
4265 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
4267 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
4268 gpa_t *gpa, struct x86_exception *exception,
4271 u32 access = ((kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0)
4272 | (write ? PFERR_WRITE_MASK : 0);
4274 if (vcpu_match_mmio_gva(vcpu, gva)
4275 && !permission_fault(vcpu, vcpu->arch.walk_mmu,
4276 vcpu->arch.access, access)) {
4277 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
4278 (gva & (PAGE_SIZE - 1));
4279 trace_vcpu_match_mmio(gva, *gpa, write, false);
4283 *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4285 if (*gpa == UNMAPPED_GVA)
4288 /* For APIC access vmexit */
4289 if ((*gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4292 if (vcpu_match_mmio_gpa(vcpu, *gpa)) {
4293 trace_vcpu_match_mmio(gva, *gpa, write, true);
4300 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
4301 const void *val, int bytes)
4305 ret = kvm_vcpu_write_guest(vcpu, gpa, val, bytes);
4308 kvm_mmu_pte_write(vcpu, gpa, val, bytes);
4312 struct read_write_emulator_ops {
4313 int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
4315 int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
4316 void *val, int bytes);
4317 int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4318 int bytes, void *val);
4319 int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4320 void *val, int bytes);
4324 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
4326 if (vcpu->mmio_read_completed) {
4327 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
4328 vcpu->mmio_fragments[0].gpa, *(u64 *)val);
4329 vcpu->mmio_read_completed = 0;
4336 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4337 void *val, int bytes)
4339 return !kvm_vcpu_read_guest(vcpu, gpa, val, bytes);
4342 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4343 void *val, int bytes)
4345 return emulator_write_phys(vcpu, gpa, val, bytes);
4348 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
4350 trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
4351 return vcpu_mmio_write(vcpu, gpa, bytes, val);
4354 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4355 void *val, int bytes)
4357 trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
4358 return X86EMUL_IO_NEEDED;
4361 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4362 void *val, int bytes)
4364 struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
4366 memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
4367 return X86EMUL_CONTINUE;
4370 static const struct read_write_emulator_ops read_emultor = {
4371 .read_write_prepare = read_prepare,
4372 .read_write_emulate = read_emulate,
4373 .read_write_mmio = vcpu_mmio_read,
4374 .read_write_exit_mmio = read_exit_mmio,
4377 static const struct read_write_emulator_ops write_emultor = {
4378 .read_write_emulate = write_emulate,
4379 .read_write_mmio = write_mmio,
4380 .read_write_exit_mmio = write_exit_mmio,
4384 static int emulator_read_write_onepage(unsigned long addr, void *val,
4386 struct x86_exception *exception,
4387 struct kvm_vcpu *vcpu,
4388 const struct read_write_emulator_ops *ops)
4392 bool write = ops->write;
4393 struct kvm_mmio_fragment *frag;
4395 ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
4398 return X86EMUL_PROPAGATE_FAULT;
4400 /* For APIC access vmexit */
4404 if (ops->read_write_emulate(vcpu, gpa, val, bytes))
4405 return X86EMUL_CONTINUE;
4409 * Is this MMIO handled locally?
4411 handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
4412 if (handled == bytes)
4413 return X86EMUL_CONTINUE;
4419 WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS);
4420 frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
4424 return X86EMUL_CONTINUE;
4427 static int emulator_read_write(struct x86_emulate_ctxt *ctxt,
4429 void *val, unsigned int bytes,
4430 struct x86_exception *exception,
4431 const struct read_write_emulator_ops *ops)
4433 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4437 if (ops->read_write_prepare &&
4438 ops->read_write_prepare(vcpu, val, bytes))
4439 return X86EMUL_CONTINUE;
4441 vcpu->mmio_nr_fragments = 0;
4443 /* Crossing a page boundary? */
4444 if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
4447 now = -addr & ~PAGE_MASK;
4448 rc = emulator_read_write_onepage(addr, val, now, exception,
4451 if (rc != X86EMUL_CONTINUE)
4454 if (ctxt->mode != X86EMUL_MODE_PROT64)
4460 rc = emulator_read_write_onepage(addr, val, bytes, exception,
4462 if (rc != X86EMUL_CONTINUE)
4465 if (!vcpu->mmio_nr_fragments)
4468 gpa = vcpu->mmio_fragments[0].gpa;
4470 vcpu->mmio_needed = 1;
4471 vcpu->mmio_cur_fragment = 0;
4473 vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len);
4474 vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
4475 vcpu->run->exit_reason = KVM_EXIT_MMIO;
4476 vcpu->run->mmio.phys_addr = gpa;
4478 return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
4481 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
4485 struct x86_exception *exception)
4487 return emulator_read_write(ctxt, addr, val, bytes,
4488 exception, &read_emultor);
4491 static int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
4495 struct x86_exception *exception)
4497 return emulator_read_write(ctxt, addr, (void *)val, bytes,
4498 exception, &write_emultor);
4501 #define CMPXCHG_TYPE(t, ptr, old, new) \
4502 (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
4504 #ifdef CONFIG_X86_64
4505 # define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
4507 # define CMPXCHG64(ptr, old, new) \
4508 (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
4511 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
4516 struct x86_exception *exception)
4518 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4524 /* guests cmpxchg8b have to be emulated atomically */
4525 if (bytes > 8 || (bytes & (bytes - 1)))
4528 gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
4530 if (gpa == UNMAPPED_GVA ||
4531 (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4534 if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
4537 page = kvm_vcpu_gfn_to_page(vcpu, gpa >> PAGE_SHIFT);
4538 if (is_error_page(page))
4541 kaddr = kmap_atomic(page);
4542 kaddr += offset_in_page(gpa);
4545 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
4548 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
4551 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
4554 exchanged = CMPXCHG64(kaddr, old, new);
4559 kunmap_atomic(kaddr);
4560 kvm_release_page_dirty(page);
4563 return X86EMUL_CMPXCHG_FAILED;
4565 kvm_vcpu_mark_page_dirty(vcpu, gpa >> PAGE_SHIFT);
4566 kvm_mmu_pte_write(vcpu, gpa, new, bytes);
4568 return X86EMUL_CONTINUE;
4571 printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
4573 return emulator_write_emulated(ctxt, addr, new, bytes, exception);
4576 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
4578 /* TODO: String I/O for in kernel device */
4581 if (vcpu->arch.pio.in)
4582 r = kvm_io_bus_read(vcpu, KVM_PIO_BUS, vcpu->arch.pio.port,
4583 vcpu->arch.pio.size, pd);
4585 r = kvm_io_bus_write(vcpu, KVM_PIO_BUS,
4586 vcpu->arch.pio.port, vcpu->arch.pio.size,
4591 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
4592 unsigned short port, void *val,
4593 unsigned int count, bool in)
4595 vcpu->arch.pio.port = port;
4596 vcpu->arch.pio.in = in;
4597 vcpu->arch.pio.count = count;
4598 vcpu->arch.pio.size = size;
4600 if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
4601 vcpu->arch.pio.count = 0;
4605 vcpu->run->exit_reason = KVM_EXIT_IO;
4606 vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
4607 vcpu->run->io.size = size;
4608 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
4609 vcpu->run->io.count = count;
4610 vcpu->run->io.port = port;
4615 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
4616 int size, unsigned short port, void *val,
4619 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4622 if (vcpu->arch.pio.count)
4625 ret = emulator_pio_in_out(vcpu, size, port, val, count, true);
4628 memcpy(val, vcpu->arch.pio_data, size * count);
4629 trace_kvm_pio(KVM_PIO_IN, port, size, count, vcpu->arch.pio_data);
4630 vcpu->arch.pio.count = 0;
4637 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
4638 int size, unsigned short port,
4639 const void *val, unsigned int count)
4641 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4643 memcpy(vcpu->arch.pio_data, val, size * count);
4644 trace_kvm_pio(KVM_PIO_OUT, port, size, count, vcpu->arch.pio_data);
4645 return emulator_pio_in_out(vcpu, size, port, (void *)val, count, false);
4648 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
4650 return kvm_x86_ops->get_segment_base(vcpu, seg);
4653 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
4655 kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
4658 int kvm_emulate_wbinvd_noskip(struct kvm_vcpu *vcpu)
4660 if (!need_emulate_wbinvd(vcpu))
4661 return X86EMUL_CONTINUE;
4663 if (kvm_x86_ops->has_wbinvd_exit()) {
4664 int cpu = get_cpu();
4666 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
4667 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
4668 wbinvd_ipi, NULL, 1);
4670 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
4673 return X86EMUL_CONTINUE;
4676 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
4678 kvm_x86_ops->skip_emulated_instruction(vcpu);
4679 return kvm_emulate_wbinvd_noskip(vcpu);
4681 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
4685 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
4687 kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt));
4690 static int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr,
4691 unsigned long *dest)
4693 return kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
4696 static int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
4697 unsigned long value)
4700 return __kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
4703 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
4705 return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
4708 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
4710 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4711 unsigned long value;
4715 value = kvm_read_cr0(vcpu);
4718 value = vcpu->arch.cr2;
4721 value = kvm_read_cr3(vcpu);
4724 value = kvm_read_cr4(vcpu);
4727 value = kvm_get_cr8(vcpu);
4730 kvm_err("%s: unexpected cr %u\n", __func__, cr);
4737 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
4739 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4744 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
4747 vcpu->arch.cr2 = val;
4750 res = kvm_set_cr3(vcpu, val);
4753 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
4756 res = kvm_set_cr8(vcpu, val);
4759 kvm_err("%s: unexpected cr %u\n", __func__, cr);
4766 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
4768 return kvm_x86_ops->get_cpl(emul_to_vcpu(ctxt));
4771 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4773 kvm_x86_ops->get_gdt(emul_to_vcpu(ctxt), dt);
4776 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4778 kvm_x86_ops->get_idt(emul_to_vcpu(ctxt), dt);
4781 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4783 kvm_x86_ops->set_gdt(emul_to_vcpu(ctxt), dt);
4786 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4788 kvm_x86_ops->set_idt(emul_to_vcpu(ctxt), dt);
4791 static unsigned long emulator_get_cached_segment_base(
4792 struct x86_emulate_ctxt *ctxt, int seg)
4794 return get_segment_base(emul_to_vcpu(ctxt), seg);
4797 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
4798 struct desc_struct *desc, u32 *base3,
4801 struct kvm_segment var;
4803 kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
4804 *selector = var.selector;
4807 memset(desc, 0, sizeof(*desc));
4813 set_desc_limit(desc, var.limit);
4814 set_desc_base(desc, (unsigned long)var.base);
4815 #ifdef CONFIG_X86_64
4817 *base3 = var.base >> 32;
4819 desc->type = var.type;
4821 desc->dpl = var.dpl;
4822 desc->p = var.present;
4823 desc->avl = var.avl;
4831 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
4832 struct desc_struct *desc, u32 base3,
4835 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4836 struct kvm_segment var;
4838 var.selector = selector;
4839 var.base = get_desc_base(desc);
4840 #ifdef CONFIG_X86_64
4841 var.base |= ((u64)base3) << 32;
4843 var.limit = get_desc_limit(desc);
4845 var.limit = (var.limit << 12) | 0xfff;
4846 var.type = desc->type;
4847 var.dpl = desc->dpl;
4852 var.avl = desc->avl;
4853 var.present = desc->p;
4854 var.unusable = !var.present;
4857 kvm_set_segment(vcpu, &var, seg);
4861 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
4862 u32 msr_index, u64 *pdata)
4864 struct msr_data msr;
4867 msr.index = msr_index;
4868 msr.host_initiated = false;
4869 r = kvm_get_msr(emul_to_vcpu(ctxt), &msr);
4877 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
4878 u32 msr_index, u64 data)
4880 struct msr_data msr;
4883 msr.index = msr_index;
4884 msr.host_initiated = false;
4885 return kvm_set_msr(emul_to_vcpu(ctxt), &msr);
4888 static u64 emulator_get_smbase(struct x86_emulate_ctxt *ctxt)
4890 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4892 return vcpu->arch.smbase;
4895 static void emulator_set_smbase(struct x86_emulate_ctxt *ctxt, u64 smbase)
4897 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4899 vcpu->arch.smbase = smbase;
4902 static int emulator_check_pmc(struct x86_emulate_ctxt *ctxt,
4905 return kvm_pmu_is_valid_msr_idx(emul_to_vcpu(ctxt), pmc);
4908 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
4909 u32 pmc, u64 *pdata)
4911 return kvm_pmu_rdpmc(emul_to_vcpu(ctxt), pmc, pdata);
4914 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
4916 emul_to_vcpu(ctxt)->arch.halt_request = 1;
4919 static void emulator_get_fpu(struct x86_emulate_ctxt *ctxt)
4922 kvm_load_guest_fpu(emul_to_vcpu(ctxt));
4924 * CR0.TS may reference the host fpu state, not the guest fpu state,
4925 * so it may be clear at this point.
4930 static void emulator_put_fpu(struct x86_emulate_ctxt *ctxt)
4935 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
4936 struct x86_instruction_info *info,
4937 enum x86_intercept_stage stage)
4939 return kvm_x86_ops->check_intercept(emul_to_vcpu(ctxt), info, stage);
4942 static void emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
4943 u32 *eax, u32 *ebx, u32 *ecx, u32 *edx)
4945 kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx);
4948 static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
4950 return kvm_register_read(emul_to_vcpu(ctxt), reg);
4953 static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
4955 kvm_register_write(emul_to_vcpu(ctxt), reg, val);
4958 static void emulator_set_nmi_mask(struct x86_emulate_ctxt *ctxt, bool masked)
4960 kvm_x86_ops->set_nmi_mask(emul_to_vcpu(ctxt), masked);
4963 static const struct x86_emulate_ops emulate_ops = {
4964 .read_gpr = emulator_read_gpr,
4965 .write_gpr = emulator_write_gpr,
4966 .read_std = kvm_read_guest_virt_system,
4967 .write_std = kvm_write_guest_virt_system,
4968 .read_phys = kvm_read_guest_phys_system,
4969 .fetch = kvm_fetch_guest_virt,
4970 .read_emulated = emulator_read_emulated,
4971 .write_emulated = emulator_write_emulated,
4972 .cmpxchg_emulated = emulator_cmpxchg_emulated,
4973 .invlpg = emulator_invlpg,
4974 .pio_in_emulated = emulator_pio_in_emulated,
4975 .pio_out_emulated = emulator_pio_out_emulated,
4976 .get_segment = emulator_get_segment,
4977 .set_segment = emulator_set_segment,
4978 .get_cached_segment_base = emulator_get_cached_segment_base,
4979 .get_gdt = emulator_get_gdt,
4980 .get_idt = emulator_get_idt,
4981 .set_gdt = emulator_set_gdt,
4982 .set_idt = emulator_set_idt,
4983 .get_cr = emulator_get_cr,
4984 .set_cr = emulator_set_cr,
4985 .cpl = emulator_get_cpl,
4986 .get_dr = emulator_get_dr,
4987 .set_dr = emulator_set_dr,
4988 .get_smbase = emulator_get_smbase,
4989 .set_smbase = emulator_set_smbase,
4990 .set_msr = emulator_set_msr,
4991 .get_msr = emulator_get_msr,
4992 .check_pmc = emulator_check_pmc,
4993 .read_pmc = emulator_read_pmc,
4994 .halt = emulator_halt,
4995 .wbinvd = emulator_wbinvd,
4996 .fix_hypercall = emulator_fix_hypercall,
4997 .get_fpu = emulator_get_fpu,
4998 .put_fpu = emulator_put_fpu,
4999 .intercept = emulator_intercept,
5000 .get_cpuid = emulator_get_cpuid,
5001 .set_nmi_mask = emulator_set_nmi_mask,
5004 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
5006 u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
5008 * an sti; sti; sequence only disable interrupts for the first
5009 * instruction. So, if the last instruction, be it emulated or
5010 * not, left the system with the INT_STI flag enabled, it
5011 * means that the last instruction is an sti. We should not
5012 * leave the flag on in this case. The same goes for mov ss
5014 if (int_shadow & mask)
5016 if (unlikely(int_shadow || mask)) {
5017 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
5019 kvm_make_request(KVM_REQ_EVENT, vcpu);
5023 static bool inject_emulated_exception(struct kvm_vcpu *vcpu)
5025 struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5026 if (ctxt->exception.vector == PF_VECTOR)
5027 return kvm_propagate_fault(vcpu, &ctxt->exception);
5029 if (ctxt->exception.error_code_valid)
5030 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
5031 ctxt->exception.error_code);
5033 kvm_queue_exception(vcpu, ctxt->exception.vector);
5037 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
5039 struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5042 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
5044 ctxt->eflags = kvm_get_rflags(vcpu);
5045 ctxt->eip = kvm_rip_read(vcpu);
5046 ctxt->mode = (!is_protmode(vcpu)) ? X86EMUL_MODE_REAL :
5047 (ctxt->eflags & X86_EFLAGS_VM) ? X86EMUL_MODE_VM86 :
5048 (cs_l && is_long_mode(vcpu)) ? X86EMUL_MODE_PROT64 :
5049 cs_db ? X86EMUL_MODE_PROT32 :
5050 X86EMUL_MODE_PROT16;
5051 BUILD_BUG_ON(HF_GUEST_MASK != X86EMUL_GUEST_MASK);
5052 BUILD_BUG_ON(HF_SMM_MASK != X86EMUL_SMM_MASK);
5053 BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK != X86EMUL_SMM_INSIDE_NMI_MASK);
5054 ctxt->emul_flags = vcpu->arch.hflags;
5056 init_decode_cache(ctxt);
5057 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
5060 int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
5062 struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5065 init_emulate_ctxt(vcpu);
5069 ctxt->_eip = ctxt->eip + inc_eip;
5070 ret = emulate_int_real(ctxt, irq);
5072 if (ret != X86EMUL_CONTINUE)
5073 return EMULATE_FAIL;
5075 ctxt->eip = ctxt->_eip;
5076 kvm_rip_write(vcpu, ctxt->eip);
5077 kvm_set_rflags(vcpu, ctxt->eflags);
5079 if (irq == NMI_VECTOR)
5080 vcpu->arch.nmi_pending = 0;
5082 vcpu->arch.interrupt.pending = false;
5084 return EMULATE_DONE;
5086 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
5088 static int handle_emulation_failure(struct kvm_vcpu *vcpu)
5090 int r = EMULATE_DONE;
5092 ++vcpu->stat.insn_emulation_fail;
5093 trace_kvm_emulate_insn_failed(vcpu);
5094 if (!is_guest_mode(vcpu) && kvm_x86_ops->get_cpl(vcpu) == 0) {
5095 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
5096 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
5097 vcpu->run->internal.ndata = 0;
5100 kvm_queue_exception(vcpu, UD_VECTOR);
5105 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t cr2,
5106 bool write_fault_to_shadow_pgtable,
5112 if (emulation_type & EMULTYPE_NO_REEXECUTE)
5115 if (!vcpu->arch.mmu.direct_map) {
5117 * Write permission should be allowed since only
5118 * write access need to be emulated.
5120 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
5123 * If the mapping is invalid in guest, let cpu retry
5124 * it to generate fault.
5126 if (gpa == UNMAPPED_GVA)
5131 * Do not retry the unhandleable instruction if it faults on the
5132 * readonly host memory, otherwise it will goto a infinite loop:
5133 * retry instruction -> write #PF -> emulation fail -> retry
5134 * instruction -> ...
5136 pfn = gfn_to_pfn(vcpu->kvm, gpa_to_gfn(gpa));
5139 * If the instruction failed on the error pfn, it can not be fixed,
5140 * report the error to userspace.
5142 if (is_error_noslot_pfn(pfn))
5145 kvm_release_pfn_clean(pfn);
5147 /* The instructions are well-emulated on direct mmu. */
5148 if (vcpu->arch.mmu.direct_map) {
5149 unsigned int indirect_shadow_pages;
5151 spin_lock(&vcpu->kvm->mmu_lock);
5152 indirect_shadow_pages = vcpu->kvm->arch.indirect_shadow_pages;
5153 spin_unlock(&vcpu->kvm->mmu_lock);
5155 if (indirect_shadow_pages)
5156 kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5162 * if emulation was due to access to shadowed page table
5163 * and it failed try to unshadow page and re-enter the
5164 * guest to let CPU execute the instruction.
5166 kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5169 * If the access faults on its page table, it can not
5170 * be fixed by unprotecting shadow page and it should
5171 * be reported to userspace.
5173 return !write_fault_to_shadow_pgtable;
5176 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
5177 unsigned long cr2, int emulation_type)
5179 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5180 unsigned long last_retry_eip, last_retry_addr, gpa = cr2;
5182 last_retry_eip = vcpu->arch.last_retry_eip;
5183 last_retry_addr = vcpu->arch.last_retry_addr;
5186 * If the emulation is caused by #PF and it is non-page_table
5187 * writing instruction, it means the VM-EXIT is caused by shadow
5188 * page protected, we can zap the shadow page and retry this
5189 * instruction directly.
5191 * Note: if the guest uses a non-page-table modifying instruction
5192 * on the PDE that points to the instruction, then we will unmap
5193 * the instruction and go to an infinite loop. So, we cache the
5194 * last retried eip and the last fault address, if we meet the eip
5195 * and the address again, we can break out of the potential infinite
5198 vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
5200 if (!(emulation_type & EMULTYPE_RETRY))
5203 if (x86_page_table_writing_insn(ctxt))
5206 if (ctxt->eip == last_retry_eip && last_retry_addr == cr2)
5209 vcpu->arch.last_retry_eip = ctxt->eip;
5210 vcpu->arch.last_retry_addr = cr2;
5212 if (!vcpu->arch.mmu.direct_map)
5213 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
5215 kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5220 static int complete_emulated_mmio(struct kvm_vcpu *vcpu);
5221 static int complete_emulated_pio(struct kvm_vcpu *vcpu);
5223 static void kvm_smm_changed(struct kvm_vcpu *vcpu)
5225 if (!(vcpu->arch.hflags & HF_SMM_MASK)) {
5226 /* This is a good place to trace that we are exiting SMM. */
5227 trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, false);
5229 if (unlikely(vcpu->arch.smi_pending)) {
5230 kvm_make_request(KVM_REQ_SMI, vcpu);
5231 vcpu->arch.smi_pending = 0;
5233 /* Process a latched INIT, if any. */
5234 kvm_make_request(KVM_REQ_EVENT, vcpu);
5238 kvm_mmu_reset_context(vcpu);
5241 static void kvm_set_hflags(struct kvm_vcpu *vcpu, unsigned emul_flags)
5243 unsigned changed = vcpu->arch.hflags ^ emul_flags;
5245 vcpu->arch.hflags = emul_flags;
5247 if (changed & HF_SMM_MASK)
5248 kvm_smm_changed(vcpu);
5251 static int kvm_vcpu_check_hw_bp(unsigned long addr, u32 type, u32 dr7,
5260 for (i = 0; i < 4; i++, enable >>= 2, rwlen >>= 4)
5261 if ((enable & 3) && (rwlen & 15) == type && db[i] == addr)
5266 static void kvm_vcpu_check_singlestep(struct kvm_vcpu *vcpu, unsigned long rflags, int *r)
5268 struct kvm_run *kvm_run = vcpu->run;
5271 * rflags is the old, "raw" value of the flags. The new value has
5272 * not been saved yet.
5274 * This is correct even for TF set by the guest, because "the
5275 * processor will not generate this exception after the instruction
5276 * that sets the TF flag".
5278 if (unlikely(rflags & X86_EFLAGS_TF)) {
5279 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
5280 kvm_run->debug.arch.dr6 = DR6_BS | DR6_FIXED_1 |
5282 kvm_run->debug.arch.pc = vcpu->arch.singlestep_rip;
5283 kvm_run->debug.arch.exception = DB_VECTOR;
5284 kvm_run->exit_reason = KVM_EXIT_DEBUG;
5285 *r = EMULATE_USER_EXIT;
5287 vcpu->arch.emulate_ctxt.eflags &= ~X86_EFLAGS_TF;
5289 * "Certain debug exceptions may clear bit 0-3. The
5290 * remaining contents of the DR6 register are never
5291 * cleared by the processor".
5293 vcpu->arch.dr6 &= ~15;
5294 vcpu->arch.dr6 |= DR6_BS | DR6_RTM;
5295 kvm_queue_exception(vcpu, DB_VECTOR);
5300 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu *vcpu, int *r)
5302 if (unlikely(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) &&
5303 (vcpu->arch.guest_debug_dr7 & DR7_BP_EN_MASK)) {
5304 struct kvm_run *kvm_run = vcpu->run;
5305 unsigned long eip = kvm_get_linear_rip(vcpu);
5306 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
5307 vcpu->arch.guest_debug_dr7,
5311 kvm_run->debug.arch.dr6 = dr6 | DR6_FIXED_1 | DR6_RTM;
5312 kvm_run->debug.arch.pc = eip;
5313 kvm_run->debug.arch.exception = DB_VECTOR;
5314 kvm_run->exit_reason = KVM_EXIT_DEBUG;
5315 *r = EMULATE_USER_EXIT;
5320 if (unlikely(vcpu->arch.dr7 & DR7_BP_EN_MASK) &&
5321 !(kvm_get_rflags(vcpu) & X86_EFLAGS_RF)) {
5322 unsigned long eip = kvm_get_linear_rip(vcpu);
5323 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
5328 vcpu->arch.dr6 &= ~15;
5329 vcpu->arch.dr6 |= dr6 | DR6_RTM;
5330 kvm_queue_exception(vcpu, DB_VECTOR);
5339 int x86_emulate_instruction(struct kvm_vcpu *vcpu,
5346 struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5347 bool writeback = true;
5348 bool write_fault_to_spt = vcpu->arch.write_fault_to_shadow_pgtable;
5351 * Clear write_fault_to_shadow_pgtable here to ensure it is
5354 vcpu->arch.write_fault_to_shadow_pgtable = false;
5355 kvm_clear_exception_queue(vcpu);
5357 if (!(emulation_type & EMULTYPE_NO_DECODE)) {
5358 init_emulate_ctxt(vcpu);
5361 * We will reenter on the same instruction since
5362 * we do not set complete_userspace_io. This does not
5363 * handle watchpoints yet, those would be handled in
5366 if (kvm_vcpu_check_breakpoint(vcpu, &r))
5369 ctxt->interruptibility = 0;
5370 ctxt->have_exception = false;
5371 ctxt->exception.vector = -1;
5372 ctxt->perm_ok = false;
5374 ctxt->ud = emulation_type & EMULTYPE_TRAP_UD;
5376 r = x86_decode_insn(ctxt, insn, insn_len);
5378 trace_kvm_emulate_insn_start(vcpu);
5379 ++vcpu->stat.insn_emulation;
5380 if (r != EMULATION_OK) {
5381 if (emulation_type & EMULTYPE_TRAP_UD)
5382 return EMULATE_FAIL;
5383 if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
5385 return EMULATE_DONE;
5386 if (emulation_type & EMULTYPE_SKIP)
5387 return EMULATE_FAIL;
5388 return handle_emulation_failure(vcpu);
5392 if (emulation_type & EMULTYPE_SKIP) {
5393 kvm_rip_write(vcpu, ctxt->_eip);
5394 if (ctxt->eflags & X86_EFLAGS_RF)
5395 kvm_set_rflags(vcpu, ctxt->eflags & ~X86_EFLAGS_RF);
5396 return EMULATE_DONE;
5399 if (retry_instruction(ctxt, cr2, emulation_type))
5400 return EMULATE_DONE;
5402 /* this is needed for vmware backdoor interface to work since it
5403 changes registers values during IO operation */
5404 if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
5405 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
5406 emulator_invalidate_register_cache(ctxt);
5410 r = x86_emulate_insn(ctxt);
5412 if (r == EMULATION_INTERCEPTED)
5413 return EMULATE_DONE;
5415 if (r == EMULATION_FAILED) {
5416 if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
5418 return EMULATE_DONE;
5420 return handle_emulation_failure(vcpu);
5423 if (ctxt->have_exception) {
5425 if (inject_emulated_exception(vcpu))
5427 } else if (vcpu->arch.pio.count) {
5428 if (!vcpu->arch.pio.in) {
5429 /* FIXME: return into emulator if single-stepping. */
5430 vcpu->arch.pio.count = 0;
5433 vcpu->arch.complete_userspace_io = complete_emulated_pio;
5435 r = EMULATE_USER_EXIT;
5436 } else if (vcpu->mmio_needed) {
5437 if (!vcpu->mmio_is_write)
5439 r = EMULATE_USER_EXIT;
5440 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
5441 } else if (r == EMULATION_RESTART)
5447 unsigned long rflags = kvm_x86_ops->get_rflags(vcpu);
5448 toggle_interruptibility(vcpu, ctxt->interruptibility);
5449 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
5450 if (vcpu->arch.hflags != ctxt->emul_flags)
5451 kvm_set_hflags(vcpu, ctxt->emul_flags);
5452 kvm_rip_write(vcpu, ctxt->eip);
5453 if (r == EMULATE_DONE)
5454 kvm_vcpu_check_singlestep(vcpu, rflags, &r);
5455 if (!ctxt->have_exception ||
5456 exception_type(ctxt->exception.vector) == EXCPT_TRAP)
5457 __kvm_set_rflags(vcpu, ctxt->eflags);
5460 * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
5461 * do nothing, and it will be requested again as soon as
5462 * the shadow expires. But we still need to check here,
5463 * because POPF has no interrupt shadow.
5465 if (unlikely((ctxt->eflags & ~rflags) & X86_EFLAGS_IF))
5466 kvm_make_request(KVM_REQ_EVENT, vcpu);
5468 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
5472 EXPORT_SYMBOL_GPL(x86_emulate_instruction);
5474 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port)
5476 unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
5477 int ret = emulator_pio_out_emulated(&vcpu->arch.emulate_ctxt,
5478 size, port, &val, 1);
5479 /* do not return to emulator after return from userspace */
5480 vcpu->arch.pio.count = 0;
5483 EXPORT_SYMBOL_GPL(kvm_fast_pio_out);
5485 static void tsc_bad(void *info)
5487 __this_cpu_write(cpu_tsc_khz, 0);
5490 static void tsc_khz_changed(void *data)
5492 struct cpufreq_freqs *freq = data;
5493 unsigned long khz = 0;
5497 else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
5498 khz = cpufreq_quick_get(raw_smp_processor_id());
5501 __this_cpu_write(cpu_tsc_khz, khz);
5504 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
5507 struct cpufreq_freqs *freq = data;
5509 struct kvm_vcpu *vcpu;
5510 int i, send_ipi = 0;
5513 * We allow guests to temporarily run on slowing clocks,
5514 * provided we notify them after, or to run on accelerating
5515 * clocks, provided we notify them before. Thus time never
5518 * However, we have a problem. We can't atomically update
5519 * the frequency of a given CPU from this function; it is
5520 * merely a notifier, which can be called from any CPU.
5521 * Changing the TSC frequency at arbitrary points in time
5522 * requires a recomputation of local variables related to
5523 * the TSC for each VCPU. We must flag these local variables
5524 * to be updated and be sure the update takes place with the
5525 * new frequency before any guests proceed.
5527 * Unfortunately, the combination of hotplug CPU and frequency
5528 * change creates an intractable locking scenario; the order
5529 * of when these callouts happen is undefined with respect to
5530 * CPU hotplug, and they can race with each other. As such,
5531 * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
5532 * undefined; you can actually have a CPU frequency change take
5533 * place in between the computation of X and the setting of the
5534 * variable. To protect against this problem, all updates of
5535 * the per_cpu tsc_khz variable are done in an interrupt
5536 * protected IPI, and all callers wishing to update the value
5537 * must wait for a synchronous IPI to complete (which is trivial
5538 * if the caller is on the CPU already). This establishes the
5539 * necessary total order on variable updates.
5541 * Note that because a guest time update may take place
5542 * anytime after the setting of the VCPU's request bit, the
5543 * correct TSC value must be set before the request. However,
5544 * to ensure the update actually makes it to any guest which
5545 * starts running in hardware virtualization between the set
5546 * and the acquisition of the spinlock, we must also ping the
5547 * CPU after setting the request bit.
5551 if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
5553 if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
5556 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5558 spin_lock(&kvm_lock);
5559 list_for_each_entry(kvm, &vm_list, vm_list) {
5560 kvm_for_each_vcpu(i, vcpu, kvm) {
5561 if (vcpu->cpu != freq->cpu)
5563 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
5564 if (vcpu->cpu != smp_processor_id())
5568 spin_unlock(&kvm_lock);
5570 if (freq->old < freq->new && send_ipi) {
5572 * We upscale the frequency. Must make the guest
5573 * doesn't see old kvmclock values while running with
5574 * the new frequency, otherwise we risk the guest sees
5575 * time go backwards.
5577 * In case we update the frequency for another cpu
5578 * (which might be in guest context) send an interrupt
5579 * to kick the cpu out of guest context. Next time
5580 * guest context is entered kvmclock will be updated,
5581 * so the guest will not see stale values.
5583 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5588 static struct notifier_block kvmclock_cpufreq_notifier_block = {
5589 .notifier_call = kvmclock_cpufreq_notifier
5592 static int kvmclock_cpu_notifier(struct notifier_block *nfb,
5593 unsigned long action, void *hcpu)
5595 unsigned int cpu = (unsigned long)hcpu;
5599 case CPU_DOWN_FAILED:
5600 smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
5602 case CPU_DOWN_PREPARE:
5603 smp_call_function_single(cpu, tsc_bad, NULL, 1);
5609 static struct notifier_block kvmclock_cpu_notifier_block = {
5610 .notifier_call = kvmclock_cpu_notifier,
5611 .priority = -INT_MAX
5614 static void kvm_timer_init(void)
5618 max_tsc_khz = tsc_khz;
5620 cpu_notifier_register_begin();
5621 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
5622 #ifdef CONFIG_CPU_FREQ
5623 struct cpufreq_policy policy;
5624 memset(&policy, 0, sizeof(policy));
5626 cpufreq_get_policy(&policy, cpu);
5627 if (policy.cpuinfo.max_freq)
5628 max_tsc_khz = policy.cpuinfo.max_freq;
5631 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
5632 CPUFREQ_TRANSITION_NOTIFIER);
5634 pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz);
5635 for_each_online_cpu(cpu)
5636 smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
5638 __register_hotcpu_notifier(&kvmclock_cpu_notifier_block);
5639 cpu_notifier_register_done();
5643 static DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
5645 int kvm_is_in_guest(void)
5647 return __this_cpu_read(current_vcpu) != NULL;
5650 static int kvm_is_user_mode(void)
5654 if (__this_cpu_read(current_vcpu))
5655 user_mode = kvm_x86_ops->get_cpl(__this_cpu_read(current_vcpu));
5657 return user_mode != 0;
5660 static unsigned long kvm_get_guest_ip(void)
5662 unsigned long ip = 0;
5664 if (__this_cpu_read(current_vcpu))
5665 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
5670 static struct perf_guest_info_callbacks kvm_guest_cbs = {
5671 .is_in_guest = kvm_is_in_guest,
5672 .is_user_mode = kvm_is_user_mode,
5673 .get_guest_ip = kvm_get_guest_ip,
5676 void kvm_before_handle_nmi(struct kvm_vcpu *vcpu)
5678 __this_cpu_write(current_vcpu, vcpu);
5680 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi);
5682 void kvm_after_handle_nmi(struct kvm_vcpu *vcpu)
5684 __this_cpu_write(current_vcpu, NULL);
5686 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi);
5688 static void kvm_set_mmio_spte_mask(void)
5691 int maxphyaddr = boot_cpu_data.x86_phys_bits;
5694 * Set the reserved bits and the present bit of an paging-structure
5695 * entry to generate page fault with PFER.RSV = 1.
5697 /* Mask the reserved physical address bits. */
5698 mask = rsvd_bits(maxphyaddr, 51);
5700 /* Bit 62 is always reserved for 32bit host. */
5701 mask |= 0x3ull << 62;
5703 /* Set the present bit. */
5706 #ifdef CONFIG_X86_64
5708 * If reserved bit is not supported, clear the present bit to disable
5711 if (maxphyaddr == 52)
5715 kvm_mmu_set_mmio_spte_mask(mask);
5718 #ifdef CONFIG_X86_64
5719 static void pvclock_gtod_update_fn(struct work_struct *work)
5723 struct kvm_vcpu *vcpu;
5726 spin_lock(&kvm_lock);
5727 list_for_each_entry(kvm, &vm_list, vm_list)
5728 kvm_for_each_vcpu(i, vcpu, kvm)
5729 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
5730 atomic_set(&kvm_guest_has_master_clock, 0);
5731 spin_unlock(&kvm_lock);
5734 static DECLARE_WORK(pvclock_gtod_work, pvclock_gtod_update_fn);
5737 * Notification about pvclock gtod data update.
5739 static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused,
5742 struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
5743 struct timekeeper *tk = priv;
5745 update_pvclock_gtod(tk);
5747 /* disable master clock if host does not trust, or does not
5748 * use, TSC clocksource
5750 if (gtod->clock.vclock_mode != VCLOCK_TSC &&
5751 atomic_read(&kvm_guest_has_master_clock) != 0)
5752 queue_work(system_long_wq, &pvclock_gtod_work);
5757 static struct notifier_block pvclock_gtod_notifier = {
5758 .notifier_call = pvclock_gtod_notify,
5762 int kvm_arch_init(void *opaque)
5765 struct kvm_x86_ops *ops = opaque;
5768 printk(KERN_ERR "kvm: already loaded the other module\n");
5773 if (!ops->cpu_has_kvm_support()) {
5774 printk(KERN_ERR "kvm: no hardware support\n");
5778 if (ops->disabled_by_bios()) {
5779 printk(KERN_ERR "kvm: disabled by bios\n");
5785 shared_msrs = alloc_percpu(struct kvm_shared_msrs);
5787 printk(KERN_ERR "kvm: failed to allocate percpu kvm_shared_msrs\n");
5791 r = kvm_mmu_module_init();
5793 goto out_free_percpu;
5795 kvm_set_mmio_spte_mask();
5799 kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
5800 PT_DIRTY_MASK, PT64_NX_MASK, 0);
5804 perf_register_guest_info_callbacks(&kvm_guest_cbs);
5807 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
5810 #ifdef CONFIG_X86_64
5811 pvclock_gtod_register_notifier(&pvclock_gtod_notifier);
5817 free_percpu(shared_msrs);
5822 void kvm_arch_exit(void)
5824 perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
5826 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
5827 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
5828 CPUFREQ_TRANSITION_NOTIFIER);
5829 unregister_hotcpu_notifier(&kvmclock_cpu_notifier_block);
5830 #ifdef CONFIG_X86_64
5831 pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier);
5834 kvm_mmu_module_exit();
5835 free_percpu(shared_msrs);
5838 int kvm_vcpu_halt(struct kvm_vcpu *vcpu)
5840 ++vcpu->stat.halt_exits;
5841 if (lapic_in_kernel(vcpu)) {
5842 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
5845 vcpu->run->exit_reason = KVM_EXIT_HLT;
5849 EXPORT_SYMBOL_GPL(kvm_vcpu_halt);
5851 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
5853 kvm_x86_ops->skip_emulated_instruction(vcpu);
5854 return kvm_vcpu_halt(vcpu);
5856 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
5859 * kvm_pv_kick_cpu_op: Kick a vcpu.
5861 * @apicid - apicid of vcpu to be kicked.
5863 static void kvm_pv_kick_cpu_op(struct kvm *kvm, unsigned long flags, int apicid)
5865 struct kvm_lapic_irq lapic_irq;
5867 lapic_irq.shorthand = 0;
5868 lapic_irq.dest_mode = 0;
5869 lapic_irq.dest_id = apicid;
5870 lapic_irq.msi_redir_hint = false;
5872 lapic_irq.delivery_mode = APIC_DM_REMRD;
5873 kvm_irq_delivery_to_apic(kvm, NULL, &lapic_irq, NULL);
5876 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
5878 unsigned long nr, a0, a1, a2, a3, ret;
5879 int op_64_bit, r = 1;
5881 kvm_x86_ops->skip_emulated_instruction(vcpu);
5883 if (kvm_hv_hypercall_enabled(vcpu->kvm))
5884 return kvm_hv_hypercall(vcpu);
5886 nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
5887 a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
5888 a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
5889 a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
5890 a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
5892 trace_kvm_hypercall(nr, a0, a1, a2, a3);
5894 op_64_bit = is_64_bit_mode(vcpu);
5903 if (kvm_x86_ops->get_cpl(vcpu) != 0) {
5909 case KVM_HC_VAPIC_POLL_IRQ:
5912 case KVM_HC_KICK_CPU:
5913 kvm_pv_kick_cpu_op(vcpu->kvm, a0, a1);
5923 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
5924 ++vcpu->stat.hypercalls;
5927 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
5929 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
5931 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5932 char instruction[3];
5933 unsigned long rip = kvm_rip_read(vcpu);
5935 kvm_x86_ops->patch_hypercall(vcpu, instruction);
5937 return emulator_write_emulated(ctxt, rip, instruction, 3, NULL);
5940 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
5942 return vcpu->run->request_interrupt_window &&
5943 likely(!pic_in_kernel(vcpu->kvm));
5946 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
5948 struct kvm_run *kvm_run = vcpu->run;
5950 kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
5951 kvm_run->flags = is_smm(vcpu) ? KVM_RUN_X86_SMM : 0;
5952 kvm_run->cr8 = kvm_get_cr8(vcpu);
5953 kvm_run->apic_base = kvm_get_apic_base(vcpu);
5954 kvm_run->ready_for_interrupt_injection =
5955 pic_in_kernel(vcpu->kvm) ||
5956 kvm_vcpu_ready_for_interrupt_injection(vcpu);
5959 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
5963 if (!kvm_x86_ops->update_cr8_intercept)
5966 if (!vcpu->arch.apic)
5969 if (!vcpu->arch.apic->vapic_addr)
5970 max_irr = kvm_lapic_find_highest_irr(vcpu);
5977 tpr = kvm_lapic_get_cr8(vcpu);
5979 kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
5982 static int inject_pending_event(struct kvm_vcpu *vcpu, bool req_int_win)
5986 /* try to reinject previous events if any */
5987 if (vcpu->arch.exception.pending) {
5988 trace_kvm_inj_exception(vcpu->arch.exception.nr,
5989 vcpu->arch.exception.has_error_code,
5990 vcpu->arch.exception.error_code);
5992 if (exception_type(vcpu->arch.exception.nr) == EXCPT_FAULT)
5993 __kvm_set_rflags(vcpu, kvm_get_rflags(vcpu) |
5996 if (vcpu->arch.exception.nr == DB_VECTOR &&
5997 (vcpu->arch.dr7 & DR7_GD)) {
5998 vcpu->arch.dr7 &= ~DR7_GD;
5999 kvm_update_dr7(vcpu);
6002 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
6003 vcpu->arch.exception.has_error_code,
6004 vcpu->arch.exception.error_code,
6005 vcpu->arch.exception.reinject);
6009 if (vcpu->arch.nmi_injected) {
6010 kvm_x86_ops->set_nmi(vcpu);
6014 if (vcpu->arch.interrupt.pending) {
6015 kvm_x86_ops->set_irq(vcpu);
6019 if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
6020 r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
6025 /* try to inject new event if pending */
6026 if (vcpu->arch.nmi_pending) {
6027 if (kvm_x86_ops->nmi_allowed(vcpu)) {
6028 --vcpu->arch.nmi_pending;
6029 vcpu->arch.nmi_injected = true;
6030 kvm_x86_ops->set_nmi(vcpu);
6032 } else if (kvm_cpu_has_injectable_intr(vcpu)) {
6034 * Because interrupts can be injected asynchronously, we are
6035 * calling check_nested_events again here to avoid a race condition.
6036 * See https://lkml.org/lkml/2014/7/2/60 for discussion about this
6037 * proposal and current concerns. Perhaps we should be setting
6038 * KVM_REQ_EVENT only on certain events and not unconditionally?
6040 if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
6041 r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
6045 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
6046 kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
6048 kvm_x86_ops->set_irq(vcpu);
6054 static void process_nmi(struct kvm_vcpu *vcpu)
6059 * x86 is limited to one NMI running, and one NMI pending after it.
6060 * If an NMI is already in progress, limit further NMIs to just one.
6061 * Otherwise, allow two (and we'll inject the first one immediately).
6063 if (kvm_x86_ops->get_nmi_mask(vcpu) || vcpu->arch.nmi_injected)
6066 vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
6067 vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
6068 kvm_make_request(KVM_REQ_EVENT, vcpu);
6071 #define put_smstate(type, buf, offset, val) \
6072 *(type *)((buf) + (offset) - 0x7e00) = val
6074 static u32 process_smi_get_segment_flags(struct kvm_segment *seg)
6077 flags |= seg->g << 23;
6078 flags |= seg->db << 22;
6079 flags |= seg->l << 21;
6080 flags |= seg->avl << 20;
6081 flags |= seg->present << 15;
6082 flags |= seg->dpl << 13;
6083 flags |= seg->s << 12;
6084 flags |= seg->type << 8;
6088 static void process_smi_save_seg_32(struct kvm_vcpu *vcpu, char *buf, int n)
6090 struct kvm_segment seg;
6093 kvm_get_segment(vcpu, &seg, n);
6094 put_smstate(u32, buf, 0x7fa8 + n * 4, seg.selector);
6097 offset = 0x7f84 + n * 12;
6099 offset = 0x7f2c + (n - 3) * 12;
6101 put_smstate(u32, buf, offset + 8, seg.base);
6102 put_smstate(u32, buf, offset + 4, seg.limit);
6103 put_smstate(u32, buf, offset, process_smi_get_segment_flags(&seg));
6106 #ifdef CONFIG_X86_64
6107 static void process_smi_save_seg_64(struct kvm_vcpu *vcpu, char *buf, int n)
6109 struct kvm_segment seg;
6113 kvm_get_segment(vcpu, &seg, n);
6114 offset = 0x7e00 + n * 16;
6116 flags = process_smi_get_segment_flags(&seg) >> 8;
6117 put_smstate(u16, buf, offset, seg.selector);
6118 put_smstate(u16, buf, offset + 2, flags);
6119 put_smstate(u32, buf, offset + 4, seg.limit);
6120 put_smstate(u64, buf, offset + 8, seg.base);
6124 static void process_smi_save_state_32(struct kvm_vcpu *vcpu, char *buf)
6127 struct kvm_segment seg;
6131 put_smstate(u32, buf, 0x7ffc, kvm_read_cr0(vcpu));
6132 put_smstate(u32, buf, 0x7ff8, kvm_read_cr3(vcpu));
6133 put_smstate(u32, buf, 0x7ff4, kvm_get_rflags(vcpu));
6134 put_smstate(u32, buf, 0x7ff0, kvm_rip_read(vcpu));
6136 for (i = 0; i < 8; i++)
6137 put_smstate(u32, buf, 0x7fd0 + i * 4, kvm_register_read(vcpu, i));
6139 kvm_get_dr(vcpu, 6, &val);
6140 put_smstate(u32, buf, 0x7fcc, (u32)val);
6141 kvm_get_dr(vcpu, 7, &val);
6142 put_smstate(u32, buf, 0x7fc8, (u32)val);
6144 kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
6145 put_smstate(u32, buf, 0x7fc4, seg.selector);
6146 put_smstate(u32, buf, 0x7f64, seg.base);
6147 put_smstate(u32, buf, 0x7f60, seg.limit);
6148 put_smstate(u32, buf, 0x7f5c, process_smi_get_segment_flags(&seg));
6150 kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
6151 put_smstate(u32, buf, 0x7fc0, seg.selector);
6152 put_smstate(u32, buf, 0x7f80, seg.base);
6153 put_smstate(u32, buf, 0x7f7c, seg.limit);
6154 put_smstate(u32, buf, 0x7f78, process_smi_get_segment_flags(&seg));
6156 kvm_x86_ops->get_gdt(vcpu, &dt);
6157 put_smstate(u32, buf, 0x7f74, dt.address);
6158 put_smstate(u32, buf, 0x7f70, dt.size);
6160 kvm_x86_ops->get_idt(vcpu, &dt);
6161 put_smstate(u32, buf, 0x7f58, dt.address);
6162 put_smstate(u32, buf, 0x7f54, dt.size);
6164 for (i = 0; i < 6; i++)
6165 process_smi_save_seg_32(vcpu, buf, i);
6167 put_smstate(u32, buf, 0x7f14, kvm_read_cr4(vcpu));
6170 put_smstate(u32, buf, 0x7efc, 0x00020000);
6171 put_smstate(u32, buf, 0x7ef8, vcpu->arch.smbase);
6174 static void process_smi_save_state_64(struct kvm_vcpu *vcpu, char *buf)
6176 #ifdef CONFIG_X86_64
6178 struct kvm_segment seg;
6182 for (i = 0; i < 16; i++)
6183 put_smstate(u64, buf, 0x7ff8 - i * 8, kvm_register_read(vcpu, i));
6185 put_smstate(u64, buf, 0x7f78, kvm_rip_read(vcpu));
6186 put_smstate(u32, buf, 0x7f70, kvm_get_rflags(vcpu));
6188 kvm_get_dr(vcpu, 6, &val);
6189 put_smstate(u64, buf, 0x7f68, val);
6190 kvm_get_dr(vcpu, 7, &val);
6191 put_smstate(u64, buf, 0x7f60, val);
6193 put_smstate(u64, buf, 0x7f58, kvm_read_cr0(vcpu));
6194 put_smstate(u64, buf, 0x7f50, kvm_read_cr3(vcpu));
6195 put_smstate(u64, buf, 0x7f48, kvm_read_cr4(vcpu));
6197 put_smstate(u32, buf, 0x7f00, vcpu->arch.smbase);
6200 put_smstate(u32, buf, 0x7efc, 0x00020064);
6202 put_smstate(u64, buf, 0x7ed0, vcpu->arch.efer);
6204 kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
6205 put_smstate(u16, buf, 0x7e90, seg.selector);
6206 put_smstate(u16, buf, 0x7e92, process_smi_get_segment_flags(&seg) >> 8);
6207 put_smstate(u32, buf, 0x7e94, seg.limit);
6208 put_smstate(u64, buf, 0x7e98, seg.base);
6210 kvm_x86_ops->get_idt(vcpu, &dt);
6211 put_smstate(u32, buf, 0x7e84, dt.size);
6212 put_smstate(u64, buf, 0x7e88, dt.address);
6214 kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
6215 put_smstate(u16, buf, 0x7e70, seg.selector);
6216 put_smstate(u16, buf, 0x7e72, process_smi_get_segment_flags(&seg) >> 8);
6217 put_smstate(u32, buf, 0x7e74, seg.limit);
6218 put_smstate(u64, buf, 0x7e78, seg.base);
6220 kvm_x86_ops->get_gdt(vcpu, &dt);
6221 put_smstate(u32, buf, 0x7e64, dt.size);
6222 put_smstate(u64, buf, 0x7e68, dt.address);
6224 for (i = 0; i < 6; i++)
6225 process_smi_save_seg_64(vcpu, buf, i);
6231 static void process_smi(struct kvm_vcpu *vcpu)
6233 struct kvm_segment cs, ds;
6239 vcpu->arch.smi_pending = true;
6243 trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, true);
6244 vcpu->arch.hflags |= HF_SMM_MASK;
6245 memset(buf, 0, 512);
6246 if (guest_cpuid_has_longmode(vcpu))
6247 process_smi_save_state_64(vcpu, buf);
6249 process_smi_save_state_32(vcpu, buf);
6251 kvm_vcpu_write_guest(vcpu, vcpu->arch.smbase + 0xfe00, buf, sizeof(buf));
6253 if (kvm_x86_ops->get_nmi_mask(vcpu))
6254 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
6256 kvm_x86_ops->set_nmi_mask(vcpu, true);
6258 kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
6259 kvm_rip_write(vcpu, 0x8000);
6261 cr0 = vcpu->arch.cr0 & ~(X86_CR0_PE | X86_CR0_EM | X86_CR0_TS | X86_CR0_PG);
6262 kvm_x86_ops->set_cr0(vcpu, cr0);
6263 vcpu->arch.cr0 = cr0;
6265 kvm_x86_ops->set_cr4(vcpu, 0);
6267 /* Undocumented: IDT limit is set to zero on entry to SMM. */
6268 dt.address = dt.size = 0;
6269 kvm_x86_ops->set_idt(vcpu, &dt);
6271 __kvm_set_dr(vcpu, 7, DR7_FIXED_1);
6273 cs.selector = (vcpu->arch.smbase >> 4) & 0xffff;
6274 cs.base = vcpu->arch.smbase;
6279 cs.limit = ds.limit = 0xffffffff;
6280 cs.type = ds.type = 0x3;
6281 cs.dpl = ds.dpl = 0;
6286 cs.avl = ds.avl = 0;
6287 cs.present = ds.present = 1;
6288 cs.unusable = ds.unusable = 0;
6289 cs.padding = ds.padding = 0;
6291 kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
6292 kvm_set_segment(vcpu, &ds, VCPU_SREG_DS);
6293 kvm_set_segment(vcpu, &ds, VCPU_SREG_ES);
6294 kvm_set_segment(vcpu, &ds, VCPU_SREG_FS);
6295 kvm_set_segment(vcpu, &ds, VCPU_SREG_GS);
6296 kvm_set_segment(vcpu, &ds, VCPU_SREG_SS);
6298 if (guest_cpuid_has_longmode(vcpu))
6299 kvm_x86_ops->set_efer(vcpu, 0);
6301 kvm_update_cpuid(vcpu);
6302 kvm_mmu_reset_context(vcpu);
6305 static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu)
6307 if (!kvm_apic_hw_enabled(vcpu->arch.apic))
6310 memset(vcpu->arch.eoi_exit_bitmap, 0, 256 / 8);
6312 if (irqchip_split(vcpu->kvm))
6313 kvm_scan_ioapic_routes(vcpu, vcpu->arch.eoi_exit_bitmap);
6315 kvm_x86_ops->sync_pir_to_irr(vcpu);
6316 kvm_ioapic_scan_entry(vcpu, vcpu->arch.eoi_exit_bitmap);
6318 kvm_x86_ops->load_eoi_exitmap(vcpu);
6321 static void kvm_vcpu_flush_tlb(struct kvm_vcpu *vcpu)
6323 ++vcpu->stat.tlb_flush;
6324 kvm_x86_ops->tlb_flush(vcpu);
6327 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu)
6329 struct page *page = NULL;
6331 if (!lapic_in_kernel(vcpu))
6334 if (!kvm_x86_ops->set_apic_access_page_addr)
6337 page = gfn_to_page(vcpu->kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
6338 if (is_error_page(page))
6340 kvm_x86_ops->set_apic_access_page_addr(vcpu, page_to_phys(page));
6343 * Do not pin apic access page in memory, the MMU notifier
6344 * will call us again if it is migrated or swapped out.
6348 EXPORT_SYMBOL_GPL(kvm_vcpu_reload_apic_access_page);
6350 void kvm_arch_mmu_notifier_invalidate_page(struct kvm *kvm,
6351 unsigned long address)
6354 * The physical address of apic access page is stored in the VMCS.
6355 * Update it when it becomes invalid.
6357 if (address == gfn_to_hva(kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT))
6358 kvm_make_all_cpus_request(kvm, KVM_REQ_APIC_PAGE_RELOAD);
6362 * Returns 1 to let vcpu_run() continue the guest execution loop without
6363 * exiting to the userspace. Otherwise, the value will be returned to the
6366 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
6370 dm_request_for_irq_injection(vcpu) &&
6371 kvm_cpu_accept_dm_intr(vcpu);
6373 bool req_immediate_exit = false;
6375 if (vcpu->requests) {
6376 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
6377 kvm_mmu_unload(vcpu);
6378 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
6379 __kvm_migrate_timers(vcpu);
6380 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu))
6381 kvm_gen_update_masterclock(vcpu->kvm);
6382 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu))
6383 kvm_gen_kvmclock_update(vcpu);
6384 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
6385 r = kvm_guest_time_update(vcpu);
6389 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
6390 kvm_mmu_sync_roots(vcpu);
6391 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
6392 kvm_vcpu_flush_tlb(vcpu);
6393 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
6394 vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
6398 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
6399 vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
6403 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU, vcpu)) {
6404 vcpu->fpu_active = 0;
6405 kvm_x86_ops->fpu_deactivate(vcpu);
6407 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
6408 /* Page is swapped out. Do synthetic halt */
6409 vcpu->arch.apf.halted = true;
6413 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
6414 record_steal_time(vcpu);
6415 if (kvm_check_request(KVM_REQ_SMI, vcpu))
6417 if (kvm_check_request(KVM_REQ_NMI, vcpu))
6419 if (kvm_check_request(KVM_REQ_PMU, vcpu))
6420 kvm_pmu_handle_event(vcpu);
6421 if (kvm_check_request(KVM_REQ_PMI, vcpu))
6422 kvm_pmu_deliver_pmi(vcpu);
6423 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT, vcpu)) {
6424 BUG_ON(vcpu->arch.pending_ioapic_eoi > 255);
6425 if (test_bit(vcpu->arch.pending_ioapic_eoi,
6426 (void *) vcpu->arch.eoi_exit_bitmap)) {
6427 vcpu->run->exit_reason = KVM_EXIT_IOAPIC_EOI;
6428 vcpu->run->eoi.vector =
6429 vcpu->arch.pending_ioapic_eoi;
6434 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC, vcpu))
6435 vcpu_scan_ioapic(vcpu);
6436 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD, vcpu))
6437 kvm_vcpu_reload_apic_access_page(vcpu);
6438 if (kvm_check_request(KVM_REQ_HV_CRASH, vcpu)) {
6439 vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
6440 vcpu->run->system_event.type = KVM_SYSTEM_EVENT_CRASH;
6444 if (kvm_check_request(KVM_REQ_HV_RESET, vcpu)) {
6445 vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
6446 vcpu->run->system_event.type = KVM_SYSTEM_EVENT_RESET;
6453 * KVM_REQ_EVENT is not set when posted interrupts are set by
6454 * VT-d hardware, so we have to update RVI unconditionally.
6456 if (kvm_lapic_enabled(vcpu)) {
6458 * Update architecture specific hints for APIC
6459 * virtual interrupt delivery.
6461 if (kvm_x86_ops->hwapic_irr_update)
6462 kvm_x86_ops->hwapic_irr_update(vcpu,
6463 kvm_lapic_find_highest_irr(vcpu));
6466 if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
6467 kvm_apic_accept_events(vcpu);
6468 if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
6473 if (inject_pending_event(vcpu, req_int_win) != 0)
6474 req_immediate_exit = true;
6475 /* enable NMI/IRQ window open exits if needed */
6476 else if (vcpu->arch.nmi_pending)
6477 kvm_x86_ops->enable_nmi_window(vcpu);
6478 else if (kvm_cpu_has_injectable_intr(vcpu) || req_int_win)
6479 kvm_x86_ops->enable_irq_window(vcpu);
6481 if (kvm_lapic_enabled(vcpu)) {
6482 update_cr8_intercept(vcpu);
6483 kvm_lapic_sync_to_vapic(vcpu);
6487 r = kvm_mmu_reload(vcpu);
6489 goto cancel_injection;
6494 kvm_x86_ops->prepare_guest_switch(vcpu);
6495 if (vcpu->fpu_active)
6496 kvm_load_guest_fpu(vcpu);
6497 kvm_load_guest_xcr0(vcpu);
6499 vcpu->mode = IN_GUEST_MODE;
6501 srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
6503 /* We should set ->mode before check ->requests,
6504 * see the comment in make_all_cpus_request.
6506 smp_mb__after_srcu_read_unlock();
6508 local_irq_disable();
6510 if (vcpu->mode == EXITING_GUEST_MODE || vcpu->requests
6511 || need_resched() || signal_pending(current)) {
6512 vcpu->mode = OUTSIDE_GUEST_MODE;
6516 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
6518 goto cancel_injection;
6521 if (req_immediate_exit)
6522 smp_send_reschedule(vcpu->cpu);
6524 trace_kvm_entry(vcpu->vcpu_id);
6525 wait_lapic_expire(vcpu);
6526 __kvm_guest_enter();
6528 if (unlikely(vcpu->arch.switch_db_regs)) {
6530 set_debugreg(vcpu->arch.eff_db[0], 0);
6531 set_debugreg(vcpu->arch.eff_db[1], 1);
6532 set_debugreg(vcpu->arch.eff_db[2], 2);
6533 set_debugreg(vcpu->arch.eff_db[3], 3);
6534 set_debugreg(vcpu->arch.dr6, 6);
6535 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
6538 kvm_x86_ops->run(vcpu);
6541 * Do this here before restoring debug registers on the host. And
6542 * since we do this before handling the vmexit, a DR access vmexit
6543 * can (a) read the correct value of the debug registers, (b) set
6544 * KVM_DEBUGREG_WONT_EXIT again.
6546 if (unlikely(vcpu->arch.switch_db_regs & KVM_DEBUGREG_WONT_EXIT)) {
6549 WARN_ON(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP);
6550 kvm_x86_ops->sync_dirty_debug_regs(vcpu);
6551 for (i = 0; i < KVM_NR_DB_REGS; i++)
6552 vcpu->arch.eff_db[i] = vcpu->arch.db[i];
6556 * If the guest has used debug registers, at least dr7
6557 * will be disabled while returning to the host.
6558 * If we don't have active breakpoints in the host, we don't
6559 * care about the messed up debug address registers. But if
6560 * we have some of them active, restore the old state.
6562 if (hw_breakpoint_active())
6563 hw_breakpoint_restore();
6565 vcpu->arch.last_guest_tsc = kvm_read_l1_tsc(vcpu, rdtsc());
6567 vcpu->mode = OUTSIDE_GUEST_MODE;
6570 /* Interrupt is enabled by handle_external_intr() */
6571 kvm_x86_ops->handle_external_intr(vcpu);
6576 * We must have an instruction between local_irq_enable() and
6577 * kvm_guest_exit(), so the timer interrupt isn't delayed by
6578 * the interrupt shadow. The stat.exits increment will do nicely.
6579 * But we need to prevent reordering, hence this barrier():
6587 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
6590 * Profile KVM exit RIPs:
6592 if (unlikely(prof_on == KVM_PROFILING)) {
6593 unsigned long rip = kvm_rip_read(vcpu);
6594 profile_hit(KVM_PROFILING, (void *)rip);
6597 if (unlikely(vcpu->arch.tsc_always_catchup))
6598 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
6600 if (vcpu->arch.apic_attention)
6601 kvm_lapic_sync_from_vapic(vcpu);
6603 r = kvm_x86_ops->handle_exit(vcpu);
6607 kvm_x86_ops->cancel_injection(vcpu);
6608 if (unlikely(vcpu->arch.apic_attention))
6609 kvm_lapic_sync_from_vapic(vcpu);
6614 static inline int vcpu_block(struct kvm *kvm, struct kvm_vcpu *vcpu)
6616 if (!kvm_arch_vcpu_runnable(vcpu) &&
6617 (!kvm_x86_ops->pre_block || kvm_x86_ops->pre_block(vcpu) == 0)) {
6618 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
6619 kvm_vcpu_block(vcpu);
6620 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
6622 if (kvm_x86_ops->post_block)
6623 kvm_x86_ops->post_block(vcpu);
6625 if (!kvm_check_request(KVM_REQ_UNHALT, vcpu))
6629 kvm_apic_accept_events(vcpu);
6630 switch(vcpu->arch.mp_state) {
6631 case KVM_MP_STATE_HALTED:
6632 vcpu->arch.pv.pv_unhalted = false;
6633 vcpu->arch.mp_state =
6634 KVM_MP_STATE_RUNNABLE;
6635 case KVM_MP_STATE_RUNNABLE:
6636 vcpu->arch.apf.halted = false;
6638 case KVM_MP_STATE_INIT_RECEIVED:
6647 static inline bool kvm_vcpu_running(struct kvm_vcpu *vcpu)
6649 return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
6650 !vcpu->arch.apf.halted);
6653 static int vcpu_run(struct kvm_vcpu *vcpu)
6656 struct kvm *kvm = vcpu->kvm;
6658 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
6661 if (kvm_vcpu_running(vcpu)) {
6662 r = vcpu_enter_guest(vcpu);
6664 r = vcpu_block(kvm, vcpu);
6670 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
6671 if (kvm_cpu_has_pending_timer(vcpu))
6672 kvm_inject_pending_timer_irqs(vcpu);
6674 if (dm_request_for_irq_injection(vcpu) &&
6675 kvm_vcpu_ready_for_interrupt_injection(vcpu)) {
6677 vcpu->run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
6678 ++vcpu->stat.request_irq_exits;
6682 kvm_check_async_pf_completion(vcpu);
6684 if (signal_pending(current)) {
6686 vcpu->run->exit_reason = KVM_EXIT_INTR;
6687 ++vcpu->stat.signal_exits;
6690 if (need_resched()) {
6691 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
6693 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
6697 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
6702 static inline int complete_emulated_io(struct kvm_vcpu *vcpu)
6705 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
6706 r = emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
6707 srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
6708 if (r != EMULATE_DONE)
6713 static int complete_emulated_pio(struct kvm_vcpu *vcpu)
6715 BUG_ON(!vcpu->arch.pio.count);
6717 return complete_emulated_io(vcpu);
6721 * Implements the following, as a state machine:
6725 * for each mmio piece in the fragment
6733 * for each mmio piece in the fragment
6738 static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
6740 struct kvm_run *run = vcpu->run;
6741 struct kvm_mmio_fragment *frag;
6744 BUG_ON(!vcpu->mmio_needed);
6746 /* Complete previous fragment */
6747 frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
6748 len = min(8u, frag->len);
6749 if (!vcpu->mmio_is_write)
6750 memcpy(frag->data, run->mmio.data, len);
6752 if (frag->len <= 8) {
6753 /* Switch to the next fragment. */
6755 vcpu->mmio_cur_fragment++;
6757 /* Go forward to the next mmio piece. */
6763 if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
6764 vcpu->mmio_needed = 0;
6766 /* FIXME: return into emulator if single-stepping. */
6767 if (vcpu->mmio_is_write)
6769 vcpu->mmio_read_completed = 1;
6770 return complete_emulated_io(vcpu);
6773 run->exit_reason = KVM_EXIT_MMIO;
6774 run->mmio.phys_addr = frag->gpa;
6775 if (vcpu->mmio_is_write)
6776 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
6777 run->mmio.len = min(8u, frag->len);
6778 run->mmio.is_write = vcpu->mmio_is_write;
6779 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
6784 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
6786 struct fpu *fpu = ¤t->thread.fpu;
6790 fpu__activate_curr(fpu);
6792 if (vcpu->sigset_active)
6793 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
6795 if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
6796 kvm_vcpu_block(vcpu);
6797 kvm_apic_accept_events(vcpu);
6798 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
6803 /* re-sync apic's tpr */
6804 if (!lapic_in_kernel(vcpu)) {
6805 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
6811 if (unlikely(vcpu->arch.complete_userspace_io)) {
6812 int (*cui)(struct kvm_vcpu *) = vcpu->arch.complete_userspace_io;
6813 vcpu->arch.complete_userspace_io = NULL;
6818 WARN_ON(vcpu->arch.pio.count || vcpu->mmio_needed);
6823 post_kvm_run_save(vcpu);
6824 if (vcpu->sigset_active)
6825 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
6830 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
6832 if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
6834 * We are here if userspace calls get_regs() in the middle of
6835 * instruction emulation. Registers state needs to be copied
6836 * back from emulation context to vcpu. Userspace shouldn't do
6837 * that usually, but some bad designed PV devices (vmware
6838 * backdoor interface) need this to work
6840 emulator_writeback_register_cache(&vcpu->arch.emulate_ctxt);
6841 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
6843 regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
6844 regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
6845 regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
6846 regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
6847 regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
6848 regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
6849 regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
6850 regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
6851 #ifdef CONFIG_X86_64
6852 regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
6853 regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
6854 regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
6855 regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
6856 regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
6857 regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
6858 regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
6859 regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
6862 regs->rip = kvm_rip_read(vcpu);
6863 regs->rflags = kvm_get_rflags(vcpu);
6868 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
6870 vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
6871 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
6873 kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
6874 kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
6875 kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
6876 kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
6877 kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
6878 kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
6879 kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
6880 kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
6881 #ifdef CONFIG_X86_64
6882 kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
6883 kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
6884 kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
6885 kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
6886 kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
6887 kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
6888 kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
6889 kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
6892 kvm_rip_write(vcpu, regs->rip);
6893 kvm_set_rflags(vcpu, regs->rflags);
6895 vcpu->arch.exception.pending = false;
6897 kvm_make_request(KVM_REQ_EVENT, vcpu);
6902 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
6904 struct kvm_segment cs;
6906 kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
6910 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
6912 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
6913 struct kvm_sregs *sregs)
6917 kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
6918 kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
6919 kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
6920 kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
6921 kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
6922 kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
6924 kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
6925 kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
6927 kvm_x86_ops->get_idt(vcpu, &dt);
6928 sregs->idt.limit = dt.size;
6929 sregs->idt.base = dt.address;
6930 kvm_x86_ops->get_gdt(vcpu, &dt);
6931 sregs->gdt.limit = dt.size;
6932 sregs->gdt.base = dt.address;
6934 sregs->cr0 = kvm_read_cr0(vcpu);
6935 sregs->cr2 = vcpu->arch.cr2;
6936 sregs->cr3 = kvm_read_cr3(vcpu);
6937 sregs->cr4 = kvm_read_cr4(vcpu);
6938 sregs->cr8 = kvm_get_cr8(vcpu);
6939 sregs->efer = vcpu->arch.efer;
6940 sregs->apic_base = kvm_get_apic_base(vcpu);
6942 memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
6944 if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
6945 set_bit(vcpu->arch.interrupt.nr,
6946 (unsigned long *)sregs->interrupt_bitmap);
6951 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
6952 struct kvm_mp_state *mp_state)
6954 kvm_apic_accept_events(vcpu);
6955 if (vcpu->arch.mp_state == KVM_MP_STATE_HALTED &&
6956 vcpu->arch.pv.pv_unhalted)
6957 mp_state->mp_state = KVM_MP_STATE_RUNNABLE;
6959 mp_state->mp_state = vcpu->arch.mp_state;
6964 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
6965 struct kvm_mp_state *mp_state)
6967 if (!kvm_vcpu_has_lapic(vcpu) &&
6968 mp_state->mp_state != KVM_MP_STATE_RUNNABLE)
6971 if (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED) {
6972 vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
6973 set_bit(KVM_APIC_SIPI, &vcpu->arch.apic->pending_events);
6975 vcpu->arch.mp_state = mp_state->mp_state;
6976 kvm_make_request(KVM_REQ_EVENT, vcpu);
6980 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
6981 int reason, bool has_error_code, u32 error_code)
6983 struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
6986 init_emulate_ctxt(vcpu);
6988 ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
6989 has_error_code, error_code);
6992 return EMULATE_FAIL;
6994 kvm_rip_write(vcpu, ctxt->eip);
6995 kvm_set_rflags(vcpu, ctxt->eflags);
6996 kvm_make_request(KVM_REQ_EVENT, vcpu);
6997 return EMULATE_DONE;
6999 EXPORT_SYMBOL_GPL(kvm_task_switch);
7001 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
7002 struct kvm_sregs *sregs)
7004 struct msr_data apic_base_msr;
7005 int mmu_reset_needed = 0;
7006 int pending_vec, max_bits, idx;
7009 if (!guest_cpuid_has_xsave(vcpu) && (sregs->cr4 & X86_CR4_OSXSAVE))
7012 dt.size = sregs->idt.limit;
7013 dt.address = sregs->idt.base;
7014 kvm_x86_ops->set_idt(vcpu, &dt);
7015 dt.size = sregs->gdt.limit;
7016 dt.address = sregs->gdt.base;
7017 kvm_x86_ops->set_gdt(vcpu, &dt);
7019 vcpu->arch.cr2 = sregs->cr2;
7020 mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
7021 vcpu->arch.cr3 = sregs->cr3;
7022 __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
7024 kvm_set_cr8(vcpu, sregs->cr8);
7026 mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
7027 kvm_x86_ops->set_efer(vcpu, sregs->efer);
7028 apic_base_msr.data = sregs->apic_base;
7029 apic_base_msr.host_initiated = true;
7030 kvm_set_apic_base(vcpu, &apic_base_msr);
7032 mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
7033 kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
7034 vcpu->arch.cr0 = sregs->cr0;
7036 mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
7037 kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
7038 if (sregs->cr4 & X86_CR4_OSXSAVE)
7039 kvm_update_cpuid(vcpu);
7041 idx = srcu_read_lock(&vcpu->kvm->srcu);
7042 if (!is_long_mode(vcpu) && is_pae(vcpu)) {
7043 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
7044 mmu_reset_needed = 1;
7046 srcu_read_unlock(&vcpu->kvm->srcu, idx);
7048 if (mmu_reset_needed)
7049 kvm_mmu_reset_context(vcpu);
7051 max_bits = KVM_NR_INTERRUPTS;
7052 pending_vec = find_first_bit(
7053 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
7054 if (pending_vec < max_bits) {
7055 kvm_queue_interrupt(vcpu, pending_vec, false);
7056 pr_debug("Set back pending irq %d\n", pending_vec);
7059 kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
7060 kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
7061 kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
7062 kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
7063 kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
7064 kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
7066 kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
7067 kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
7069 update_cr8_intercept(vcpu);
7071 /* Older userspace won't unhalt the vcpu on reset. */
7072 if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
7073 sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
7075 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
7077 kvm_make_request(KVM_REQ_EVENT, vcpu);
7082 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
7083 struct kvm_guest_debug *dbg)
7085 unsigned long rflags;
7088 if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
7090 if (vcpu->arch.exception.pending)
7092 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
7093 kvm_queue_exception(vcpu, DB_VECTOR);
7095 kvm_queue_exception(vcpu, BP_VECTOR);
7099 * Read rflags as long as potentially injected trace flags are still
7102 rflags = kvm_get_rflags(vcpu);
7104 vcpu->guest_debug = dbg->control;
7105 if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
7106 vcpu->guest_debug = 0;
7108 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
7109 for (i = 0; i < KVM_NR_DB_REGS; ++i)
7110 vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
7111 vcpu->arch.guest_debug_dr7 = dbg->arch.debugreg[7];
7113 for (i = 0; i < KVM_NR_DB_REGS; i++)
7114 vcpu->arch.eff_db[i] = vcpu->arch.db[i];
7116 kvm_update_dr7(vcpu);
7118 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
7119 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
7120 get_segment_base(vcpu, VCPU_SREG_CS);
7123 * Trigger an rflags update that will inject or remove the trace
7126 kvm_set_rflags(vcpu, rflags);
7128 kvm_x86_ops->update_bp_intercept(vcpu);
7138 * Translate a guest virtual address to a guest physical address.
7140 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
7141 struct kvm_translation *tr)
7143 unsigned long vaddr = tr->linear_address;
7147 idx = srcu_read_lock(&vcpu->kvm->srcu);
7148 gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
7149 srcu_read_unlock(&vcpu->kvm->srcu, idx);
7150 tr->physical_address = gpa;
7151 tr->valid = gpa != UNMAPPED_GVA;
7158 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
7160 struct fxregs_state *fxsave =
7161 &vcpu->arch.guest_fpu.state.fxsave;
7163 memcpy(fpu->fpr, fxsave->st_space, 128);
7164 fpu->fcw = fxsave->cwd;
7165 fpu->fsw = fxsave->swd;
7166 fpu->ftwx = fxsave->twd;
7167 fpu->last_opcode = fxsave->fop;
7168 fpu->last_ip = fxsave->rip;
7169 fpu->last_dp = fxsave->rdp;
7170 memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
7175 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
7177 struct fxregs_state *fxsave =
7178 &vcpu->arch.guest_fpu.state.fxsave;
7180 memcpy(fxsave->st_space, fpu->fpr, 128);
7181 fxsave->cwd = fpu->fcw;
7182 fxsave->swd = fpu->fsw;
7183 fxsave->twd = fpu->ftwx;
7184 fxsave->fop = fpu->last_opcode;
7185 fxsave->rip = fpu->last_ip;
7186 fxsave->rdp = fpu->last_dp;
7187 memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
7192 static void fx_init(struct kvm_vcpu *vcpu)
7194 fpstate_init(&vcpu->arch.guest_fpu.state);
7196 vcpu->arch.guest_fpu.state.xsave.header.xcomp_bv =
7197 host_xcr0 | XSTATE_COMPACTION_ENABLED;
7200 * Ensure guest xcr0 is valid for loading
7202 vcpu->arch.xcr0 = XFEATURE_MASK_FP;
7204 vcpu->arch.cr0 |= X86_CR0_ET;
7207 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
7209 if (vcpu->guest_fpu_loaded)
7213 * Restore all possible states in the guest,
7214 * and assume host would use all available bits.
7215 * Guest xcr0 would be loaded later.
7217 kvm_put_guest_xcr0(vcpu);
7218 vcpu->guest_fpu_loaded = 1;
7219 __kernel_fpu_begin();
7220 __copy_kernel_to_fpregs(&vcpu->arch.guest_fpu.state);
7224 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
7226 kvm_put_guest_xcr0(vcpu);
7228 if (!vcpu->guest_fpu_loaded) {
7229 vcpu->fpu_counter = 0;
7233 vcpu->guest_fpu_loaded = 0;
7234 copy_fpregs_to_fpstate(&vcpu->arch.guest_fpu);
7236 ++vcpu->stat.fpu_reload;
7238 * If using eager FPU mode, or if the guest is a frequent user
7239 * of the FPU, just leave the FPU active for next time.
7240 * Every 255 times fpu_counter rolls over to 0; a guest that uses
7241 * the FPU in bursts will revert to loading it on demand.
7243 if (!vcpu->arch.eager_fpu) {
7244 if (++vcpu->fpu_counter < 5)
7245 kvm_make_request(KVM_REQ_DEACTIVATE_FPU, vcpu);
7250 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
7252 kvmclock_reset(vcpu);
7254 free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
7255 kvm_x86_ops->vcpu_free(vcpu);
7258 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
7261 struct kvm_vcpu *vcpu;
7263 if (check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
7264 printk_once(KERN_WARNING
7265 "kvm: SMP vm created on host with unstable TSC; "
7266 "guest TSC will not be reliable\n");
7268 vcpu = kvm_x86_ops->vcpu_create(kvm, id);
7273 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
7277 kvm_vcpu_mtrr_init(vcpu);
7278 r = vcpu_load(vcpu);
7281 kvm_vcpu_reset(vcpu, false);
7282 kvm_mmu_setup(vcpu);
7287 void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
7289 struct msr_data msr;
7290 struct kvm *kvm = vcpu->kvm;
7292 if (vcpu_load(vcpu))
7295 msr.index = MSR_IA32_TSC;
7296 msr.host_initiated = true;
7297 kvm_write_tsc(vcpu, &msr);
7300 if (!kvmclock_periodic_sync)
7303 schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
7304 KVMCLOCK_SYNC_PERIOD);
7307 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
7310 vcpu->arch.apf.msr_val = 0;
7312 r = vcpu_load(vcpu);
7314 kvm_mmu_unload(vcpu);
7317 kvm_x86_ops->vcpu_free(vcpu);
7320 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)
7322 vcpu->arch.hflags = 0;
7324 atomic_set(&vcpu->arch.nmi_queued, 0);
7325 vcpu->arch.nmi_pending = 0;
7326 vcpu->arch.nmi_injected = false;
7327 kvm_clear_interrupt_queue(vcpu);
7328 kvm_clear_exception_queue(vcpu);
7330 memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
7331 kvm_update_dr0123(vcpu);
7332 vcpu->arch.dr6 = DR6_INIT;
7333 kvm_update_dr6(vcpu);
7334 vcpu->arch.dr7 = DR7_FIXED_1;
7335 kvm_update_dr7(vcpu);
7339 kvm_make_request(KVM_REQ_EVENT, vcpu);
7340 vcpu->arch.apf.msr_val = 0;
7341 vcpu->arch.st.msr_val = 0;
7343 kvmclock_reset(vcpu);
7345 kvm_clear_async_pf_completion_queue(vcpu);
7346 kvm_async_pf_hash_reset(vcpu);
7347 vcpu->arch.apf.halted = false;
7350 kvm_pmu_reset(vcpu);
7351 vcpu->arch.smbase = 0x30000;
7354 memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
7355 vcpu->arch.regs_avail = ~0;
7356 vcpu->arch.regs_dirty = ~0;
7358 kvm_x86_ops->vcpu_reset(vcpu, init_event);
7361 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector)
7363 struct kvm_segment cs;
7365 kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
7366 cs.selector = vector << 8;
7367 cs.base = vector << 12;
7368 kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
7369 kvm_rip_write(vcpu, 0);
7372 int kvm_arch_hardware_enable(void)
7375 struct kvm_vcpu *vcpu;
7380 bool stable, backwards_tsc = false;
7382 kvm_shared_msr_cpu_online();
7383 ret = kvm_x86_ops->hardware_enable();
7387 local_tsc = rdtsc();
7388 stable = !check_tsc_unstable();
7389 list_for_each_entry(kvm, &vm_list, vm_list) {
7390 kvm_for_each_vcpu(i, vcpu, kvm) {
7391 if (!stable && vcpu->cpu == smp_processor_id())
7392 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
7393 if (stable && vcpu->arch.last_host_tsc > local_tsc) {
7394 backwards_tsc = true;
7395 if (vcpu->arch.last_host_tsc > max_tsc)
7396 max_tsc = vcpu->arch.last_host_tsc;
7402 * Sometimes, even reliable TSCs go backwards. This happens on
7403 * platforms that reset TSC during suspend or hibernate actions, but
7404 * maintain synchronization. We must compensate. Fortunately, we can
7405 * detect that condition here, which happens early in CPU bringup,
7406 * before any KVM threads can be running. Unfortunately, we can't
7407 * bring the TSCs fully up to date with real time, as we aren't yet far
7408 * enough into CPU bringup that we know how much real time has actually
7409 * elapsed; our helper function, get_kernel_ns() will be using boot
7410 * variables that haven't been updated yet.
7412 * So we simply find the maximum observed TSC above, then record the
7413 * adjustment to TSC in each VCPU. When the VCPU later gets loaded,
7414 * the adjustment will be applied. Note that we accumulate
7415 * adjustments, in case multiple suspend cycles happen before some VCPU
7416 * gets a chance to run again. In the event that no KVM threads get a
7417 * chance to run, we will miss the entire elapsed period, as we'll have
7418 * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
7419 * loose cycle time. This isn't too big a deal, since the loss will be
7420 * uniform across all VCPUs (not to mention the scenario is extremely
7421 * unlikely). It is possible that a second hibernate recovery happens
7422 * much faster than a first, causing the observed TSC here to be
7423 * smaller; this would require additional padding adjustment, which is
7424 * why we set last_host_tsc to the local tsc observed here.
7426 * N.B. - this code below runs only on platforms with reliable TSC,
7427 * as that is the only way backwards_tsc is set above. Also note
7428 * that this runs for ALL vcpus, which is not a bug; all VCPUs should
7429 * have the same delta_cyc adjustment applied if backwards_tsc
7430 * is detected. Note further, this adjustment is only done once,
7431 * as we reset last_host_tsc on all VCPUs to stop this from being
7432 * called multiple times (one for each physical CPU bringup).
7434 * Platforms with unreliable TSCs don't have to deal with this, they
7435 * will be compensated by the logic in vcpu_load, which sets the TSC to
7436 * catchup mode. This will catchup all VCPUs to real time, but cannot
7437 * guarantee that they stay in perfect synchronization.
7439 if (backwards_tsc) {
7440 u64 delta_cyc = max_tsc - local_tsc;
7441 backwards_tsc_observed = true;
7442 list_for_each_entry(kvm, &vm_list, vm_list) {
7443 kvm_for_each_vcpu(i, vcpu, kvm) {
7444 vcpu->arch.tsc_offset_adjustment += delta_cyc;
7445 vcpu->arch.last_host_tsc = local_tsc;
7446 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
7450 * We have to disable TSC offset matching.. if you were
7451 * booting a VM while issuing an S4 host suspend....
7452 * you may have some problem. Solving this issue is
7453 * left as an exercise to the reader.
7455 kvm->arch.last_tsc_nsec = 0;
7456 kvm->arch.last_tsc_write = 0;
7463 void kvm_arch_hardware_disable(void)
7465 kvm_x86_ops->hardware_disable();
7466 drop_user_return_notifiers();
7469 int kvm_arch_hardware_setup(void)
7473 r = kvm_x86_ops->hardware_setup();
7477 if (kvm_has_tsc_control) {
7479 * Make sure the user can only configure tsc_khz values that
7480 * fit into a signed integer.
7481 * A min value is not calculated needed because it will always
7482 * be 1 on all machines.
7484 u64 max = min(0x7fffffffULL,
7485 __scale_tsc(kvm_max_tsc_scaling_ratio, tsc_khz));
7486 kvm_max_guest_tsc_khz = max;
7488 kvm_default_tsc_scaling_ratio = 1ULL << kvm_tsc_scaling_ratio_frac_bits;
7491 kvm_init_msr_list();
7495 void kvm_arch_hardware_unsetup(void)
7497 kvm_x86_ops->hardware_unsetup();
7500 void kvm_arch_check_processor_compat(void *rtn)
7502 kvm_x86_ops->check_processor_compatibility(rtn);
7505 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu)
7507 return vcpu->kvm->arch.bsp_vcpu_id == vcpu->vcpu_id;
7509 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp);
7511 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu)
7513 return (vcpu->arch.apic_base & MSR_IA32_APICBASE_BSP) != 0;
7516 bool kvm_vcpu_compatible(struct kvm_vcpu *vcpu)
7518 return irqchip_in_kernel(vcpu->kvm) == lapic_in_kernel(vcpu);
7521 struct static_key kvm_no_apic_vcpu __read_mostly;
7523 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
7529 BUG_ON(vcpu->kvm == NULL);
7532 vcpu->arch.pv.pv_unhalted = false;
7533 vcpu->arch.emulate_ctxt.ops = &emulate_ops;
7534 if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_reset_bsp(vcpu))
7535 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
7537 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
7539 page = alloc_page(GFP_KERNEL | __GFP_ZERO);
7544 vcpu->arch.pio_data = page_address(page);
7546 kvm_set_tsc_khz(vcpu, max_tsc_khz);
7548 r = kvm_mmu_create(vcpu);
7550 goto fail_free_pio_data;
7552 if (irqchip_in_kernel(kvm)) {
7553 r = kvm_create_lapic(vcpu);
7555 goto fail_mmu_destroy;
7557 static_key_slow_inc(&kvm_no_apic_vcpu);
7559 vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
7561 if (!vcpu->arch.mce_banks) {
7563 goto fail_free_lapic;
7565 vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
7567 if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask, GFP_KERNEL)) {
7569 goto fail_free_mce_banks;
7574 vcpu->arch.ia32_tsc_adjust_msr = 0x0;
7575 vcpu->arch.pv_time_enabled = false;
7577 vcpu->arch.guest_supported_xcr0 = 0;
7578 vcpu->arch.guest_xstate_size = XSAVE_HDR_SIZE + XSAVE_HDR_OFFSET;
7580 vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu);
7582 vcpu->arch.pat = MSR_IA32_CR_PAT_DEFAULT;
7584 kvm_async_pf_hash_reset(vcpu);
7587 vcpu->arch.pending_external_vector = -1;
7591 fail_free_mce_banks:
7592 kfree(vcpu->arch.mce_banks);
7594 kvm_free_lapic(vcpu);
7596 kvm_mmu_destroy(vcpu);
7598 free_page((unsigned long)vcpu->arch.pio_data);
7603 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
7607 kvm_pmu_destroy(vcpu);
7608 kfree(vcpu->arch.mce_banks);
7609 kvm_free_lapic(vcpu);
7610 idx = srcu_read_lock(&vcpu->kvm->srcu);
7611 kvm_mmu_destroy(vcpu);
7612 srcu_read_unlock(&vcpu->kvm->srcu, idx);
7613 free_page((unsigned long)vcpu->arch.pio_data);
7614 if (!lapic_in_kernel(vcpu))
7615 static_key_slow_dec(&kvm_no_apic_vcpu);
7618 void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu)
7620 kvm_x86_ops->sched_in(vcpu, cpu);
7623 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
7628 INIT_HLIST_HEAD(&kvm->arch.mask_notifier_list);
7629 INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
7630 INIT_LIST_HEAD(&kvm->arch.zapped_obsolete_pages);
7631 INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
7632 atomic_set(&kvm->arch.noncoherent_dma_count, 0);
7634 /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
7635 set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
7636 /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
7637 set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID,
7638 &kvm->arch.irq_sources_bitmap);
7640 raw_spin_lock_init(&kvm->arch.tsc_write_lock);
7641 mutex_init(&kvm->arch.apic_map_lock);
7642 spin_lock_init(&kvm->arch.pvclock_gtod_sync_lock);
7644 pvclock_update_vm_gtod_copy(kvm);
7646 INIT_DELAYED_WORK(&kvm->arch.kvmclock_update_work, kvmclock_update_fn);
7647 INIT_DELAYED_WORK(&kvm->arch.kvmclock_sync_work, kvmclock_sync_fn);
7652 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
7655 r = vcpu_load(vcpu);
7657 kvm_mmu_unload(vcpu);
7661 static void kvm_free_vcpus(struct kvm *kvm)
7664 struct kvm_vcpu *vcpu;
7667 * Unpin any mmu pages first.
7669 kvm_for_each_vcpu(i, vcpu, kvm) {
7670 kvm_clear_async_pf_completion_queue(vcpu);
7671 kvm_unload_vcpu_mmu(vcpu);
7673 kvm_for_each_vcpu(i, vcpu, kvm)
7674 kvm_arch_vcpu_free(vcpu);
7676 mutex_lock(&kvm->lock);
7677 for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
7678 kvm->vcpus[i] = NULL;
7680 atomic_set(&kvm->online_vcpus, 0);
7681 mutex_unlock(&kvm->lock);
7684 void kvm_arch_sync_events(struct kvm *kvm)
7686 cancel_delayed_work_sync(&kvm->arch.kvmclock_sync_work);
7687 cancel_delayed_work_sync(&kvm->arch.kvmclock_update_work);
7688 kvm_free_all_assigned_devices(kvm);
7692 int __x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size)
7696 struct kvm_memslots *slots = kvm_memslots(kvm);
7697 struct kvm_memory_slot *slot, old;
7699 /* Called with kvm->slots_lock held. */
7700 if (WARN_ON(id >= KVM_MEM_SLOTS_NUM))
7703 slot = id_to_memslot(slots, id);
7705 if (WARN_ON(slot->npages))
7709 * MAP_SHARED to prevent internal slot pages from being moved
7712 hva = vm_mmap(NULL, 0, size, PROT_READ | PROT_WRITE,
7713 MAP_SHARED | MAP_ANONYMOUS, 0);
7714 if (IS_ERR((void *)hva))
7715 return PTR_ERR((void *)hva);
7724 for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
7725 struct kvm_userspace_memory_region m;
7727 m.slot = id | (i << 16);
7729 m.guest_phys_addr = gpa;
7730 m.userspace_addr = hva;
7731 m.memory_size = size;
7732 r = __kvm_set_memory_region(kvm, &m);
7738 r = vm_munmap(old.userspace_addr, old.npages * PAGE_SIZE);
7744 EXPORT_SYMBOL_GPL(__x86_set_memory_region);
7746 int x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size)
7750 mutex_lock(&kvm->slots_lock);
7751 r = __x86_set_memory_region(kvm, id, gpa, size);
7752 mutex_unlock(&kvm->slots_lock);
7756 EXPORT_SYMBOL_GPL(x86_set_memory_region);
7758 void kvm_arch_destroy_vm(struct kvm *kvm)
7760 if (current->mm == kvm->mm) {
7762 * Free memory regions allocated on behalf of userspace,
7763 * unless the the memory map has changed due to process exit
7766 x86_set_memory_region(kvm, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT, 0, 0);
7767 x86_set_memory_region(kvm, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT, 0, 0);
7768 x86_set_memory_region(kvm, TSS_PRIVATE_MEMSLOT, 0, 0);
7770 kvm_iommu_unmap_guest(kvm);
7771 kfree(kvm->arch.vpic);
7772 kfree(kvm->arch.vioapic);
7773 kvm_free_vcpus(kvm);
7774 kfree(rcu_dereference_check(kvm->arch.apic_map, 1));
7777 void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *free,
7778 struct kvm_memory_slot *dont)
7782 for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
7783 if (!dont || free->arch.rmap[i] != dont->arch.rmap[i]) {
7784 kvfree(free->arch.rmap[i]);
7785 free->arch.rmap[i] = NULL;
7790 if (!dont || free->arch.lpage_info[i - 1] !=
7791 dont->arch.lpage_info[i - 1]) {
7792 kvfree(free->arch.lpage_info[i - 1]);
7793 free->arch.lpage_info[i - 1] = NULL;
7798 int kvm_arch_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot,
7799 unsigned long npages)
7803 for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
7808 lpages = gfn_to_index(slot->base_gfn + npages - 1,
7809 slot->base_gfn, level) + 1;
7811 slot->arch.rmap[i] =
7812 kvm_kvzalloc(lpages * sizeof(*slot->arch.rmap[i]));
7813 if (!slot->arch.rmap[i])
7818 slot->arch.lpage_info[i - 1] = kvm_kvzalloc(lpages *
7819 sizeof(*slot->arch.lpage_info[i - 1]));
7820 if (!slot->arch.lpage_info[i - 1])
7823 if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
7824 slot->arch.lpage_info[i - 1][0].write_count = 1;
7825 if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
7826 slot->arch.lpage_info[i - 1][lpages - 1].write_count = 1;
7827 ugfn = slot->userspace_addr >> PAGE_SHIFT;
7829 * If the gfn and userspace address are not aligned wrt each
7830 * other, or if explicitly asked to, disable large page
7831 * support for this slot
7833 if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1) ||
7834 !kvm_largepages_enabled()) {
7837 for (j = 0; j < lpages; ++j)
7838 slot->arch.lpage_info[i - 1][j].write_count = 1;
7845 for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
7846 kvfree(slot->arch.rmap[i]);
7847 slot->arch.rmap[i] = NULL;
7851 kvfree(slot->arch.lpage_info[i - 1]);
7852 slot->arch.lpage_info[i - 1] = NULL;
7857 void kvm_arch_memslots_updated(struct kvm *kvm, struct kvm_memslots *slots)
7860 * memslots->generation has been incremented.
7861 * mmio generation may have reached its maximum value.
7863 kvm_mmu_invalidate_mmio_sptes(kvm, slots);
7866 int kvm_arch_prepare_memory_region(struct kvm *kvm,
7867 struct kvm_memory_slot *memslot,
7868 const struct kvm_userspace_memory_region *mem,
7869 enum kvm_mr_change change)
7874 static void kvm_mmu_slot_apply_flags(struct kvm *kvm,
7875 struct kvm_memory_slot *new)
7877 /* Still write protect RO slot */
7878 if (new->flags & KVM_MEM_READONLY) {
7879 kvm_mmu_slot_remove_write_access(kvm, new);
7884 * Call kvm_x86_ops dirty logging hooks when they are valid.
7886 * kvm_x86_ops->slot_disable_log_dirty is called when:
7888 * - KVM_MR_CREATE with dirty logging is disabled
7889 * - KVM_MR_FLAGS_ONLY with dirty logging is disabled in new flag
7891 * The reason is, in case of PML, we need to set D-bit for any slots
7892 * with dirty logging disabled in order to eliminate unnecessary GPA
7893 * logging in PML buffer (and potential PML buffer full VMEXT). This
7894 * guarantees leaving PML enabled during guest's lifetime won't have
7895 * any additonal overhead from PML when guest is running with dirty
7896 * logging disabled for memory slots.
7898 * kvm_x86_ops->slot_enable_log_dirty is called when switching new slot
7899 * to dirty logging mode.
7901 * If kvm_x86_ops dirty logging hooks are invalid, use write protect.
7903 * In case of write protect:
7905 * Write protect all pages for dirty logging.
7907 * All the sptes including the large sptes which point to this
7908 * slot are set to readonly. We can not create any new large
7909 * spte on this slot until the end of the logging.
7911 * See the comments in fast_page_fault().
7913 if (new->flags & KVM_MEM_LOG_DIRTY_PAGES) {
7914 if (kvm_x86_ops->slot_enable_log_dirty)
7915 kvm_x86_ops->slot_enable_log_dirty(kvm, new);
7917 kvm_mmu_slot_remove_write_access(kvm, new);
7919 if (kvm_x86_ops->slot_disable_log_dirty)
7920 kvm_x86_ops->slot_disable_log_dirty(kvm, new);
7924 void kvm_arch_commit_memory_region(struct kvm *kvm,
7925 const struct kvm_userspace_memory_region *mem,
7926 const struct kvm_memory_slot *old,
7927 const struct kvm_memory_slot *new,
7928 enum kvm_mr_change change)
7930 int nr_mmu_pages = 0;
7932 if (!kvm->arch.n_requested_mmu_pages)
7933 nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
7936 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
7939 * Dirty logging tracks sptes in 4k granularity, meaning that large
7940 * sptes have to be split. If live migration is successful, the guest
7941 * in the source machine will be destroyed and large sptes will be
7942 * created in the destination. However, if the guest continues to run
7943 * in the source machine (for example if live migration fails), small
7944 * sptes will remain around and cause bad performance.
7946 * Scan sptes if dirty logging has been stopped, dropping those
7947 * which can be collapsed into a single large-page spte. Later
7948 * page faults will create the large-page sptes.
7950 if ((change != KVM_MR_DELETE) &&
7951 (old->flags & KVM_MEM_LOG_DIRTY_PAGES) &&
7952 !(new->flags & KVM_MEM_LOG_DIRTY_PAGES))
7953 kvm_mmu_zap_collapsible_sptes(kvm, new);
7956 * Set up write protection and/or dirty logging for the new slot.
7958 * For KVM_MR_DELETE and KVM_MR_MOVE, the shadow pages of old slot have
7959 * been zapped so no dirty logging staff is needed for old slot. For
7960 * KVM_MR_FLAGS_ONLY, the old slot is essentially the same one as the
7961 * new and it's also covered when dealing with the new slot.
7963 * FIXME: const-ify all uses of struct kvm_memory_slot.
7965 if (change != KVM_MR_DELETE)
7966 kvm_mmu_slot_apply_flags(kvm, (struct kvm_memory_slot *) new);
7969 void kvm_arch_flush_shadow_all(struct kvm *kvm)
7971 kvm_mmu_invalidate_zap_all_pages(kvm);
7974 void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
7975 struct kvm_memory_slot *slot)
7977 kvm_mmu_invalidate_zap_all_pages(kvm);
7980 static inline bool kvm_vcpu_has_events(struct kvm_vcpu *vcpu)
7982 if (!list_empty_careful(&vcpu->async_pf.done))
7985 if (kvm_apic_has_events(vcpu))
7988 if (vcpu->arch.pv.pv_unhalted)
7991 if (atomic_read(&vcpu->arch.nmi_queued))
7994 if (test_bit(KVM_REQ_SMI, &vcpu->requests))
7997 if (kvm_arch_interrupt_allowed(vcpu) &&
7998 kvm_cpu_has_interrupt(vcpu))
8004 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
8006 if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events)
8007 kvm_x86_ops->check_nested_events(vcpu, false);
8009 return kvm_vcpu_running(vcpu) || kvm_vcpu_has_events(vcpu);
8012 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
8014 return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
8017 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
8019 return kvm_x86_ops->interrupt_allowed(vcpu);
8022 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu)
8024 if (is_64_bit_mode(vcpu))
8025 return kvm_rip_read(vcpu);
8026 return (u32)(get_segment_base(vcpu, VCPU_SREG_CS) +
8027 kvm_rip_read(vcpu));
8029 EXPORT_SYMBOL_GPL(kvm_get_linear_rip);
8031 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
8033 return kvm_get_linear_rip(vcpu) == linear_rip;
8035 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
8037 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
8039 unsigned long rflags;
8041 rflags = kvm_x86_ops->get_rflags(vcpu);
8042 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
8043 rflags &= ~X86_EFLAGS_TF;
8046 EXPORT_SYMBOL_GPL(kvm_get_rflags);
8048 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
8050 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
8051 kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
8052 rflags |= X86_EFLAGS_TF;
8053 kvm_x86_ops->set_rflags(vcpu, rflags);
8056 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
8058 __kvm_set_rflags(vcpu, rflags);
8059 kvm_make_request(KVM_REQ_EVENT, vcpu);
8061 EXPORT_SYMBOL_GPL(kvm_set_rflags);
8063 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
8067 if ((vcpu->arch.mmu.direct_map != work->arch.direct_map) ||
8071 r = kvm_mmu_reload(vcpu);
8075 if (!vcpu->arch.mmu.direct_map &&
8076 work->arch.cr3 != vcpu->arch.mmu.get_cr3(vcpu))
8079 vcpu->arch.mmu.page_fault(vcpu, work->gva, 0, true);
8082 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
8084 return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
8087 static inline u32 kvm_async_pf_next_probe(u32 key)
8089 return (key + 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU) - 1);
8092 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
8094 u32 key = kvm_async_pf_hash_fn(gfn);
8096 while (vcpu->arch.apf.gfns[key] != ~0)
8097 key = kvm_async_pf_next_probe(key);
8099 vcpu->arch.apf.gfns[key] = gfn;
8102 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
8105 u32 key = kvm_async_pf_hash_fn(gfn);
8107 for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU) &&
8108 (vcpu->arch.apf.gfns[key] != gfn &&
8109 vcpu->arch.apf.gfns[key] != ~0); i++)
8110 key = kvm_async_pf_next_probe(key);
8115 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
8117 return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
8120 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
8124 i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
8126 vcpu->arch.apf.gfns[i] = ~0;
8128 j = kvm_async_pf_next_probe(j);
8129 if (vcpu->arch.apf.gfns[j] == ~0)
8131 k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
8133 * k lies cyclically in ]i,j]
8135 * |....j i.k.| or |.k..j i...|
8137 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
8138 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
8143 static int apf_put_user(struct kvm_vcpu *vcpu, u32 val)
8146 return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &val,
8150 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
8151 struct kvm_async_pf *work)
8153 struct x86_exception fault;
8155 trace_kvm_async_pf_not_present(work->arch.token, work->gva);
8156 kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
8158 if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) ||
8159 (vcpu->arch.apf.send_user_only &&
8160 kvm_x86_ops->get_cpl(vcpu) == 0))
8161 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
8162 else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_NOT_PRESENT)) {
8163 fault.vector = PF_VECTOR;
8164 fault.error_code_valid = true;
8165 fault.error_code = 0;
8166 fault.nested_page_fault = false;
8167 fault.address = work->arch.token;
8168 kvm_inject_page_fault(vcpu, &fault);
8172 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
8173 struct kvm_async_pf *work)
8175 struct x86_exception fault;
8177 trace_kvm_async_pf_ready(work->arch.token, work->gva);
8178 if (work->wakeup_all)
8179 work->arch.token = ~0; /* broadcast wakeup */
8181 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
8183 if ((vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) &&
8184 !apf_put_user(vcpu, KVM_PV_REASON_PAGE_READY)) {
8185 fault.vector = PF_VECTOR;
8186 fault.error_code_valid = true;
8187 fault.error_code = 0;
8188 fault.nested_page_fault = false;
8189 fault.address = work->arch.token;
8190 kvm_inject_page_fault(vcpu, &fault);
8192 vcpu->arch.apf.halted = false;
8193 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
8196 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu)
8198 if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED))
8201 return !kvm_event_needs_reinjection(vcpu) &&
8202 kvm_x86_ops->interrupt_allowed(vcpu);
8205 void kvm_arch_start_assignment(struct kvm *kvm)
8207 atomic_inc(&kvm->arch.assigned_device_count);
8209 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment);
8211 void kvm_arch_end_assignment(struct kvm *kvm)
8213 atomic_dec(&kvm->arch.assigned_device_count);
8215 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment);
8217 bool kvm_arch_has_assigned_device(struct kvm *kvm)
8219 return atomic_read(&kvm->arch.assigned_device_count);
8221 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device);
8223 void kvm_arch_register_noncoherent_dma(struct kvm *kvm)
8225 atomic_inc(&kvm->arch.noncoherent_dma_count);
8227 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma);
8229 void kvm_arch_unregister_noncoherent_dma(struct kvm *kvm)
8231 atomic_dec(&kvm->arch.noncoherent_dma_count);
8233 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma);
8235 bool kvm_arch_has_noncoherent_dma(struct kvm *kvm)
8237 return atomic_read(&kvm->arch.noncoherent_dma_count);
8239 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma);
8241 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer *cons,
8242 struct irq_bypass_producer *prod)
8244 struct kvm_kernel_irqfd *irqfd =
8245 container_of(cons, struct kvm_kernel_irqfd, consumer);
8247 if (kvm_x86_ops->update_pi_irte) {
8248 irqfd->producer = prod;
8249 return kvm_x86_ops->update_pi_irte(irqfd->kvm,
8250 prod->irq, irqfd->gsi, 1);
8256 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer *cons,
8257 struct irq_bypass_producer *prod)
8260 struct kvm_kernel_irqfd *irqfd =
8261 container_of(cons, struct kvm_kernel_irqfd, consumer);
8263 if (!kvm_x86_ops->update_pi_irte) {
8264 WARN_ON(irqfd->producer != NULL);
8268 WARN_ON(irqfd->producer != prod);
8269 irqfd->producer = NULL;
8272 * When producer of consumer is unregistered, we change back to
8273 * remapped mode, so we can re-use the current implementation
8274 * when the irq is masked/disabed or the consumer side (KVM
8275 * int this case doesn't want to receive the interrupts.
8277 ret = kvm_x86_ops->update_pi_irte(irqfd->kvm, prod->irq, irqfd->gsi, 0);
8279 printk(KERN_INFO "irq bypass consumer (token %p) unregistration"
8280 " fails: %d\n", irqfd->consumer.token, ret);
8283 int kvm_arch_update_irqfd_routing(struct kvm *kvm, unsigned int host_irq,
8284 uint32_t guest_irq, bool set)
8286 if (!kvm_x86_ops->update_pi_irte)
8289 return kvm_x86_ops->update_pi_irte(kvm, host_irq, guest_irq, set);
8292 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
8293 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio);
8294 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
8295 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
8296 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
8297 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
8298 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
8299 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
8300 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
8301 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
8302 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
8303 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
8304 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);
8305 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset);
8306 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window);
8307 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full);
8308 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update);