arch/x86/kvm/x86.c

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * derived from drivers/kvm/kvm_main.c
   5  *
   6  * Copyright (C) 2006 Qumranet, Inc.
   7  * Copyright (C) 2008 Qumranet, Inc.
   8  * Copyright IBM Corporation, 2008
   9  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  10  *
  11  * Authors:
  12  *   Avi Kivity   <avi@qumranet.com>
  13  *   Yaniv Kamay  <yaniv@qumranet.com>
  14  *   Amit Shah    <amit.shah@qumranet.com>
  15  *   Ben-Ami Yassour <benami@il.ibm.com>
  16  *
  17  * This work is licensed under the terms of the GNU GPL, version 2.  See
  18  * the COPYING file in the top-level directory.
  19  *
  20  */
  21
  22 #include <linux/kvm_host.h>
  23 #include "irq.h"
  24 #include "mmu.h"
  25 #include "i8254.h"
  26 #include "tss.h"
  27 #include "kvm_cache_regs.h"
  28 #include "x86.h"
  29 #include "cpuid.h"
  30
  31 #include <linux/clocksource.h>
  32 #include <linux/interrupt.h>
  33 #include <linux/kvm.h>
  34 #include <linux/fs.h>
  35 #include <linux/vmalloc.h>
  36 #include <linux/module.h>
  37 #include <linux/mman.h>
  38 #include <linux/highmem.h>
  39 #include <linux/iommu.h>
  40 #include <linux/intel-iommu.h>
  41 #include <linux/cpufreq.h>
  42 #include <linux/user-return-notifier.h>
  43 #include <linux/srcu.h>
  44 #include <linux/slab.h>
  45 #include <linux/perf_event.h>
  46 #include <linux/uaccess.h>
  47 #include <linux/hash.h>
  48 #include <linux/pci.h>
  49 #include <linux/timekeeper_internal.h>
  50 #include <linux/pvclock_gtod.h>
  51 #include <trace/events/kvm.h>
  52
  53 #define CREATE_TRACE_POINTS
  54 #include "trace.h"
  55
  56 #include <asm/debugreg.h>
  57 #include <asm/msr.h>
  58 #include <asm/desc.h>
  59 #include <asm/mtrr.h>
  60 #include <asm/mce.h>
  61 #include <asm/i387.h>
  62 #include <asm/fpu-internal.h> /* Ugh! */
  63 #include <asm/xcr.h>
  64 #include <asm/pvclock.h>
  65 #include <asm/div64.h>
  66
  67 #define MAX_IO_MSRS 256
  68 #define KVM_MAX_MCE_BANKS 32
  69 #define KVM_MCE_CAP_SUPPORTED (MCG_CTL_P | MCG_SER_P)
  70
  71 #define emul_to_vcpu(ctxt) \
  72         container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
  73
  74 /* EFER defaults:
  75  * - enable syscall per default because its emulated by KVM
  76  * - enable LME and LMA per default on 64 bit KVM
  77  */
  78 #ifdef CONFIG_X86_64
  79 static
  80 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
  81 #else
  82 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
  83 #endif
  84
  85 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
  86 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
  87
  88 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
  89 static void process_nmi(struct kvm_vcpu *vcpu);
  90
  91 struct kvm_x86_ops *kvm_x86_ops;
  92 EXPORT_SYMBOL_GPL(kvm_x86_ops);
  93
  94 static bool ignore_msrs = 0;
  95 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
  96
  97 bool kvm_has_tsc_control;
  98 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
  99 u32  kvm_max_guest_tsc_khz;
 100 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
 101
 102 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
 103 static u32 tsc_tolerance_ppm = 250;
 104 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
 105
 106 #define KVM_NR_SHARED_MSRS 16
 107
 108 struct kvm_shared_msrs_global {
 109         int nr;
 110         u32 msrs[KVM_NR_SHARED_MSRS];
 111 };
 112
 113 struct kvm_shared_msrs {
 114         struct user_return_notifier urn;
 115         bool registered;
 116         struct kvm_shared_msr_values {
 117                 u64 host;
 118                 u64 curr;
 119         } values[KVM_NR_SHARED_MSRS];
 120 };
 121
 122 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
 123 static struct kvm_shared_msrs __percpu *shared_msrs;
 124
 125 struct kvm_stats_debugfs_item debugfs_entries[] = {
 126         { "pf_fixed", VCPU_STAT(pf_fixed) },
 127         { "pf_guest", VCPU_STAT(pf_guest) },
 128         { "tlb_flush", VCPU_STAT(tlb_flush) },
 129         { "invlpg", VCPU_STAT(invlpg) },
 130         { "exits", VCPU_STAT(exits) },
 131         { "io_exits", VCPU_STAT(io_exits) },
 132         { "mmio_exits", VCPU_STAT(mmio_exits) },
 133         { "signal_exits", VCPU_STAT(signal_exits) },
 134         { "irq_window", VCPU_STAT(irq_window_exits) },
 135         { "nmi_window", VCPU_STAT(nmi_window_exits) },
 136         { "halt_exits", VCPU_STAT(halt_exits) },
 137         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
 138         { "hypercalls", VCPU_STAT(hypercalls) },
 139         { "request_irq", VCPU_STAT(request_irq_exits) },
 140         { "irq_exits", VCPU_STAT(irq_exits) },
 141         { "host_state_reload", VCPU_STAT(host_state_reload) },
 142         { "efer_reload", VCPU_STAT(efer_reload) },
 143         { "fpu_reload", VCPU_STAT(fpu_reload) },
 144         { "insn_emulation", VCPU_STAT(insn_emulation) },
 145         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
 146         { "irq_injections", VCPU_STAT(irq_injections) },
 147         { "nmi_injections", VCPU_STAT(nmi_injections) },
 148         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
 149         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
 150         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
 151         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
 152         { "mmu_flooded", VM_STAT(mmu_flooded) },
 153         { "mmu_recycled", VM_STAT(mmu_recycled) },
 154         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
 155         { "mmu_unsync", VM_STAT(mmu_unsync) },
 156         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
 157         { "largepages", VM_STAT(lpages) },
 158         { NULL }
 159 };
 160
 161 u64 __read_mostly host_xcr0;
 162
 163 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
 164
 165 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 166 {
 167         int i;
 168         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU); i++)
 169                 vcpu->arch.apf.gfns[i] = ~0;
 170 }
 171
 172 static void kvm_on_user_return(struct user_return_notifier *urn)
 173 {
 174         unsigned slot;
 175         struct kvm_shared_msrs *locals
 176                 = container_of(urn, struct kvm_shared_msrs, urn);
 177         struct kvm_shared_msr_values *values;
 178
 179         for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
 180                 values = &locals->values[slot];
 181                 if (values->host != values->curr) {
 182                         wrmsrl(shared_msrs_global.msrs[slot], values->host);
 183                         values->curr = values->host;
 184                 }
 185         }
 186         locals->registered = false;
 187         user_return_notifier_unregister(urn);
 188 }
 189
 190 static void shared_msr_update(unsigned slot, u32 msr)
 191 {
 192         u64 value;
 193         unsigned int cpu = smp_processor_id();
 194         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 195
 196         /* only read, and nobody should modify it at this time,
 197          * so don't need lock */
 198         if (slot >= shared_msrs_global.nr) {
 199                 printk(KERN_ERR "kvm: invalid MSR slot!");
 200                 return;
 201         }
 202         rdmsrl_safe(msr, &value);
 203         smsr->values[slot].host = value;
 204         smsr->values[slot].curr = value;
 205 }
 206
 207 void kvm_define_shared_msr(unsigned slot, u32 msr)
 208 {
 209         if (slot >= shared_msrs_global.nr)
 210                 shared_msrs_global.nr = slot + 1;
 211         shared_msrs_global.msrs[slot] = msr;
 212         /* we need ensured the shared_msr_global have been updated */
 213         smp_wmb();
 214 }
 215 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
 216
 217 static void kvm_shared_msr_cpu_online(void)
 218 {
 219         unsigned i;
 220
 221         for (i = 0; i < shared_msrs_global.nr; ++i)
 222                 shared_msr_update(i, shared_msrs_global.msrs[i]);
 223 }
 224
 225 void kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
 226 {
 227         unsigned int cpu = smp_processor_id();
 228         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 229
 230         if (((value ^ smsr->values[slot].curr) & mask) == 0)
 231                 return;
 232         smsr->values[slot].curr = value;
 233         wrmsrl(shared_msrs_global.msrs[slot], value);
 234         if (!smsr->registered) {
 235                 smsr->urn.on_user_return = kvm_on_user_return;
 236                 user_return_notifier_register(&smsr->urn);
 237                 smsr->registered = true;
 238         }
 239 }
 240 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
 241
 242 static void drop_user_return_notifiers(void *ignore)
 243 {
 244         unsigned int cpu = smp_processor_id();
 245         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 246
 247         if (smsr->registered)
 248                 kvm_on_user_return(&smsr->urn);
 249 }
 250
 251 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 252 {
 253         return vcpu->arch.apic_base;
 254 }
 255 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 256
 257 void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
 258 {
 259         /* TODO: reserve bits check */
 260         kvm_lapic_set_base(vcpu, data);
 261 }
 262 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 263
 264 asmlinkage void kvm_spurious_fault(void)
 265 {
 266         /* Fault while not rebooting.  We want the trace. */
 267         BUG();
 268 }
 269 EXPORT_SYMBOL_GPL(kvm_spurious_fault);
 270
 271 #define EXCPT_BENIGN            0
 272 #define EXCPT_CONTRIBUTORY      1
 273 #define EXCPT_PF                2
 274
 275 static int exception_class(int vector)
 276 {
 277         switch (vector) {
 278         case PF_VECTOR:
 279                 return EXCPT_PF;
 280         case DE_VECTOR:
 281         case TS_VECTOR:
 282         case NP_VECTOR:
 283         case SS_VECTOR:
 284         case GP_VECTOR:
 285                 return EXCPT_CONTRIBUTORY;
 286         default:
 287                 break;
 288         }
 289         return EXCPT_BENIGN;
 290 }
 291
 292 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 293                 unsigned nr, bool has_error, u32 error_code,
 294                 bool reinject)
 295 {
 296         u32 prev_nr;
 297         int class1, class2;
 298
 299         kvm_make_request(KVM_REQ_EVENT, vcpu);
 300
 301         if (!vcpu->arch.exception.pending) {
 302         queue:
 303                 vcpu->arch.exception.pending = true;
 304                 vcpu->arch.exception.has_error_code = has_error;
 305                 vcpu->arch.exception.nr = nr;
 306                 vcpu->arch.exception.error_code = error_code;
 307                 vcpu->arch.exception.reinject = reinject;
 308                 return;
 309         }
 310
 311         /* to check exception */
 312         prev_nr = vcpu->arch.exception.nr;
 313         if (prev_nr == DF_VECTOR) {
 314                 /* triple fault -> shutdown */
 315                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 316                 return;
 317         }
 318         class1 = exception_class(prev_nr);
 319         class2 = exception_class(nr);
 320         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 321                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 322                 /* generate double fault per SDM Table 5-5 */
 323                 vcpu->arch.exception.pending = true;
 324                 vcpu->arch.exception.has_error_code = true;
 325                 vcpu->arch.exception.nr = DF_VECTOR;
 326                 vcpu->arch.exception.error_code = 0;
 327         } else
 328                 /* replace previous exception with a new one in a hope
 329                    that instruction re-execution will regenerate lost
 330                    exception */
 331                 goto queue;
 332 }
 333
 334 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 335 {
 336         kvm_multiple_exception(vcpu, nr, false, 0, false);
 337 }
 338 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 339
 340 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 341 {
 342         kvm_multiple_exception(vcpu, nr, false, 0, true);
 343 }
 344 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 345
 346 void kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 347 {
 348         if (err)
 349                 kvm_inject_gp(vcpu, 0);
 350         else
 351                 kvm_x86_ops->skip_emulated_instruction(vcpu);
 352 }
 353 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 354
 355 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 356 {
 357         ++vcpu->stat.pf_guest;
 358         vcpu->arch.cr2 = fault->address;
 359         kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 360 }
 361 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
 362
 363 void kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 364 {
 365         if (mmu_is_nested(vcpu) && !fault->nested_page_fault)
 366                 vcpu->arch.nested_mmu.inject_page_fault(vcpu, fault);
 367         else
 368                 vcpu->arch.mmu.inject_page_fault(vcpu, fault);
 369 }
 370
 371 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 372 {
 373         atomic_inc(&vcpu->arch.nmi_queued);
 374         kvm_make_request(KVM_REQ_NMI, vcpu);
 375 }
 376 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 377
 378 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 379 {
 380         kvm_multiple_exception(vcpu, nr, true, error_code, false);
 381 }
 382 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 383
 384 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 385 {
 386         kvm_multiple_exception(vcpu, nr, true, error_code, true);
 387 }
 388 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 389
 390 /*
 391  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 392  * a #GP and return false.
 393  */
 394 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 395 {
 396         if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
 397                 return true;
 398         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 399         return false;
 400 }
 401 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 402
 403 /*
 404  * This function will be used to read from the physical memory of the currently
 405  * running guest. The difference to kvm_read_guest_page is that this function
 406  * can read from guest physical or from the guest's guest physical memory.
 407  */
 408 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 409                             gfn_t ngfn, void *data, int offset, int len,
 410                             u32 access)
 411 {
 412         gfn_t real_gfn;
 413         gpa_t ngpa;
 414
 415         ngpa     = gfn_to_gpa(ngfn);
 416         real_gfn = mmu->translate_gpa(vcpu, ngpa, access);
 417         if (real_gfn == UNMAPPED_GVA)
 418                 return -EFAULT;
 419
 420         real_gfn = gpa_to_gfn(real_gfn);
 421
 422         return kvm_read_guest_page(vcpu->kvm, real_gfn, data, offset, len);
 423 }
 424 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 425
 426 int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
 427                                void *data, int offset, int len, u32 access)
 428 {
 429         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
 430                                        data, offset, len, access);
 431 }
 432
 433 /*
 434  * Load the pae pdptrs.  Return true is they are all valid.
 435  */
 436 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 437 {
 438         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 439         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 440         int i;
 441         int ret;
 442         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 443
 444         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 445                                       offset * sizeof(u64), sizeof(pdpte),
 446                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 447         if (ret < 0) {
 448                 ret = 0;
 449                 goto out;
 450         }
 451         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 452                 if (is_present_gpte(pdpte[i]) &&
 453                     (pdpte[i] & vcpu->arch.mmu.rsvd_bits_mask[0][2])) {
 454                         ret = 0;
 455                         goto out;
 456                 }
 457         }
 458         ret = 1;
 459
 460         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 461         __set_bit(VCPU_EXREG_PDPTR,
 462                   (unsigned long *)&vcpu->arch.regs_avail);
 463         __set_bit(VCPU_EXREG_PDPTR,
 464                   (unsigned long *)&vcpu->arch.regs_dirty);
 465 out:
 466
 467         return ret;
 468 }
 469 EXPORT_SYMBOL_GPL(load_pdptrs);
 470
 471 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
 472 {
 473         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
 474         bool changed = true;
 475         int offset;
 476         gfn_t gfn;
 477         int r;
 478
 479         if (is_long_mode(vcpu) || !is_pae(vcpu))
 480                 return false;
 481
 482         if (!test_bit(VCPU_EXREG_PDPTR,
 483                       (unsigned long *)&vcpu->arch.regs_avail))
 484                 return true;
 485
 486         gfn = (kvm_read_cr3(vcpu) & ~31u) >> PAGE_SHIFT;
 487         offset = (kvm_read_cr3(vcpu) & ~31u) & (PAGE_SIZE - 1);
 488         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
 489                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
 490         if (r < 0)
 491                 goto out;
 492         changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
 493 out:
 494
 495         return changed;
 496 }
 497
 498 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 499 {
 500         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 501         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP |
 502                                     X86_CR0_CD | X86_CR0_NW;
 503
 504         cr0 |= X86_CR0_ET;
 505
 506 #ifdef CONFIG_X86_64
 507         if (cr0 & 0xffffffff00000000UL)
 508                 return 1;
 509 #endif
 510
 511         cr0 &= ~CR0_RESERVED_BITS;
 512
 513         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 514                 return 1;
 515
 516         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 517                 return 1;
 518
 519         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
 520 #ifdef CONFIG_X86_64
 521                 if ((vcpu->arch.efer & EFER_LME)) {
 522                         int cs_db, cs_l;
 523
 524                         if (!is_pae(vcpu))
 525                                 return 1;
 526                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
 527                         if (cs_l)
 528                                 return 1;
 529                 } else
 530 #endif
 531                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 532                                                  kvm_read_cr3(vcpu)))
 533                         return 1;
 534         }
 535
 536         if (!(cr0 & X86_CR0_PG) && kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
 537                 return 1;
 538
 539         kvm_x86_ops->set_cr0(vcpu, cr0);
 540
 541         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 542                 kvm_clear_async_pf_completion_queue(vcpu);
 543                 kvm_async_pf_hash_reset(vcpu);
 544         }
 545
 546         if ((cr0 ^ old_cr0) & update_bits)
 547                 kvm_mmu_reset_context(vcpu);
 548         return 0;
 549 }
 550 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 551
 552 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 553 {
 554         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 555 }
 556 EXPORT_SYMBOL_GPL(kvm_lmsw);
 557
 558 static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
 559 {
 560         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
 561                         !vcpu->guest_xcr0_loaded) {
 562                 /* kvm_set_xcr() also depends on this */
 563                 xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
 564                 vcpu->guest_xcr0_loaded = 1;
 565         }
 566 }
 567
 568 static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
 569 {
 570         if (vcpu->guest_xcr0_loaded) {
 571                 if (vcpu->arch.xcr0 != host_xcr0)
 572                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
 573                 vcpu->guest_xcr0_loaded = 0;
 574         }
 575 }
 576
 577 int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 578 {
 579         u64 xcr0;
 580
 581         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 582         if (index != XCR_XFEATURE_ENABLED_MASK)
 583                 return 1;
 584         xcr0 = xcr;
 585         if (!(xcr0 & XSTATE_FP))
 586                 return 1;
 587         if ((xcr0 & XSTATE_YMM) && !(xcr0 & XSTATE_SSE))
 588                 return 1;
 589         if (xcr0 & ~host_xcr0)
 590                 return 1;
 591         kvm_put_guest_xcr0(vcpu);
 592         vcpu->arch.xcr0 = xcr0;
 593         return 0;
 594 }
 595
 596 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 597 {
 598         if (kvm_x86_ops->get_cpl(vcpu) != 0 ||
 599             __kvm_set_xcr(vcpu, index, xcr)) {
 600                 kvm_inject_gp(vcpu, 0);
 601                 return 1;
 602         }
 603         return 0;
 604 }
 605 EXPORT_SYMBOL_GPL(kvm_set_xcr);
 606
 607 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 608 {
 609         unsigned long old_cr4 = kvm_read_cr4(vcpu);
 610         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE |
 611                                    X86_CR4_PAE | X86_CR4_SMEP;
 612         if (cr4 & CR4_RESERVED_BITS)
 613                 return 1;
 614
 615         if (!guest_cpuid_has_xsave(vcpu) && (cr4 & X86_CR4_OSXSAVE))
 616                 return 1;
 617
 618         if (!guest_cpuid_has_smep(vcpu) && (cr4 & X86_CR4_SMEP))
 619                 return 1;
 620
 621         if (!guest_cpuid_has_fsgsbase(vcpu) && (cr4 & X86_CR4_RDWRGSFS))
 622                 return 1;
 623
 624         if (is_long_mode(vcpu)) {
 625                 if (!(cr4 & X86_CR4_PAE))
 626                         return 1;
 627         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
 628                    && ((cr4 ^ old_cr4) & pdptr_bits)
 629                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 630                                    kvm_read_cr3(vcpu)))
 631                 return 1;
 632
 633         if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
 634                 if (!guest_cpuid_has_pcid(vcpu))
 635                         return 1;
 636
 637                 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
 638                 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_MASK) || !is_long_mode(vcpu))
 639                         return 1;
 640         }
 641
 642         if (kvm_x86_ops->set_cr4(vcpu, cr4))
 643                 return 1;
 644
 645         if (((cr4 ^ old_cr4) & pdptr_bits) ||
 646             (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
 647                 kvm_mmu_reset_context(vcpu);
 648
 649         if ((cr4 ^ old_cr4) & X86_CR4_OSXSAVE)
 650                 kvm_update_cpuid(vcpu);
 651
 652         return 0;
 653 }
 654 EXPORT_SYMBOL_GPL(kvm_set_cr4);
 655
 656 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 657 {
 658         if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
 659                 kvm_mmu_sync_roots(vcpu);
 660                 kvm_mmu_flush_tlb(vcpu);
 661                 return 0;
 662         }
 663
 664         if (is_long_mode(vcpu)) {
 665                 if (kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE)) {
 666                         if (cr3 & CR3_PCID_ENABLED_RESERVED_BITS)
 667                                 return 1;
 668                 } else
 669                         if (cr3 & CR3_L_MODE_RESERVED_BITS)
 670                                 return 1;
 671         } else {
 672                 if (is_pae(vcpu)) {
 673                         if (cr3 & CR3_PAE_RESERVED_BITS)
 674                                 return 1;
 675                         if (is_paging(vcpu) &&
 676                             !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
 677                                 return 1;
 678                 }
 679                 /*
 680                  * We don't check reserved bits in nonpae mode, because
 681                  * this isn't enforced, and VMware depends on this.
 682                  */
 683         }
 684
 685         /*
 686          * Does the new cr3 value map to physical memory? (Note, we
 687          * catch an invalid cr3 even in real-mode, because it would
 688          * cause trouble later on when we turn on paging anyway.)
 689          *
 690          * A real CPU would silently accept an invalid cr3 and would
 691          * attempt to use it - with largely undefined (and often hard
 692          * to debug) behavior on the guest side.
 693          */
 694         if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
 695                 return 1;
 696         vcpu->arch.cr3 = cr3;
 697         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
 698         vcpu->arch.mmu.new_cr3(vcpu);
 699         return 0;
 700 }
 701 EXPORT_SYMBOL_GPL(kvm_set_cr3);
 702
 703 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
 704 {
 705         if (cr8 & CR8_RESERVED_BITS)
 706                 return 1;
 707         if (irqchip_in_kernel(vcpu->kvm))
 708                 kvm_lapic_set_tpr(vcpu, cr8);
 709         else
 710                 vcpu->arch.cr8 = cr8;
 711         return 0;
 712 }
 713 EXPORT_SYMBOL_GPL(kvm_set_cr8);
 714
 715 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
 716 {
 717         if (irqchip_in_kernel(vcpu->kvm))
 718                 return kvm_lapic_get_cr8(vcpu);
 719         else
 720                 return vcpu->arch.cr8;
 721 }
 722 EXPORT_SYMBOL_GPL(kvm_get_cr8);
 723
 724 static void kvm_update_dr7(struct kvm_vcpu *vcpu)
 725 {
 726         unsigned long dr7;
 727
 728         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
 729                 dr7 = vcpu->arch.guest_debug_dr7;
 730         else
 731                 dr7 = vcpu->arch.dr7;
 732         kvm_x86_ops->set_dr7(vcpu, dr7);
 733         vcpu->arch.switch_db_regs = (dr7 & DR7_BP_EN_MASK);
 734 }
 735
 736 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 737 {
 738         switch (dr) {
 739         case 0 ... 3:
 740                 vcpu->arch.db[dr] = val;
 741                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 742                         vcpu->arch.eff_db[dr] = val;
 743                 break;
 744         case 4:
 745                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 746                         return 1; /* #UD */
 747                 /* fall through */
 748         case 6:
 749                 if (val & 0xffffffff00000000ULL)
 750                         return -1; /* #GP */
 751                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | DR6_FIXED_1;
 752                 break;
 753         case 5:
 754                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 755                         return 1; /* #UD */
 756                 /* fall through */
 757         default: /* 7 */
 758                 if (val & 0xffffffff00000000ULL)
 759                         return -1; /* #GP */
 760                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
 761                 kvm_update_dr7(vcpu);
 762                 break;
 763         }
 764
 765         return 0;
 766 }
 767
 768 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 769 {
 770         int res;
 771
 772         res = __kvm_set_dr(vcpu, dr, val);
 773         if (res > 0)
 774                 kvm_queue_exception(vcpu, UD_VECTOR);
 775         else if (res < 0)
 776                 kvm_inject_gp(vcpu, 0);
 777
 778         return res;
 779 }
 780 EXPORT_SYMBOL_GPL(kvm_set_dr);
 781
 782 static int _kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 783 {
 784         switch (dr) {
 785         case 0 ... 3:
 786                 *val = vcpu->arch.db[dr];
 787                 break;
 788         case 4:
 789                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 790                         return 1;
 791                 /* fall through */
 792         case 6:
 793                 *val = vcpu->arch.dr6;
 794                 break;
 795         case 5:
 796                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 797                         return 1;
 798                 /* fall through */
 799         default: /* 7 */
 800                 *val = vcpu->arch.dr7;
 801                 break;
 802         }
 803
 804         return 0;
 805 }
 806
 807 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 808 {
 809         if (_kvm_get_dr(vcpu, dr, val)) {
 810                 kvm_queue_exception(vcpu, UD_VECTOR);
 811                 return 1;
 812         }
 813         return 0;
 814 }
 815 EXPORT_SYMBOL_GPL(kvm_get_dr);
 816
 817 bool kvm_rdpmc(struct kvm_vcpu *vcpu)
 818 {
 819         u32 ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
 820         u64 data;
 821         int err;
 822
 823         err = kvm_pmu_read_pmc(vcpu, ecx, &data);
 824         if (err)
 825                 return err;
 826         kvm_register_write(vcpu, VCPU_REGS_RAX, (u32)data);
 827         kvm_register_write(vcpu, VCPU_REGS_RDX, data >> 32);
 828         return err;
 829 }
 830 EXPORT_SYMBOL_GPL(kvm_rdpmc);
 831
 832 /*
 833  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
 834  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
 835  *
 836  * This list is modified at module load time to reflect the
 837  * capabilities of the host cpu. This capabilities test skips MSRs that are
 838  * kvm-specific. Those are put in the beginning of the list.
 839  */
 840
 841 #define KVM_SAVE_MSRS_BEGIN     10
 842 static u32 msrs_to_save[] = {
 843         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
 844         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
 845         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
 846         HV_X64_MSR_APIC_ASSIST_PAGE, MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
 847         MSR_KVM_PV_EOI_EN,
 848         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
 849         MSR_STAR,
 850 #ifdef CONFIG_X86_64
 851         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
 852 #endif
 853         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA
 854 };
 855
 856 static unsigned num_msrs_to_save;
 857
 858 static const u32 emulated_msrs[] = {
 859         MSR_IA32_TSC_ADJUST,
 860         MSR_IA32_TSCDEADLINE,
 861         MSR_IA32_MISC_ENABLE,
 862         MSR_IA32_MCG_STATUS,
 863         MSR_IA32_MCG_CTL,
 864 };
 865
 866 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
 867 {
 868         if (efer & efer_reserved_bits)
 869                 return false;
 870
 871         if (efer & EFER_FFXSR) {
 872                 struct kvm_cpuid_entry2 *feat;
 873
 874                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 875                 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT)))
 876                         return false;
 877         }
 878
 879         if (efer & EFER_SVME) {
 880                 struct kvm_cpuid_entry2 *feat;
 881
 882                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 883                 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM)))
 884                         return false;
 885         }
 886
 887         return true;
 888 }
 889 EXPORT_SYMBOL_GPL(kvm_valid_efer);
 890
 891 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
 892 {
 893         u64 old_efer = vcpu->arch.efer;
 894
 895         if (!kvm_valid_efer(vcpu, efer))
 896                 return 1;
 897
 898         if (is_paging(vcpu)
 899             && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
 900                 return 1;
 901
 902         efer &= ~EFER_LMA;
 903         efer |= vcpu->arch.efer & EFER_LMA;
 904
 905         kvm_x86_ops->set_efer(vcpu, efer);
 906
 907         /* Update reserved bits */
 908         if ((efer ^ old_efer) & EFER_NX)
 909                 kvm_mmu_reset_context(vcpu);
 910
 911         return 0;
 912 }
 913
 914 void kvm_enable_efer_bits(u64 mask)
 915 {
 916        efer_reserved_bits &= ~mask;
 917 }
 918 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
 919
 920
 921 /*
 922  * Writes msr value into into the appropriate "register".
 923  * Returns 0 on success, non-0 otherwise.
 924  * Assumes vcpu_load() was already called.
 925  */
 926 int kvm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
 927 {
 928         return kvm_x86_ops->set_msr(vcpu, msr);
 929 }
 930
 931 /*
 932  * Adapt set_msr() to msr_io()'s calling convention
 933  */
 934 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
 935 {
 936         struct msr_data msr;
 937
 938         msr.data = *data;
 939         msr.index = index;
 940         msr.host_initiated = true;
 941         return kvm_set_msr(vcpu, &msr);
 942 }
 943
 944 #ifdef CONFIG_X86_64
 945 struct pvclock_gtod_data {
 946         seqcount_t      seq;
 947
 948         struct { /* extract of a clocksource struct */
 949                 int vclock_mode;
 950                 cycle_t cycle_last;
 951                 cycle_t mask;
 952                 u32     mult;
 953                 u32     shift;
 954         } clock;
 955
 956         /* open coded 'struct timespec' */
 957         u64             monotonic_time_snsec;
 958         time_t          monotonic_time_sec;
 959 };
 960
 961 static struct pvclock_gtod_data pvclock_gtod_data;
 962
 963 static void update_pvclock_gtod(struct timekeeper *tk)
 964 {
 965         struct pvclock_gtod_data *vdata = &pvclock_gtod_data;
 966
 967         write_seqcount_begin(&vdata->seq);
 968
 969         /* copy pvclock gtod data */
 970         vdata->clock.vclock_mode        = tk->clock->archdata.vclock_mode;
 971         vdata->clock.cycle_last         = tk->clock->cycle_last;
 972         vdata->clock.mask               = tk->clock->mask;
 973         vdata->clock.mult               = tk->mult;
 974         vdata->clock.shift              = tk->shift;
 975
 976         vdata->monotonic_time_sec       = tk->xtime_sec
 977                                         + tk->wall_to_monotonic.tv_sec;
 978         vdata->monotonic_time_snsec     = tk->xtime_nsec
 979                                         + (tk->wall_to_monotonic.tv_nsec
 980                                                 << tk->shift);
 981         while (vdata->monotonic_time_snsec >=
 982                                         (((u64)NSEC_PER_SEC) << tk->shift)) {
 983                 vdata->monotonic_time_snsec -=
 984                                         ((u64)NSEC_PER_SEC) << tk->shift;
 985                 vdata->monotonic_time_sec++;
 986         }
 987
 988         write_seqcount_end(&vdata->seq);
 989 }
 990 #endif
 991
 992
 993 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
 994 {
 995         int version;
 996         int r;
 997         struct pvclock_wall_clock wc;
 998         struct timespec boot;
 999
1000         if (!wall_clock)
1001                 return;
1002
1003         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
1004         if (r)
1005                 return;
1006
1007         if (version & 1)
1008                 ++version;  /* first time write, random junk */
1009
1010         ++version;
1011
1012         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
1013
1014         /*
1015          * The guest calculates current wall clock time by adding
1016          * system time (updated by kvm_guest_time_update below) to the
1017          * wall clock specified here.  guest system time equals host
1018          * system time for us, thus we must fill in host boot time here.
1019          */
1020         getboottime(&boot);
1021
1022         if (kvm->arch.kvmclock_offset) {
1023                 struct timespec ts = ns_to_timespec(kvm->arch.kvmclock_offset);
1024                 boot = timespec_sub(boot, ts);
1025         }
1026         wc.sec = boot.tv_sec;
1027         wc.nsec = boot.tv_nsec;
1028         wc.version = version;
1029
1030         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
1031
1032         version++;
1033         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
1034 }
1035
1036 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
1037 {
1038         uint32_t quotient, remainder;
1039
1040         /* Don't try to replace with do_div(), this one calculates
1041          * "(dividend << 32) / divisor" */
1042         __asm__ ( "divl %4"
1043                   : "=a" (quotient), "=d" (remainder)
1044                   : "0" (0), "1" (dividend), "r" (divisor) );
1045         return quotient;
1046 }
1047
1048 static void kvm_get_time_scale(uint32_t scaled_khz, uint32_t base_khz,
1049                                s8 *pshift, u32 *pmultiplier)
1050 {
1051         uint64_t scaled64;
1052         int32_t  shift = 0;
1053         uint64_t tps64;
1054         uint32_t tps32;
1055
1056         tps64 = base_khz * 1000LL;
1057         scaled64 = scaled_khz * 1000LL;
1058         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
1059                 tps64 >>= 1;
1060                 shift--;
1061         }
1062
1063         tps32 = (uint32_t)tps64;
1064         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
1065                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
1066                         scaled64 >>= 1;
1067                 else
1068                         tps32 <<= 1;
1069                 shift++;
1070         }
1071
1072         *pshift = shift;
1073         *pmultiplier = div_frac(scaled64, tps32);
1074
1075         pr_debug("%s: base_khz %u => %u, shift %d, mul %u\n",
1076                  __func__, base_khz, scaled_khz, shift, *pmultiplier);
1077 }
1078
1079 static inline u64 get_kernel_ns(void)
1080 {
1081         struct timespec ts;
1082
1083         WARN_ON(preemptible());
1084         ktime_get_ts(&ts);
1085         monotonic_to_bootbased(&ts);
1086         return timespec_to_ns(&ts);
1087 }
1088
1089 #ifdef CONFIG_X86_64
1090 static atomic_t kvm_guest_has_master_clock = ATOMIC_INIT(0);
1091 #endif
1092
1093 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
1094 unsigned long max_tsc_khz;
1095
1096 static inline u64 nsec_to_cycles(struct kvm_vcpu *vcpu, u64 nsec)
1097 {
1098         return pvclock_scale_delta(nsec, vcpu->arch.virtual_tsc_mult,
1099                                    vcpu->arch.virtual_tsc_shift);
1100 }
1101
1102 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
1103 {
1104         u64 v = (u64)khz * (1000000 + ppm);
1105         do_div(v, 1000000);
1106         return v;
1107 }
1108
1109 static void kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 this_tsc_khz)
1110 {
1111         u32 thresh_lo, thresh_hi;
1112         int use_scaling = 0;
1113
1114         /* tsc_khz can be zero if TSC calibration fails */
1115         if (this_tsc_khz == 0)
1116                 return;
1117
1118         /* Compute a scale to convert nanoseconds in TSC cycles */
1119         kvm_get_time_scale(this_tsc_khz, NSEC_PER_SEC / 1000,
1120                            &vcpu->arch.virtual_tsc_shift,
1121                            &vcpu->arch.virtual_tsc_mult);
1122         vcpu->arch.virtual_tsc_khz = this_tsc_khz;
1123
1124         /*
1125          * Compute the variation in TSC rate which is acceptable
1126          * within the range of tolerance and decide if the
1127          * rate being applied is within that bounds of the hardware
1128          * rate.  If so, no scaling or compensation need be done.
1129          */
1130         thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
1131         thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
1132         if (this_tsc_khz < thresh_lo || this_tsc_khz > thresh_hi) {
1133                 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", this_tsc_khz, thresh_lo, thresh_hi);
1134                 use_scaling = 1;
1135         }
1136         kvm_x86_ops->set_tsc_khz(vcpu, this_tsc_khz, use_scaling);
1137 }
1138
1139 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
1140 {
1141         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
1142                                       vcpu->arch.virtual_tsc_mult,
1143                                       vcpu->arch.virtual_tsc_shift);
1144         tsc += vcpu->arch.this_tsc_write;
1145         return tsc;
1146 }
1147
1148 void kvm_track_tsc_matching(struct kvm_vcpu *vcpu)
1149 {
1150 #ifdef CONFIG_X86_64
1151         bool vcpus_matched;
1152         bool do_request = false;
1153         struct kvm_arch *ka = &vcpu->kvm->arch;
1154         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1155
1156         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1157                          atomic_read(&vcpu->kvm->online_vcpus));
1158
1159         if (vcpus_matched && gtod->clock.vclock_mode == VCLOCK_TSC)
1160                 if (!ka->use_master_clock)
1161                         do_request = 1;
1162
1163         if (!vcpus_matched && ka->use_master_clock)
1164                         do_request = 1;
1165
1166         if (do_request)
1167                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
1168
1169         trace_kvm_track_tsc(vcpu->vcpu_id, ka->nr_vcpus_matched_tsc,
1170                             atomic_read(&vcpu->kvm->online_vcpus),
1171                             ka->use_master_clock, gtod->clock.vclock_mode);
1172 #endif
1173 }
1174
1175 static void update_ia32_tsc_adjust_msr(struct kvm_vcpu *vcpu, s64 offset)
1176 {
1177         u64 curr_offset = kvm_x86_ops->read_tsc_offset(vcpu);
1178         vcpu->arch.ia32_tsc_adjust_msr += offset - curr_offset;
1179 }
1180
1181 void kvm_write_tsc(struct kvm_vcpu *vcpu, struct msr_data *msr)
1182 {
1183         struct kvm *kvm = vcpu->kvm;
1184         u64 offset, ns, elapsed;
1185         unsigned long flags;
1186         s64 usdiff;
1187         bool matched;
1188         u64 data = msr->data;
1189
1190         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1191         offset = kvm_x86_ops->compute_tsc_offset(vcpu, data);
1192         ns = get_kernel_ns();
1193         elapsed = ns - kvm->arch.last_tsc_nsec;
1194
1195         if (vcpu->arch.virtual_tsc_khz) {
1196                 /* n.b - signed multiplication and division required */
1197                 usdiff = data - kvm->arch.last_tsc_write;
1198 #ifdef CONFIG_X86_64
1199                 usdiff = (usdiff * 1000) / vcpu->arch.virtual_tsc_khz;
1200 #else
1201                 /* do_div() only does unsigned */
1202                 asm("idivl %2; xor %%edx, %%edx"
1203                 : "=A"(usdiff)
1204                 : "A"(usdiff * 1000), "rm"(vcpu->arch.virtual_tsc_khz));
1205 #endif
1206                 do_div(elapsed, 1000);
1207                 usdiff -= elapsed;
1208                 if (usdiff < 0)
1209                         usdiff = -usdiff;
1210         } else
1211                 usdiff = USEC_PER_SEC; /* disable TSC match window below */
1212
1213         /*
1214          * Special case: TSC write with a small delta (1 second) of virtual
1215          * cycle time against real time is interpreted as an attempt to
1216          * synchronize the CPU.
1217          *
1218          * For a reliable TSC, we can match TSC offsets, and for an unstable
1219          * TSC, we add elapsed time in this computation.  We could let the
1220          * compensation code attempt to catch up if we fall behind, but
1221          * it's better to try to match offsets from the beginning.
1222          */
1223         if (usdiff < USEC_PER_SEC &&
1224             vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
1225                 if (!check_tsc_unstable()) {
1226                         offset = kvm->arch.cur_tsc_offset;
1227                         pr_debug("kvm: matched tsc offset for %llu\n", data);
1228                 } else {
1229                         u64 delta = nsec_to_cycles(vcpu, elapsed);
1230                         data += delta;
1231                         offset = kvm_x86_ops->compute_tsc_offset(vcpu, data);
1232                         pr_debug("kvm: adjusted tsc offset by %llu\n", delta);
1233                 }
1234                 matched = true;
1235         } else {
1236                 /*
1237                  * We split periods of matched TSC writes into generations.
1238                  * For each generation, we track the original measured
1239                  * nanosecond time, offset, and write, so if TSCs are in
1240                  * sync, we can match exact offset, and if not, we can match
1241                  * exact software computation in compute_guest_tsc()
1242                  *
1243                  * These values are tracked in kvm->arch.cur_xxx variables.
1244                  */
1245                 kvm->arch.cur_tsc_generation++;
1246                 kvm->arch.cur_tsc_nsec = ns;
1247                 kvm->arch.cur_tsc_write = data;
1248                 kvm->arch.cur_tsc_offset = offset;
1249                 matched = false;
1250                 pr_debug("kvm: new tsc generation %u, clock %llu\n",
1251                          kvm->arch.cur_tsc_generation, data);
1252         }
1253
1254         /*
1255          * We also track th most recent recorded KHZ, write and time to
1256          * allow the matching interval to be extended at each write.
1257          */
1258         kvm->arch.last_tsc_nsec = ns;
1259         kvm->arch.last_tsc_write = data;
1260         kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
1261
1262         /* Reset of TSC must disable overshoot protection below */
1263         vcpu->arch.hv_clock.tsc_timestamp = 0;
1264         vcpu->arch.last_guest_tsc = data;
1265
1266         /* Keep track of which generation this VCPU has synchronized to */
1267         vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
1268         vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
1269         vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
1270
1271         if (guest_cpuid_has_tsc_adjust(vcpu) && !msr->host_initiated)
1272                 update_ia32_tsc_adjust_msr(vcpu, offset);
1273         kvm_x86_ops->write_tsc_offset(vcpu, offset);
1274         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1275
1276         spin_lock(&kvm->arch.pvclock_gtod_sync_lock);
1277         if (matched)
1278                 kvm->arch.nr_vcpus_matched_tsc++;
1279         else
1280                 kvm->arch.nr_vcpus_matched_tsc = 0;
1281
1282         kvm_track_tsc_matching(vcpu);
1283         spin_unlock(&kvm->arch.pvclock_gtod_sync_lock);
1284 }
1285
1286 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1287
1288 #ifdef CONFIG_X86_64
1289
1290 static cycle_t read_tsc(void)
1291 {
1292         cycle_t ret;
1293         u64 last;
1294
1295         /*
1296          * Empirically, a fence (of type that depends on the CPU)
1297          * before rdtsc is enough to ensure that rdtsc is ordered
1298          * with respect to loads.  The various CPU manuals are unclear
1299          * as to whether rdtsc can be reordered with later loads,
1300          * but no one has ever seen it happen.
1301          */
1302         rdtsc_barrier();
1303         ret = (cycle_t)vget_cycles();
1304
1305         last = pvclock_gtod_data.clock.cycle_last;
1306
1307         if (likely(ret >= last))
1308                 return ret;
1309
1310         /*
1311          * GCC likes to generate cmov here, but this branch is extremely
1312          * predictable (it's just a funciton of time and the likely is
1313          * very likely) and there's a data dependence, so force GCC
1314          * to generate a branch instead.  I don't barrier() because
1315          * we don't actually need a barrier, and if this function
1316          * ever gets inlined it will generate worse code.
1317          */
1318         asm volatile ("");
1319         return last;
1320 }
1321
1322 static inline u64 vgettsc(cycle_t *cycle_now)
1323 {
1324         long v;
1325         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1326
1327         *cycle_now = read_tsc();
1328
1329         v = (*cycle_now - gtod->clock.cycle_last) & gtod->clock.mask;
1330         return v * gtod->clock.mult;
1331 }
1332
1333 static int do_monotonic(struct timespec *ts, cycle_t *cycle_now)
1334 {
1335         unsigned long seq;
1336         u64 ns;
1337         int mode;
1338         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1339
1340         ts->tv_nsec = 0;
1341         do {
1342                 seq = read_seqcount_begin(&gtod->seq);
1343                 mode = gtod->clock.vclock_mode;
1344                 ts->tv_sec = gtod->monotonic_time_sec;
1345                 ns = gtod->monotonic_time_snsec;
1346                 ns += vgettsc(cycle_now);
1347                 ns >>= gtod->clock.shift;
1348         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
1349         timespec_add_ns(ts, ns);
1350
1351         return mode;
1352 }
1353
1354 /* returns true if host is using tsc clocksource */
1355 static bool kvm_get_time_and_clockread(s64 *kernel_ns, cycle_t *cycle_now)
1356 {
1357         struct timespec ts;
1358
1359         /* checked again under seqlock below */
1360         if (pvclock_gtod_data.clock.vclock_mode != VCLOCK_TSC)
1361                 return false;
1362
1363         if (do_monotonic(&ts, cycle_now) != VCLOCK_TSC)
1364                 return false;
1365
1366         monotonic_to_bootbased(&ts);
1367         *kernel_ns = timespec_to_ns(&ts);
1368
1369         return true;
1370 }
1371 #endif
1372
1373 /*
1374  *
1375  * Assuming a stable TSC across physical CPUS, and a stable TSC
1376  * across virtual CPUs, the following condition is possible.
1377  * Each numbered line represents an event visible to both
1378  * CPUs at the next numbered event.
1379  *
1380  * "timespecX" represents host monotonic time. "tscX" represents
1381  * RDTSC value.
1382  *
1383  *              VCPU0 on CPU0           |       VCPU1 on CPU1
1384  *
1385  * 1.  read timespec0,tsc0
1386  * 2.                                   | timespec1 = timespec0 + N
1387  *                                      | tsc1 = tsc0 + M
1388  * 3. transition to guest               | transition to guest
1389  * 4. ret0 = timespec0 + (rdtsc - tsc0) |
1390  * 5.                                   | ret1 = timespec1 + (rdtsc - tsc1)
1391  *                                      | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
1392  *
1393  * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
1394  *
1395  *      - ret0 < ret1
1396  *      - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
1397  *              ...
1398  *      - 0 < N - M => M < N
1399  *
1400  * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
1401  * always the case (the difference between two distinct xtime instances
1402  * might be smaller then the difference between corresponding TSC reads,
1403  * when updating guest vcpus pvclock areas).
1404  *
1405  * To avoid that problem, do not allow visibility of distinct
1406  * system_timestamp/tsc_timestamp values simultaneously: use a master
1407  * copy of host monotonic time values. Update that master copy
1408  * in lockstep.
1409  *
1410  * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
1411  *
1412  */
1413
1414 static void pvclock_update_vm_gtod_copy(struct kvm *kvm)
1415 {
1416 #ifdef CONFIG_X86_64
1417         struct kvm_arch *ka = &kvm->arch;
1418         int vclock_mode;
1419         bool host_tsc_clocksource, vcpus_matched;
1420
1421         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1422                         atomic_read(&kvm->online_vcpus));
1423
1424         /*
1425          * If the host uses TSC clock, then passthrough TSC as stable
1426          * to the guest.
1427          */
1428         host_tsc_clocksource = kvm_get_time_and_clockread(
1429                                         &ka->master_kernel_ns,
1430                                         &ka->master_cycle_now);
1431
1432         ka->use_master_clock = host_tsc_clocksource & vcpus_matched;
1433
1434         if (ka->use_master_clock)
1435                 atomic_set(&kvm_guest_has_master_clock, 1);
1436
1437         vclock_mode = pvclock_gtod_data.clock.vclock_mode;
1438         trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode,
1439                                         vcpus_matched);
1440 #endif
1441 }
1442
1443 static int kvm_guest_time_update(struct kvm_vcpu *v)
1444 {
1445         unsigned long flags, this_tsc_khz;
1446         struct kvm_vcpu_arch *vcpu = &v->arch;
1447         struct kvm_arch *ka = &v->kvm->arch;
1448         s64 kernel_ns, max_kernel_ns;
1449         u64 tsc_timestamp, host_tsc;
1450         struct pvclock_vcpu_time_info guest_hv_clock;
1451         u8 pvclock_flags;
1452         bool use_master_clock;
1453
1454         kernel_ns = 0;
1455         host_tsc = 0;
1456
1457         /*
1458          * If the host uses TSC clock, then passthrough TSC as stable
1459          * to the guest.
1460          */
1461         spin_lock(&ka->pvclock_gtod_sync_lock);
1462         use_master_clock = ka->use_master_clock;
1463         if (use_master_clock) {
1464                 host_tsc = ka->master_cycle_now;
1465                 kernel_ns = ka->master_kernel_ns;
1466         }
1467         spin_unlock(&ka->pvclock_gtod_sync_lock);
1468
1469         /* Keep irq disabled to prevent changes to the clock */
1470         local_irq_save(flags);
1471         this_tsc_khz = __get_cpu_var(cpu_tsc_khz);
1472         if (unlikely(this_tsc_khz == 0)) {
1473                 local_irq_restore(flags);
1474                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1475                 return 1;
1476         }
1477         if (!use_master_clock) {
1478                 host_tsc = native_read_tsc();
1479                 kernel_ns = get_kernel_ns();
1480         }
1481
1482         tsc_timestamp = kvm_x86_ops->read_l1_tsc(v, host_tsc);
1483
1484         /*
1485          * We may have to catch up the TSC to match elapsed wall clock
1486          * time for two reasons, even if kvmclock is used.
1487          *   1) CPU could have been running below the maximum TSC rate
1488          *   2) Broken TSC compensation resets the base at each VCPU
1489          *      entry to avoid unknown leaps of TSC even when running
1490          *      again on the same CPU.  This may cause apparent elapsed
1491          *      time to disappear, and the guest to stand still or run
1492          *      very slowly.
1493          */
1494         if (vcpu->tsc_catchup) {
1495                 u64 tsc = compute_guest_tsc(v, kernel_ns);
1496                 if (tsc > tsc_timestamp) {
1497                         adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
1498                         tsc_timestamp = tsc;
1499                 }
1500         }
1501
1502         local_irq_restore(flags);
1503
1504         if (!vcpu->pv_time_enabled)
1505                 return 0;
1506
1507         /*
1508          * Time as measured by the TSC may go backwards when resetting the base
1509          * tsc_timestamp.  The reason for this is that the TSC resolution is
1510          * higher than the resolution of the other clock scales.  Thus, many
1511          * possible measurments of the TSC correspond to one measurement of any
1512          * other clock, and so a spread of values is possible.  This is not a
1513          * problem for the computation of the nanosecond clock; with TSC rates
1514          * around 1GHZ, there can only be a few cycles which correspond to one
1515          * nanosecond value, and any path through this code will inevitably
1516          * take longer than that.  However, with the kernel_ns value itself,
1517          * the precision may be much lower, down to HZ granularity.  If the
1518          * first sampling of TSC against kernel_ns ends in the low part of the
1519          * range, and the second in the high end of the range, we can get:
1520          *
1521          * (TSC - offset_low) * S + kns_old > (TSC - offset_high) * S + kns_new
1522          *
1523          * As the sampling errors potentially range in the thousands of cycles,
1524          * it is possible such a time value has already been observed by the
1525          * guest.  To protect against this, we must compute the system time as
1526          * observed by the guest and ensure the new system time is greater.
1527          */
1528         max_kernel_ns = 0;
1529         if (vcpu->hv_clock.tsc_timestamp) {
1530                 max_kernel_ns = vcpu->last_guest_tsc -
1531                                 vcpu->hv_clock.tsc_timestamp;
1532                 max_kernel_ns = pvclock_scale_delta(max_kernel_ns,
1533                                     vcpu->hv_clock.tsc_to_system_mul,
1534                                     vcpu->hv_clock.tsc_shift);
1535                 max_kernel_ns += vcpu->last_kernel_ns;
1536         }
1537
1538         if (unlikely(vcpu->hw_tsc_khz != this_tsc_khz)) {
1539                 kvm_get_time_scale(NSEC_PER_SEC / 1000, this_tsc_khz,
1540                                    &vcpu->hv_clock.tsc_shift,
1541                                    &vcpu->hv_clock.tsc_to_system_mul);
1542                 vcpu->hw_tsc_khz = this_tsc_khz;
1543         }
1544
1545         /* with a master <monotonic time, tsc value> tuple,
1546          * pvclock clock reads always increase at the (scaled) rate
1547          * of guest TSC - no need to deal with sampling errors.
1548          */
1549         if (!use_master_clock) {
1550                 if (max_kernel_ns > kernel_ns)
1551                         kernel_ns = max_kernel_ns;
1552         }
1553         /* With all the info we got, fill in the values */
1554         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
1555         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
1556         vcpu->last_kernel_ns = kernel_ns;
1557         vcpu->last_guest_tsc = tsc_timestamp;
1558
1559         /*
1560          * The interface expects us to write an even number signaling that the
1561          * update is finished. Since the guest won't see the intermediate
1562          * state, we just increase by 2 at the end.
1563          */
1564         vcpu->hv_clock.version += 2;
1565
1566         if (unlikely(kvm_read_guest_cached(v->kvm, &vcpu->pv_time,
1567                 &guest_hv_clock, sizeof(guest_hv_clock))))
1568                 return 0;
1569
1570         /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
1571         pvclock_flags = (guest_hv_clock.flags & PVCLOCK_GUEST_STOPPED);
1572
1573         if (vcpu->pvclock_set_guest_stopped_request) {
1574                 pvclock_flags |= PVCLOCK_GUEST_STOPPED;
1575                 vcpu->pvclock_set_guest_stopped_request = false;
1576         }
1577
1578         /* If the host uses TSC clocksource, then it is stable */
1579         if (use_master_clock)
1580                 pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;
1581
1582         vcpu->hv_clock.flags = pvclock_flags;
1583
1584         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1585                                 &vcpu->hv_clock,
1586                                 sizeof(vcpu->hv_clock));
1587         return 0;
1588 }
1589
1590 static bool msr_mtrr_valid(unsigned msr)
1591 {
1592         switch (msr) {
1593         case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
1594         case MSR_MTRRfix64K_00000:
1595         case MSR_MTRRfix16K_80000:
1596         case MSR_MTRRfix16K_A0000:
1597         case MSR_MTRRfix4K_C0000:
1598         case MSR_MTRRfix4K_C8000:
1599         case MSR_MTRRfix4K_D0000:
1600         case MSR_MTRRfix4K_D8000:
1601         case MSR_MTRRfix4K_E0000:
1602         case MSR_MTRRfix4K_E8000:
1603         case MSR_MTRRfix4K_F0000:
1604         case MSR_MTRRfix4K_F8000:
1605         case MSR_MTRRdefType:
1606         case MSR_IA32_CR_PAT:
1607                 return true;
1608         case 0x2f8:
1609                 return true;
1610         }
1611         return false;
1612 }
1613
1614 static bool valid_pat_type(unsigned t)
1615 {
1616         return t < 8 && (1 << t) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
1617 }
1618
1619 static bool valid_mtrr_type(unsigned t)
1620 {
1621         return t < 8 && (1 << t) & 0x73; /* 0, 1, 4, 5, 6 */
1622 }
1623
1624 static bool mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1625 {
1626         int i;
1627
1628         if (!msr_mtrr_valid(msr))
1629                 return false;
1630
1631         if (msr == MSR_IA32_CR_PAT) {
1632                 for (i = 0; i < 8; i++)
1633                         if (!valid_pat_type((data >> (i * 8)) & 0xff))
1634                                 return false;
1635                 return true;
1636         } else if (msr == MSR_MTRRdefType) {
1637                 if (data & ~0xcff)
1638                         return false;
1639                 return valid_mtrr_type(data & 0xff);
1640         } else if (msr >= MSR_MTRRfix64K_00000 && msr <= MSR_MTRRfix4K_F8000) {
1641                 for (i = 0; i < 8 ; i++)
1642                         if (!valid_mtrr_type((data >> (i * 8)) & 0xff))
1643                                 return false;
1644                 return true;
1645         }
1646
1647         /* variable MTRRs */
1648         return valid_mtrr_type(data & 0xff);
1649 }
1650
1651 static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1652 {
1653         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1654
1655         if (!mtrr_valid(vcpu, msr, data))
1656                 return 1;
1657
1658         if (msr == MSR_MTRRdefType) {
1659                 vcpu->arch.mtrr_state.def_type = data;
1660                 vcpu->arch.mtrr_state.enabled = (data & 0xc00) >> 10;
1661         } else if (msr == MSR_MTRRfix64K_00000)
1662                 p[0] = data;
1663         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1664                 p[1 + msr - MSR_MTRRfix16K_80000] = data;
1665         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1666                 p[3 + msr - MSR_MTRRfix4K_C0000] = data;
1667         else if (msr == MSR_IA32_CR_PAT)
1668                 vcpu->arch.pat = data;
1669         else {  /* Variable MTRRs */
1670                 int idx, is_mtrr_mask;
1671                 u64 *pt;
1672
1673                 idx = (msr - 0x200) / 2;
1674                 is_mtrr_mask = msr - 0x200 - 2 * idx;
1675                 if (!is_mtrr_mask)
1676                         pt =
1677                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1678                 else
1679                         pt =
1680                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1681                 *pt = data;
1682         }
1683
1684         kvm_mmu_reset_context(vcpu);
1685         return 0;
1686 }
1687
1688 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1689 {
1690         u64 mcg_cap = vcpu->arch.mcg_cap;
1691         unsigned bank_num = mcg_cap & 0xff;
1692
1693         switch (msr) {
1694         case MSR_IA32_MCG_STATUS:
1695                 vcpu->arch.mcg_status = data;
1696                 break;
1697         case MSR_IA32_MCG_CTL:
1698                 if (!(mcg_cap & MCG_CTL_P))
1699                         return 1;
1700                 if (data != 0 && data != ~(u64)0)
1701                         return -1;
1702                 vcpu->arch.mcg_ctl = data;
1703                 break;
1704         default:
1705                 if (msr >= MSR_IA32_MC0_CTL &&
1706                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1707                         u32 offset = msr - MSR_IA32_MC0_CTL;
1708                         /* only 0 or all 1s can be written to IA32_MCi_CTL
1709                          * some Linux kernels though clear bit 10 in bank 4 to
1710                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1711                          * this to avoid an uncatched #GP in the guest
1712                          */
1713                         if ((offset & 0x3) == 0 &&
1714                             data != 0 && (data | (1 << 10)) != ~(u64)0)
1715                                 return -1;
1716                         vcpu->arch.mce_banks[offset] = data;
1717                         break;
1718                 }
1719                 return 1;
1720         }
1721         return 0;
1722 }
1723
1724 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
1725 {
1726         struct kvm *kvm = vcpu->kvm;
1727         int lm = is_long_mode(vcpu);
1728         u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
1729                 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
1730         u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
1731                 : kvm->arch.xen_hvm_config.blob_size_32;
1732         u32 page_num = data & ~PAGE_MASK;
1733         u64 page_addr = data & PAGE_MASK;
1734         u8 *page;
1735         int r;
1736
1737         r = -E2BIG;
1738         if (page_num >= blob_size)
1739                 goto out;
1740         r = -ENOMEM;
1741         page = memdup_user(blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE);
1742         if (IS_ERR(page)) {
1743                 r = PTR_ERR(page);
1744                 goto out;
1745         }
1746         if (kvm_write_guest(kvm, page_addr, page, PAGE_SIZE))
1747                 goto out_free;
1748         r = 0;
1749 out_free:
1750         kfree(page);
1751 out:
1752         return r;
1753 }
1754
1755 static bool kvm_hv_hypercall_enabled(struct kvm *kvm)
1756 {
1757         return kvm->arch.hv_hypercall & HV_X64_MSR_HYPERCALL_ENABLE;
1758 }
1759
1760 static bool kvm_hv_msr_partition_wide(u32 msr)
1761 {
1762         bool r = false;
1763         switch (msr) {
1764         case HV_X64_MSR_GUEST_OS_ID:
1765         case HV_X64_MSR_HYPERCALL:
1766                 r = true;
1767                 break;
1768         }
1769
1770         return r;
1771 }
1772
1773 static int set_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1774 {
1775         struct kvm *kvm = vcpu->kvm;
1776
1777         switch (msr) {
1778         case HV_X64_MSR_GUEST_OS_ID:
1779                 kvm->arch.hv_guest_os_id = data;
1780                 /* setting guest os id to zero disables hypercall page */
1781                 if (!kvm->arch.hv_guest_os_id)
1782                         kvm->arch.hv_hypercall &= ~HV_X64_MSR_HYPERCALL_ENABLE;
1783                 break;
1784         case HV_X64_MSR_HYPERCALL: {
1785                 u64 gfn;
1786                 unsigned long addr;
1787                 u8 instructions[4];
1788
1789                 /* if guest os id is not set hypercall should remain disabled */
1790                 if (!kvm->arch.hv_guest_os_id)
1791                         break;
1792                 if (!(data & HV_X64_MSR_HYPERCALL_ENABLE)) {
1793                         kvm->arch.hv_hypercall = data;
1794                         break;
1795                 }
1796                 gfn = data >> HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT;
1797                 addr = gfn_to_hva(kvm, gfn);
1798                 if (kvm_is_error_hva(addr))
1799                         return 1;
1800                 kvm_x86_ops->patch_hypercall(vcpu, instructions);
1801                 ((unsigned char *)instructions)[3] = 0xc3; /* ret */
1802                 if (__copy_to_user((void __user *)addr, instructions, 4))
1803                         return 1;
1804                 kvm->arch.hv_hypercall = data;
1805                 break;
1806         }
1807         default:
1808                 vcpu_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1809                             "data 0x%llx\n", msr, data);
1810                 return 1;
1811         }
1812         return 0;
1813 }
1814
1815 static int set_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1816 {
1817         switch (msr) {
1818         case HV_X64_MSR_APIC_ASSIST_PAGE: {
1819                 unsigned long addr;
1820
1821                 if (!(data & HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE)) {
1822                         vcpu->arch.hv_vapic = data;
1823                         break;
1824                 }
1825                 addr = gfn_to_hva(vcpu->kvm, data >>
1826                                   HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT);
1827                 if (kvm_is_error_hva(addr))
1828                         return 1;
1829                 if (__clear_user((void __user *)addr, PAGE_SIZE))
1830                         return 1;
1831                 vcpu->arch.hv_vapic = data;
1832                 break;
1833         }
1834         case HV_X64_MSR_EOI:
1835                 return kvm_hv_vapic_msr_write(vcpu, APIC_EOI, data);
1836         case HV_X64_MSR_ICR:
1837                 return kvm_hv_vapic_msr_write(vcpu, APIC_ICR, data);
1838         case HV_X64_MSR_TPR:
1839                 return kvm_hv_vapic_msr_write(vcpu, APIC_TASKPRI, data);
1840         default:
1841                 vcpu_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1842                             "data 0x%llx\n", msr, data);
1843                 return 1;
1844         }
1845
1846         return 0;
1847 }
1848
1849 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
1850 {
1851         gpa_t gpa = data & ~0x3f;
1852
1853         /* Bits 2:5 are reserved, Should be zero */
1854         if (data & 0x3c)
1855                 return 1;
1856
1857         vcpu->arch.apf.msr_val = data;
1858
1859         if (!(data & KVM_ASYNC_PF_ENABLED)) {
1860                 kvm_clear_async_pf_completion_queue(vcpu);
1861                 kvm_async_pf_hash_reset(vcpu);
1862                 return 0;
1863         }
1864
1865         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa,
1866                                         sizeof(u32)))
1867                 return 1;
1868
1869         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
1870         kvm_async_pf_wakeup_all(vcpu);
1871         return 0;
1872 }
1873
1874 static void kvmclock_reset(struct kvm_vcpu *vcpu)
1875 {
1876         vcpu->arch.pv_time_enabled = false;
1877 }
1878
1879 static void accumulate_steal_time(struct kvm_vcpu *vcpu)
1880 {
1881         u64 delta;
1882
1883         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
1884                 return;
1885
1886         delta = current->sched_info.run_delay - vcpu->arch.st.last_steal;
1887         vcpu->arch.st.last_steal = current->sched_info.run_delay;
1888         vcpu->arch.st.accum_steal = delta;
1889 }
1890
1891 static void record_steal_time(struct kvm_vcpu *vcpu)
1892 {
1893         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
1894                 return;
1895
1896         if (unlikely(kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
1897                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time))))
1898                 return;
1899
1900         vcpu->arch.st.steal.steal += vcpu->arch.st.accum_steal;
1901         vcpu->arch.st.steal.version += 2;
1902         vcpu->arch.st.accum_steal = 0;
1903
1904         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
1905                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
1906 }
1907
1908 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
1909 {
1910         bool pr = false;
1911         u32 msr = msr_info->index;
1912         u64 data = msr_info->data;
1913
1914         switch (msr) {
1915         case MSR_AMD64_NB_CFG:
1916         case MSR_IA32_UCODE_REV:
1917         case MSR_IA32_UCODE_WRITE:
1918         case MSR_VM_HSAVE_PA:
1919         case MSR_AMD64_PATCH_LOADER:
1920         case MSR_AMD64_BU_CFG2:
1921                 break;
1922
1923         case MSR_EFER:
1924                 return set_efer(vcpu, data);
1925         case MSR_K7_HWCR:
1926                 data &= ~(u64)0x40;     /* ignore flush filter disable */
1927                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
1928                 data &= ~(u64)0x8;      /* ignore TLB cache disable */
1929                 if (data != 0) {
1930                         vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
1931                                     data);
1932                         return 1;
1933                 }
1934                 break;
1935         case MSR_FAM10H_MMIO_CONF_BASE:
1936                 if (data != 0) {
1937                         vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
1938                                     "0x%llx\n", data);
1939                         return 1;
1940                 }
1941                 break;
1942         case MSR_IA32_DEBUGCTLMSR:
1943                 if (!data) {
1944                         /* We support the non-activated case already */
1945                         break;
1946                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
1947                         /* Values other than LBR and BTF are vendor-specific,
1948                            thus reserved and should throw a #GP */
1949                         return 1;
1950                 }
1951                 vcpu_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
1952                             __func__, data);
1953                 break;
1954         case 0x200 ... 0x2ff:
1955                 return set_msr_mtrr(vcpu, msr, data);
1956         case MSR_IA32_APICBASE:
1957                 kvm_set_apic_base(vcpu, data);
1958                 break;
1959         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1960                 return kvm_x2apic_msr_write(vcpu, msr, data);
1961         case MSR_IA32_TSCDEADLINE:
1962                 kvm_set_lapic_tscdeadline_msr(vcpu, data);
1963                 break;
1964         case MSR_IA32_TSC_ADJUST:
1965                 if (guest_cpuid_has_tsc_adjust(vcpu)) {
1966                         if (!msr_info->host_initiated) {
1967                                 u64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;
1968                                 kvm_x86_ops->adjust_tsc_offset(vcpu, adj, true);
1969                         }
1970                         vcpu->arch.ia32_tsc_adjust_msr = data;
1971                 }
1972                 break;
1973         case MSR_IA32_MISC_ENABLE:
1974                 vcpu->arch.ia32_misc_enable_msr = data;
1975                 break;
1976         case MSR_KVM_WALL_CLOCK_NEW:
1977         case MSR_KVM_WALL_CLOCK:
1978                 vcpu->kvm->arch.wall_clock = data;
1979                 kvm_write_wall_clock(vcpu->kvm, data);
1980                 break;
1981         case MSR_KVM_SYSTEM_TIME_NEW:
1982         case MSR_KVM_SYSTEM_TIME: {
1983                 u64 gpa_offset;
1984                 kvmclock_reset(vcpu);
1985
1986                 vcpu->arch.time = data;
1987                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1988
1989                 /* we verify if the enable bit is set... */
1990                 if (!(data & 1))
1991                         break;
1992
1993                 gpa_offset = data & ~(PAGE_MASK | 1);
1994
1995                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm,
1996                      &vcpu->arch.pv_time, data & ~1ULL,
1997                      sizeof(struct pvclock_vcpu_time_info)))
1998                         vcpu->arch.pv_time_enabled = false;
1999                 else
2000                         vcpu->arch.pv_time_enabled = true;
2001
2002                 break;
2003         }
2004         case MSR_KVM_ASYNC_PF_EN:
2005                 if (kvm_pv_enable_async_pf(vcpu, data))
2006                         return 1;
2007                 break;
2008         case MSR_KVM_STEAL_TIME:
2009
2010                 if (unlikely(!sched_info_on()))
2011                         return 1;
2012
2013                 if (data & KVM_STEAL_RESERVED_MASK)
2014                         return 1;
2015
2016                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.st.stime,
2017                                                 data & KVM_STEAL_VALID_BITS,
2018                                                 sizeof(struct kvm_steal_time)))
2019                         return 1;
2020
2021                 vcpu->arch.st.msr_val = data;
2022
2023                 if (!(data & KVM_MSR_ENABLED))
2024                         break;
2025
2026                 vcpu->arch.st.last_steal = current->sched_info.run_delay;
2027
2028                 preempt_disable();
2029                 accumulate_steal_time(vcpu);
2030                 preempt_enable();
2031
2032                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2033
2034                 break;
2035         case MSR_KVM_PV_EOI_EN:
2036                 if (kvm_lapic_enable_pv_eoi(vcpu, data))
2037                         return 1;
2038                 break;
2039
2040         case MSR_IA32_MCG_CTL:
2041         case MSR_IA32_MCG_STATUS:
2042         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
2043                 return set_msr_mce(vcpu, msr, data);
2044
2045         /* Performance counters are not protected by a CPUID bit,
2046          * so we should check all of them in the generic path for the sake of
2047          * cross vendor migration.
2048          * Writing a zero into the event select MSRs disables them,
2049          * which we perfectly emulate ;-). Any other value should be at least
2050          * reported, some guests depend on them.
2051          */
2052         case MSR_K7_EVNTSEL0:
2053         case MSR_K7_EVNTSEL1:
2054         case MSR_K7_EVNTSEL2:
2055         case MSR_K7_EVNTSEL3:
2056                 if (data != 0)
2057                         vcpu_unimpl(vcpu, "unimplemented perfctr wrmsr: "
2058                                     "0x%x data 0x%llx\n", msr, data);
2059                 break;
2060         /* at least RHEL 4 unconditionally writes to the perfctr registers,
2061          * so we ignore writes to make it happy.
2062          */
2063         case MSR_K7_PERFCTR0:
2064         case MSR_K7_PERFCTR1:
2065         case MSR_K7_PERFCTR2:
2066         case MSR_K7_PERFCTR3:
2067                 vcpu_unimpl(vcpu, "unimplemented perfctr wrmsr: "
2068                             "0x%x data 0x%llx\n", msr, data);
2069                 break;
2070         case MSR_P6_PERFCTR0:
2071         case MSR_P6_PERFCTR1:
2072                 pr = true;
2073         case MSR_P6_EVNTSEL0:
2074         case MSR_P6_EVNTSEL1:
2075                 if (kvm_pmu_msr(vcpu, msr))
2076                         return kvm_pmu_set_msr(vcpu, msr_info);
2077
2078                 if (pr || data != 0)
2079                         vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
2080                                     "0x%x data 0x%llx\n", msr, data);
2081                 break;
2082         case MSR_K7_CLK_CTL:
2083                 /*
2084                  * Ignore all writes to this no longer documented MSR.
2085                  * Writes are only relevant for old K7 processors,
2086                  * all pre-dating SVM, but a recommended workaround from
2087                  * AMD for these chips. It is possible to specify the
2088                  * affected processor models on the command line, hence
2089                  * the need to ignore the workaround.
2090                  */
2091                 break;
2092         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2093                 if (kvm_hv_msr_partition_wide(msr)) {
2094                         int r;
2095                         mutex_lock(&vcpu->kvm->lock);
2096                         r = set_msr_hyperv_pw(vcpu, msr, data);
2097                         mutex_unlock(&vcpu->kvm->lock);
2098                         return r;
2099                 } else
2100                         return set_msr_hyperv(vcpu, msr, data);
2101                 break;
2102         case MSR_IA32_BBL_CR_CTL3:
2103                 /* Drop writes to this legacy MSR -- see rdmsr
2104                  * counterpart for further detail.
2105                  */
2106                 vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n", msr, data);
2107                 break;
2108         case MSR_AMD64_OSVW_ID_LENGTH:
2109                 if (!guest_cpuid_has_osvw(vcpu))
2110                         return 1;
2111                 vcpu->arch.osvw.length = data;
2112                 break;
2113         case MSR_AMD64_OSVW_STATUS:
2114                 if (!guest_cpuid_has_osvw(vcpu))
2115                         return 1;
2116                 vcpu->arch.osvw.status = data;
2117                 break;
2118         default:
2119                 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
2120                         return xen_hvm_config(vcpu, data);
2121                 if (kvm_pmu_msr(vcpu, msr))
2122                         return kvm_pmu_set_msr(vcpu, msr_info);
2123                 if (!ignore_msrs) {
2124                         vcpu_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
2125                                     msr, data);
2126                         return 1;
2127                 } else {
2128                         vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
2129                                     msr, data);
2130                         break;
2131                 }
2132         }
2133         return 0;
2134 }
2135 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
2136
2137
2138 /*
2139  * Reads an msr value (of 'msr_index') into 'pdata'.
2140  * Returns 0 on success, non-0 otherwise.
2141  * Assumes vcpu_load() was already called.
2142  */
2143 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
2144 {
2145         return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
2146 }
2147
2148 static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2149 {
2150         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
2151
2152         if (!msr_mtrr_valid(msr))
2153                 return 1;
2154
2155         if (msr == MSR_MTRRdefType)
2156                 *pdata = vcpu->arch.mtrr_state.def_type +
2157                          (vcpu->arch.mtrr_state.enabled << 10);
2158         else if (msr == MSR_MTRRfix64K_00000)
2159                 *pdata = p[0];
2160         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
2161                 *pdata = p[1 + msr - MSR_MTRRfix16K_80000];
2162         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
2163                 *pdata = p[3 + msr - MSR_MTRRfix4K_C0000];
2164         else if (msr == MSR_IA32_CR_PAT)
2165                 *pdata = vcpu->arch.pat;
2166         else {  /* Variable MTRRs */
2167                 int idx, is_mtrr_mask;
2168                 u64 *pt;
2169
2170                 idx = (msr - 0x200) / 2;
2171                 is_mtrr_mask = msr - 0x200 - 2 * idx;
2172                 if (!is_mtrr_mask)
2173                         pt =
2174                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
2175                 else
2176                         pt =
2177                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
2178                 *pdata = *pt;
2179         }
2180
2181         return 0;
2182 }
2183
2184 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2185 {
2186         u64 data;
2187         u64 mcg_cap = vcpu->arch.mcg_cap;
2188         unsigned bank_num = mcg_cap & 0xff;
2189
2190         switch (msr) {
2191         case MSR_IA32_P5_MC_ADDR:
2192         case MSR_IA32_P5_MC_TYPE:
2193                 data = 0;
2194                 break;
2195         case MSR_IA32_MCG_CAP:
2196                 data = vcpu->arch.mcg_cap;
2197                 break;
2198         case MSR_IA32_MCG_CTL:
2199                 if (!(mcg_cap & MCG_CTL_P))
2200                         return 1;
2201                 data = vcpu->arch.mcg_ctl;
2202                 break;
2203         case MSR_IA32_MCG_STATUS:
2204                 data = vcpu->arch.mcg_status;
2205                 break;
2206         default:
2207                 if (msr >= MSR_IA32_MC0_CTL &&
2208                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
2209                         u32 offset = msr - MSR_IA32_MC0_CTL;
2210                         data = vcpu->arch.mce_banks[offset];
2211                         break;
2212                 }
2213                 return 1;
2214         }
2215         *pdata = data;
2216         return 0;
2217 }
2218
2219 static int get_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2220 {
2221         u64 data = 0;
2222         struct kvm *kvm = vcpu->kvm;
2223
2224         switch (msr) {
2225         case HV_X64_MSR_GUEST_OS_ID:
2226                 data = kvm->arch.hv_guest_os_id;
2227                 break;
2228         case HV_X64_MSR_HYPERCALL:
2229                 data = kvm->arch.hv_hypercall;
2230                 break;
2231         default:
2232                 vcpu_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
2233                 return 1;
2234         }
2235
2236         *pdata = data;
2237         return 0;
2238 }
2239
2240 static int get_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2241 {
2242         u64 data = 0;
2243
2244         switch (msr) {
2245         case HV_X64_MSR_VP_INDEX: {
2246                 int r;
2247                 struct kvm_vcpu *v;
2248                 kvm_for_each_vcpu(r, v, vcpu->kvm)
2249                         if (v == vcpu)
2250                                 data = r;
2251                 break;
2252         }
2253         case HV_X64_MSR_EOI:
2254                 return kvm_hv_vapic_msr_read(vcpu, APIC_EOI, pdata);
2255         case HV_X64_MSR_ICR:
2256                 return kvm_hv_vapic_msr_read(vcpu, APIC_ICR, pdata);
2257         case HV_X64_MSR_TPR:
2258                 return kvm_hv_vapic_msr_read(vcpu, APIC_TASKPRI, pdata);
2259         case HV_X64_MSR_APIC_ASSIST_PAGE:
2260                 data = vcpu->arch.hv_vapic;
2261                 break;
2262         default:
2263                 vcpu_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
2264                 return 1;
2265         }
2266         *pdata = data;
2267         return 0;
2268 }
2269
2270 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2271 {
2272         u64 data;
2273
2274         switch (msr) {
2275         case MSR_IA32_PLATFORM_ID:
2276         case MSR_IA32_EBL_CR_POWERON:
2277         case MSR_IA32_DEBUGCTLMSR:
2278         case MSR_IA32_LASTBRANCHFROMIP:
2279         case MSR_IA32_LASTBRANCHTOIP:
2280         case MSR_IA32_LASTINTFROMIP:
2281         case MSR_IA32_LASTINTTOIP:
2282         case MSR_K8_SYSCFG:
2283         case MSR_K7_HWCR:
2284         case MSR_VM_HSAVE_PA:
2285         case MSR_K7_EVNTSEL0:
2286         case MSR_K7_PERFCTR0:
2287         case MSR_K8_INT_PENDING_MSG:
2288         case MSR_AMD64_NB_CFG:
2289         case MSR_FAM10H_MMIO_CONF_BASE:
2290         case MSR_AMD64_BU_CFG2:
2291                 data = 0;
2292                 break;
2293         case MSR_P6_PERFCTR0:
2294         case MSR_P6_PERFCTR1:
2295         case MSR_P6_EVNTSEL0:
2296         case MSR_P6_EVNTSEL1:
2297                 if (kvm_pmu_msr(vcpu, msr))
2298                         return kvm_pmu_get_msr(vcpu, msr, pdata);
2299                 data = 0;
2300                 break;
2301         case MSR_IA32_UCODE_REV:
2302                 data = 0x100000000ULL;
2303                 break;
2304         case MSR_MTRRcap:
2305                 data = 0x500 | KVM_NR_VAR_MTRR;
2306                 break;
2307         case 0x200 ... 0x2ff:
2308                 return get_msr_mtrr(vcpu, msr, pdata);
2309         case 0xcd: /* fsb frequency */
2310                 data = 3;
2311                 break;
2312                 /*
2313                  * MSR_EBC_FREQUENCY_ID
2314                  * Conservative value valid for even the basic CPU models.
2315                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
2316                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
2317                  * and 266MHz for model 3, or 4. Set Core Clock
2318                  * Frequency to System Bus Frequency Ratio to 1 (bits
2319                  * 31:24) even though these are only valid for CPU
2320                  * models > 2, however guests may end up dividing or
2321                  * multiplying by zero otherwise.
2322                  */
2323         case MSR_EBC_FREQUENCY_ID:
2324                 data = 1 << 24;
2325                 break;
2326         case MSR_IA32_APICBASE:
2327                 data = kvm_get_apic_base(vcpu);
2328                 break;
2329         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2330                 return kvm_x2apic_msr_read(vcpu, msr, pdata);
2331                 break;
2332         case MSR_IA32_TSCDEADLINE:
2333                 data = kvm_get_lapic_tscdeadline_msr(vcpu);
2334                 break;
2335         case MSR_IA32_TSC_ADJUST:
2336                 data = (u64)vcpu->arch.ia32_tsc_adjust_msr;
2337                 break;
2338         case MSR_IA32_MISC_ENABLE:
2339                 data = vcpu->arch.ia32_misc_enable_msr;
2340                 break;
2341         case MSR_IA32_PERF_STATUS:
2342                 /* TSC increment by tick */
2343                 data = 1000ULL;
2344                 /* CPU multiplier */
2345                 data |= (((uint64_t)4ULL) << 40);
2346                 break;
2347         case MSR_EFER:
2348                 data = vcpu->arch.efer;
2349                 break;
2350         case MSR_KVM_WALL_CLOCK:
2351         case MSR_KVM_WALL_CLOCK_NEW:
2352                 data = vcpu->kvm->arch.wall_clock;
2353                 break;
2354         case MSR_KVM_SYSTEM_TIME:
2355         case MSR_KVM_SYSTEM_TIME_NEW:
2356                 data = vcpu->arch.time;
2357                 break;
2358         case MSR_KVM_ASYNC_PF_EN:
2359                 data = vcpu->arch.apf.msr_val;
2360                 break;
2361         case MSR_KVM_STEAL_TIME:
2362                 data = vcpu->arch.st.msr_val;
2363                 break;
2364         case MSR_KVM_PV_EOI_EN:
2365                 data = vcpu->arch.pv_eoi.msr_val;
2366                 break;
2367         case MSR_IA32_P5_MC_ADDR:
2368         case MSR_IA32_P5_MC_TYPE:
2369         case MSR_IA32_MCG_CAP:
2370         case MSR_IA32_MCG_CTL:
2371         case MSR_IA32_MCG_STATUS:
2372         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
2373                 return get_msr_mce(vcpu, msr, pdata);
2374         case MSR_K7_CLK_CTL:
2375                 /*
2376                  * Provide expected ramp-up count for K7. All other
2377                  * are set to zero, indicating minimum divisors for
2378                  * every field.
2379                  *
2380                  * This prevents guest kernels on AMD host with CPU
2381                  * type 6, model 8 and higher from exploding due to
2382                  * the rdmsr failing.
2383                  */
2384                 data = 0x20000000;
2385                 break;
2386         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2387                 if (kvm_hv_msr_partition_wide(msr)) {
2388                         int r;
2389                         mutex_lock(&vcpu->kvm->lock);
2390                         r = get_msr_hyperv_pw(vcpu, msr, pdata);
2391                         mutex_unlock(&vcpu->kvm->lock);
2392                         return r;
2393                 } else
2394                         return get_msr_hyperv(vcpu, msr, pdata);
2395                 break;
2396         case MSR_IA32_BBL_CR_CTL3:
2397                 /* This legacy MSR exists but isn't fully documented in current
2398                  * silicon.  It is however accessed by winxp in very narrow
2399                  * scenarios where it sets bit #19, itself documented as
2400                  * a "reserved" bit.  Best effort attempt to source coherent
2401                  * read data here should the balance of the register be
2402                  * interpreted by the guest:
2403                  *
2404                  * L2 cache control register 3: 64GB range, 256KB size,
2405                  * enabled, latency 0x1, configured
2406                  */
2407                 data = 0xbe702111;
2408                 break;
2409         case MSR_AMD64_OSVW_ID_LENGTH:
2410                 if (!guest_cpuid_has_osvw(vcpu))
2411                         return 1;
2412                 data = vcpu->arch.osvw.length;
2413                 break;
2414         case MSR_AMD64_OSVW_STATUS:
2415                 if (!guest_cpuid_has_osvw(vcpu))
2416                         return 1;
2417                 data = vcpu->arch.osvw.status;
2418                 break;
2419         default:
2420                 if (kvm_pmu_msr(vcpu, msr))
2421                         return kvm_pmu_get_msr(vcpu, msr, pdata);
2422                 if (!ignore_msrs) {
2423                         vcpu_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
2424                         return 1;
2425                 } else {
2426                         vcpu_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr);
2427                         data = 0;
2428                 }
2429                 break;
2430         }
2431         *pdata = data;
2432         return 0;
2433 }
2434 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
2435
2436 /*
2437  * Read or write a bunch of msrs. All parameters are kernel addresses.
2438  *
2439  * @return number of msrs set successfully.
2440  */
2441 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
2442                     struct kvm_msr_entry *entries,
2443                     int (*do_msr)(struct kvm_vcpu *vcpu,
2444                                   unsigned index, u64 *data))
2445 {
2446         int i, idx;
2447
2448         idx = srcu_read_lock(&vcpu->kvm->srcu);
2449         for (i = 0; i < msrs->nmsrs; ++i)
2450                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
2451                         break;
2452         srcu_read_unlock(&vcpu->kvm->srcu, idx);
2453
2454         return i;
2455 }
2456
2457 /*
2458  * Read or write a bunch of msrs. Parameters are user addresses.
2459  *
2460  * @return number of msrs set successfully.
2461  */
2462 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
2463                   int (*do_msr)(struct kvm_vcpu *vcpu,
2464                                 unsigned index, u64 *data),
2465                   int writeback)
2466 {
2467         struct kvm_msrs msrs;
2468         struct kvm_msr_entry *entries;
2469         int r, n;
2470         unsigned size;
2471
2472         r = -EFAULT;
2473         if (copy_from_user(&msrs, user_msrs, sizeof msrs))
2474                 goto out;
2475
2476         r = -E2BIG;
2477         if (msrs.nmsrs >= MAX_IO_MSRS)
2478                 goto out;
2479
2480         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
2481         entries = memdup_user(user_msrs->entries, size);
2482         if (IS_ERR(entries)) {
2483                 r = PTR_ERR(entries);
2484                 goto out;
2485         }
2486
2487         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
2488         if (r < 0)
2489                 goto out_free;
2490
2491         r = -EFAULT;
2492         if (writeback && copy_to_user(user_msrs->entries, entries, size))
2493                 goto out_free;
2494
2495         r = n;
2496
2497 out_free:
2498         kfree(entries);
2499 out:
2500         return r;
2501 }
2502
2503 int kvm_dev_ioctl_check_extension(long ext)
2504 {
2505         int r;
2506
2507         switch (ext) {
2508         case KVM_CAP_IRQCHIP:
2509         case KVM_CAP_HLT:
2510         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
2511         case KVM_CAP_SET_TSS_ADDR:
2512         case KVM_CAP_EXT_CPUID:
2513         case KVM_CAP_EXT_EMUL_CPUID:
2514         case KVM_CAP_CLOCKSOURCE:
2515         case KVM_CAP_PIT:
2516         case KVM_CAP_NOP_IO_DELAY:
2517         case KVM_CAP_MP_STATE:
2518         case KVM_CAP_SYNC_MMU:
2519         case KVM_CAP_USER_NMI:
2520         case KVM_CAP_REINJECT_CONTROL:
2521         case KVM_CAP_IRQ_INJECT_STATUS:
2522         case KVM_CAP_IRQFD:
2523         case KVM_CAP_IOEVENTFD:
2524         case KVM_CAP_PIT2:
2525         case KVM_CAP_PIT_STATE2:
2526         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
2527         case KVM_CAP_XEN_HVM:
2528         case KVM_CAP_ADJUST_CLOCK:
2529         case KVM_CAP_VCPU_EVENTS:
2530         case KVM_CAP_HYPERV:
2531         case KVM_CAP_HYPERV_VAPIC:
2532         case KVM_CAP_HYPERV_SPIN:
2533         case KVM_CAP_PCI_SEGMENT:
2534         case KVM_CAP_DEBUGREGS:
2535         case KVM_CAP_X86_ROBUST_SINGLESTEP:
2536         case KVM_CAP_XSAVE:
2537         case KVM_CAP_ASYNC_PF:
2538         case KVM_CAP_GET_TSC_KHZ:
2539         case KVM_CAP_KVMCLOCK_CTRL:
2540         case KVM_CAP_READONLY_MEM:
2541 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2542         case KVM_CAP_ASSIGN_DEV_IRQ:
2543         case KVM_CAP_PCI_2_3:
2544 #endif
2545                 r = 1;
2546                 break;
2547         case KVM_CAP_COALESCED_MMIO:
2548                 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
2549                 break;
2550         case KVM_CAP_VAPIC:
2551                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
2552                 break;
2553         case KVM_CAP_NR_VCPUS:
2554                 r = KVM_SOFT_MAX_VCPUS;
2555                 break;
2556         case KVM_CAP_MAX_VCPUS:
2557                 r = KVM_MAX_VCPUS;
2558                 break;
2559         case KVM_CAP_NR_MEMSLOTS:
2560                 r = KVM_USER_MEM_SLOTS;
2561                 break;
2562         case KVM_CAP_PV_MMU:    /* obsolete */
2563                 r = 0;
2564                 break;
2565 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2566         case KVM_CAP_IOMMU:
2567                 r = iommu_present(&pci_bus_type);
2568                 break;
2569 #endif
2570         case KVM_CAP_MCE:
2571                 r = KVM_MAX_MCE_BANKS;
2572                 break;
2573         case KVM_CAP_XCRS:
2574                 r = cpu_has_xsave;
2575                 break;
2576         case KVM_CAP_TSC_CONTROL:
2577                 r = kvm_has_tsc_control;
2578                 break;
2579         case KVM_CAP_TSC_DEADLINE_TIMER:
2580                 r = boot_cpu_has(X86_FEATURE_TSC_DEADLINE_TIMER);
2581                 break;
2582         default:
2583                 r = 0;
2584                 break;
2585         }
2586         return r;
2587
2588 }
2589
2590 long kvm_arch_dev_ioctl(struct file *filp,
2591                         unsigned int ioctl, unsigned long arg)
2592 {
2593         void __user *argp = (void __user *)arg;
2594         long r;
2595
2596         switch (ioctl) {
2597         case KVM_GET_MSR_INDEX_LIST: {
2598                 struct kvm_msr_list __user *user_msr_list = argp;
2599                 struct kvm_msr_list msr_list;
2600                 unsigned n;
2601
2602                 r = -EFAULT;
2603                 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
2604                         goto out;
2605                 n = msr_list.nmsrs;
2606                 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
2607                 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
2608                         goto out;
2609                 r = -E2BIG;
2610                 if (n < msr_list.nmsrs)
2611                         goto out;
2612                 r = -EFAULT;
2613                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
2614                                  num_msrs_to_save * sizeof(u32)))
2615                         goto out;
2616                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
2617                                  &emulated_msrs,
2618                                  ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
2619                         goto out;
2620                 r = 0;
2621                 break;
2622         }
2623         case KVM_GET_SUPPORTED_CPUID:
2624         case KVM_GET_EMULATED_CPUID: {
2625                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2626                 struct kvm_cpuid2 cpuid;
2627
2628                 r = -EFAULT;
2629                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2630                         goto out;
2631
2632                 r = kvm_dev_ioctl_get_cpuid(&cpuid, cpuid_arg->entries,
2633                                             ioctl);
2634                 if (r)
2635                         goto out;
2636
2637                 r = -EFAULT;
2638                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2639                         goto out;
2640                 r = 0;
2641                 break;
2642         }
2643         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
2644                 u64 mce_cap;
2645
2646                 mce_cap = KVM_MCE_CAP_SUPPORTED;
2647                 r = -EFAULT;
2648                 if (copy_to_user(argp, &mce_cap, sizeof mce_cap))
2649                         goto out;
2650                 r = 0;
2651                 break;
2652         }
2653         default:
2654                 r = -EINVAL;
2655         }
2656 out:
2657         return r;
2658 }
2659
2660 static void wbinvd_ipi(void *garbage)
2661 {
2662         wbinvd();
2663 }
2664
2665 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
2666 {
2667         return vcpu->kvm->arch.iommu_domain &&
2668                 !(vcpu->kvm->arch.iommu_flags & KVM_IOMMU_CACHE_COHERENCY);
2669 }
2670
2671 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
2672 {
2673         /* Address WBINVD may be executed by guest */
2674         if (need_emulate_wbinvd(vcpu)) {
2675                 if (kvm_x86_ops->has_wbinvd_exit())
2676                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
2677                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
2678                         smp_call_function_single(vcpu->cpu,
2679                                         wbinvd_ipi, NULL, 1);
2680         }
2681
2682         kvm_x86_ops->vcpu_load(vcpu, cpu);
2683
2684         /* Apply any externally detected TSC adjustments (due to suspend) */
2685         if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
2686                 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
2687                 vcpu->arch.tsc_offset_adjustment = 0;
2688                 set_bit(KVM_REQ_CLOCK_UPDATE, &vcpu->requests);
2689         }
2690
2691         if (unlikely(vcpu->cpu != cpu) || check_tsc_unstable()) {
2692                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
2693                                 native_read_tsc() - vcpu->arch.last_host_tsc;
2694                 if (tsc_delta < 0)
2695                         mark_tsc_unstable("KVM discovered backwards TSC");
2696                 if (check_tsc_unstable()) {
2697                         u64 offset = kvm_x86_ops->compute_tsc_offset(vcpu,
2698                                                 vcpu->arch.last_guest_tsc);
2699                         kvm_x86_ops->write_tsc_offset(vcpu, offset);
2700                         vcpu->arch.tsc_catchup = 1;
2701                 }
2702                 /*
2703                  * On a host with synchronized TSC, there is no need to update
2704                  * kvmclock on vcpu->cpu migration
2705                  */
2706                 if (!vcpu->kvm->arch.use_master_clock || vcpu->cpu == -1)
2707                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2708                 if (vcpu->cpu != cpu)
2709                         kvm_migrate_timers(vcpu);
2710                 vcpu->cpu = cpu;
2711         }
2712
2713         accumulate_steal_time(vcpu);
2714         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2715 }
2716
2717 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
2718 {
2719         kvm_x86_ops->vcpu_put(vcpu);
2720         kvm_put_guest_fpu(vcpu);
2721         vcpu->arch.last_host_tsc = native_read_tsc();
2722 }
2723
2724 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
2725                                     struct kvm_lapic_state *s)
2726 {
2727         kvm_x86_ops->sync_pir_to_irr(vcpu);
2728         memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
2729
2730         return 0;
2731 }
2732
2733 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
2734                                     struct kvm_lapic_state *s)
2735 {
2736         kvm_apic_post_state_restore(vcpu, s);
2737         update_cr8_intercept(vcpu);
2738
2739         return 0;
2740 }
2741
2742 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
2743                                     struct kvm_interrupt *irq)
2744 {
2745         if (irq->irq >= KVM_NR_INTERRUPTS)
2746                 return -EINVAL;
2747         if (irqchip_in_kernel(vcpu->kvm))
2748                 return -ENXIO;
2749
2750         kvm_queue_interrupt(vcpu, irq->irq, false);
2751         kvm_make_request(KVM_REQ_EVENT, vcpu);
2752
2753         return 0;
2754 }
2755
2756 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
2757 {
2758         kvm_inject_nmi(vcpu);
2759
2760         return 0;
2761 }
2762
2763 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
2764                                            struct kvm_tpr_access_ctl *tac)
2765 {
2766         if (tac->flags)
2767                 return -EINVAL;
2768         vcpu->arch.tpr_access_reporting = !!tac->enabled;
2769         return 0;
2770 }
2771
2772 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
2773                                         u64 mcg_cap)
2774 {
2775         int r;
2776         unsigned bank_num = mcg_cap & 0xff, bank;
2777
2778         r = -EINVAL;
2779         if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
2780                 goto out;
2781         if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000))
2782                 goto out;
2783         r = 0;
2784         vcpu->arch.mcg_cap = mcg_cap;
2785         /* Init IA32_MCG_CTL to all 1s */
2786         if (mcg_cap & MCG_CTL_P)
2787                 vcpu->arch.mcg_ctl = ~(u64)0;
2788         /* Init IA32_MCi_CTL to all 1s */
2789         for (bank = 0; bank < bank_num; bank++)
2790                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
2791 out:
2792         return r;
2793 }
2794
2795 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
2796                                       struct kvm_x86_mce *mce)
2797 {
2798         u64 mcg_cap = vcpu->arch.mcg_cap;
2799         unsigned bank_num = mcg_cap & 0xff;
2800         u64 *banks = vcpu->arch.mce_banks;
2801
2802         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
2803                 return -EINVAL;
2804         /*
2805          * if IA32_MCG_CTL is not all 1s, the uncorrected error
2806          * reporting is disabled
2807          */
2808         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
2809             vcpu->arch.mcg_ctl != ~(u64)0)
2810                 return 0;
2811         banks += 4 * mce->bank;
2812         /*
2813          * if IA32_MCi_CTL is not all 1s, the uncorrected error
2814          * reporting is disabled for the bank
2815          */
2816         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
2817                 return 0;
2818         if (mce->status & MCI_STATUS_UC) {
2819                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
2820                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
2821                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
2822                         return 0;
2823                 }
2824                 if (banks[1] & MCI_STATUS_VAL)
2825                         mce->status |= MCI_STATUS_OVER;
2826                 banks[2] = mce->addr;
2827                 banks[3] = mce->misc;
2828                 vcpu->arch.mcg_status = mce->mcg_status;
2829                 banks[1] = mce->status;
2830                 kvm_queue_exception(vcpu, MC_VECTOR);
2831         } else if (!(banks[1] & MCI_STATUS_VAL)
2832                    || !(banks[1] & MCI_STATUS_UC)) {
2833                 if (banks[1] & MCI_STATUS_VAL)
2834                         mce->status |= MCI_STATUS_OVER;
2835                 banks[2] = mce->addr;
2836                 banks[3] = mce->misc;
2837                 banks[1] = mce->status;
2838         } else
2839                 banks[1] |= MCI_STATUS_OVER;
2840         return 0;
2841 }
2842
2843 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
2844                                                struct kvm_vcpu_events *events)
2845 {
2846         process_nmi(vcpu);
2847         events->exception.injected =
2848                 vcpu->arch.exception.pending &&
2849                 !kvm_exception_is_soft(vcpu->arch.exception.nr);
2850         events->exception.nr = vcpu->arch.exception.nr;
2851         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
2852         events->exception.pad = 0;
2853         events->exception.error_code = vcpu->arch.exception.error_code;
2854
2855         events->interrupt.injected =
2856                 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
2857         events->interrupt.nr = vcpu->arch.interrupt.nr;
2858         events->interrupt.soft = 0;
2859         events->interrupt.shadow =
2860                 kvm_x86_ops->get_interrupt_shadow(vcpu,
2861                         KVM_X86_SHADOW_INT_MOV_SS | KVM_X86_SHADOW_INT_STI);
2862
2863         events->nmi.injected = vcpu->arch.nmi_injected;
2864         events->nmi.pending = vcpu->arch.nmi_pending != 0;
2865         events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
2866         events->nmi.pad = 0;
2867
2868         events->sipi_vector = 0; /* never valid when reporting to user space */
2869
2870         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
2871                          | KVM_VCPUEVENT_VALID_SHADOW);
2872         memset(&events->reserved, 0, sizeof(events->reserved));
2873 }
2874
2875 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
2876                                               struct kvm_vcpu_events *events)
2877 {
2878         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2879                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2880                               | KVM_VCPUEVENT_VALID_SHADOW))
2881                 return -EINVAL;
2882
2883         process_nmi(vcpu);
2884         vcpu->arch.exception.pending = events->exception.injected;
2885         vcpu->arch.exception.nr = events->exception.nr;
2886         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
2887         vcpu->arch.exception.error_code = events->exception.error_code;
2888
2889         vcpu->arch.interrupt.pending = events->interrupt.injected;
2890         vcpu->arch.interrupt.nr = events->interrupt.nr;
2891         vcpu->arch.interrupt.soft = events->interrupt.soft;
2892         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
2893                 kvm_x86_ops->set_interrupt_shadow(vcpu,
2894                                                   events->interrupt.shadow);
2895
2896         vcpu->arch.nmi_injected = events->nmi.injected;
2897         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
2898                 vcpu->arch.nmi_pending = events->nmi.pending;
2899         kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
2900
2901         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR &&
2902             kvm_vcpu_has_lapic(vcpu))
2903                 vcpu->arch.apic->sipi_vector = events->sipi_vector;
2904
2905         kvm_make_request(KVM_REQ_EVENT, vcpu);
2906
2907         return 0;
2908 }
2909
2910 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
2911                                              struct kvm_debugregs *dbgregs)
2912 {
2913         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
2914         dbgregs->dr6 = vcpu->arch.dr6;
2915         dbgregs->dr7 = vcpu->arch.dr7;
2916         dbgregs->flags = 0;
2917         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
2918 }
2919
2920 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
2921                                             struct kvm_debugregs *dbgregs)
2922 {
2923         if (dbgregs->flags)
2924                 return -EINVAL;
2925
2926         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
2927         vcpu->arch.dr6 = dbgregs->dr6;
2928         vcpu->arch.dr7 = dbgregs->dr7;
2929
2930         return 0;
2931 }
2932
2933 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
2934                                          struct kvm_xsave *guest_xsave)
2935 {
2936         if (cpu_has_xsave)
2937                 memcpy(guest_xsave->region,
2938                         &vcpu->arch.guest_fpu.state->xsave,
2939                         xstate_size);
2940         else {
2941                 memcpy(guest_xsave->region,
2942                         &vcpu->arch.guest_fpu.state->fxsave,
2943                         sizeof(struct i387_fxsave_struct));
2944                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
2945                         XSTATE_FPSSE;
2946         }
2947 }
2948
2949 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
2950                                         struct kvm_xsave *guest_xsave)
2951 {
2952         u64 xstate_bv =
2953                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
2954
2955         if (cpu_has_xsave)
2956                 memcpy(&vcpu->arch.guest_fpu.state->xsave,
2957                         guest_xsave->region, xstate_size);
2958         else {
2959                 if (xstate_bv & ~XSTATE_FPSSE)
2960                         return -EINVAL;
2961                 memcpy(&vcpu->arch.guest_fpu.state->fxsave,
2962                         guest_xsave->region, sizeof(struct i387_fxsave_struct));
2963         }
2964         return 0;
2965 }
2966
2967 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
2968                                         struct kvm_xcrs *guest_xcrs)
2969 {
2970         if (!cpu_has_xsave) {
2971                 guest_xcrs->nr_xcrs = 0;
2972                 return;
2973         }
2974
2975         guest_xcrs->nr_xcrs = 1;
2976         guest_xcrs->flags = 0;
2977         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
2978         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
2979 }
2980
2981 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
2982                                        struct kvm_xcrs *guest_xcrs)
2983 {
2984         int i, r = 0;
2985
2986         if (!cpu_has_xsave)
2987                 return -EINVAL;
2988
2989         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
2990                 return -EINVAL;
2991
2992         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
2993                 /* Only support XCR0 currently */
2994                 if (guest_xcrs->xcrs[0].xcr == XCR_XFEATURE_ENABLED_MASK) {
2995                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
2996                                 guest_xcrs->xcrs[0].value);
2997                         break;
2998                 }
2999         if (r)
3000                 r = -EINVAL;
3001         return r;
3002 }
3003
3004 /*
3005  * kvm_set_guest_paused() indicates to the guest kernel that it has been
3006  * stopped by the hypervisor.  This function will be called from the host only.
3007  * EINVAL is returned when the host attempts to set the flag for a guest that
3008  * does not support pv clocks.
3009  */
3010 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
3011 {
3012         if (!vcpu->arch.pv_time_enabled)
3013                 return -EINVAL;
3014         vcpu->arch.pvclock_set_guest_stopped_request = true;
3015         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3016         return 0;
3017 }
3018
3019 long kvm_arch_vcpu_ioctl(struct file *filp,
3020                          unsigned int ioctl, unsigned long arg)
3021 {
3022         struct kvm_vcpu *vcpu = filp->private_data;
3023         void __user *argp = (void __user *)arg;
3024         int r;
3025         union {
3026                 struct kvm_lapic_state *lapic;
3027                 struct kvm_xsave *xsave;
3028                 struct kvm_xcrs *xcrs;
3029                 void *buffer;
3030         } u;
3031
3032         u.buffer = NULL;
3033         switch (ioctl) {
3034         case KVM_GET_LAPIC: {
3035                 r = -EINVAL;
3036                 if (!vcpu->arch.apic)
3037                         goto out;
3038                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
3039
3040                 r = -ENOMEM;
3041                 if (!u.lapic)
3042                         goto out;
3043                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
3044                 if (r)
3045                         goto out;
3046                 r = -EFAULT;
3047                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
3048                         goto out;
3049                 r = 0;
3050                 break;
3051         }
3052         case KVM_SET_LAPIC: {
3053                 r = -EINVAL;
3054                 if (!vcpu->arch.apic)
3055                         goto out;
3056                 u.lapic = memdup_user(argp, sizeof(*u.lapic));
3057                 if (IS_ERR(u.lapic))
3058                         return PTR_ERR(u.lapic);
3059
3060                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
3061                 break;
3062         }
3063         case KVM_INTERRUPT: {
3064                 struct kvm_interrupt irq;
3065
3066                 r = -EFAULT;
3067                 if (copy_from_user(&irq, argp, sizeof irq))
3068                         goto out;
3069                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
3070                 break;
3071         }
3072         case KVM_NMI: {
3073                 r = kvm_vcpu_ioctl_nmi(vcpu);
3074                 break;
3075         }
3076         case KVM_SET_CPUID: {
3077                 struct kvm_cpuid __user *cpuid_arg = argp;
3078                 struct kvm_cpuid cpuid;
3079
3080                 r = -EFAULT;
3081                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3082                         goto out;
3083                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
3084                 break;
3085         }
3086         case KVM_SET_CPUID2: {
3087                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3088                 struct kvm_cpuid2 cpuid;
3089
3090                 r = -EFAULT;
3091                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3092                         goto out;
3093                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
3094                                               cpuid_arg->entries);
3095                 break;
3096         }
3097         case KVM_GET_CPUID2: {
3098                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3099                 struct kvm_cpuid2 cpuid;
3100
3101                 r = -EFAULT;
3102                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3103                         goto out;
3104                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
3105                                               cpuid_arg->entries);
3106                 if (r)
3107                         goto out;
3108                 r = -EFAULT;
3109                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
3110                         goto out;
3111                 r = 0;
3112                 break;
3113         }
3114         case KVM_GET_MSRS:
3115                 r = msr_io(vcpu, argp, kvm_get_msr, 1);
3116                 break;
3117         case KVM_SET_MSRS:
3118                 r = msr_io(vcpu, argp, do_set_msr, 0);
3119                 break;
3120         case KVM_TPR_ACCESS_REPORTING: {
3121                 struct kvm_tpr_access_ctl tac;
3122
3123                 r = -EFAULT;
3124                 if (copy_from_user(&tac, argp, sizeof tac))
3125                         goto out;
3126                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
3127                 if (r)
3128                         goto out;
3129                 r = -EFAULT;
3130                 if (copy_to_user(argp, &tac, sizeof tac))
3131                         goto out;
3132                 r = 0;
3133                 break;
3134         };
3135         case KVM_SET_VAPIC_ADDR: {
3136                 struct kvm_vapic_addr va;
3137
3138                 r = -EINVAL;
3139                 if (!irqchip_in_kernel(vcpu->kvm))
3140                         goto out;
3141                 r = -EFAULT;
3142                 if (copy_from_user(&va, argp, sizeof va))
3143                         goto out;
3144                 r = 0;
3145                 kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
3146                 break;
3147         }
3148         case KVM_X86_SETUP_MCE: {
3149                 u64 mcg_cap;
3150
3151                 r = -EFAULT;
3152                 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
3153                         goto out;
3154                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
3155                 break;
3156         }
3157         case KVM_X86_SET_MCE: {
3158                 struct kvm_x86_mce mce;
3159
3160                 r = -EFAULT;
3161                 if (copy_from_user(&mce, argp, sizeof mce))
3162                         goto out;
3163                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
3164                 break;
3165         }
3166         case KVM_GET_VCPU_EVENTS: {
3167                 struct kvm_vcpu_events events;
3168
3169                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
3170
3171                 r = -EFAULT;
3172                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
3173                         break;
3174                 r = 0;
3175                 break;
3176         }
3177         case KVM_SET_VCPU_EVENTS: {
3178                 struct kvm_vcpu_events events;
3179
3180                 r = -EFAULT;
3181                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
3182                         break;
3183
3184                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
3185                 break;
3186         }
3187         case KVM_GET_DEBUGREGS: {
3188                 struct kvm_debugregs dbgregs;
3189
3190                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
3191
3192                 r = -EFAULT;
3193                 if (copy_to_user(argp, &dbgregs,
3194                                  sizeof(struct kvm_debugregs)))
3195                         break;
3196                 r = 0;
3197                 break;
3198         }
3199         case KVM_SET_DEBUGREGS: {
3200                 struct kvm_debugregs dbgregs;
3201
3202                 r = -EFAULT;
3203                 if (copy_from_user(&dbgregs, argp,
3204                                    sizeof(struct kvm_debugregs)))
3205                         break;
3206
3207                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
3208                 break;
3209         }
3210         case KVM_GET_XSAVE: {
3211                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
3212                 r = -ENOMEM;
3213                 if (!u.xsave)
3214                         break;
3215
3216                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
3217
3218                 r = -EFAULT;
3219                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
3220                         break;
3221                 r = 0;
3222                 break;
3223         }
3224         case KVM_SET_XSAVE: {
3225                 u.xsave = memdup_user(argp, sizeof(*u.xsave));
3226                 if (IS_ERR(u.xsave))
3227                         return PTR_ERR(u.xsave);
3228
3229                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
3230                 break;
3231         }
3232         case KVM_GET_XCRS: {
3233                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
3234                 r = -ENOMEM;
3235                 if (!u.xcrs)
3236                         break;
3237
3238                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
3239
3240                 r = -EFAULT;
3241                 if (copy_to_user(argp, u.xcrs,
3242                                  sizeof(struct kvm_xcrs)))
3243                         break;
3244                 r = 0;
3245                 break;
3246         }
3247         case KVM_SET_XCRS: {
3248                 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
3249                 if (IS_ERR(u.xcrs))
3250                         return PTR_ERR(u.xcrs);
3251
3252                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
3253                 break;
3254         }
3255         case KVM_SET_TSC_KHZ: {
3256                 u32 user_tsc_khz;
3257
3258                 r = -EINVAL;
3259                 user_tsc_khz = (u32)arg;
3260
3261                 if (user_tsc_khz >= kvm_max_guest_tsc_khz)
3262                         goto out;
3263
3264                 if (user_tsc_khz == 0)
3265                         user_tsc_khz = tsc_khz;
3266
3267                 kvm_set_tsc_khz(vcpu, user_tsc_khz);
3268
3269                 r = 0;
3270                 goto out;
3271         }
3272         case KVM_GET_TSC_KHZ: {
3273                 r = vcpu->arch.virtual_tsc_khz;
3274                 goto out;
3275         }
3276         case KVM_KVMCLOCK_CTRL: {
3277                 r = kvm_set_guest_paused(vcpu);
3278                 goto out;
3279         }
3280         default:
3281                 r = -EINVAL;
3282         }
3283 out:
3284         kfree(u.buffer);
3285         return r;
3286 }
3287
3288 int kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
3289 {
3290         return VM_FAULT_SIGBUS;
3291 }
3292
3293 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
3294 {
3295         int ret;
3296
3297         if (addr > (unsigned int)(-3 * PAGE_SIZE))
3298                 return -EINVAL;
3299         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
3300         return ret;
3301 }
3302
3303 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
3304                                               u64 ident_addr)
3305 {
3306         kvm->arch.ept_identity_map_addr = ident_addr;
3307         return 0;
3308 }
3309
3310 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
3311                                           u32 kvm_nr_mmu_pages)
3312 {
3313         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
3314                 return -EINVAL;
3315
3316         mutex_lock(&kvm->slots_lock);
3317
3318         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
3319         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
3320
3321         mutex_unlock(&kvm->slots_lock);
3322         return 0;
3323 }
3324
3325 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
3326 {
3327         return kvm->arch.n_max_mmu_pages;
3328 }
3329
3330 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3331 {
3332         int r;
3333
3334         r = 0;
3335         switch (chip->chip_id) {
3336         case KVM_IRQCHIP_PIC_MASTER:
3337                 memcpy(&chip->chip.pic,
3338                         &pic_irqchip(kvm)->pics[0],
3339                         sizeof(struct kvm_pic_state));
3340                 break;
3341         case KVM_IRQCHIP_PIC_SLAVE:
3342                 memcpy(&chip->chip.pic,
3343                         &pic_irqchip(kvm)->pics[1],
3344                         sizeof(struct kvm_pic_state));
3345                 break;
3346         case KVM_IRQCHIP_IOAPIC:
3347                 r = kvm_get_ioapic(kvm, &chip->chip.ioapic);
3348                 break;
3349         default:
3350                 r = -EINVAL;
3351                 break;
3352         }
3353         return r;
3354 }
3355
3356 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3357 {
3358         int r;
3359
3360         r = 0;
3361         switch (chip->chip_id) {
3362         case KVM_IRQCHIP_PIC_MASTER:
3363                 spin_lock(&pic_irqchip(kvm)->lock);
3364                 memcpy(&pic_irqchip(kvm)->pics[0],
3365                         &chip->chip.pic,
3366                         sizeof(struct kvm_pic_state));
3367                 spin_unlock(&pic_irqchip(kvm)->lock);
3368                 break;
3369         case KVM_IRQCHIP_PIC_SLAVE:
3370                 spin_lock(&pic_irqchip(kvm)->lock);
3371                 memcpy(&pic_irqchip(kvm)->pics[1],
3372                         &chip->chip.pic,
3373                         sizeof(struct kvm_pic_state));
3374                 spin_unlock(&pic_irqchip(kvm)->lock);
3375                 break;
3376         case KVM_IRQCHIP_IOAPIC:
3377                 r = kvm_set_ioapic(kvm, &chip->chip.ioapic);
3378                 break;
3379         default:
3380                 r = -EINVAL;
3381                 break;
3382         }
3383         kvm_pic_update_irq(pic_irqchip(kvm));
3384         return r;
3385 }
3386
3387 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3388 {
3389         int r = 0;
3390
3391         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3392         memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
3393         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3394         return r;
3395 }
3396
3397 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3398 {
3399         int r = 0;
3400
3401         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3402         memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
3403         kvm_pit_load_count(kvm, 0, ps->channels[0].count, 0);
3404         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3405         return r;
3406 }
3407
3408 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3409 {
3410         int r = 0;
3411
3412         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3413         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
3414                 sizeof(ps->channels));
3415         ps->flags = kvm->arch.vpit->pit_state.flags;
3416         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3417         memset(&ps->reserved, 0, sizeof(ps->reserved));
3418         return r;
3419 }
3420
3421 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3422 {
3423         int r = 0, start = 0;
3424         u32 prev_legacy, cur_legacy;
3425         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3426         prev_legacy = kvm->arch.vpit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
3427         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
3428         if (!prev_legacy && cur_legacy)
3429                 start = 1;
3430         memcpy(&kvm->arch.vpit->pit_state.channels, &ps->channels,
3431                sizeof(kvm->arch.vpit->pit_state.channels));
3432         kvm->arch.vpit->pit_state.flags = ps->flags;
3433         kvm_pit_load_count(kvm, 0, kvm->arch.vpit->pit_state.channels[0].count, start);
3434         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3435         return r;
3436 }
3437
3438 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
3439                                  struct kvm_reinject_control *control)
3440 {
3441         if (!kvm->arch.vpit)
3442                 return -ENXIO;
3443         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3444         kvm->arch.vpit->pit_state.reinject = control->pit_reinject;
3445         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3446         return 0;
3447 }
3448
3449 /**
3450  * kvm_vm_ioctl_get_dirty_log - get and clear the log of dirty pages in a slot
3451  * @kvm: kvm instance
3452  * @log: slot id and address to which we copy the log
3453  *
3454  * We need to keep it in mind that VCPU threads can write to the bitmap
3455  * concurrently.  So, to avoid losing data, we keep the following order for
3456  * each bit:
3457  *
3458  *   1. Take a snapshot of the bit and clear it if needed.
3459  *   2. Write protect the corresponding page.
3460  *   3. Flush TLB's if needed.
3461  *   4. Copy the snapshot to the userspace.
3462  *
3463  * Between 2 and 3, the guest may write to the page using the remaining TLB
3464  * entry.  This is not a problem because the page will be reported dirty at
3465  * step 4 using the snapshot taken before and step 3 ensures that successive
3466  * writes will be logged for the next call.
3467  */
3468 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
3469 {
3470         int r;
3471         struct kvm_memory_slot *memslot;
3472         unsigned long n, i;
3473         unsigned long *dirty_bitmap;
3474         unsigned long *dirty_bitmap_buffer;
3475         bool is_dirty = false;
3476
3477         mutex_lock(&kvm->slots_lock);
3478
3479         r = -EINVAL;
3480         if (log->slot >= KVM_USER_MEM_SLOTS)
3481                 goto out;
3482
3483         memslot = id_to_memslot(kvm->memslots, log->slot);
3484
3485         dirty_bitmap = memslot->dirty_bitmap;
3486         r = -ENOENT;
3487         if (!dirty_bitmap)
3488                 goto out;
3489
3490         n = kvm_dirty_bitmap_bytes(memslot);
3491
3492         dirty_bitmap_buffer = dirty_bitmap + n / sizeof(long);
3493         memset(dirty_bitmap_buffer, 0, n);
3494
3495         spin_lock(&kvm->mmu_lock);
3496
3497         for (i = 0; i < n / sizeof(long); i++) {
3498                 unsigned long mask;
3499                 gfn_t offset;
3500
3501                 if (!dirty_bitmap[i])
3502                         continue;
3503
3504                 is_dirty = true;
3505
3506                 mask = xchg(&dirty_bitmap[i], 0);
3507                 dirty_bitmap_buffer[i] = mask;
3508
3509                 offset = i * BITS_PER_LONG;
3510                 kvm_mmu_write_protect_pt_masked(kvm, memslot, offset, mask);
3511         }
3512         if (is_dirty)
3513                 kvm_flush_remote_tlbs(kvm);
3514
3515         spin_unlock(&kvm->mmu_lock);
3516
3517         r = -EFAULT;
3518         if (copy_to_user(log->dirty_bitmap, dirty_bitmap_buffer, n))
3519                 goto out;
3520
3521         r = 0;
3522 out:
3523         mutex_unlock(&kvm->slots_lock);
3524         return r;
3525 }
3526
3527 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
3528                         bool line_status)
3529 {
3530         if (!irqchip_in_kernel(kvm))
3531                 return -ENXIO;
3532
3533         irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
3534                                         irq_event->irq, irq_event->level,
3535                                         line_status);
3536         return 0;
3537 }
3538
3539 long kvm_arch_vm_ioctl(struct file *filp,
3540                        unsigned int ioctl, unsigned long arg)
3541 {
3542         struct kvm *kvm = filp->private_data;
3543         void __user *argp = (void __user *)arg;
3544         int r = -ENOTTY;
3545         /*
3546          * This union makes it completely explicit to gcc-3.x
3547          * that these two variables' stack usage should be
3548          * combined, not added together.
3549          */
3550         union {
3551                 struct kvm_pit_state ps;
3552                 struct kvm_pit_state2 ps2;
3553                 struct kvm_pit_config pit_config;
3554         } u;
3555
3556         switch (ioctl) {
3557         case KVM_SET_TSS_ADDR:
3558                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
3559                 break;
3560         case KVM_SET_IDENTITY_MAP_ADDR: {
3561                 u64 ident_addr;
3562
3563                 r = -EFAULT;
3564                 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
3565                         goto out;
3566                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
3567                 break;
3568         }
3569         case KVM_SET_NR_MMU_PAGES:
3570                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
3571                 break;
3572         case KVM_GET_NR_MMU_PAGES:
3573                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
3574                 break;
3575         case KVM_CREATE_IRQCHIP: {
3576                 struct kvm_pic *vpic;
3577
3578                 mutex_lock(&kvm->lock);
3579                 r = -EEXIST;
3580                 if (kvm->arch.vpic)
3581                         goto create_irqchip_unlock;
3582                 r = -EINVAL;
3583                 if (atomic_read(&kvm->online_vcpus))
3584                         goto create_irqchip_unlock;
3585                 r = -ENOMEM;
3586                 vpic = kvm_create_pic(kvm);
3587                 if (vpic) {
3588                         r = kvm_ioapic_init(kvm);
3589                         if (r) {
3590                                 mutex_lock(&kvm->slots_lock);
3591                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3592                                                           &vpic->dev_master);
3593                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3594                                                           &vpic->dev_slave);
3595                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3596                                                           &vpic->dev_eclr);
3597                                 mutex_unlock(&kvm->slots_lock);
3598                                 kfree(vpic);
3599                                 goto create_irqchip_unlock;
3600                         }
3601                 } else
3602                         goto create_irqchip_unlock;
3603                 smp_wmb();
3604                 kvm->arch.vpic = vpic;
3605                 smp_wmb();
3606                 r = kvm_setup_default_irq_routing(kvm);
3607                 if (r) {
3608                         mutex_lock(&kvm->slots_lock);
3609                         mutex_lock(&kvm->irq_lock);
3610                         kvm_ioapic_destroy(kvm);
3611                         kvm_destroy_pic(kvm);
3612                         mutex_unlock(&kvm->irq_lock);
3613                         mutex_unlock(&kvm->slots_lock);
3614                 }
3615         create_irqchip_unlock:
3616                 mutex_unlock(&kvm->lock);
3617                 break;
3618         }
3619         case KVM_CREATE_PIT:
3620                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
3621                 goto create_pit;
3622         case KVM_CREATE_PIT2:
3623                 r = -EFAULT;
3624                 if (copy_from_user(&u.pit_config, argp,
3625                                    sizeof(struct kvm_pit_config)))
3626                         goto out;
3627         create_pit:
3628                 mutex_lock(&kvm->slots_lock);
3629                 r = -EEXIST;
3630                 if (kvm->arch.vpit)
3631                         goto create_pit_unlock;
3632                 r = -ENOMEM;
3633                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
3634                 if (kvm->arch.vpit)
3635                         r = 0;
3636         create_pit_unlock:
3637                 mutex_unlock(&kvm->slots_lock);
3638                 break;
3639         case KVM_GET_IRQCHIP: {
3640                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3641                 struct kvm_irqchip *chip;
3642
3643                 chip = memdup_user(argp, sizeof(*chip));
3644                 if (IS_ERR(chip)) {
3645                         r = PTR_ERR(chip);
3646                         goto out;
3647                 }
3648
3649                 r = -ENXIO;
3650                 if (!irqchip_in_kernel(kvm))
3651                         goto get_irqchip_out;
3652                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
3653                 if (r)
3654                         goto get_irqchip_out;
3655                 r = -EFAULT;
3656                 if (copy_to_user(argp, chip, sizeof *chip))
3657                         goto get_irqchip_out;
3658                 r = 0;
3659         get_irqchip_out:
3660                 kfree(chip);
3661                 break;
3662         }
3663         case KVM_SET_IRQCHIP: {
3664                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3665                 struct kvm_irqchip *chip;
3666
3667                 chip = memdup_user(argp, sizeof(*chip));
3668                 if (IS_ERR(chip)) {
3669                         r = PTR_ERR(chip);
3670                         goto out;
3671                 }
3672
3673                 r = -ENXIO;
3674                 if (!irqchip_in_kernel(kvm))
3675                         goto set_irqchip_out;
3676                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
3677                 if (r)
3678                         goto set_irqchip_out;
3679                 r = 0;
3680         set_irqchip_out:
3681                 kfree(chip);
3682                 break;
3683         }
3684         case KVM_GET_PIT: {
3685                 r = -EFAULT;
3686                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
3687                         goto out;
3688                 r = -ENXIO;
3689                 if (!kvm->arch.vpit)
3690                         goto out;
3691                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
3692                 if (r)
3693                         goto out;
3694                 r = -EFAULT;
3695                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
3696                         goto out;
3697                 r = 0;
3698                 break;
3699         }
3700         case KVM_SET_PIT: {
3701                 r = -EFAULT;
3702                 if (copy_from_user(&u.ps, argp, sizeof u.ps))
3703                         goto out;
3704                 r = -ENXIO;
3705                 if (!kvm->arch.vpit)
3706                         goto out;
3707                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
3708                 break;
3709         }
3710         case KVM_GET_PIT2: {
3711                 r = -ENXIO;
3712                 if (!kvm->arch.vpit)
3713                         goto out;
3714                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
3715                 if (r)
3716                         goto out;
3717                 r = -EFAULT;
3718                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
3719                         goto out;
3720                 r = 0;
3721                 break;
3722         }
3723         case KVM_SET_PIT2: {
3724                 r = -EFAULT;
3725                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
3726                         goto out;
3727                 r = -ENXIO;
3728                 if (!kvm->arch.vpit)
3729                         goto out;
3730                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
3731                 break;
3732         }
3733         case KVM_REINJECT_CONTROL: {
3734                 struct kvm_reinject_control control;
3735                 r =  -EFAULT;
3736                 if (copy_from_user(&control, argp, sizeof(control)))
3737                         goto out;
3738                 r = kvm_vm_ioctl_reinject(kvm, &control);
3739                 break;
3740         }
3741         case KVM_XEN_HVM_CONFIG: {
3742                 r = -EFAULT;
3743                 if (copy_from_user(&kvm->arch.xen_hvm_config, argp,
3744                                    sizeof(struct kvm_xen_hvm_config)))
3745                         goto out;
3746                 r = -EINVAL;
3747                 if (kvm->arch.xen_hvm_config.flags)
3748                         goto out;
3749                 r = 0;
3750                 break;
3751         }
3752         case KVM_SET_CLOCK: {
3753                 struct kvm_clock_data user_ns;
3754                 u64 now_ns;
3755                 s64 delta;
3756
3757                 r = -EFAULT;
3758                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
3759                         goto out;
3760
3761                 r = -EINVAL;
3762                 if (user_ns.flags)
3763                         goto out;
3764
3765                 r = 0;
3766                 local_irq_disable();
3767                 now_ns = get_kernel_ns();
3768                 delta = user_ns.clock - now_ns;
3769                 local_irq_enable();
3770                 kvm->arch.kvmclock_offset = delta;
3771                 break;
3772         }
3773         case KVM_GET_CLOCK: {
3774                 struct kvm_clock_data user_ns;
3775                 u64 now_ns;
3776
3777                 local_irq_disable();
3778                 now_ns = get_kernel_ns();
3779                 user_ns.clock = kvm->arch.kvmclock_offset + now_ns;
3780                 local_irq_enable();
3781                 user_ns.flags = 0;
3782                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
3783
3784                 r = -EFAULT;
3785                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
3786                         goto out;
3787                 r = 0;
3788                 break;
3789         }
3790
3791         default:
3792                 ;
3793         }
3794 out:
3795         return r;
3796 }
3797
3798 static void kvm_init_msr_list(void)
3799 {
3800         u32 dummy[2];
3801         unsigned i, j;
3802
3803         /* skip the first msrs in the list. KVM-specific */
3804         for (i = j = KVM_SAVE_MSRS_BEGIN; i < ARRAY_SIZE(msrs_to_save); i++) {
3805                 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
3806                         continue;
3807                 if (j < i)
3808                         msrs_to_save[j] = msrs_to_save[i];
3809                 j++;
3810         }
3811         num_msrs_to_save = j;
3812 }
3813
3814 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
3815                            const void *v)
3816 {
3817         int handled = 0;
3818         int n;
3819
3820         do {
3821                 n = min(len, 8);
3822                 if (!(vcpu->arch.apic &&
3823                       !kvm_iodevice_write(&vcpu->arch.apic->dev, addr, n, v))
3824                     && kvm_io_bus_write(vcpu->kvm, KVM_MMIO_BUS, addr, n, v))
3825                         break;
3826                 handled += n;
3827                 addr += n;
3828                 len -= n;
3829                 v += n;
3830         } while (len);
3831
3832         return handled;
3833 }
3834
3835 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
3836 {
3837         int handled = 0;
3838         int n;
3839
3840         do {
3841                 n = min(len, 8);
3842                 if (!(vcpu->arch.apic &&
3843                       !kvm_iodevice_read(&vcpu->arch.apic->dev, addr, n, v))
3844                     && kvm_io_bus_read(vcpu->kvm, KVM_MMIO_BUS, addr, n, v))
3845                         break;
3846                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, *(u64 *)v);
3847                 handled += n;
3848                 addr += n;
3849                 len -= n;
3850                 v += n;
3851         } while (len);
3852
3853         return handled;
3854 }
3855
3856 static void kvm_set_segment(struct kvm_vcpu *vcpu,
3857                         struct kvm_segment *var, int seg)
3858 {
3859         kvm_x86_ops->set_segment(vcpu, var, seg);
3860 }
3861
3862 void kvm_get_segment(struct kvm_vcpu *vcpu,
3863                      struct kvm_segment *var, int seg)
3864 {
3865         kvm_x86_ops->get_segment(vcpu, var, seg);
3866 }
3867
3868 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access)
3869 {
3870         gpa_t t_gpa;
3871         struct x86_exception exception;
3872
3873         BUG_ON(!mmu_is_nested(vcpu));
3874
3875         /* NPT walks are always user-walks */
3876         access |= PFERR_USER_MASK;
3877         t_gpa  = vcpu->arch.mmu.gva_to_gpa(vcpu, gpa, access, &exception);
3878
3879         return t_gpa;
3880 }
3881
3882 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
3883                               struct x86_exception *exception)
3884 {
3885         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3886         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3887 }
3888
3889  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
3890                                 struct x86_exception *exception)
3891 {
3892         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3893         access |= PFERR_FETCH_MASK;
3894         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3895 }
3896
3897 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
3898                                struct x86_exception *exception)
3899 {
3900         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3901         access |= PFERR_WRITE_MASK;
3902         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3903 }
3904
3905 /* uses this to access any guest's mapped memory without checking CPL */
3906 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
3907                                 struct x86_exception *exception)
3908 {
3909         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
3910 }
3911
3912 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
3913                                       struct kvm_vcpu *vcpu, u32 access,
3914                                       struct x86_exception *exception)
3915 {
3916         void *data = val;
3917         int r = X86EMUL_CONTINUE;
3918
3919         while (bytes) {
3920                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
3921                                                             exception);
3922                 unsigned offset = addr & (PAGE_SIZE-1);
3923                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
3924                 int ret;
3925
3926                 if (gpa == UNMAPPED_GVA)
3927                         return X86EMUL_PROPAGATE_FAULT;
3928                 ret = kvm_read_guest(vcpu->kvm, gpa, data, toread);
3929                 if (ret < 0) {
3930                         r = X86EMUL_IO_NEEDED;
3931                         goto out;
3932                 }
3933
3934                 bytes -= toread;
3935                 data += toread;
3936                 addr += toread;
3937         }
3938 out:
3939         return r;
3940 }
3941
3942 /* used for instruction fetching */
3943 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
3944                                 gva_t addr, void *val, unsigned int bytes,
3945                                 struct x86_exception *exception)
3946 {
3947         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3948         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3949
3950         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu,
3951                                           access | PFERR_FETCH_MASK,
3952                                           exception);
3953 }
3954
3955 int kvm_read_guest_virt(struct x86_emulate_ctxt *ctxt,
3956                                gva_t addr, void *val, unsigned int bytes,
3957                                struct x86_exception *exception)
3958 {
3959         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3960         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3961
3962         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
3963                                           exception);
3964 }
3965 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
3966
3967 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt *ctxt,
3968                                       gva_t addr, void *val, unsigned int bytes,
3969                                       struct x86_exception *exception)
3970 {
3971         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3972         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, exception);
3973 }
3974
3975 int kvm_write_guest_virt_system(struct x86_emulate_ctxt *ctxt,
3976                                        gva_t addr, void *val,
3977                                        unsigned int bytes,
3978                                        struct x86_exception *exception)
3979 {
3980         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3981         void *data = val;
3982         int r = X86EMUL_CONTINUE;
3983
3984         while (bytes) {
3985                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
3986                                                              PFERR_WRITE_MASK,
3987                                                              exception);
3988                 unsigned offset = addr & (PAGE_SIZE-1);
3989                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
3990                 int ret;
3991
3992                 if (gpa == UNMAPPED_GVA)
3993                         return X86EMUL_PROPAGATE_FAULT;
3994                 ret = kvm_write_guest(vcpu->kvm, gpa, data, towrite);
3995                 if (ret < 0) {
3996                         r = X86EMUL_IO_NEEDED;
3997                         goto out;
3998                 }
3999
4000                 bytes -= towrite;
4001                 data += towrite;
4002                 addr += towrite;
4003         }
4004 out:
4005         return r;
4006 }
4007 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
4008
4009 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
4010                                 gpa_t *gpa, struct x86_exception *exception,
4011                                 bool write)
4012 {
4013         u32 access = ((kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0)
4014                 | (write ? PFERR_WRITE_MASK : 0);
4015
4016         if (vcpu_match_mmio_gva(vcpu, gva)
4017             && !permission_fault(vcpu->arch.walk_mmu, vcpu->arch.access, access)) {
4018                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
4019                                         (gva & (PAGE_SIZE - 1));
4020                 trace_vcpu_match_mmio(gva, *gpa, write, false);
4021                 return 1;
4022         }
4023
4024         *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4025
4026         if (*gpa == UNMAPPED_GVA)
4027                 return -1;
4028
4029         /* For APIC access vmexit */
4030         if ((*gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4031                 return 1;
4032
4033         if (vcpu_match_mmio_gpa(vcpu, *gpa)) {
4034                 trace_vcpu_match_mmio(gva, *gpa, write, true);
4035                 return 1;
4036         }
4037
4038         return 0;
4039 }
4040
4041 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
4042                         const void *val, int bytes)
4043 {
4044         int ret;
4045
4046         ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
4047         if (ret < 0)
4048                 return 0;
4049         kvm_mmu_pte_write(vcpu, gpa, val, bytes);
4050         return 1;
4051 }
4052
4053 struct read_write_emulator_ops {
4054         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
4055                                   int bytes);
4056         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
4057                                   void *val, int bytes);
4058         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4059                                int bytes, void *val);
4060         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4061                                     void *val, int bytes);
4062         bool write;
4063 };
4064
4065 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
4066 {
4067         if (vcpu->mmio_read_completed) {
4068                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
4069                                vcpu->mmio_fragments[0].gpa, *(u64 *)val);
4070                 vcpu->mmio_read_completed = 0;
4071                 return 1;
4072         }
4073
4074         return 0;
4075 }
4076
4077 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4078                         void *val, int bytes)
4079 {
4080         return !kvm_read_guest(vcpu->kvm, gpa, val, bytes);
4081 }
4082
4083 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4084                          void *val, int bytes)
4085 {
4086         return emulator_write_phys(vcpu, gpa, val, bytes);
4087 }
4088
4089 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
4090 {
4091         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
4092         return vcpu_mmio_write(vcpu, gpa, bytes, val);
4093 }
4094
4095 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4096                           void *val, int bytes)
4097 {
4098         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
4099         return X86EMUL_IO_NEEDED;
4100 }
4101
4102 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4103                            void *val, int bytes)
4104 {
4105         struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
4106
4107         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
4108         return X86EMUL_CONTINUE;
4109 }
4110
4111 static const struct read_write_emulator_ops read_emultor = {
4112         .read_write_prepare = read_prepare,
4113         .read_write_emulate = read_emulate,
4114         .read_write_mmio = vcpu_mmio_read,
4115         .read_write_exit_mmio = read_exit_mmio,
4116 };
4117
4118 static const struct read_write_emulator_ops write_emultor = {
4119         .read_write_emulate = write_emulate,
4120         .read_write_mmio = write_mmio,
4121         .read_write_exit_mmio = write_exit_mmio,
4122         .write = true,
4123 };
4124
4125 static int emulator_read_write_onepage(unsigned long addr, void *val,
4126                                        unsigned int bytes,
4127                                        struct x86_exception *exception,
4128                                        struct kvm_vcpu *vcpu,
4129                                        const struct read_write_emulator_ops *ops)
4130 {
4131         gpa_t gpa;
4132         int handled, ret;
4133         bool write = ops->write;
4134         struct kvm_mmio_fragment *frag;
4135
4136         ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
4137
4138         if (ret < 0)
4139                 return X86EMUL_PROPAGATE_FAULT;
4140
4141         /* For APIC access vmexit */
4142         if (ret)
4143                 goto mmio;
4144
4145         if (ops->read_write_emulate(vcpu, gpa, val, bytes))
4146                 return X86EMUL_CONTINUE;
4147
4148 mmio:
4149         /*
4150          * Is this MMIO handled locally?
4151          */
4152         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
4153         if (handled == bytes)
4154                 return X86EMUL_CONTINUE;
4155
4156         gpa += handled;
4157         bytes -= handled;
4158         val += handled;
4159
4160         WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS);
4161         frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
4162         frag->gpa = gpa;
4163         frag->data = val;
4164         frag->len = bytes;
4165         return X86EMUL_CONTINUE;
4166 }
4167
4168 int emulator_read_write(struct x86_emulate_ctxt *ctxt, unsigned long addr,
4169                         void *val, unsigned int bytes,
4170                         struct x86_exception *exception,
4171                         const struct read_write_emulator_ops *ops)
4172 {
4173         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4174         gpa_t gpa;
4175         int rc;
4176
4177         if (ops->read_write_prepare &&
4178                   ops->read_write_prepare(vcpu, val, bytes))
4179                 return X86EMUL_CONTINUE;
4180
4181         vcpu->mmio_nr_fragments = 0;
4182
4183         /* Crossing a page boundary? */
4184         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
4185                 int now;
4186
4187                 now = -addr & ~PAGE_MASK;
4188                 rc = emulator_read_write_onepage(addr, val, now, exception,
4189                                                  vcpu, ops);
4190
4191                 if (rc != X86EMUL_CONTINUE)
4192                         return rc;
4193                 addr += now;
4194                 val += now;
4195                 bytes -= now;
4196         }
4197
4198         rc = emulator_read_write_onepage(addr, val, bytes, exception,
4199                                          vcpu, ops);
4200         if (rc != X86EMUL_CONTINUE)
4201                 return rc;
4202
4203         if (!vcpu->mmio_nr_fragments)
4204                 return rc;
4205
4206         gpa = vcpu->mmio_fragments[0].gpa;
4207
4208         vcpu->mmio_needed = 1;
4209         vcpu->mmio_cur_fragment = 0;
4210
4211         vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len);
4212         vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
4213         vcpu->run->exit_reason = KVM_EXIT_MMIO;
4214         vcpu->run->mmio.phys_addr = gpa;
4215
4216         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
4217 }
4218
4219 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
4220                                   unsigned long addr,
4221                                   void *val,
4222                                   unsigned int bytes,
4223                                   struct x86_exception *exception)
4224 {
4225         return emulator_read_write(ctxt, addr, val, bytes,
4226                                    exception, &read_emultor);
4227 }
4228
4229 int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
4230                             unsigned long addr,
4231                             const void *val,
4232                             unsigned int bytes,
4233                             struct x86_exception *exception)
4234 {
4235         return emulator_read_write(ctxt, addr, (void *)val, bytes,
4236                                    exception, &write_emultor);
4237 }
4238
4239 #define CMPXCHG_TYPE(t, ptr, old, new) \
4240         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
4241
4242 #ifdef CONFIG_X86_64
4243 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
4244 #else
4245 #  define CMPXCHG64(ptr, old, new) \
4246         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
4247 #endif
4248
4249 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
4250                                      unsigned long addr,
4251                                      const void *old,
4252                                      const void *new,
4253                                      unsigned int bytes,
4254                                      struct x86_exception *exception)
4255 {
4256         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4257         gpa_t gpa;
4258         struct page *page;
4259         char *kaddr;
4260         bool exchanged;
4261
4262         /* guests cmpxchg8b have to be emulated atomically */
4263         if (bytes > 8 || (bytes & (bytes - 1)))
4264                 goto emul_write;
4265
4266         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
4267
4268         if (gpa == UNMAPPED_GVA ||
4269             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4270                 goto emul_write;
4271
4272         if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
4273                 goto emul_write;
4274
4275         page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
4276         if (is_error_page(page))
4277                 goto emul_write;
4278
4279         kaddr = kmap_atomic(page);
4280         kaddr += offset_in_page(gpa);
4281         switch (bytes) {
4282         case 1:
4283                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
4284                 break;
4285         case 2:
4286                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
4287                 break;
4288         case 4:
4289                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
4290                 break;
4291         case 8:
4292                 exchanged = CMPXCHG64(kaddr, old, new);
4293                 break;
4294         default:
4295                 BUG();
4296         }
4297         kunmap_atomic(kaddr);
4298         kvm_release_page_dirty(page);
4299
4300         if (!exchanged)
4301                 return X86EMUL_CMPXCHG_FAILED;
4302
4303         kvm_mmu_pte_write(vcpu, gpa, new, bytes);
4304
4305         return X86EMUL_CONTINUE;
4306
4307 emul_write:
4308         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
4309
4310         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
4311 }
4312
4313 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
4314 {
4315         /* TODO: String I/O for in kernel device */
4316         int r;
4317
4318         if (vcpu->arch.pio.in)
4319                 r = kvm_io_bus_read(vcpu->kvm, KVM_PIO_BUS, vcpu->arch.pio.port,
4320                                     vcpu->arch.pio.size, pd);
4321         else
4322                 r = kvm_io_bus_write(vcpu->kvm, KVM_PIO_BUS,
4323                                      vcpu->arch.pio.port, vcpu->arch.pio.size,
4324                                      pd);
4325         return r;
4326 }
4327
4328 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
4329                                unsigned short port, void *val,
4330                                unsigned int count, bool in)
4331 {
4332         trace_kvm_pio(!in, port, size, count);
4333
4334         vcpu->arch.pio.port = port;
4335         vcpu->arch.pio.in = in;
4336         vcpu->arch.pio.count  = count;
4337         vcpu->arch.pio.size = size;
4338
4339         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
4340                 vcpu->arch.pio.count = 0;
4341                 return 1;
4342         }
4343
4344         vcpu->run->exit_reason = KVM_EXIT_IO;
4345         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
4346         vcpu->run->io.size = size;
4347         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
4348         vcpu->run->io.count = count;
4349         vcpu->run->io.port = port;
4350
4351         return 0;
4352 }
4353
4354 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
4355                                     int size, unsigned short port, void *val,
4356                                     unsigned int count)
4357 {
4358         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4359         int ret;
4360
4361         if (vcpu->arch.pio.count)
4362                 goto data_avail;
4363
4364         ret = emulator_pio_in_out(vcpu, size, port, val, count, true);
4365         if (ret) {
4366 data_avail:
4367                 memcpy(val, vcpu->arch.pio_data, size * count);
4368                 vcpu->arch.pio.count = 0;
4369                 return 1;
4370         }
4371
4372         return 0;
4373 }
4374
4375 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
4376                                      int size, unsigned short port,
4377                                      const void *val, unsigned int count)
4378 {
4379         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4380
4381         memcpy(vcpu->arch.pio_data, val, size * count);
4382         return emulator_pio_in_out(vcpu, size, port, (void *)val, count, false);
4383 }
4384
4385 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
4386 {
4387         return kvm_x86_ops->get_segment_base(vcpu, seg);
4388 }
4389
4390 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
4391 {
4392         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
4393 }
4394
4395 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
4396 {
4397         if (!need_emulate_wbinvd(vcpu))
4398                 return X86EMUL_CONTINUE;
4399
4400         if (kvm_x86_ops->has_wbinvd_exit()) {
4401                 int cpu = get_cpu();
4402
4403                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
4404                 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
4405                                 wbinvd_ipi, NULL, 1);
4406                 put_cpu();
4407                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
4408         } else
4409                 wbinvd();
4410         return X86EMUL_CONTINUE;
4411 }
4412 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
4413
4414 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
4415 {
4416         kvm_emulate_wbinvd(emul_to_vcpu(ctxt));
4417 }
4418
4419 int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long *dest)
4420 {
4421         return _kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
4422 }
4423
4424 int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long value)
4425 {
4426
4427         return __kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
4428 }
4429
4430 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
4431 {
4432         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
4433 }
4434
4435 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
4436 {
4437         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4438         unsigned long value;
4439
4440         switch (cr) {
4441         case 0:
4442                 value = kvm_read_cr0(vcpu);
4443                 break;
4444         case 2:
4445                 value = vcpu->arch.cr2;
4446                 break;
4447         case 3:
4448                 value = kvm_read_cr3(vcpu);
4449                 break;
4450         case 4:
4451                 value = kvm_read_cr4(vcpu);
4452                 break;
4453         case 8:
4454                 value = kvm_get_cr8(vcpu);
4455                 break;
4456         default:
4457                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
4458                 return 0;
4459         }
4460
4461         return value;
4462 }
4463
4464 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
4465 {
4466         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4467         int res = 0;
4468
4469         switch (cr) {
4470         case 0:
4471                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
4472                 break;
4473         case 2:
4474                 vcpu->arch.cr2 = val;
4475                 break;
4476         case 3:
4477                 res = kvm_set_cr3(vcpu, val);
4478                 break;
4479         case 4:
4480                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
4481                 break;
4482         case 8:
4483                 res = kvm_set_cr8(vcpu, val);
4484                 break;
4485         default:
4486                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
4487                 res = -1;
4488         }
4489
4490         return res;
4491 }
4492
4493 static void emulator_set_rflags(struct x86_emulate_ctxt *ctxt, ulong val)
4494 {
4495         kvm_set_rflags(emul_to_vcpu(ctxt), val);
4496 }
4497
4498 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
4499 {
4500         return kvm_x86_ops->get_cpl(emul_to_vcpu(ctxt));
4501 }
4502
4503 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4504 {
4505         kvm_x86_ops->get_gdt(emul_to_vcpu(ctxt), dt);
4506 }
4507
4508 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4509 {
4510         kvm_x86_ops->get_idt(emul_to_vcpu(ctxt), dt);
4511 }
4512
4513 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4514 {
4515         kvm_x86_ops->set_gdt(emul_to_vcpu(ctxt), dt);
4516 }
4517
4518 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4519 {
4520         kvm_x86_ops->set_idt(emul_to_vcpu(ctxt), dt);
4521 }
4522
4523 static unsigned long emulator_get_cached_segment_base(
4524         struct x86_emulate_ctxt *ctxt, int seg)
4525 {
4526         return get_segment_base(emul_to_vcpu(ctxt), seg);
4527 }
4528
4529 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
4530                                  struct desc_struct *desc, u32 *base3,
4531                                  int seg)
4532 {
4533         struct kvm_segment var;
4534
4535         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
4536         *selector = var.selector;
4537
4538         if (var.unusable) {
4539                 memset(desc, 0, sizeof(*desc));
4540                 return false;
4541         }
4542
4543         if (var.g)
4544                 var.limit >>= 12;
4545         set_desc_limit(desc, var.limit);
4546         set_desc_base(desc, (unsigned long)var.base);
4547 #ifdef CONFIG_X86_64
4548         if (base3)
4549                 *base3 = var.base >> 32;
4550 #endif
4551         desc->type = var.type;
4552         desc->s = var.s;
4553         desc->dpl = var.dpl;
4554         desc->p = var.present;
4555         desc->avl = var.avl;
4556         desc->l = var.l;
4557         desc->d = var.db;
4558         desc->g = var.g;
4559
4560         return true;
4561 }
4562
4563 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
4564                                  struct desc_struct *desc, u32 base3,
4565                                  int seg)
4566 {
4567         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4568         struct kvm_segment var;
4569
4570         var.selector = selector;
4571         var.base = get_desc_base(desc);
4572 #ifdef CONFIG_X86_64
4573         var.base |= ((u64)base3) << 32;
4574 #endif
4575         var.limit = get_desc_limit(desc);
4576         if (desc->g)
4577                 var.limit = (var.limit << 12) | 0xfff;
4578         var.type = desc->type;
4579         var.present = desc->p;
4580         var.dpl = desc->dpl;
4581         var.db = desc->d;
4582         var.s = desc->s;
4583         var.l = desc->l;
4584         var.g = desc->g;
4585         var.avl = desc->avl;
4586         var.present = desc->p;
4587         var.unusable = !var.present;
4588         var.padding = 0;
4589
4590         kvm_set_segment(vcpu, &var, seg);
4591         return;
4592 }
4593
4594 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
4595                             u32 msr_index, u64 *pdata)
4596 {
4597         return kvm_get_msr(emul_to_vcpu(ctxt), msr_index, pdata);
4598 }
4599
4600 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
4601                             u32 msr_index, u64 data)
4602 {
4603         struct msr_data msr;
4604
4605         msr.data = data;
4606         msr.index = msr_index;
4607         msr.host_initiated = false;
4608         return kvm_set_msr(emul_to_vcpu(ctxt), &msr);
4609 }
4610
4611 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
4612                              u32 pmc, u64 *pdata)
4613 {
4614         return kvm_pmu_read_pmc(emul_to_vcpu(ctxt), pmc, pdata);
4615 }
4616
4617 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
4618 {
4619         emul_to_vcpu(ctxt)->arch.halt_request = 1;
4620 }
4621
4622 static void emulator_get_fpu(struct x86_emulate_ctxt *ctxt)
4623 {
4624         preempt_disable();
4625         kvm_load_guest_fpu(emul_to_vcpu(ctxt));
4626         /*
4627          * CR0.TS may reference the host fpu state, not the guest fpu state,
4628          * so it may be clear at this point.
4629          */
4630         clts();
4631 }
4632
4633 static void emulator_put_fpu(struct x86_emulate_ctxt *ctxt)
4634 {
4635         preempt_enable();
4636 }
4637
4638 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
4639                               struct x86_instruction_info *info,
4640                               enum x86_intercept_stage stage)
4641 {
4642         return kvm_x86_ops->check_intercept(emul_to_vcpu(ctxt), info, stage);
4643 }
4644
4645 static void emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
4646                                u32 *eax, u32 *ebx, u32 *ecx, u32 *edx)
4647 {
4648         kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx);
4649 }
4650
4651 static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
4652 {
4653         return kvm_register_read(emul_to_vcpu(ctxt), reg);
4654 }
4655
4656 static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
4657 {
4658         kvm_register_write(emul_to_vcpu(ctxt), reg, val);
4659 }
4660
4661 static const struct x86_emulate_ops emulate_ops = {
4662         .read_gpr            = emulator_read_gpr,
4663         .write_gpr           = emulator_write_gpr,
4664         .read_std            = kvm_read_guest_virt_system,
4665         .write_std           = kvm_write_guest_virt_system,
4666         .fetch               = kvm_fetch_guest_virt,
4667         .read_emulated       = emulator_read_emulated,
4668         .write_emulated      = emulator_write_emulated,
4669         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
4670         .invlpg              = emulator_invlpg,
4671         .pio_in_emulated     = emulator_pio_in_emulated,
4672         .pio_out_emulated    = emulator_pio_out_emulated,
4673         .get_segment         = emulator_get_segment,
4674         .set_segment         = emulator_set_segment,
4675         .get_cached_segment_base = emulator_get_cached_segment_base,
4676         .get_gdt             = emulator_get_gdt,
4677         .get_idt             = emulator_get_idt,
4678         .set_gdt             = emulator_set_gdt,
4679         .set_idt             = emulator_set_idt,
4680         .get_cr              = emulator_get_cr,
4681         .set_cr              = emulator_set_cr,
4682         .set_rflags          = emulator_set_rflags,
4683         .cpl                 = emulator_get_cpl,
4684         .get_dr              = emulator_get_dr,
4685         .set_dr              = emulator_set_dr,
4686         .set_msr             = emulator_set_msr,
4687         .get_msr             = emulator_get_msr,
4688         .read_pmc            = emulator_read_pmc,
4689         .halt                = emulator_halt,
4690         .wbinvd              = emulator_wbinvd,
4691         .fix_hypercall       = emulator_fix_hypercall,
4692         .get_fpu             = emulator_get_fpu,
4693         .put_fpu             = emulator_put_fpu,
4694         .intercept           = emulator_intercept,
4695         .get_cpuid           = emulator_get_cpuid,
4696 };
4697
4698 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
4699 {
4700         u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu, mask);
4701         /*
4702          * an sti; sti; sequence only disable interrupts for the first
4703          * instruction. So, if the last instruction, be it emulated or
4704          * not, left the system with the INT_STI flag enabled, it
4705          * means that the last instruction is an sti. We should not
4706          * leave the flag on in this case. The same goes for mov ss
4707          */
4708         if (!(int_shadow & mask))
4709                 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
4710 }
4711
4712 static void inject_emulated_exception(struct kvm_vcpu *vcpu)
4713 {
4714         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4715         if (ctxt->exception.vector == PF_VECTOR)
4716                 kvm_propagate_fault(vcpu, &ctxt->exception);
4717         else if (ctxt->exception.error_code_valid)
4718                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
4719                                       ctxt->exception.error_code);
4720         else
4721                 kvm_queue_exception(vcpu, ctxt->exception.vector);
4722 }
4723
4724 static void init_decode_cache(struct x86_emulate_ctxt *ctxt)
4725 {
4726         memset(&ctxt->twobyte, 0,
4727                (void *)&ctxt->_regs - (void *)&ctxt->twobyte);
4728
4729         ctxt->fetch.start = 0;
4730         ctxt->fetch.end = 0;
4731         ctxt->io_read.pos = 0;
4732         ctxt->io_read.end = 0;
4733         ctxt->mem_read.pos = 0;
4734         ctxt->mem_read.end = 0;
4735 }
4736
4737 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
4738 {
4739         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4740         int cs_db, cs_l;
4741
4742         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
4743
4744         ctxt->eflags = kvm_get_rflags(vcpu);
4745         ctxt->eip = kvm_rip_read(vcpu);
4746         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
4747                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
4748                      cs_l                               ? X86EMUL_MODE_PROT64 :
4749                      cs_db                              ? X86EMUL_MODE_PROT32 :
4750                                                           X86EMUL_MODE_PROT16;
4751         ctxt->guest_mode = is_guest_mode(vcpu);
4752
4753         init_decode_cache(ctxt);
4754         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
4755 }
4756
4757 int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
4758 {
4759         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4760         int ret;
4761
4762         init_emulate_ctxt(vcpu);
4763
4764         ctxt->op_bytes = 2;
4765         ctxt->ad_bytes = 2;
4766         ctxt->_eip = ctxt->eip + inc_eip;
4767         ret = emulate_int_real(ctxt, irq);
4768
4769         if (ret != X86EMUL_CONTINUE)
4770                 return EMULATE_FAIL;
4771
4772         ctxt->eip = ctxt->_eip;
4773         kvm_rip_write(vcpu, ctxt->eip);
4774         kvm_set_rflags(vcpu, ctxt->eflags);
4775
4776         if (irq == NMI_VECTOR)
4777                 vcpu->arch.nmi_pending = 0;
4778         else
4779                 vcpu->arch.interrupt.pending = false;
4780
4781         return EMULATE_DONE;
4782 }
4783 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
4784
4785 static int handle_emulation_failure(struct kvm_vcpu *vcpu)
4786 {
4787         int r = EMULATE_DONE;
4788
4789         ++vcpu->stat.insn_emulation_fail;
4790         trace_kvm_emulate_insn_failed(vcpu);
4791         if (!is_guest_mode(vcpu)) {
4792                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
4793                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
4794                 vcpu->run->internal.ndata = 0;
4795                 r = EMULATE_FAIL;
4796         }
4797         kvm_queue_exception(vcpu, UD_VECTOR);
4798
4799         return r;
4800 }
4801
4802 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t cr2,
4803                                   bool write_fault_to_shadow_pgtable,
4804                                   int emulation_type)
4805 {
4806         gpa_t gpa = cr2;
4807         pfn_t pfn;
4808
4809         if (emulation_type & EMULTYPE_NO_REEXECUTE)
4810                 return false;
4811
4812         if (!vcpu->arch.mmu.direct_map) {
4813                 /*
4814                  * Write permission should be allowed since only
4815                  * write access need to be emulated.
4816                  */
4817                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
4818
4819                 /*
4820                  * If the mapping is invalid in guest, let cpu retry
4821                  * it to generate fault.
4822                  */
4823                 if (gpa == UNMAPPED_GVA)
4824                         return true;
4825         }
4826
4827         /*
4828          * Do not retry the unhandleable instruction if it faults on the
4829          * readonly host memory, otherwise it will goto a infinite loop:
4830          * retry instruction -> write #PF -> emulation fail -> retry
4831          * instruction -> ...
4832          */
4833         pfn = gfn_to_pfn(vcpu->kvm, gpa_to_gfn(gpa));
4834
4835         /*
4836          * If the instruction failed on the error pfn, it can not be fixed,
4837          * report the error to userspace.
4838          */
4839         if (is_error_noslot_pfn(pfn))
4840                 return false;
4841
4842         kvm_release_pfn_clean(pfn);
4843
4844         /* The instructions are well-emulated on direct mmu. */
4845         if (vcpu->arch.mmu.direct_map) {
4846                 unsigned int indirect_shadow_pages;
4847
4848                 spin_lock(&vcpu->kvm->mmu_lock);
4849                 indirect_shadow_pages = vcpu->kvm->arch.indirect_shadow_pages;
4850                 spin_unlock(&vcpu->kvm->mmu_lock);
4851
4852                 if (indirect_shadow_pages)
4853                         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
4854
4855                 return true;
4856         }
4857
4858         /*
4859          * if emulation was due to access to shadowed page table
4860          * and it failed try to unshadow page and re-enter the
4861          * guest to let CPU execute the instruction.
4862          */
4863         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
4864
4865         /*
4866          * If the access faults on its page table, it can not
4867          * be fixed by unprotecting shadow page and it should
4868          * be reported to userspace.
4869          */
4870         return !write_fault_to_shadow_pgtable;
4871 }
4872
4873 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
4874                               unsigned long cr2,  int emulation_type)
4875 {
4876         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4877         unsigned long last_retry_eip, last_retry_addr, gpa = cr2;
4878
4879         last_retry_eip = vcpu->arch.last_retry_eip;
4880         last_retry_addr = vcpu->arch.last_retry_addr;
4881
4882         /*
4883          * If the emulation is caused by #PF and it is non-page_table
4884          * writing instruction, it means the VM-EXIT is caused by shadow
4885          * page protected, we can zap the shadow page and retry this
4886          * instruction directly.
4887          *
4888          * Note: if the guest uses a non-page-table modifying instruction
4889          * on the PDE that points to the instruction, then we will unmap
4890          * the instruction and go to an infinite loop. So, we cache the
4891          * last retried eip and the last fault address, if we meet the eip
4892          * and the address again, we can break out of the potential infinite
4893          * loop.
4894          */
4895         vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
4896
4897         if (!(emulation_type & EMULTYPE_RETRY))
4898                 return false;
4899
4900         if (x86_page_table_writing_insn(ctxt))
4901                 return false;
4902
4903         if (ctxt->eip == last_retry_eip && last_retry_addr == cr2)
4904                 return false;
4905
4906         vcpu->arch.last_retry_eip = ctxt->eip;
4907         vcpu->arch.last_retry_addr = cr2;
4908
4909         if (!vcpu->arch.mmu.direct_map)
4910                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
4911
4912         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
4913
4914         return true;
4915 }
4916
4917 static int complete_emulated_mmio(struct kvm_vcpu *vcpu);
4918 static int complete_emulated_pio(struct kvm_vcpu *vcpu);
4919
4920 int x86_emulate_instruction(struct kvm_vcpu *vcpu,
4921                             unsigned long cr2,
4922                             int emulation_type,
4923                             void *insn,
4924                             int insn_len)
4925 {
4926         int r;
4927         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4928         bool writeback = true;
4929         bool write_fault_to_spt = vcpu->arch.write_fault_to_shadow_pgtable;
4930
4931         /*
4932          * Clear write_fault_to_shadow_pgtable here to ensure it is
4933          * never reused.
4934          */
4935         vcpu->arch.write_fault_to_shadow_pgtable = false;
4936         kvm_clear_exception_queue(vcpu);
4937
4938         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
4939                 init_emulate_ctxt(vcpu);
4940                 ctxt->interruptibility = 0;
4941                 ctxt->have_exception = false;
4942                 ctxt->perm_ok = false;
4943
4944                 ctxt->only_vendor_specific_insn
4945                         = emulation_type & EMULTYPE_TRAP_UD;
4946
4947                 r = x86_decode_insn(ctxt, insn, insn_len);
4948
4949                 trace_kvm_emulate_insn_start(vcpu);
4950                 ++vcpu->stat.insn_emulation;
4951                 if (r != EMULATION_OK)  {
4952                         if (emulation_type & EMULTYPE_TRAP_UD)
4953                                 return EMULATE_FAIL;
4954                         if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
4955                                                 emulation_type))
4956                                 return EMULATE_DONE;
4957                         if (emulation_type & EMULTYPE_SKIP)
4958                                 return EMULATE_FAIL;
4959                         return handle_emulation_failure(vcpu);
4960                 }
4961         }
4962
4963         if (emulation_type & EMULTYPE_SKIP) {
4964                 kvm_rip_write(vcpu, ctxt->_eip);
4965                 return EMULATE_DONE;
4966         }
4967
4968         if (retry_instruction(ctxt, cr2, emulation_type))
4969                 return EMULATE_DONE;
4970
4971         /* this is needed for vmware backdoor interface to work since it
4972            changes registers values  during IO operation */
4973         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
4974                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
4975                 emulator_invalidate_register_cache(ctxt);
4976         }
4977
4978 restart:
4979         r = x86_emulate_insn(ctxt);
4980
4981         if (r == EMULATION_INTERCEPTED)
4982                 return EMULATE_DONE;
4983
4984         if (r == EMULATION_FAILED) {
4985                 if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
4986                                         emulation_type))
4987                         return EMULATE_DONE;
4988
4989                 return handle_emulation_failure(vcpu);
4990         }
4991
4992         if (ctxt->have_exception) {
4993                 inject_emulated_exception(vcpu);
4994                 r = EMULATE_DONE;
4995         } else if (vcpu->arch.pio.count) {
4996                 if (!vcpu->arch.pio.in)
4997                         vcpu->arch.pio.count = 0;
4998                 else {
4999                         writeback = false;
5000                         vcpu->arch.complete_userspace_io = complete_emulated_pio;
5001                 }
5002                 r = EMULATE_DO_MMIO;
5003         } else if (vcpu->mmio_needed) {
5004                 if (!vcpu->mmio_is_write)
5005                         writeback = false;
5006                 r = EMULATE_DO_MMIO;
5007                 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
5008         } else if (r == EMULATION_RESTART)
5009                 goto restart;
5010         else
5011                 r = EMULATE_DONE;
5012
5013         if (writeback) {
5014                 toggle_interruptibility(vcpu, ctxt->interruptibility);
5015                 kvm_set_rflags(vcpu, ctxt->eflags);
5016                 kvm_make_request(KVM_REQ_EVENT, vcpu);
5017                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
5018                 kvm_rip_write(vcpu, ctxt->eip);
5019         } else
5020                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
5021
5022         return r;
5023 }
5024 EXPORT_SYMBOL_GPL(x86_emulate_instruction);
5025
5026 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port)
5027 {
5028         unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
5029         int ret = emulator_pio_out_emulated(&vcpu->arch.emulate_ctxt,
5030                                             size, port, &val, 1);
5031         /* do not return to emulator after return from userspace */
5032         vcpu->arch.pio.count = 0;
5033         return ret;
5034 }
5035 EXPORT_SYMBOL_GPL(kvm_fast_pio_out);
5036
5037 static void tsc_bad(void *info)
5038 {
5039         __this_cpu_write(cpu_tsc_khz, 0);
5040 }
5041
5042 static void tsc_khz_changed(void *data)
5043 {
5044         struct cpufreq_freqs *freq = data;
5045         unsigned long khz = 0;
5046
5047         if (data)
5048                 khz = freq->new;
5049         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
5050                 khz = cpufreq_quick_get(raw_smp_processor_id());
5051         if (!khz)
5052                 khz = tsc_khz;
5053         __this_cpu_write(cpu_tsc_khz, khz);
5054 }
5055
5056 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
5057                                      void *data)
5058 {
5059         struct cpufreq_freqs *freq = data;
5060         struct kvm *kvm;
5061         struct kvm_vcpu *vcpu;
5062         int i, send_ipi = 0;
5063
5064         /*
5065          * We allow guests to temporarily run on slowing clocks,
5066          * provided we notify them after, or to run on accelerating
5067          * clocks, provided we notify them before.  Thus time never
5068          * goes backwards.
5069          *
5070          * However, we have a problem.  We can't atomically update
5071          * the frequency of a given CPU from this function; it is
5072          * merely a notifier, which can be called from any CPU.
5073          * Changing the TSC frequency at arbitrary points in time
5074          * requires a recomputation of local variables related to
5075          * the TSC for each VCPU.  We must flag these local variables
5076          * to be updated and be sure the update takes place with the
5077          * new frequency before any guests proceed.
5078          *
5079          * Unfortunately, the combination of hotplug CPU and frequency
5080          * change creates an intractable locking scenario; the order
5081          * of when these callouts happen is undefined with respect to
5082          * CPU hotplug, and they can race with each other.  As such,
5083          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
5084          * undefined; you can actually have a CPU frequency change take
5085          * place in between the computation of X and the setting of the
5086          * variable.  To protect against this problem, all updates of
5087          * the per_cpu tsc_khz variable are done in an interrupt
5088          * protected IPI, and all callers wishing to update the value
5089          * must wait for a synchronous IPI to complete (which is trivial
5090          * if the caller is on the CPU already).  This establishes the
5091          * necessary total order on variable updates.
5092          *
5093          * Note that because a guest time update may take place
5094          * anytime after the setting of the VCPU's request bit, the
5095          * correct TSC value must be set before the request.  However,
5096          * to ensure the update actually makes it to any guest which
5097          * starts running in hardware virtualization between the set
5098          * and the acquisition of the spinlock, we must also ping the
5099          * CPU after setting the request bit.
5100          *
5101          */
5102
5103         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
5104                 return 0;
5105         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
5106                 return 0;
5107
5108         smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5109
5110         spin_lock(&kvm_lock);
5111         list_for_each_entry(kvm, &vm_list, vm_list) {
5112                 kvm_for_each_vcpu(i, vcpu, kvm) {
5113                         if (vcpu->cpu != freq->cpu)
5114                                 continue;
5115                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
5116                         if (vcpu->cpu != smp_processor_id())
5117                                 send_ipi = 1;
5118                 }
5119         }
5120         spin_unlock(&kvm_lock);
5121
5122         if (freq->old < freq->new && send_ipi) {
5123                 /*
5124                  * We upscale the frequency.  Must make the guest
5125                  * doesn't see old kvmclock values while running with
5126                  * the new frequency, otherwise we risk the guest sees
5127                  * time go backwards.
5128                  *
5129                  * In case we update the frequency for another cpu
5130                  * (which might be in guest context) send an interrupt
5131                  * to kick the cpu out of guest context.  Next time
5132                  * guest context is entered kvmclock will be updated,
5133                  * so the guest will not see stale values.
5134                  */
5135                 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5136         }
5137         return 0;
5138 }
5139
5140 static struct notifier_block kvmclock_cpufreq_notifier_block = {
5141         .notifier_call  = kvmclock_cpufreq_notifier
5142 };
5143
5144 static int kvmclock_cpu_notifier(struct notifier_block *nfb,
5145                                         unsigned long action, void *hcpu)
5146 {
5147         unsigned int cpu = (unsigned long)hcpu;
5148
5149         switch (action) {
5150                 case CPU_ONLINE:
5151                 case CPU_DOWN_FAILED:
5152                         smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
5153                         break;
5154                 case CPU_DOWN_PREPARE:
5155                         smp_call_function_single(cpu, tsc_bad, NULL, 1);
5156                         break;
5157         }
5158         return NOTIFY_OK;
5159 }
5160
5161 static struct notifier_block kvmclock_cpu_notifier_block = {
5162         .notifier_call  = kvmclock_cpu_notifier,
5163         .priority = -INT_MAX
5164 };
5165
5166 static void kvm_timer_init(void)
5167 {
5168         int cpu;
5169
5170         max_tsc_khz = tsc_khz;
5171         register_hotcpu_notifier(&kvmclock_cpu_notifier_block);
5172         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
5173 #ifdef CONFIG_CPU_FREQ
5174                 struct cpufreq_policy policy;
5175                 memset(&policy, 0, sizeof(policy));
5176                 cpu = get_cpu();
5177                 cpufreq_get_policy(&policy, cpu);
5178                 if (policy.cpuinfo.max_freq)
5179                         max_tsc_khz = policy.cpuinfo.max_freq;
5180                 put_cpu();
5181 #endif
5182                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
5183                                           CPUFREQ_TRANSITION_NOTIFIER);
5184         }
5185         pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz);
5186         for_each_online_cpu(cpu)
5187                 smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
5188 }
5189
5190 static DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
5191
5192 int kvm_is_in_guest(void)
5193 {
5194         return __this_cpu_read(current_vcpu) != NULL;
5195 }
5196
5197 static int kvm_is_user_mode(void)
5198 {
5199         int user_mode = 3;
5200
5201         if (__this_cpu_read(current_vcpu))
5202                 user_mode = kvm_x86_ops->get_cpl(__this_cpu_read(current_vcpu));
5203
5204         return user_mode != 0;
5205 }
5206
5207 static unsigned long kvm_get_guest_ip(void)
5208 {
5209         unsigned long ip = 0;
5210
5211         if (__this_cpu_read(current_vcpu))
5212                 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
5213
5214         return ip;
5215 }
5216
5217 static struct perf_guest_info_callbacks kvm_guest_cbs = {
5218         .is_in_guest            = kvm_is_in_guest,
5219         .is_user_mode           = kvm_is_user_mode,
5220         .get_guest_ip           = kvm_get_guest_ip,
5221 };
5222
5223 void kvm_before_handle_nmi(struct kvm_vcpu *vcpu)
5224 {
5225         __this_cpu_write(current_vcpu, vcpu);
5226 }
5227 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi);
5228
5229 void kvm_after_handle_nmi(struct kvm_vcpu *vcpu)
5230 {
5231         __this_cpu_write(current_vcpu, NULL);
5232 }
5233 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi);
5234
5235 static void kvm_set_mmio_spte_mask(void)
5236 {
5237         u64 mask;
5238         int maxphyaddr = boot_cpu_data.x86_phys_bits;
5239
5240         /*
5241          * Set the reserved bits and the present bit of an paging-structure
5242          * entry to generate page fault with PFER.RSV = 1.
5243          */
5244         mask = ((1ull << (62 - maxphyaddr + 1)) - 1) << maxphyaddr;
5245         mask |= 1ull;
5246
5247 #ifdef CONFIG_X86_64
5248         /*
5249          * If reserved bit is not supported, clear the present bit to disable
5250          * mmio page fault.
5251          */
5252         if (maxphyaddr == 52)
5253                 mask &= ~1ull;
5254 #endif
5255
5256         kvm_mmu_set_mmio_spte_mask(mask);
5257 }
5258
5259 #ifdef CONFIG_X86_64
5260 static void pvclock_gtod_update_fn(struct work_struct *work)
5261 {
5262         struct kvm *kvm;
5263
5264         struct kvm_vcpu *vcpu;
5265         int i;
5266
5267         spin_lock(&kvm_lock);
5268         list_for_each_entry(kvm, &vm_list, vm_list)
5269                 kvm_for_each_vcpu(i, vcpu, kvm)
5270                         set_bit(KVM_REQ_MASTERCLOCK_UPDATE, &vcpu->requests);
5271         atomic_set(&kvm_guest_has_master_clock, 0);
5272         spin_unlock(&kvm_lock);
5273 }
5274
5275 static DECLARE_WORK(pvclock_gtod_work, pvclock_gtod_update_fn);
5276
5277 /*
5278  * Notification about pvclock gtod data update.
5279  */
5280 static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused,
5281                                void *priv)
5282 {
5283         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
5284         struct timekeeper *tk = priv;
5285
5286         update_pvclock_gtod(tk);
5287
5288         /* disable master clock if host does not trust, or does not
5289          * use, TSC clocksource
5290          */
5291         if (gtod->clock.vclock_mode != VCLOCK_TSC &&
5292             atomic_read(&kvm_guest_has_master_clock) != 0)
5293                 queue_work(system_long_wq, &pvclock_gtod_work);
5294
5295         return 0;
5296 }
5297
5298 static struct notifier_block pvclock_gtod_notifier = {
5299         .notifier_call = pvclock_gtod_notify,
5300 };
5301 #endif
5302
5303 int kvm_arch_init(void *opaque)
5304 {
5305         int r;
5306         struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
5307
5308         if (kvm_x86_ops) {
5309                 printk(KERN_ERR "kvm: already loaded the other module\n");
5310                 r = -EEXIST;
5311                 goto out;
5312         }
5313
5314         if (!ops->cpu_has_kvm_support()) {
5315                 printk(KERN_ERR "kvm: no hardware support\n");
5316                 r = -EOPNOTSUPP;
5317                 goto out;
5318         }
5319         if (ops->disabled_by_bios()) {
5320                 printk(KERN_ERR "kvm: disabled by bios\n");
5321                 r = -EOPNOTSUPP;
5322                 goto out;
5323         }
5324
5325         r = -ENOMEM;
5326         shared_msrs = alloc_percpu(struct kvm_shared_msrs);
5327         if (!shared_msrs) {
5328                 printk(KERN_ERR "kvm: failed to allocate percpu kvm_shared_msrs\n");
5329                 goto out;
5330         }
5331
5332         r = kvm_mmu_module_init();
5333         if (r)
5334                 goto out_free_percpu;
5335
5336         kvm_set_mmio_spte_mask();
5337         kvm_init_msr_list();
5338
5339         kvm_x86_ops = ops;
5340         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
5341                         PT_DIRTY_MASK, PT64_NX_MASK, 0);
5342
5343         kvm_timer_init();
5344
5345         perf_register_guest_info_callbacks(&kvm_guest_cbs);
5346
5347         if (cpu_has_xsave)
5348                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
5349
5350         kvm_lapic_init();
5351 #ifdef CONFIG_X86_64
5352         pvclock_gtod_register_notifier(&pvclock_gtod_notifier);
5353 #endif
5354
5355         return 0;
5356
5357 out_free_percpu:
5358         free_percpu(shared_msrs);
5359 out:
5360         return r;
5361 }
5362
5363 void kvm_arch_exit(void)
5364 {
5365         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
5366
5367         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
5368                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
5369                                             CPUFREQ_TRANSITION_NOTIFIER);
5370         unregister_hotcpu_notifier(&kvmclock_cpu_notifier_block);
5371 #ifdef CONFIG_X86_64
5372         pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier);
5373 #endif
5374         kvm_x86_ops = NULL;
5375         kvm_mmu_module_exit();
5376         free_percpu(shared_msrs);
5377 }
5378
5379 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
5380 {
5381         ++vcpu->stat.halt_exits;
5382         if (irqchip_in_kernel(vcpu->kvm)) {
5383                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
5384                 return 1;
5385         } else {
5386                 vcpu->run->exit_reason = KVM_EXIT_HLT;
5387                 return 0;
5388         }
5389 }
5390 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
5391
5392 int kvm_hv_hypercall(struct kvm_vcpu *vcpu)
5393 {
5394         u64 param, ingpa, outgpa, ret;
5395         uint16_t code, rep_idx, rep_cnt, res = HV_STATUS_SUCCESS, rep_done = 0;
5396         bool fast, longmode;
5397         int cs_db, cs_l;
5398
5399         /*
5400          * hypercall generates UD from non zero cpl and real mode
5401          * per HYPER-V spec
5402          */
5403         if (kvm_x86_ops->get_cpl(vcpu) != 0 || !is_protmode(vcpu)) {
5404                 kvm_queue_exception(vcpu, UD_VECTOR);
5405                 return 0;
5406         }
5407
5408         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
5409         longmode = is_long_mode(vcpu) && cs_l == 1;
5410
5411         if (!longmode) {
5412                 param = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDX) << 32) |
5413                         (kvm_register_read(vcpu, VCPU_REGS_RAX) & 0xffffffff);
5414                 ingpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RBX) << 32) |
5415                         (kvm_register_read(vcpu, VCPU_REGS_RCX) & 0xffffffff);
5416                 outgpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDI) << 32) |
5417                         (kvm_register_read(vcpu, VCPU_REGS_RSI) & 0xffffffff);
5418         }
5419 #ifdef CONFIG_X86_64
5420         else {
5421                 param = kvm_register_read(vcpu, VCPU_REGS_RCX);
5422                 ingpa = kvm_register_read(vcpu, VCPU_REGS_RDX);
5423                 outgpa = kvm_register_read(vcpu, VCPU_REGS_R8);
5424         }
5425 #endif
5426
5427         code = param & 0xffff;
5428         fast = (param >> 16) & 0x1;
5429         rep_cnt = (param >> 32) & 0xfff;
5430         rep_idx = (param >> 48) & 0xfff;
5431
5432         trace_kvm_hv_hypercall(code, fast, rep_cnt, rep_idx, ingpa, outgpa);
5433
5434         switch (code) {
5435         case HV_X64_HV_NOTIFY_LONG_SPIN_WAIT:
5436                 kvm_vcpu_on_spin(vcpu);
5437                 break;
5438         default:
5439                 res = HV_STATUS_INVALID_HYPERCALL_CODE;
5440                 break;
5441         }
5442
5443         ret = res | (((u64)rep_done & 0xfff) << 32);
5444         if (longmode) {
5445                 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
5446         } else {
5447                 kvm_register_write(vcpu, VCPU_REGS_RDX, ret >> 32);
5448                 kvm_register_write(vcpu, VCPU_REGS_RAX, ret & 0xffffffff);
5449         }
5450
5451         return 1;
5452 }
5453
5454 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
5455 {
5456         unsigned long nr, a0, a1, a2, a3, ret;
5457         int r = 1;
5458
5459         if (kvm_hv_hypercall_enabled(vcpu->kvm))
5460                 return kvm_hv_hypercall(vcpu);
5461
5462         nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
5463         a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
5464         a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
5465         a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
5466         a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
5467
5468         trace_kvm_hypercall(nr, a0, a1, a2, a3);
5469
5470         if (!is_long_mode(vcpu)) {
5471                 nr &= 0xFFFFFFFF;
5472                 a0 &= 0xFFFFFFFF;
5473                 a1 &= 0xFFFFFFFF;
5474                 a2 &= 0xFFFFFFFF;
5475                 a3 &= 0xFFFFFFFF;
5476         }
5477
5478         if (kvm_x86_ops->get_cpl(vcpu) != 0) {
5479                 ret = -KVM_EPERM;
5480                 goto out;
5481         }
5482
5483         switch (nr) {
5484         case KVM_HC_VAPIC_POLL_IRQ:
5485                 ret = 0;
5486                 break;
5487         default:
5488                 ret = -KVM_ENOSYS;
5489                 break;
5490         }
5491 out:
5492         kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
5493         ++vcpu->stat.hypercalls;
5494         return r;
5495 }
5496 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
5497
5498 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
5499 {
5500         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5501         char instruction[3];
5502         unsigned long rip = kvm_rip_read(vcpu);
5503
5504         /*
5505          * Blow out the MMU to ensure that no other VCPU has an active mapping
5506          * to ensure that the updated hypercall appears atomically across all
5507          * VCPUs.
5508          */
5509         kvm_mmu_zap_all(vcpu->kvm);
5510
5511         kvm_x86_ops->patch_hypercall(vcpu, instruction);
5512
5513         return emulator_write_emulated(ctxt, rip, instruction, 3, NULL);
5514 }
5515
5516 /*
5517  * Check if userspace requested an interrupt window, and that the
5518  * interrupt window is open.
5519  *
5520  * No need to exit to userspace if we already have an interrupt queued.
5521  */
5522 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
5523 {
5524         return (!irqchip_in_kernel(vcpu->kvm) && !kvm_cpu_has_interrupt(vcpu) &&
5525                 vcpu->run->request_interrupt_window &&
5526                 kvm_arch_interrupt_allowed(vcpu));
5527 }
5528
5529 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
5530 {
5531         struct kvm_run *kvm_run = vcpu->run;
5532
5533         kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
5534         kvm_run->cr8 = kvm_get_cr8(vcpu);
5535         kvm_run->apic_base = kvm_get_apic_base(vcpu);
5536         if (irqchip_in_kernel(vcpu->kvm))
5537                 kvm_run->ready_for_interrupt_injection = 1;
5538         else
5539                 kvm_run->ready_for_interrupt_injection =
5540                         kvm_arch_interrupt_allowed(vcpu) &&
5541                         !kvm_cpu_has_interrupt(vcpu) &&
5542                         !kvm_event_needs_reinjection(vcpu);
5543 }
5544
5545 static int vapic_enter(struct kvm_vcpu *vcpu)
5546 {
5547         struct kvm_lapic *apic = vcpu->arch.apic;
5548         struct page *page;
5549
5550         if (!apic || !apic->vapic_addr)
5551                 return 0;
5552
5553         page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
5554         if (is_error_page(page))
5555                 return -EFAULT;
5556
5557         vcpu->arch.apic->vapic_page = page;
5558         return 0;
5559 }
5560
5561 static void vapic_exit(struct kvm_vcpu *vcpu)
5562 {
5563         struct kvm_lapic *apic = vcpu->arch.apic;
5564         int idx;
5565
5566         if (!apic || !apic->vapic_addr)
5567                 return;
5568
5569         idx = srcu_read_lock(&vcpu->kvm->srcu);
5570         kvm_release_page_dirty(apic->vapic_page);
5571         mark_page_dirty(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
5572         srcu_read_unlock(&vcpu->kvm->srcu, idx);
5573 }
5574
5575 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
5576 {
5577         int max_irr, tpr;
5578
5579         if (!kvm_x86_ops->update_cr8_intercept)
5580                 return;
5581
5582         if (!vcpu->arch.apic)
5583                 return;
5584
5585         if (!vcpu->arch.apic->vapic_addr)
5586                 max_irr = kvm_lapic_find_highest_irr(vcpu);
5587         else
5588                 max_irr = -1;
5589
5590         if (max_irr != -1)
5591                 max_irr >>= 4;
5592
5593         tpr = kvm_lapic_get_cr8(vcpu);
5594
5595         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
5596 }
5597
5598 static void inject_pending_event(struct kvm_vcpu *vcpu)
5599 {
5600         /* try to reinject previous events if any */
5601         if (vcpu->arch.exception.pending) {
5602                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
5603                                         vcpu->arch.exception.has_error_code,
5604                                         vcpu->arch.exception.error_code);
5605                 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
5606                                           vcpu->arch.exception.has_error_code,
5607                                           vcpu->arch.exception.error_code,
5608                                           vcpu->arch.exception.reinject);
5609                 return;
5610         }
5611
5612         if (vcpu->arch.nmi_injected) {
5613                 kvm_x86_ops->set_nmi(vcpu);
5614                 return;
5615         }
5616
5617         if (vcpu->arch.interrupt.pending) {
5618                 kvm_x86_ops->set_irq(vcpu);
5619                 return;
5620         }
5621
5622         /* try to inject new event if pending */
5623         if (vcpu->arch.nmi_pending) {
5624                 if (kvm_x86_ops->nmi_allowed(vcpu)) {
5625                         --vcpu->arch.nmi_pending;
5626                         vcpu->arch.nmi_injected = true;
5627                         kvm_x86_ops->set_nmi(vcpu);
5628                 }
5629         } else if (kvm_cpu_has_injectable_intr(vcpu)) {
5630                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
5631                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
5632                                             false);
5633                         kvm_x86_ops->set_irq(vcpu);
5634                 }
5635         }
5636 }
5637
5638 static void process_nmi(struct kvm_vcpu *vcpu)
5639 {
5640         unsigned limit = 2;
5641
5642         /*
5643          * x86 is limited to one NMI running, and one NMI pending after it.
5644          * If an NMI is already in progress, limit further NMIs to just one.
5645          * Otherwise, allow two (and we'll inject the first one immediately).
5646          */
5647         if (kvm_x86_ops->get_nmi_mask(vcpu) || vcpu->arch.nmi_injected)
5648                 limit = 1;
5649
5650         vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
5651         vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
5652         kvm_make_request(KVM_REQ_EVENT, vcpu);
5653 }
5654
5655 static void kvm_gen_update_masterclock(struct kvm *kvm)
5656 {
5657 #ifdef CONFIG_X86_64
5658         int i;
5659         struct kvm_vcpu *vcpu;
5660         struct kvm_arch *ka = &kvm->arch;
5661
5662         spin_lock(&ka->pvclock_gtod_sync_lock);
5663         kvm_make_mclock_inprogress_request(kvm);
5664         /* no guest entries from this point */
5665         pvclock_update_vm_gtod_copy(kvm);
5666
5667         kvm_for_each_vcpu(i, vcpu, kvm)
5668                 set_bit(KVM_REQ_CLOCK_UPDATE, &vcpu->requests);
5669
5670         /* guest entries allowed */
5671         kvm_for_each_vcpu(i, vcpu, kvm)
5672                 clear_bit(KVM_REQ_MCLOCK_INPROGRESS, &vcpu->requests);
5673
5674         spin_unlock(&ka->pvclock_gtod_sync_lock);
5675 #endif
5676 }
5677
5678 static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu)
5679 {
5680         u64 eoi_exit_bitmap[4];
5681         u32 tmr[8];
5682
5683         if (!kvm_apic_hw_enabled(vcpu->arch.apic))
5684                 return;
5685
5686         memset(eoi_exit_bitmap, 0, 32);
5687         memset(tmr, 0, 32);
5688
5689         kvm_ioapic_scan_entry(vcpu, eoi_exit_bitmap, tmr);
5690         kvm_x86_ops->load_eoi_exitmap(vcpu, eoi_exit_bitmap);
5691         kvm_apic_update_tmr(vcpu, tmr);
5692 }
5693
5694 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
5695 {
5696         int r;
5697         bool req_int_win = !irqchip_in_kernel(vcpu->kvm) &&
5698                 vcpu->run->request_interrupt_window;
5699         bool req_immediate_exit = false;
5700
5701         if (vcpu->requests) {
5702                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
5703                         kvm_mmu_unload(vcpu);
5704                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
5705                         __kvm_migrate_timers(vcpu);
5706                 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu))
5707                         kvm_gen_update_masterclock(vcpu->kvm);
5708                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
5709                         r = kvm_guest_time_update(vcpu);
5710                         if (unlikely(r))
5711                                 goto out;
5712                 }
5713                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
5714                         kvm_mmu_sync_roots(vcpu);
5715                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
5716                         kvm_x86_ops->tlb_flush(vcpu);
5717                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
5718                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
5719                         r = 0;
5720                         goto out;
5721                 }
5722                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
5723                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
5724                         r = 0;
5725                         goto out;
5726                 }
5727                 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU, vcpu)) {
5728                         vcpu->fpu_active = 0;
5729                         kvm_x86_ops->fpu_deactivate(vcpu);
5730                 }
5731                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
5732                         /* Page is swapped out. Do synthetic halt */
5733                         vcpu->arch.apf.halted = true;
5734                         r = 1;
5735                         goto out;
5736                 }
5737                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
5738                         record_steal_time(vcpu);
5739                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
5740                         process_nmi(vcpu);
5741                 if (kvm_check_request(KVM_REQ_PMU, vcpu))
5742                         kvm_handle_pmu_event(vcpu);
5743                 if (kvm_check_request(KVM_REQ_PMI, vcpu))
5744                         kvm_deliver_pmi(vcpu);
5745                 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC, vcpu))
5746                         vcpu_scan_ioapic(vcpu);
5747         }
5748
5749         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
5750                 kvm_apic_accept_events(vcpu);
5751                 if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
5752                         r = 1;
5753                         goto out;
5754                 }
5755
5756                 inject_pending_event(vcpu);
5757
5758                 /* enable NMI/IRQ window open exits if needed */
5759                 if (vcpu->arch.nmi_pending)
5760                         req_immediate_exit =
5761                                 kvm_x86_ops->enable_nmi_window(vcpu) != 0;
5762                 else if (kvm_cpu_has_injectable_intr(vcpu) || req_int_win)
5763                         req_immediate_exit =
5764                                 kvm_x86_ops->enable_irq_window(vcpu) != 0;
5765
5766                 if (kvm_lapic_enabled(vcpu)) {
5767                         /*
5768                          * Update architecture specific hints for APIC
5769                          * virtual interrupt delivery.
5770                          */
5771                         if (kvm_x86_ops->hwapic_irr_update)
5772                                 kvm_x86_ops->hwapic_irr_update(vcpu,
5773                                         kvm_lapic_find_highest_irr(vcpu));
5774                         update_cr8_intercept(vcpu);
5775                         kvm_lapic_sync_to_vapic(vcpu);
5776                 }
5777         }
5778
5779         r = kvm_mmu_reload(vcpu);
5780         if (unlikely(r)) {
5781                 goto cancel_injection;
5782         }
5783
5784         preempt_disable();
5785
5786         kvm_x86_ops->prepare_guest_switch(vcpu);
5787         if (vcpu->fpu_active)
5788                 kvm_load_guest_fpu(vcpu);
5789         kvm_load_guest_xcr0(vcpu);
5790
5791         vcpu->mode = IN_GUEST_MODE;
5792
5793         /* We should set ->mode before check ->requests,
5794          * see the comment in make_all_cpus_request.
5795          */
5796         smp_mb();
5797
5798         local_irq_disable();
5799
5800         if (vcpu->mode == EXITING_GUEST_MODE || vcpu->requests
5801             || need_resched() || signal_pending(current)) {
5802                 vcpu->mode = OUTSIDE_GUEST_MODE;
5803                 smp_wmb();
5804                 local_irq_enable();
5805                 preempt_enable();
5806                 r = 1;
5807                 goto cancel_injection;
5808         }
5809
5810         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
5811
5812         if (req_immediate_exit)
5813                 smp_send_reschedule(vcpu->cpu);
5814
5815         kvm_guest_enter();
5816
5817         if (unlikely(vcpu->arch.switch_db_regs)) {
5818                 set_debugreg(0, 7);
5819                 set_debugreg(vcpu->arch.eff_db[0], 0);
5820                 set_debugreg(vcpu->arch.eff_db[1], 1);
5821                 set_debugreg(vcpu->arch.eff_db[2], 2);
5822                 set_debugreg(vcpu->arch.eff_db[3], 3);
5823         }
5824
5825         trace_kvm_entry(vcpu->vcpu_id);
5826         kvm_x86_ops->run(vcpu);
5827
5828         /*
5829          * If the guest has used debug registers, at least dr7
5830          * will be disabled while returning to the host.
5831          * If we don't have active breakpoints in the host, we don't
5832          * care about the messed up debug address registers. But if
5833          * we have some of them active, restore the old state.
5834          */
5835         if (hw_breakpoint_active())
5836                 hw_breakpoint_restore();
5837
5838         vcpu->arch.last_guest_tsc = kvm_x86_ops->read_l1_tsc(vcpu,
5839                                                            native_read_tsc());
5840
5841         vcpu->mode = OUTSIDE_GUEST_MODE;
5842         smp_wmb();
5843
5844         /* Interrupt is enabled by handle_external_intr() */
5845         kvm_x86_ops->handle_external_intr(vcpu);
5846
5847         ++vcpu->stat.exits;
5848
5849         /*
5850          * We must have an instruction between local_irq_enable() and
5851          * kvm_guest_exit(), so the timer interrupt isn't delayed by
5852          * the interrupt shadow.  The stat.exits increment will do nicely.
5853          * But we need to prevent reordering, hence this barrier():
5854          */
5855         barrier();
5856
5857         kvm_guest_exit();
5858
5859         preempt_enable();
5860
5861         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
5862
5863         /*
5864          * Profile KVM exit RIPs:
5865          */
5866         if (unlikely(prof_on == KVM_PROFILING)) {
5867                 unsigned long rip = kvm_rip_read(vcpu);
5868                 profile_hit(KVM_PROFILING, (void *)rip);
5869         }
5870
5871         if (unlikely(vcpu->arch.tsc_always_catchup))
5872                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
5873
5874         if (vcpu->arch.apic_attention)
5875                 kvm_lapic_sync_from_vapic(vcpu);
5876
5877         r = kvm_x86_ops->handle_exit(vcpu);
5878         return r;
5879
5880 cancel_injection:
5881         kvm_x86_ops->cancel_injection(vcpu);
5882         if (unlikely(vcpu->arch.apic_attention))
5883                 kvm_lapic_sync_from_vapic(vcpu);
5884 out:
5885         return r;
5886 }
5887
5888
5889 static int __vcpu_run(struct kvm_vcpu *vcpu)
5890 {
5891         int r;
5892         struct kvm *kvm = vcpu->kvm;
5893
5894         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5895         r = vapic_enter(vcpu);
5896         if (r) {
5897                 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5898                 return r;
5899         }
5900
5901         r = 1;
5902         while (r > 0) {
5903                 if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
5904                     !vcpu->arch.apf.halted)
5905                         r = vcpu_enter_guest(vcpu);
5906                 else {
5907                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5908                         kvm_vcpu_block(vcpu);
5909                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5910                         if (kvm_check_request(KVM_REQ_UNHALT, vcpu)) {
5911                                 kvm_apic_accept_events(vcpu);
5912                                 switch(vcpu->arch.mp_state) {
5913                                 case KVM_MP_STATE_HALTED:
5914                                         vcpu->arch.mp_state =
5915                                                 KVM_MP_STATE_RUNNABLE;
5916                                 case KVM_MP_STATE_RUNNABLE:
5917                                         vcpu->arch.apf.halted = false;
5918                                         break;
5919                                 case KVM_MP_STATE_INIT_RECEIVED:
5920                                         break;
5921                                 default:
5922                                         r = -EINTR;
5923                                         break;
5924                                 }
5925                         }
5926                 }
5927
5928                 if (r <= 0)
5929                         break;
5930
5931                 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
5932                 if (kvm_cpu_has_pending_timer(vcpu))
5933                         kvm_inject_pending_timer_irqs(vcpu);
5934
5935                 if (dm_request_for_irq_injection(vcpu)) {
5936                         r = -EINTR;
5937                         vcpu->run->exit_reason = KVM_EXIT_INTR;
5938                         ++vcpu->stat.request_irq_exits;
5939                 }
5940
5941                 kvm_check_async_pf_completion(vcpu);
5942
5943                 if (signal_pending(current)) {
5944                         r = -EINTR;
5945                         vcpu->run->exit_reason = KVM_EXIT_INTR;
5946                         ++vcpu->stat.signal_exits;
5947                 }
5948                 if (need_resched()) {
5949                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5950                         cond_resched();
5951                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5952                 }
5953         }
5954
5955         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5956
5957         vapic_exit(vcpu);
5958
5959         return r;
5960 }
5961
5962 static inline int complete_emulated_io(struct kvm_vcpu *vcpu)
5963 {
5964         int r;
5965         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
5966         r = emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
5967         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
5968         if (r != EMULATE_DONE)
5969                 return 0;
5970         return 1;
5971 }
5972
5973 static int complete_emulated_pio(struct kvm_vcpu *vcpu)
5974 {
5975         BUG_ON(!vcpu->arch.pio.count);
5976
5977         return complete_emulated_io(vcpu);
5978 }
5979
5980 /*
5981  * Implements the following, as a state machine:
5982  *
5983  * read:
5984  *   for each fragment
5985  *     for each mmio piece in the fragment
5986  *       write gpa, len
5987  *       exit
5988  *       copy data
5989  *   execute insn
5990  *
5991  * write:
5992  *   for each fragment
5993  *     for each mmio piece in the fragment
5994  *       write gpa, len
5995  *       copy data
5996  *       exit
5997  */
5998 static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
5999 {
6000         struct kvm_run *run = vcpu->run;
6001         struct kvm_mmio_fragment *frag;
6002         unsigned len;
6003
6004         BUG_ON(!vcpu->mmio_needed);
6005
6006         /* Complete previous fragment */
6007         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
6008         len = min(8u, frag->len);
6009         if (!vcpu->mmio_is_write)
6010                 memcpy(frag->data, run->mmio.data, len);
6011
6012         if (frag->len <= 8) {
6013                 /* Switch to the next fragment. */
6014                 frag++;
6015                 vcpu->mmio_cur_fragment++;
6016         } else {
6017                 /* Go forward to the next mmio piece. */
6018                 frag->data += len;
6019                 frag->gpa += len;
6020                 frag->len -= len;
6021         }
6022
6023         if (vcpu->mmio_cur_fragment == vcpu->mmio_nr_fragments) {
6024                 vcpu->mmio_needed = 0;
6025                 if (vcpu->mmio_is_write)
6026                         return 1;
6027                 vcpu->mmio_read_completed = 1;
6028                 return complete_emulated_io(vcpu);
6029         }
6030
6031         run->exit_reason = KVM_EXIT_MMIO;
6032         run->mmio.phys_addr = frag->gpa;
6033         if (vcpu->mmio_is_write)
6034                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
6035         run->mmio.len = min(8u, frag->len);
6036         run->mmio.is_write = vcpu->mmio_is_write;
6037         vcpu->arch.complete_userspace_io = complete_emulated_mmio;
6038         return 0;
6039 }
6040
6041
6042 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
6043 {
6044         int r;
6045         sigset_t sigsaved;
6046
6047         if (!tsk_used_math(current) && init_fpu(current))
6048                 return -ENOMEM;
6049
6050         if (vcpu->sigset_active)
6051                 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
6052
6053         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
6054                 kvm_vcpu_block(vcpu);
6055                 kvm_apic_accept_events(vcpu);
6056                 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
6057                 r = -EAGAIN;
6058                 goto out;
6059         }
6060
6061         /* re-sync apic's tpr */
6062         if (!irqchip_in_kernel(vcpu->kvm)) {
6063                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
6064                         r = -EINVAL;
6065                         goto out;
6066                 }
6067         }
6068
6069         if (unlikely(vcpu->arch.complete_userspace_io)) {
6070                 int (*cui)(struct kvm_vcpu *) = vcpu->arch.complete_userspace_io;
6071                 vcpu->arch.complete_userspace_io = NULL;
6072                 r = cui(vcpu);
6073                 if (r <= 0)
6074                         goto out;
6075         } else
6076                 WARN_ON(vcpu->arch.pio.count || vcpu->mmio_needed);
6077
6078         r = __vcpu_run(vcpu);
6079
6080 out:
6081         post_kvm_run_save(vcpu);
6082         if (vcpu->sigset_active)
6083                 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
6084
6085         return r;
6086 }
6087
6088 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
6089 {
6090         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
6091                 /*
6092                  * We are here if userspace calls get_regs() in the middle of
6093                  * instruction emulation. Registers state needs to be copied
6094                  * back from emulation context to vcpu. Userspace shouldn't do
6095                  * that usually, but some bad designed PV devices (vmware
6096                  * backdoor interface) need this to work
6097                  */
6098                 emulator_writeback_register_cache(&vcpu->arch.emulate_ctxt);
6099                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
6100         }
6101         regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
6102         regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
6103         regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
6104         regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
6105         regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
6106         regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
6107         regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
6108         regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
6109 #ifdef CONFIG_X86_64
6110         regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
6111         regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
6112         regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
6113         regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
6114         regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
6115         regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
6116         regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
6117         regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
6118 #endif
6119
6120         regs->rip = kvm_rip_read(vcpu);
6121         regs->rflags = kvm_get_rflags(vcpu);
6122
6123         return 0;
6124 }
6125
6126 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
6127 {
6128         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
6129         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
6130
6131         kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
6132         kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
6133         kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
6134         kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
6135         kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
6136         kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
6137         kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
6138         kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
6139 #ifdef CONFIG_X86_64
6140         kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
6141         kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
6142         kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
6143         kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
6144         kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
6145         kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
6146         kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
6147         kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
6148 #endif
6149
6150         kvm_rip_write(vcpu, regs->rip);
6151         kvm_set_rflags(vcpu, regs->rflags);
6152
6153         vcpu->arch.exception.pending = false;
6154
6155         kvm_make_request(KVM_REQ_EVENT, vcpu);
6156
6157         return 0;
6158 }
6159
6160 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
6161 {
6162         struct kvm_segment cs;
6163
6164         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
6165         *db = cs.db;
6166         *l = cs.l;
6167 }
6168 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
6169
6170 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
6171                                   struct kvm_sregs *sregs)
6172 {
6173         struct desc_ptr dt;
6174
6175         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
6176         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
6177         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
6178         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
6179         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
6180         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
6181
6182         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
6183         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
6184
6185         kvm_x86_ops->get_idt(vcpu, &dt);
6186         sregs->idt.limit = dt.size;
6187         sregs->idt.base = dt.address;
6188         kvm_x86_ops->get_gdt(vcpu, &dt);
6189         sregs->gdt.limit = dt.size;
6190         sregs->gdt.base = dt.address;
6191
6192         sregs->cr0 = kvm_read_cr0(vcpu);
6193         sregs->cr2 = vcpu->arch.cr2;
6194         sregs->cr3 = kvm_read_cr3(vcpu);
6195         sregs->cr4 = kvm_read_cr4(vcpu);
6196         sregs->cr8 = kvm_get_cr8(vcpu);
6197         sregs->efer = vcpu->arch.efer;
6198         sregs->apic_base = kvm_get_apic_base(vcpu);
6199
6200         memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
6201
6202         if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
6203                 set_bit(vcpu->arch.interrupt.nr,
6204                         (unsigned long *)sregs->interrupt_bitmap);
6205
6206         return 0;
6207 }
6208
6209 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
6210                                     struct kvm_mp_state *mp_state)
6211 {
6212         kvm_apic_accept_events(vcpu);
6213         mp_state->mp_state = vcpu->arch.mp_state;
6214         return 0;
6215 }
6216
6217 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
6218                                     struct kvm_mp_state *mp_state)
6219 {
6220         if (!kvm_vcpu_has_lapic(vcpu) &&
6221             mp_state->mp_state != KVM_MP_STATE_RUNNABLE)
6222                 return -EINVAL;
6223
6224         if (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED) {
6225                 vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
6226                 set_bit(KVM_APIC_SIPI, &vcpu->arch.apic->pending_events);
6227         } else
6228                 vcpu->arch.mp_state = mp_state->mp_state;
6229         kvm_make_request(KVM_REQ_EVENT, vcpu);
6230         return 0;
6231 }
6232
6233 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
6234                     int reason, bool has_error_code, u32 error_code)
6235 {
6236         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
6237         int ret;
6238
6239         init_emulate_ctxt(vcpu);
6240
6241         ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
6242                                    has_error_code, error_code);
6243
6244         if (ret)
6245                 return EMULATE_FAIL;
6246
6247         kvm_rip_write(vcpu, ctxt->eip);
6248         kvm_set_rflags(vcpu, ctxt->eflags);
6249         kvm_make_request(KVM_REQ_EVENT, vcpu);
6250         return EMULATE_DONE;
6251 }
6252 EXPORT_SYMBOL_GPL(kvm_task_switch);
6253
6254 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
6255                                   struct kvm_sregs *sregs)
6256 {
6257         int mmu_reset_needed = 0;
6258         int pending_vec, max_bits, idx;
6259         struct desc_ptr dt;
6260
6261         if (!guest_cpuid_has_xsave(vcpu) && (sregs->cr4 & X86_CR4_OSXSAVE))
6262                 return -EINVAL;
6263
6264         dt.size = sregs->idt.limit;
6265         dt.address = sregs->idt.base;
6266         kvm_x86_ops->set_idt(vcpu, &dt);
6267         dt.size = sregs->gdt.limit;
6268         dt.address = sregs->gdt.base;
6269         kvm_x86_ops->set_gdt(vcpu, &dt);
6270
6271         vcpu->arch.cr2 = sregs->cr2;
6272         mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
6273         vcpu->arch.cr3 = sregs->cr3;
6274         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
6275
6276         kvm_set_cr8(vcpu, sregs->cr8);
6277
6278         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
6279         kvm_x86_ops->set_efer(vcpu, sregs->efer);
6280         kvm_set_apic_base(vcpu, sregs->apic_base);
6281
6282         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
6283         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
6284         vcpu->arch.cr0 = sregs->cr0;
6285
6286         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
6287         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
6288         if (sregs->cr4 & X86_CR4_OSXSAVE)
6289                 kvm_update_cpuid(vcpu);
6290
6291         idx = srcu_read_lock(&vcpu->kvm->srcu);
6292         if (!is_long_mode(vcpu) && is_pae(vcpu)) {
6293                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
6294                 mmu_reset_needed = 1;
6295         }
6296         srcu_read_unlock(&vcpu->kvm->srcu, idx);
6297
6298         if (mmu_reset_needed)
6299                 kvm_mmu_reset_context(vcpu);
6300
6301         max_bits = KVM_NR_INTERRUPTS;
6302         pending_vec = find_first_bit(
6303                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
6304         if (pending_vec < max_bits) {
6305                 kvm_queue_interrupt(vcpu, pending_vec, false);
6306                 pr_debug("Set back pending irq %d\n", pending_vec);
6307         }
6308
6309         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
6310         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
6311         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
6312         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
6313         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
6314         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
6315
6316         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
6317         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
6318
6319         update_cr8_intercept(vcpu);
6320
6321         /* Older userspace won't unhalt the vcpu on reset. */
6322         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
6323             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
6324             !is_protmode(vcpu))
6325                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
6326
6327         kvm_make_request(KVM_REQ_EVENT, vcpu);
6328
6329         return 0;
6330 }
6331
6332 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
6333                                         struct kvm_guest_debug *dbg)
6334 {
6335         unsigned long rflags;
6336         int i, r;
6337
6338         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
6339                 r = -EBUSY;
6340                 if (vcpu->arch.exception.pending)
6341                         goto out;
6342                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
6343                         kvm_queue_exception(vcpu, DB_VECTOR);
6344                 else
6345                         kvm_queue_exception(vcpu, BP_VECTOR);
6346         }
6347
6348         /*
6349          * Read rflags as long as potentially injected trace flags are still
6350          * filtered out.
6351          */
6352         rflags = kvm_get_rflags(vcpu);
6353
6354         vcpu->guest_debug = dbg->control;
6355         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
6356                 vcpu->guest_debug = 0;
6357
6358         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
6359                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
6360                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
6361                 vcpu->arch.guest_debug_dr7 = dbg->arch.debugreg[7];
6362         } else {
6363                 for (i = 0; i < KVM_NR_DB_REGS; i++)
6364                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
6365         }
6366         kvm_update_dr7(vcpu);
6367
6368         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
6369                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
6370                         get_segment_base(vcpu, VCPU_SREG_CS);
6371
6372         /*
6373          * Trigger an rflags update that will inject or remove the trace
6374          * flags.
6375          */
6376         kvm_set_rflags(vcpu, rflags);
6377
6378         kvm_x86_ops->update_db_bp_intercept(vcpu);
6379
6380         r = 0;
6381
6382 out:
6383
6384         return r;
6385 }
6386
6387 /*
6388  * Translate a guest virtual address to a guest physical address.
6389  */
6390 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
6391                                     struct kvm_translation *tr)
6392 {
6393         unsigned long vaddr = tr->linear_address;
6394         gpa_t gpa;
6395         int idx;
6396
6397         idx = srcu_read_lock(&vcpu->kvm->srcu);
6398         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
6399         srcu_read_unlock(&vcpu->kvm->srcu, idx);
6400         tr->physical_address = gpa;
6401         tr->valid = gpa != UNMAPPED_GVA;
6402         tr->writeable = 1;
6403         tr->usermode = 0;
6404
6405         return 0;
6406 }
6407
6408 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
6409 {
6410         struct i387_fxsave_struct *fxsave =
6411                         &vcpu->arch.guest_fpu.state->fxsave;
6412
6413         memcpy(fpu->fpr, fxsave->st_space, 128);
6414         fpu->fcw = fxsave->cwd;
6415         fpu->fsw = fxsave->swd;
6416         fpu->ftwx = fxsave->twd;
6417         fpu->last_opcode = fxsave->fop;
6418         fpu->last_ip = fxsave->rip;
6419         fpu->last_dp = fxsave->rdp;
6420         memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
6421
6422         return 0;
6423 }
6424
6425 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
6426 {
6427         struct i387_fxsave_struct *fxsave =
6428                         &vcpu->arch.guest_fpu.state->fxsave;
6429
6430         memcpy(fxsave->st_space, fpu->fpr, 128);
6431         fxsave->cwd = fpu->fcw;
6432         fxsave->swd = fpu->fsw;
6433         fxsave->twd = fpu->ftwx;
6434         fxsave->fop = fpu->last_opcode;
6435         fxsave->rip = fpu->last_ip;
6436         fxsave->rdp = fpu->last_dp;
6437         memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
6438
6439         return 0;
6440 }
6441
6442 int fx_init(struct kvm_vcpu *vcpu)
6443 {
6444         int err;
6445
6446         err = fpu_alloc(&vcpu->arch.guest_fpu);
6447         if (err)
6448                 return err;
6449
6450         fpu_finit(&vcpu->arch.guest_fpu);
6451
6452         /*
6453          * Ensure guest xcr0 is valid for loading
6454          */
6455         vcpu->arch.xcr0 = XSTATE_FP;
6456
6457         vcpu->arch.cr0 |= X86_CR0_ET;
6458
6459         return 0;
6460 }
6461 EXPORT_SYMBOL_GPL(fx_init);
6462
6463 static void fx_free(struct kvm_vcpu *vcpu)
6464 {
6465         fpu_free(&vcpu->arch.guest_fpu);
6466 }
6467
6468 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
6469 {
6470         if (vcpu->guest_fpu_loaded)
6471                 return;
6472
6473         /*
6474          * Restore all possible states in the guest,
6475          * and assume host would use all available bits.
6476          * Guest xcr0 would be loaded later.
6477          */
6478         kvm_put_guest_xcr0(vcpu);
6479         vcpu->guest_fpu_loaded = 1;
6480         __kernel_fpu_begin();
6481         fpu_restore_checking(&vcpu->arch.guest_fpu);
6482         trace_kvm_fpu(1);
6483 }
6484
6485 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
6486 {
6487         kvm_put_guest_xcr0(vcpu);
6488
6489         if (!vcpu->guest_fpu_loaded)
6490                 return;
6491
6492         vcpu->guest_fpu_loaded = 0;
6493         fpu_save_init(&vcpu->arch.guest_fpu);
6494         __kernel_fpu_end();
6495         ++vcpu->stat.fpu_reload;
6496         kvm_make_request(KVM_REQ_DEACTIVATE_FPU, vcpu);
6497         trace_kvm_fpu(0);
6498 }
6499
6500 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
6501 {
6502         kvmclock_reset(vcpu);
6503
6504         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
6505         fx_free(vcpu);
6506         kvm_x86_ops->vcpu_free(vcpu);
6507 }
6508
6509 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
6510                                                 unsigned int id)
6511 {
6512         if (check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
6513                 printk_once(KERN_WARNING
6514                 "kvm: SMP vm created on host with unstable TSC; "
6515                 "guest TSC will not be reliable\n");
6516         return kvm_x86_ops->vcpu_create(kvm, id);
6517 }
6518
6519 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
6520 {
6521         int r;
6522
6523         vcpu->arch.mtrr_state.have_fixed = 1;
6524         r = vcpu_load(vcpu);
6525         if (r)
6526                 return r;
6527         kvm_vcpu_reset(vcpu);
6528         r = kvm_mmu_setup(vcpu);
6529         vcpu_put(vcpu);
6530
6531         return r;
6532 }
6533
6534 int kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
6535 {
6536         int r;
6537         struct msr_data msr;
6538
6539         r = vcpu_load(vcpu);
6540         if (r)
6541                 return r;
6542         msr.data = 0x0;
6543         msr.index = MSR_IA32_TSC;
6544         msr.host_initiated = true;
6545         kvm_write_tsc(vcpu, &msr);
6546         vcpu_put(vcpu);
6547
6548         return r;
6549 }
6550
6551 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
6552 {
6553         int r;
6554         vcpu->arch.apf.msr_val = 0;
6555
6556         r = vcpu_load(vcpu);
6557         BUG_ON(r);
6558         kvm_mmu_unload(vcpu);
6559         vcpu_put(vcpu);
6560
6561         fx_free(vcpu);
6562         kvm_x86_ops->vcpu_free(vcpu);
6563 }
6564
6565 void kvm_vcpu_reset(struct kvm_vcpu *vcpu)
6566 {
6567         atomic_set(&vcpu->arch.nmi_queued, 0);
6568         vcpu->arch.nmi_pending = 0;
6569         vcpu->arch.nmi_injected = false;
6570
6571         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
6572         vcpu->arch.dr6 = DR6_FIXED_1;
6573         vcpu->arch.dr7 = DR7_FIXED_1;
6574         kvm_update_dr7(vcpu);
6575
6576         kvm_make_request(KVM_REQ_EVENT, vcpu);
6577         vcpu->arch.apf.msr_val = 0;
6578         vcpu->arch.st.msr_val = 0;
6579
6580         kvmclock_reset(vcpu);
6581
6582         kvm_clear_async_pf_completion_queue(vcpu);
6583         kvm_async_pf_hash_reset(vcpu);
6584         vcpu->arch.apf.halted = false;
6585
6586         kvm_pmu_reset(vcpu);
6587
6588         memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
6589         vcpu->arch.regs_avail = ~0;
6590         vcpu->arch.regs_dirty = ~0;
6591
6592         kvm_x86_ops->vcpu_reset(vcpu);
6593 }
6594
6595 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, unsigned int vector)
6596 {
6597         struct kvm_segment cs;
6598
6599         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
6600         cs.selector = vector << 8;
6601         cs.base = vector << 12;
6602         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
6603         kvm_rip_write(vcpu, 0);
6604 }
6605
6606 int kvm_arch_hardware_enable(void *garbage)
6607 {
6608         struct kvm *kvm;
6609         struct kvm_vcpu *vcpu;
6610         int i;
6611         int ret;
6612         u64 local_tsc;
6613         u64 max_tsc = 0;
6614         bool stable, backwards_tsc = false;
6615
6616         kvm_shared_msr_cpu_online();
6617         ret = kvm_x86_ops->hardware_enable(garbage);
6618         if (ret != 0)
6619                 return ret;
6620
6621         local_tsc = native_read_tsc();
6622         stable = !check_tsc_unstable();
6623         list_for_each_entry(kvm, &vm_list, vm_list) {
6624                 kvm_for_each_vcpu(i, vcpu, kvm) {
6625                         if (!stable && vcpu->cpu == smp_processor_id())
6626                                 set_bit(KVM_REQ_CLOCK_UPDATE, &vcpu->requests);
6627                         if (stable && vcpu->arch.last_host_tsc > local_tsc) {
6628                                 backwards_tsc = true;
6629                                 if (vcpu->arch.last_host_tsc > max_tsc)
6630                                         max_tsc = vcpu->arch.last_host_tsc;
6631                         }
6632                 }
6633         }
6634
6635         /*
6636          * Sometimes, even reliable TSCs go backwards.  This happens on
6637          * platforms that reset TSC during suspend or hibernate actions, but
6638          * maintain synchronization.  We must compensate.  Fortunately, we can
6639          * detect that condition here, which happens early in CPU bringup,
6640          * before any KVM threads can be running.  Unfortunately, we can't
6641          * bring the TSCs fully up to date with real time, as we aren't yet far
6642          * enough into CPU bringup that we know how much real time has actually
6643          * elapsed; our helper function, get_kernel_ns() will be using boot
6644          * variables that haven't been updated yet.
6645          *
6646          * So we simply find the maximum observed TSC above, then record the
6647          * adjustment to TSC in each VCPU.  When the VCPU later gets loaded,
6648          * the adjustment will be applied.  Note that we accumulate
6649          * adjustments, in case multiple suspend cycles happen before some VCPU
6650          * gets a chance to run again.  In the event that no KVM threads get a
6651          * chance to run, we will miss the entire elapsed period, as we'll have
6652          * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
6653          * loose cycle time.  This isn't too big a deal, since the loss will be
6654          * uniform across all VCPUs (not to mention the scenario is extremely
6655          * unlikely). It is possible that a second hibernate recovery happens
6656          * much faster than a first, causing the observed TSC here to be
6657          * smaller; this would require additional padding adjustment, which is
6658          * why we set last_host_tsc to the local tsc observed here.
6659          *
6660          * N.B. - this code below runs only on platforms with reliable TSC,
6661          * as that is the only way backwards_tsc is set above.  Also note
6662          * that this runs for ALL vcpus, which is not a bug; all VCPUs should
6663          * have the same delta_cyc adjustment applied if backwards_tsc
6664          * is detected.  Note further, this adjustment is only done once,
6665          * as we reset last_host_tsc on all VCPUs to stop this from being
6666          * called multiple times (one for each physical CPU bringup).
6667          *
6668          * Platforms with unreliable TSCs don't have to deal with this, they
6669          * will be compensated by the logic in vcpu_load, which sets the TSC to
6670          * catchup mode.  This will catchup all VCPUs to real time, but cannot
6671          * guarantee that they stay in perfect synchronization.
6672          */
6673         if (backwards_tsc) {
6674                 u64 delta_cyc = max_tsc - local_tsc;
6675                 list_for_each_entry(kvm, &vm_list, vm_list) {
6676                         kvm_for_each_vcpu(i, vcpu, kvm) {
6677                                 vcpu->arch.tsc_offset_adjustment += delta_cyc;
6678                                 vcpu->arch.last_host_tsc = local_tsc;
6679                                 set_bit(KVM_REQ_MASTERCLOCK_UPDATE,
6680                                         &vcpu->requests);
6681                         }
6682
6683                         /*
6684                          * We have to disable TSC offset matching.. if you were
6685                          * booting a VM while issuing an S4 host suspend....
6686                          * you may have some problem.  Solving this issue is
6687                          * left as an exercise to the reader.
6688                          */
6689                         kvm->arch.last_tsc_nsec = 0;
6690                         kvm->arch.last_tsc_write = 0;
6691                 }
6692
6693         }
6694         return 0;
6695 }
6696
6697 void kvm_arch_hardware_disable(void *garbage)
6698 {
6699         kvm_x86_ops->hardware_disable(garbage);
6700         drop_user_return_notifiers(garbage);
6701 }
6702
6703 int kvm_arch_hardware_setup(void)
6704 {
6705         return kvm_x86_ops->hardware_setup();
6706 }
6707
6708 void kvm_arch_hardware_unsetup(void)
6709 {
6710         kvm_x86_ops->hardware_unsetup();
6711 }
6712
6713 void kvm_arch_check_processor_compat(void *rtn)
6714 {
6715         kvm_x86_ops->check_processor_compatibility(rtn);
6716 }
6717
6718 bool kvm_vcpu_compatible(struct kvm_vcpu *vcpu)
6719 {
6720         return irqchip_in_kernel(vcpu->kvm) == (vcpu->arch.apic != NULL);
6721 }
6722
6723 struct static_key kvm_no_apic_vcpu __read_mostly;
6724
6725 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
6726 {
6727         struct page *page;
6728         struct kvm *kvm;
6729         int r;
6730
6731         BUG_ON(vcpu->kvm == NULL);
6732         kvm = vcpu->kvm;
6733
6734         vcpu->arch.emulate_ctxt.ops = &emulate_ops;
6735         if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_bsp(vcpu))
6736                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
6737         else
6738                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
6739
6740         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
6741         if (!page) {
6742                 r = -ENOMEM;
6743                 goto fail;
6744         }
6745         vcpu->arch.pio_data = page_address(page);
6746
6747         kvm_set_tsc_khz(vcpu, max_tsc_khz);
6748
6749         r = kvm_mmu_create(vcpu);
6750         if (r < 0)
6751                 goto fail_free_pio_data;
6752
6753         if (irqchip_in_kernel(kvm)) {
6754                 r = kvm_create_lapic(vcpu);
6755                 if (r < 0)
6756                         goto fail_mmu_destroy;
6757         } else
6758                 static_key_slow_inc(&kvm_no_apic_vcpu);
6759
6760         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
6761                                        GFP_KERNEL);
6762         if (!vcpu->arch.mce_banks) {
6763                 r = -ENOMEM;
6764                 goto fail_free_lapic;
6765         }
6766         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
6767
6768         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask, GFP_KERNEL)) {
6769                 r = -ENOMEM;
6770                 goto fail_free_mce_banks;
6771         }
6772
6773         r = fx_init(vcpu);
6774         if (r)
6775                 goto fail_free_wbinvd_dirty_mask;
6776
6777         vcpu->arch.ia32_tsc_adjust_msr = 0x0;
6778         vcpu->arch.pv_time_enabled = false;
6779         kvm_async_pf_hash_reset(vcpu);
6780         kvm_pmu_init(vcpu);
6781
6782         return 0;
6783 fail_free_wbinvd_dirty_mask:
6784         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
6785 fail_free_mce_banks:
6786         kfree(vcpu->arch.mce_banks);
6787 fail_free_lapic:
6788         kvm_free_lapic(vcpu);
6789 fail_mmu_destroy:
6790         kvm_mmu_destroy(vcpu);
6791 fail_free_pio_data:
6792         free_page((unsigned long)vcpu->arch.pio_data);
6793 fail:
6794         return r;
6795 }
6796
6797 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
6798 {
6799         int idx;
6800
6801         kvm_pmu_destroy(vcpu);
6802         kfree(vcpu->arch.mce_banks);
6803         kvm_free_lapic(vcpu);
6804         idx = srcu_read_lock(&vcpu->kvm->srcu);
6805         kvm_mmu_destroy(vcpu);
6806         srcu_read_unlock(&vcpu->kvm->srcu, idx);
6807         free_page((unsigned long)vcpu->arch.pio_data);
6808         if (!irqchip_in_kernel(vcpu->kvm))
6809                 static_key_slow_dec(&kvm_no_apic_vcpu);
6810 }
6811
6812 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
6813 {
6814         if (type)
6815                 return -EINVAL;
6816
6817         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
6818         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
6819
6820         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
6821         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
6822         /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
6823         set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID,
6824                 &kvm->arch.irq_sources_bitmap);
6825
6826         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
6827         mutex_init(&kvm->arch.apic_map_lock);
6828         spin_lock_init(&kvm->arch.pvclock_gtod_sync_lock);
6829
6830         pvclock_update_vm_gtod_copy(kvm);
6831
6832         return 0;
6833 }
6834
6835 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
6836 {
6837         int r;
6838         r = vcpu_load(vcpu);
6839         BUG_ON(r);
6840         kvm_mmu_unload(vcpu);
6841         vcpu_put(vcpu);
6842 }
6843
6844 static void kvm_free_vcpus(struct kvm *kvm)
6845 {
6846         unsigned int i;
6847         struct kvm_vcpu *vcpu;
6848
6849         /*
6850          * Unpin any mmu pages first.
6851          */
6852         kvm_for_each_vcpu(i, vcpu, kvm) {
6853                 kvm_clear_async_pf_completion_queue(vcpu);
6854                 kvm_unload_vcpu_mmu(vcpu);
6855         }
6856         kvm_for_each_vcpu(i, vcpu, kvm)
6857                 kvm_arch_vcpu_free(vcpu);
6858
6859         mutex_lock(&kvm->lock);
6860         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
6861                 kvm->vcpus[i] = NULL;
6862
6863         atomic_set(&kvm->online_vcpus, 0);
6864         mutex_unlock(&kvm->lock);
6865 }
6866
6867 void kvm_arch_sync_events(struct kvm *kvm)
6868 {
6869         kvm_free_all_assigned_devices(kvm);
6870         kvm_free_pit(kvm);
6871 }
6872
6873 void kvm_arch_destroy_vm(struct kvm *kvm)
6874 {
6875         if (current->mm == kvm->mm) {
6876                 /*
6877                  * Free memory regions allocated on behalf of userspace,
6878                  * unless the the memory map has changed due to process exit
6879                  * or fd copying.
6880                  */
6881                 struct kvm_userspace_memory_region mem;
6882                 memset(&mem, 0, sizeof(mem));
6883                 mem.slot = APIC_ACCESS_PAGE_PRIVATE_MEMSLOT;
6884                 kvm_set_memory_region(kvm, &mem);
6885
6886                 mem.slot = IDENTITY_PAGETABLE_PRIVATE_MEMSLOT;
6887                 kvm_set_memory_region(kvm, &mem);
6888
6889                 mem.slot = TSS_PRIVATE_MEMSLOT;
6890                 kvm_set_memory_region(kvm, &mem);
6891         }
6892         kvm_iommu_unmap_guest(kvm);
6893         kfree(kvm->arch.vpic);
6894         kfree(kvm->arch.vioapic);
6895         kvm_free_vcpus(kvm);
6896         if (kvm->arch.apic_access_page)
6897                 put_page(kvm->arch.apic_access_page);
6898         if (kvm->arch.ept_identity_pagetable)
6899                 put_page(kvm->arch.ept_identity_pagetable);
6900         kfree(rcu_dereference_check(kvm->arch.apic_map, 1));
6901 }
6902
6903 void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *free,
6904                            struct kvm_memory_slot *dont)
6905 {
6906         int i;
6907
6908         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
6909                 if (!dont || free->arch.rmap[i] != dont->arch.rmap[i]) {
6910                         kvm_kvfree(free->arch.rmap[i]);
6911                         free->arch.rmap[i] = NULL;
6912                 }
6913                 if (i == 0)
6914                         continue;
6915
6916                 if (!dont || free->arch.lpage_info[i - 1] !=
6917                              dont->arch.lpage_info[i - 1]) {
6918                         kvm_kvfree(free->arch.lpage_info[i - 1]);
6919                         free->arch.lpage_info[i - 1] = NULL;
6920                 }
6921         }
6922 }
6923
6924 int kvm_arch_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot,
6925                             unsigned long npages)
6926 {
6927         int i;
6928
6929         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
6930                 unsigned long ugfn;
6931                 int lpages;
6932                 int level = i + 1;
6933
6934                 lpages = gfn_to_index(slot->base_gfn + npages - 1,
6935                                       slot->base_gfn, level) + 1;
6936
6937                 slot->arch.rmap[i] =
6938                         kvm_kvzalloc(lpages * sizeof(*slot->arch.rmap[i]));
6939                 if (!slot->arch.rmap[i])
6940                         goto out_free;
6941                 if (i == 0)
6942                         continue;
6943
6944                 slot->arch.lpage_info[i - 1] = kvm_kvzalloc(lpages *
6945                                         sizeof(*slot->arch.lpage_info[i - 1]));
6946                 if (!slot->arch.lpage_info[i - 1])
6947                         goto out_free;
6948
6949                 if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
6950                         slot->arch.lpage_info[i - 1][0].write_count = 1;
6951                 if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
6952                         slot->arch.lpage_info[i - 1][lpages - 1].write_count = 1;
6953                 ugfn = slot->userspace_addr >> PAGE_SHIFT;
6954                 /*
6955                  * If the gfn and userspace address are not aligned wrt each
6956                  * other, or if explicitly asked to, disable large page
6957                  * support for this slot
6958                  */
6959                 if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1) ||
6960                     !kvm_largepages_enabled()) {
6961                         unsigned long j;
6962
6963                         for (j = 0; j < lpages; ++j)
6964                                 slot->arch.lpage_info[i - 1][j].write_count = 1;
6965                 }
6966         }
6967
6968         return 0;
6969
6970 out_free:
6971         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
6972                 kvm_kvfree(slot->arch.rmap[i]);
6973                 slot->arch.rmap[i] = NULL;
6974                 if (i == 0)
6975                         continue;
6976
6977                 kvm_kvfree(slot->arch.lpage_info[i - 1]);
6978                 slot->arch.lpage_info[i - 1] = NULL;
6979         }
6980         return -ENOMEM;
6981 }
6982
6983 void kvm_arch_memslots_updated(struct kvm *kvm)
6984 {
6985 }
6986
6987 int kvm_arch_prepare_memory_region(struct kvm *kvm,
6988                                 struct kvm_memory_slot *memslot,
6989                                 struct kvm_userspace_memory_region *mem,
6990                                 enum kvm_mr_change change)
6991 {
6992         /*
6993          * Only private memory slots need to be mapped here since
6994          * KVM_SET_MEMORY_REGION ioctl is no longer supported.
6995          */
6996         if ((memslot->id >= KVM_USER_MEM_SLOTS) && (change == KVM_MR_CREATE)) {
6997                 unsigned long userspace_addr;
6998
6999                 /*
7000                  * MAP_SHARED to prevent internal slot pages from being moved
7001                  * by fork()/COW.
7002                  */
7003                 userspace_addr = vm_mmap(NULL, 0, memslot->npages * PAGE_SIZE,
7004                                          PROT_READ | PROT_WRITE,
7005                                          MAP_SHARED | MAP_ANONYMOUS, 0);
7006
7007                 if (IS_ERR((void *)userspace_addr))
7008                         return PTR_ERR((void *)userspace_addr);
7009
7010                 memslot->userspace_addr = userspace_addr;
7011         }
7012
7013         return 0;
7014 }
7015
7016 void kvm_arch_commit_memory_region(struct kvm *kvm,
7017                                 struct kvm_userspace_memory_region *mem,
7018                                 const struct kvm_memory_slot *old,
7019                                 enum kvm_mr_change change)
7020 {
7021
7022         int nr_mmu_pages = 0;
7023
7024         if ((mem->slot >= KVM_USER_MEM_SLOTS) && (change == KVM_MR_DELETE)) {
7025                 int ret;
7026
7027                 ret = vm_munmap(old->userspace_addr,
7028                                 old->npages * PAGE_SIZE);
7029                 if (ret < 0)
7030                         printk(KERN_WARNING
7031                                "kvm_vm_ioctl_set_memory_region: "
7032                                "failed to munmap memory\n");
7033         }
7034
7035         if (!kvm->arch.n_requested_mmu_pages)
7036                 nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
7037
7038         if (nr_mmu_pages)
7039                 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
7040         /*
7041          * Write protect all pages for dirty logging.
7042          * Existing largepage mappings are destroyed here and new ones will
7043          * not be created until the end of the logging.
7044          */
7045         if ((change != KVM_MR_DELETE) && (mem->flags & KVM_MEM_LOG_DIRTY_PAGES))
7046                 kvm_mmu_slot_remove_write_access(kvm, mem->slot);
7047         /*
7048          * If memory slot is created, or moved, we need to clear all
7049          * mmio sptes.
7050          */
7051         if ((change == KVM_MR_CREATE) || (change == KVM_MR_MOVE)) {
7052                 kvm_mmu_zap_mmio_sptes(kvm);
7053                 kvm_reload_remote_mmus(kvm);
7054         }
7055 }
7056
7057 void kvm_arch_flush_shadow_all(struct kvm *kvm)
7058 {
7059         kvm_mmu_zap_all(kvm);
7060         kvm_reload_remote_mmus(kvm);
7061 }
7062
7063 void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
7064                                    struct kvm_memory_slot *slot)
7065 {
7066         kvm_arch_flush_shadow_all(kvm);
7067 }
7068
7069 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
7070 {
7071         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
7072                 !vcpu->arch.apf.halted)
7073                 || !list_empty_careful(&vcpu->async_pf.done)
7074                 || kvm_apic_has_events(vcpu)
7075                 || atomic_read(&vcpu->arch.nmi_queued) ||
7076                 (kvm_arch_interrupt_allowed(vcpu) &&
7077                  kvm_cpu_has_interrupt(vcpu));
7078 }
7079
7080 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
7081 {
7082         return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
7083 }
7084
7085 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
7086 {
7087         return kvm_x86_ops->interrupt_allowed(vcpu);
7088 }
7089
7090 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
7091 {
7092         unsigned long current_rip = kvm_rip_read(vcpu) +
7093                 get_segment_base(vcpu, VCPU_SREG_CS);
7094
7095         return current_rip == linear_rip;
7096 }
7097 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
7098
7099 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
7100 {
7101         unsigned long rflags;
7102
7103         rflags = kvm_x86_ops->get_rflags(vcpu);
7104         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
7105                 rflags &= ~X86_EFLAGS_TF;
7106         return rflags;
7107 }
7108 EXPORT_SYMBOL_GPL(kvm_get_rflags);
7109
7110 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
7111 {
7112         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
7113             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
7114                 rflags |= X86_EFLAGS_TF;
7115         kvm_x86_ops->set_rflags(vcpu, rflags);
7116         kvm_make_request(KVM_REQ_EVENT, vcpu);
7117 }
7118 EXPORT_SYMBOL_GPL(kvm_set_rflags);
7119
7120 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
7121 {
7122         int r;
7123
7124         if ((vcpu->arch.mmu.direct_map != work->arch.direct_map) ||
7125               work->wakeup_all)
7126                 return;
7127
7128         r = kvm_mmu_reload(vcpu);
7129         if (unlikely(r))
7130                 return;
7131
7132         if (!vcpu->arch.mmu.direct_map &&
7133               work->arch.cr3 != vcpu->arch.mmu.get_cr3(vcpu))
7134                 return;
7135
7136         vcpu->arch.mmu.page_fault(vcpu, work->gva, 0, true);
7137 }
7138
7139 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
7140 {
7141         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
7142 }
7143
7144 static inline u32 kvm_async_pf_next_probe(u32 key)
7145 {
7146         return (key + 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU) - 1);
7147 }
7148
7149 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
7150 {
7151         u32 key = kvm_async_pf_hash_fn(gfn);
7152
7153         while (vcpu->arch.apf.gfns[key] != ~0)
7154                 key = kvm_async_pf_next_probe(key);
7155
7156         vcpu->arch.apf.gfns[key] = gfn;
7157 }
7158
7159 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
7160 {
7161         int i;
7162         u32 key = kvm_async_pf_hash_fn(gfn);
7163
7164         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU) &&
7165                      (vcpu->arch.apf.gfns[key] != gfn &&
7166                       vcpu->arch.apf.gfns[key] != ~0); i++)
7167                 key = kvm_async_pf_next_probe(key);
7168
7169         return key;
7170 }
7171
7172 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
7173 {
7174         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
7175 }
7176
7177 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
7178 {
7179         u32 i, j, k;
7180
7181         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
7182         while (true) {
7183                 vcpu->arch.apf.gfns[i] = ~0;
7184                 do {
7185                         j = kvm_async_pf_next_probe(j);
7186                         if (vcpu->arch.apf.gfns[j] == ~0)
7187                                 return;
7188                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
7189                         /*
7190                          * k lies cyclically in ]i,j]
7191                          * |    i.k.j |
7192                          * |....j i.k.| or  |.k..j i...|
7193                          */
7194                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
7195                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
7196                 i = j;
7197         }
7198 }
7199
7200 static int apf_put_user(struct kvm_vcpu *vcpu, u32 val)
7201 {
7202
7203         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &val,
7204                                       sizeof(val));
7205 }
7206
7207 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
7208                                      struct kvm_async_pf *work)
7209 {
7210         struct x86_exception fault;
7211
7212         trace_kvm_async_pf_not_present(work->arch.token, work->gva);
7213         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
7214
7215         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) ||
7216             (vcpu->arch.apf.send_user_only &&
7217              kvm_x86_ops->get_cpl(vcpu) == 0))
7218                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
7219         else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_NOT_PRESENT)) {
7220                 fault.vector = PF_VECTOR;
7221                 fault.error_code_valid = true;
7222                 fault.error_code = 0;
7223                 fault.nested_page_fault = false;
7224                 fault.address = work->arch.token;
7225                 kvm_inject_page_fault(vcpu, &fault);
7226         }
7227 }
7228
7229 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
7230                                  struct kvm_async_pf *work)
7231 {
7232         struct x86_exception fault;
7233
7234         trace_kvm_async_pf_ready(work->arch.token, work->gva);
7235         if (work->wakeup_all)
7236                 work->arch.token = ~0; /* broadcast wakeup */
7237         else
7238                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
7239
7240         if ((vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) &&
7241             !apf_put_user(vcpu, KVM_PV_REASON_PAGE_READY)) {
7242                 fault.vector = PF_VECTOR;
7243                 fault.error_code_valid = true;
7244                 fault.error_code = 0;
7245                 fault.nested_page_fault = false;
7246                 fault.address = work->arch.token;
7247                 kvm_inject_page_fault(vcpu, &fault);
7248         }
7249         vcpu->arch.apf.halted = false;
7250         vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
7251 }
7252
7253 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu)
7254 {
7255         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED))
7256                 return true;
7257         else
7258                 return !kvm_event_needs_reinjection(vcpu) &&
7259                         kvm_x86_ops->interrupt_allowed(vcpu);
7260 }
7261
7262 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
7263 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
7264 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
7265 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
7266 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
7267 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
7268 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
7269 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
7270 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
7271 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
7272 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
7273 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);