arch/x86/kvm/x86.c

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * derived from drivers/kvm/kvm_main.c
   5  *
   6  * Copyright (C) 2006 Qumranet, Inc.
   7  * Copyright (C) 2008 Qumranet, Inc.
   8  * Copyright IBM Corporation, 2008
   9  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  10  *
  11  * Authors:
  12  *   Avi Kivity   <avi@qumranet.com>
  13  *   Yaniv Kamay  <yaniv@qumranet.com>
  14  *   Amit Shah    <amit.shah@qumranet.com>
  15  *   Ben-Ami Yassour <benami@il.ibm.com>
  16  *
  17  * This work is licensed under the terms of the GNU GPL, version 2.  See
  18  * the COPYING file in the top-level directory.
  19  *
  20  */
  21
  22 #include <linux/kvm_host.h>
  23 #include "irq.h"
  24 #include "mmu.h"
  25 #include "i8254.h"
  26 #include "tss.h"
  27 #include "kvm_cache_regs.h"
  28 #include "x86.h"
  29 #include "cpuid.h"
  30 #include "assigned-dev.h"
  31 #include "pmu.h"
  32 #include "hyperv.h"
  33
  34 #include <linux/clocksource.h>
  35 #include <linux/interrupt.h>
  36 #include <linux/kvm.h>
  37 #include <linux/fs.h>
  38 #include <linux/vmalloc.h>
  39 #include <linux/module.h>
  40 #include <linux/mman.h>
  41 #include <linux/highmem.h>
  42 #include <linux/iommu.h>
  43 #include <linux/intel-iommu.h>
  44 #include <linux/cpufreq.h>
  45 #include <linux/user-return-notifier.h>
  46 #include <linux/srcu.h>
  47 #include <linux/slab.h>
  48 #include <linux/perf_event.h>
  49 #include <linux/uaccess.h>
  50 #include <linux/hash.h>
  51 #include <linux/pci.h>
  52 #include <linux/timekeeper_internal.h>
  53 #include <linux/pvclock_gtod.h>
  54 #include <linux/kvm_irqfd.h>
  55 #include <linux/irqbypass.h>
  56 #include <trace/events/kvm.h>
  57
  58 #define CREATE_TRACE_POINTS
  59 #include "trace.h"
  60
  61 #include <asm/debugreg.h>
  62 #include <asm/msr.h>
  63 #include <asm/desc.h>
  64 #include <asm/mce.h>
  65 #include <linux/kernel_stat.h>
  66 #include <asm/fpu/internal.h> /* Ugh! */
  67 #include <asm/pvclock.h>
  68 #include <asm/div64.h>
  69 #include <asm/irq_remapping.h>
  70
  71 #define MAX_IO_MSRS 256
  72 #define KVM_MAX_MCE_BANKS 32
  73 #define KVM_MCE_CAP_SUPPORTED (MCG_CTL_P | MCG_SER_P)
  74
  75 #define emul_to_vcpu(ctxt) \
  76         container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
  77
  78 /* EFER defaults:
  79  * - enable syscall per default because its emulated by KVM
  80  * - enable LME and LMA per default on 64 bit KVM
  81  */
  82 #ifdef CONFIG_X86_64
  83 static
  84 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
  85 #else
  86 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
  87 #endif
  88
  89 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
  90 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
  91
  92 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
  93 static void process_nmi(struct kvm_vcpu *vcpu);
  94 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
  95
  96 struct kvm_x86_ops *kvm_x86_ops __read_mostly;
  97 EXPORT_SYMBOL_GPL(kvm_x86_ops);
  98
  99 static bool __read_mostly ignore_msrs = 0;
 100 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
 101
 102 unsigned int min_timer_period_us = 500;
 103 module_param(min_timer_period_us, uint, S_IRUGO | S_IWUSR);
 104
 105 static bool __read_mostly kvmclock_periodic_sync = true;
 106 module_param(kvmclock_periodic_sync, bool, S_IRUGO);
 107
 108 bool __read_mostly kvm_has_tsc_control;
 109 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
 110 u32  __read_mostly kvm_max_guest_tsc_khz;
 111 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
 112 u8   __read_mostly kvm_tsc_scaling_ratio_frac_bits;
 113 EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits);
 114 u64  __read_mostly kvm_max_tsc_scaling_ratio;
 115 EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio);
 116 static u64 __read_mostly kvm_default_tsc_scaling_ratio;
 117
 118 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
 119 static u32 __read_mostly tsc_tolerance_ppm = 250;
 120 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
 121
 122 /* lapic timer advance (tscdeadline mode only) in nanoseconds */
 123 unsigned int __read_mostly lapic_timer_advance_ns = 0;
 124 module_param(lapic_timer_advance_ns, uint, S_IRUGO | S_IWUSR);
 125
 126 static bool __read_mostly backwards_tsc_observed = false;
 127
 128 #define KVM_NR_SHARED_MSRS 16
 129
 130 struct kvm_shared_msrs_global {
 131         int nr;
 132         u32 msrs[KVM_NR_SHARED_MSRS];
 133 };
 134
 135 struct kvm_shared_msrs {
 136         struct user_return_notifier urn;
 137         bool registered;
 138         struct kvm_shared_msr_values {
 139                 u64 host;
 140                 u64 curr;
 141         } values[KVM_NR_SHARED_MSRS];
 142 };
 143
 144 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
 145 static struct kvm_shared_msrs __percpu *shared_msrs;
 146
 147 struct kvm_stats_debugfs_item debugfs_entries[] = {
 148         { "pf_fixed", VCPU_STAT(pf_fixed) },
 149         { "pf_guest", VCPU_STAT(pf_guest) },
 150         { "tlb_flush", VCPU_STAT(tlb_flush) },
 151         { "invlpg", VCPU_STAT(invlpg) },
 152         { "exits", VCPU_STAT(exits) },
 153         { "io_exits", VCPU_STAT(io_exits) },
 154         { "mmio_exits", VCPU_STAT(mmio_exits) },
 155         { "signal_exits", VCPU_STAT(signal_exits) },
 156         { "irq_window", VCPU_STAT(irq_window_exits) },
 157         { "nmi_window", VCPU_STAT(nmi_window_exits) },
 158         { "halt_exits", VCPU_STAT(halt_exits) },
 159         { "halt_successful_poll", VCPU_STAT(halt_successful_poll) },
 160         { "halt_attempted_poll", VCPU_STAT(halt_attempted_poll) },
 161         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
 162         { "hypercalls", VCPU_STAT(hypercalls) },
 163         { "request_irq", VCPU_STAT(request_irq_exits) },
 164         { "irq_exits", VCPU_STAT(irq_exits) },
 165         { "host_state_reload", VCPU_STAT(host_state_reload) },
 166         { "efer_reload", VCPU_STAT(efer_reload) },
 167         { "fpu_reload", VCPU_STAT(fpu_reload) },
 168         { "insn_emulation", VCPU_STAT(insn_emulation) },
 169         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
 170         { "irq_injections", VCPU_STAT(irq_injections) },
 171         { "nmi_injections", VCPU_STAT(nmi_injections) },
 172         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
 173         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
 174         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
 175         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
 176         { "mmu_flooded", VM_STAT(mmu_flooded) },
 177         { "mmu_recycled", VM_STAT(mmu_recycled) },
 178         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
 179         { "mmu_unsync", VM_STAT(mmu_unsync) },
 180         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
 181         { "largepages", VM_STAT(lpages) },
 182         { NULL }
 183 };
 184
 185 u64 __read_mostly host_xcr0;
 186
 187 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
 188
 189 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 190 {
 191         int i;
 192         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU); i++)
 193                 vcpu->arch.apf.gfns[i] = ~0;
 194 }
 195
 196 static void kvm_on_user_return(struct user_return_notifier *urn)
 197 {
 198         unsigned slot;
 199         struct kvm_shared_msrs *locals
 200                 = container_of(urn, struct kvm_shared_msrs, urn);
 201         struct kvm_shared_msr_values *values;
 202
 203         for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
 204                 values = &locals->values[slot];
 205                 if (values->host != values->curr) {
 206                         wrmsrl(shared_msrs_global.msrs[slot], values->host);
 207                         values->curr = values->host;
 208                 }
 209         }
 210         locals->registered = false;
 211         user_return_notifier_unregister(urn);
 212 }
 213
 214 static void shared_msr_update(unsigned slot, u32 msr)
 215 {
 216         u64 value;
 217         unsigned int cpu = smp_processor_id();
 218         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 219
 220         /* only read, and nobody should modify it at this time,
 221          * so don't need lock */
 222         if (slot >= shared_msrs_global.nr) {
 223                 printk(KERN_ERR "kvm: invalid MSR slot!");
 224                 return;
 225         }
 226         rdmsrl_safe(msr, &value);
 227         smsr->values[slot].host = value;
 228         smsr->values[slot].curr = value;
 229 }
 230
 231 void kvm_define_shared_msr(unsigned slot, u32 msr)
 232 {
 233         BUG_ON(slot >= KVM_NR_SHARED_MSRS);
 234         shared_msrs_global.msrs[slot] = msr;
 235         if (slot >= shared_msrs_global.nr)
 236                 shared_msrs_global.nr = slot + 1;
 237 }
 238 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
 239
 240 static void kvm_shared_msr_cpu_online(void)
 241 {
 242         unsigned i;
 243
 244         for (i = 0; i < shared_msrs_global.nr; ++i)
 245                 shared_msr_update(i, shared_msrs_global.msrs[i]);
 246 }
 247
 248 int kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
 249 {
 250         unsigned int cpu = smp_processor_id();
 251         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 252         int err;
 253
 254         if (((value ^ smsr->values[slot].curr) & mask) == 0)
 255                 return 0;
 256         smsr->values[slot].curr = value;
 257         err = wrmsrl_safe(shared_msrs_global.msrs[slot], value);
 258         if (err)
 259                 return 1;
 260
 261         if (!smsr->registered) {
 262                 smsr->urn.on_user_return = kvm_on_user_return;
 263                 user_return_notifier_register(&smsr->urn);
 264                 smsr->registered = true;
 265         }
 266         return 0;
 267 }
 268 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
 269
 270 static void drop_user_return_notifiers(void)
 271 {
 272         unsigned int cpu = smp_processor_id();
 273         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 274
 275         if (smsr->registered)
 276                 kvm_on_user_return(&smsr->urn);
 277 }
 278
 279 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 280 {
 281         return vcpu->arch.apic_base;
 282 }
 283 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 284
 285 int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
 286 {
 287         u64 old_state = vcpu->arch.apic_base &
 288                 (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE);
 289         u64 new_state = msr_info->data &
 290                 (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE);
 291         u64 reserved_bits = ((~0ULL) << cpuid_maxphyaddr(vcpu)) |
 292                 0x2ff | (guest_cpuid_has_x2apic(vcpu) ? 0 : X2APIC_ENABLE);
 293
 294         if (!msr_info->host_initiated &&
 295             ((msr_info->data & reserved_bits) != 0 ||
 296              new_state == X2APIC_ENABLE ||
 297              (new_state == MSR_IA32_APICBASE_ENABLE &&
 298               old_state == (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE)) ||
 299              (new_state == (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE) &&
 300               old_state == 0)))
 301                 return 1;
 302
 303         kvm_lapic_set_base(vcpu, msr_info->data);
 304         return 0;
 305 }
 306 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 307
 308 asmlinkage __visible void kvm_spurious_fault(void)
 309 {
 310         /* Fault while not rebooting.  We want the trace. */
 311         BUG();
 312 }
 313 EXPORT_SYMBOL_GPL(kvm_spurious_fault);
 314
 315 #define EXCPT_BENIGN            0
 316 #define EXCPT_CONTRIBUTORY      1
 317 #define EXCPT_PF                2
 318
 319 static int exception_class(int vector)
 320 {
 321         switch (vector) {
 322         case PF_VECTOR:
 323                 return EXCPT_PF;
 324         case DE_VECTOR:
 325         case TS_VECTOR:
 326         case NP_VECTOR:
 327         case SS_VECTOR:
 328         case GP_VECTOR:
 329                 return EXCPT_CONTRIBUTORY;
 330         default:
 331                 break;
 332         }
 333         return EXCPT_BENIGN;
 334 }
 335
 336 #define EXCPT_FAULT             0
 337 #define EXCPT_TRAP              1
 338 #define EXCPT_ABORT             2
 339 #define EXCPT_INTERRUPT         3
 340
 341 static int exception_type(int vector)
 342 {
 343         unsigned int mask;
 344
 345         if (WARN_ON(vector > 31 || vector == NMI_VECTOR))
 346                 return EXCPT_INTERRUPT;
 347
 348         mask = 1 << vector;
 349
 350         /* #DB is trap, as instruction watchpoints are handled elsewhere */
 351         if (mask & ((1 << DB_VECTOR) | (1 << BP_VECTOR) | (1 << OF_VECTOR)))
 352                 return EXCPT_TRAP;
 353
 354         if (mask & ((1 << DF_VECTOR) | (1 << MC_VECTOR)))
 355                 return EXCPT_ABORT;
 356
 357         /* Reserved exceptions will result in fault */
 358         return EXCPT_FAULT;
 359 }
 360
 361 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 362                 unsigned nr, bool has_error, u32 error_code,
 363                 bool reinject)
 364 {
 365         u32 prev_nr;
 366         int class1, class2;
 367
 368         kvm_make_request(KVM_REQ_EVENT, vcpu);
 369
 370         if (!vcpu->arch.exception.pending) {
 371         queue:
 372                 if (has_error && !is_protmode(vcpu))
 373                         has_error = false;
 374                 vcpu->arch.exception.pending = true;
 375                 vcpu->arch.exception.has_error_code = has_error;
 376                 vcpu->arch.exception.nr = nr;
 377                 vcpu->arch.exception.error_code = error_code;
 378                 vcpu->arch.exception.reinject = reinject;
 379                 return;
 380         }
 381
 382         /* to check exception */
 383         prev_nr = vcpu->arch.exception.nr;
 384         if (prev_nr == DF_VECTOR) {
 385                 /* triple fault -> shutdown */
 386                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 387                 return;
 388         }
 389         class1 = exception_class(prev_nr);
 390         class2 = exception_class(nr);
 391         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 392                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 393                 /* generate double fault per SDM Table 5-5 */
 394                 vcpu->arch.exception.pending = true;
 395                 vcpu->arch.exception.has_error_code = true;
 396                 vcpu->arch.exception.nr = DF_VECTOR;
 397                 vcpu->arch.exception.error_code = 0;
 398         } else
 399                 /* replace previous exception with a new one in a hope
 400                    that instruction re-execution will regenerate lost
 401                    exception */
 402                 goto queue;
 403 }
 404
 405 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 406 {
 407         kvm_multiple_exception(vcpu, nr, false, 0, false);
 408 }
 409 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 410
 411 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 412 {
 413         kvm_multiple_exception(vcpu, nr, false, 0, true);
 414 }
 415 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 416
 417 void kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 418 {
 419         if (err)
 420                 kvm_inject_gp(vcpu, 0);
 421         else
 422                 kvm_x86_ops->skip_emulated_instruction(vcpu);
 423 }
 424 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 425
 426 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 427 {
 428         ++vcpu->stat.pf_guest;
 429         vcpu->arch.cr2 = fault->address;
 430         kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 431 }
 432 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
 433
 434 static bool kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 435 {
 436         if (mmu_is_nested(vcpu) && !fault->nested_page_fault)
 437                 vcpu->arch.nested_mmu.inject_page_fault(vcpu, fault);
 438         else
 439                 vcpu->arch.mmu.inject_page_fault(vcpu, fault);
 440
 441         return fault->nested_page_fault;
 442 }
 443
 444 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 445 {
 446         atomic_inc(&vcpu->arch.nmi_queued);
 447         kvm_make_request(KVM_REQ_NMI, vcpu);
 448 }
 449 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 450
 451 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 452 {
 453         kvm_multiple_exception(vcpu, nr, true, error_code, false);
 454 }
 455 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 456
 457 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 458 {
 459         kvm_multiple_exception(vcpu, nr, true, error_code, true);
 460 }
 461 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 462
 463 /*
 464  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 465  * a #GP and return false.
 466  */
 467 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 468 {
 469         if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
 470                 return true;
 471         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 472         return false;
 473 }
 474 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 475
 476 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr)
 477 {
 478         if ((dr != 4 && dr != 5) || !kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 479                 return true;
 480
 481         kvm_queue_exception(vcpu, UD_VECTOR);
 482         return false;
 483 }
 484 EXPORT_SYMBOL_GPL(kvm_require_dr);
 485
 486 /*
 487  * This function will be used to read from the physical memory of the currently
 488  * running guest. The difference to kvm_vcpu_read_guest_page is that this function
 489  * can read from guest physical or from the guest's guest physical memory.
 490  */
 491 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 492                             gfn_t ngfn, void *data, int offset, int len,
 493                             u32 access)
 494 {
 495         struct x86_exception exception;
 496         gfn_t real_gfn;
 497         gpa_t ngpa;
 498
 499         ngpa     = gfn_to_gpa(ngfn);
 500         real_gfn = mmu->translate_gpa(vcpu, ngpa, access, &exception);
 501         if (real_gfn == UNMAPPED_GVA)
 502                 return -EFAULT;
 503
 504         real_gfn = gpa_to_gfn(real_gfn);
 505
 506         return kvm_vcpu_read_guest_page(vcpu, real_gfn, data, offset, len);
 507 }
 508 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 509
 510 static int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
 511                                void *data, int offset, int len, u32 access)
 512 {
 513         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
 514                                        data, offset, len, access);
 515 }
 516
 517 /*
 518  * Load the pae pdptrs.  Return true is they are all valid.
 519  */
 520 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 521 {
 522         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 523         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 524         int i;
 525         int ret;
 526         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 527
 528         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 529                                       offset * sizeof(u64), sizeof(pdpte),
 530                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 531         if (ret < 0) {
 532                 ret = 0;
 533                 goto out;
 534         }
 535         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 536                 if (is_present_gpte(pdpte[i]) &&
 537                     (pdpte[i] &
 538                      vcpu->arch.mmu.guest_rsvd_check.rsvd_bits_mask[0][2])) {
 539                         ret = 0;
 540                         goto out;
 541                 }
 542         }
 543         ret = 1;
 544
 545         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 546         __set_bit(VCPU_EXREG_PDPTR,
 547                   (unsigned long *)&vcpu->arch.regs_avail);
 548         __set_bit(VCPU_EXREG_PDPTR,
 549                   (unsigned long *)&vcpu->arch.regs_dirty);
 550 out:
 551
 552         return ret;
 553 }
 554 EXPORT_SYMBOL_GPL(load_pdptrs);
 555
 556 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
 557 {
 558         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
 559         bool changed = true;
 560         int offset;
 561         gfn_t gfn;
 562         int r;
 563
 564         if (is_long_mode(vcpu) || !is_pae(vcpu))
 565                 return false;
 566
 567         if (!test_bit(VCPU_EXREG_PDPTR,
 568                       (unsigned long *)&vcpu->arch.regs_avail))
 569                 return true;
 570
 571         gfn = (kvm_read_cr3(vcpu) & ~31u) >> PAGE_SHIFT;
 572         offset = (kvm_read_cr3(vcpu) & ~31u) & (PAGE_SIZE - 1);
 573         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
 574                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
 575         if (r < 0)
 576                 goto out;
 577         changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
 578 out:
 579
 580         return changed;
 581 }
 582
 583 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 584 {
 585         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 586         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP;
 587
 588         cr0 |= X86_CR0_ET;
 589
 590 #ifdef CONFIG_X86_64
 591         if (cr0 & 0xffffffff00000000UL)
 592                 return 1;
 593 #endif
 594
 595         cr0 &= ~CR0_RESERVED_BITS;
 596
 597         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 598                 return 1;
 599
 600         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 601                 return 1;
 602
 603         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
 604 #ifdef CONFIG_X86_64
 605                 if ((vcpu->arch.efer & EFER_LME)) {
 606                         int cs_db, cs_l;
 607
 608                         if (!is_pae(vcpu))
 609                                 return 1;
 610                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
 611                         if (cs_l)
 612                                 return 1;
 613                 } else
 614 #endif
 615                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 616                                                  kvm_read_cr3(vcpu)))
 617                         return 1;
 618         }
 619
 620         if (!(cr0 & X86_CR0_PG) && kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
 621                 return 1;
 622
 623         kvm_x86_ops->set_cr0(vcpu, cr0);
 624
 625         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 626                 kvm_clear_async_pf_completion_queue(vcpu);
 627                 kvm_async_pf_hash_reset(vcpu);
 628         }
 629
 630         if ((cr0 ^ old_cr0) & update_bits)
 631                 kvm_mmu_reset_context(vcpu);
 632
 633         if (((cr0 ^ old_cr0) & X86_CR0_CD) &&
 634             kvm_arch_has_noncoherent_dma(vcpu->kvm) &&
 635             !kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_CD_NW_CLEARED))
 636                 kvm_zap_gfn_range(vcpu->kvm, 0, ~0ULL);
 637
 638         return 0;
 639 }
 640 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 641
 642 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 643 {
 644         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 645 }
 646 EXPORT_SYMBOL_GPL(kvm_lmsw);
 647
 648 static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
 649 {
 650         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
 651                         !vcpu->guest_xcr0_loaded) {
 652                 /* kvm_set_xcr() also depends on this */
 653                 xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
 654                 vcpu->guest_xcr0_loaded = 1;
 655         }
 656 }
 657
 658 static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
 659 {
 660         if (vcpu->guest_xcr0_loaded) {
 661                 if (vcpu->arch.xcr0 != host_xcr0)
 662                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
 663                 vcpu->guest_xcr0_loaded = 0;
 664         }
 665 }
 666
 667 static int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 668 {
 669         u64 xcr0 = xcr;
 670         u64 old_xcr0 = vcpu->arch.xcr0;
 671         u64 valid_bits;
 672
 673         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 674         if (index != XCR_XFEATURE_ENABLED_MASK)
 675                 return 1;
 676         if (!(xcr0 & XSTATE_FP))
 677                 return 1;
 678         if ((xcr0 & XSTATE_YMM) && !(xcr0 & XSTATE_SSE))
 679                 return 1;
 680
 681         /*
 682          * Do not allow the guest to set bits that we do not support
 683          * saving.  However, xcr0 bit 0 is always set, even if the
 684          * emulated CPU does not support XSAVE (see fx_init).
 685          */
 686         valid_bits = vcpu->arch.guest_supported_xcr0 | XSTATE_FP;
 687         if (xcr0 & ~valid_bits)
 688                 return 1;
 689
 690         if ((!(xcr0 & XSTATE_BNDREGS)) != (!(xcr0 & XSTATE_BNDCSR)))
 691                 return 1;
 692
 693         if (xcr0 & XSTATE_AVX512) {
 694                 if (!(xcr0 & XSTATE_YMM))
 695                         return 1;
 696                 if ((xcr0 & XSTATE_AVX512) != XSTATE_AVX512)
 697                         return 1;
 698         }
 699         kvm_put_guest_xcr0(vcpu);
 700         vcpu->arch.xcr0 = xcr0;
 701
 702         if ((xcr0 ^ old_xcr0) & XSTATE_EXTEND_MASK)
 703                 kvm_update_cpuid(vcpu);
 704         return 0;
 705 }
 706
 707 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 708 {
 709         if (kvm_x86_ops->get_cpl(vcpu) != 0 ||
 710             __kvm_set_xcr(vcpu, index, xcr)) {
 711                 kvm_inject_gp(vcpu, 0);
 712                 return 1;
 713         }
 714         return 0;
 715 }
 716 EXPORT_SYMBOL_GPL(kvm_set_xcr);
 717
 718 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 719 {
 720         unsigned long old_cr4 = kvm_read_cr4(vcpu);
 721         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE |
 722                                    X86_CR4_SMEP | X86_CR4_SMAP;
 723
 724         if (cr4 & CR4_RESERVED_BITS)
 725                 return 1;
 726
 727         if (!guest_cpuid_has_xsave(vcpu) && (cr4 & X86_CR4_OSXSAVE))
 728                 return 1;
 729
 730         if (!guest_cpuid_has_smep(vcpu) && (cr4 & X86_CR4_SMEP))
 731                 return 1;
 732
 733         if (!guest_cpuid_has_smap(vcpu) && (cr4 & X86_CR4_SMAP))
 734                 return 1;
 735
 736         if (!guest_cpuid_has_fsgsbase(vcpu) && (cr4 & X86_CR4_FSGSBASE))
 737                 return 1;
 738
 739         if (is_long_mode(vcpu)) {
 740                 if (!(cr4 & X86_CR4_PAE))
 741                         return 1;
 742         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
 743                    && ((cr4 ^ old_cr4) & pdptr_bits)
 744                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 745                                    kvm_read_cr3(vcpu)))
 746                 return 1;
 747
 748         if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
 749                 if (!guest_cpuid_has_pcid(vcpu))
 750                         return 1;
 751
 752                 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
 753                 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_MASK) || !is_long_mode(vcpu))
 754                         return 1;
 755         }
 756
 757         if (kvm_x86_ops->set_cr4(vcpu, cr4))
 758                 return 1;
 759
 760         if (((cr4 ^ old_cr4) & pdptr_bits) ||
 761             (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
 762                 kvm_mmu_reset_context(vcpu);
 763
 764         if ((cr4 ^ old_cr4) & X86_CR4_OSXSAVE)
 765                 kvm_update_cpuid(vcpu);
 766
 767         return 0;
 768 }
 769 EXPORT_SYMBOL_GPL(kvm_set_cr4);
 770
 771 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 772 {
 773 #ifdef CONFIG_X86_64
 774         cr3 &= ~CR3_PCID_INVD;
 775 #endif
 776
 777         if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
 778                 kvm_mmu_sync_roots(vcpu);
 779                 kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu);
 780                 return 0;
 781         }
 782
 783         if (is_long_mode(vcpu)) {
 784                 if (cr3 & CR3_L_MODE_RESERVED_BITS)
 785                         return 1;
 786         } else if (is_pae(vcpu) && is_paging(vcpu) &&
 787                    !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
 788                 return 1;
 789
 790         vcpu->arch.cr3 = cr3;
 791         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
 792         kvm_mmu_new_cr3(vcpu);
 793         return 0;
 794 }
 795 EXPORT_SYMBOL_GPL(kvm_set_cr3);
 796
 797 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
 798 {
 799         if (cr8 & CR8_RESERVED_BITS)
 800                 return 1;
 801         if (lapic_in_kernel(vcpu))
 802                 kvm_lapic_set_tpr(vcpu, cr8);
 803         else
 804                 vcpu->arch.cr8 = cr8;
 805         return 0;
 806 }
 807 EXPORT_SYMBOL_GPL(kvm_set_cr8);
 808
 809 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
 810 {
 811         if (lapic_in_kernel(vcpu))
 812                 return kvm_lapic_get_cr8(vcpu);
 813         else
 814                 return vcpu->arch.cr8;
 815 }
 816 EXPORT_SYMBOL_GPL(kvm_get_cr8);
 817
 818 static void kvm_update_dr0123(struct kvm_vcpu *vcpu)
 819 {
 820         int i;
 821
 822         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
 823                 for (i = 0; i < KVM_NR_DB_REGS; i++)
 824                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
 825                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_RELOAD;
 826         }
 827 }
 828
 829 static void kvm_update_dr6(struct kvm_vcpu *vcpu)
 830 {
 831         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 832                 kvm_x86_ops->set_dr6(vcpu, vcpu->arch.dr6);
 833 }
 834
 835 static void kvm_update_dr7(struct kvm_vcpu *vcpu)
 836 {
 837         unsigned long dr7;
 838
 839         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
 840                 dr7 = vcpu->arch.guest_debug_dr7;
 841         else
 842                 dr7 = vcpu->arch.dr7;
 843         kvm_x86_ops->set_dr7(vcpu, dr7);
 844         vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_BP_ENABLED;
 845         if (dr7 & DR7_BP_EN_MASK)
 846                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_BP_ENABLED;
 847 }
 848
 849 static u64 kvm_dr6_fixed(struct kvm_vcpu *vcpu)
 850 {
 851         u64 fixed = DR6_FIXED_1;
 852
 853         if (!guest_cpuid_has_rtm(vcpu))
 854                 fixed |= DR6_RTM;
 855         return fixed;
 856 }
 857
 858 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 859 {
 860         switch (dr) {
 861         case 0 ... 3:
 862                 vcpu->arch.db[dr] = val;
 863                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 864                         vcpu->arch.eff_db[dr] = val;
 865                 break;
 866         case 4:
 867                 /* fall through */
 868         case 6:
 869                 if (val & 0xffffffff00000000ULL)
 870                         return -1; /* #GP */
 871                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | kvm_dr6_fixed(vcpu);
 872                 kvm_update_dr6(vcpu);
 873                 break;
 874         case 5:
 875                 /* fall through */
 876         default: /* 7 */
 877                 if (val & 0xffffffff00000000ULL)
 878                         return -1; /* #GP */
 879                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
 880                 kvm_update_dr7(vcpu);
 881                 break;
 882         }
 883
 884         return 0;
 885 }
 886
 887 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 888 {
 889         if (__kvm_set_dr(vcpu, dr, val)) {
 890                 kvm_inject_gp(vcpu, 0);
 891                 return 1;
 892         }
 893         return 0;
 894 }
 895 EXPORT_SYMBOL_GPL(kvm_set_dr);
 896
 897 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 898 {
 899         switch (dr) {
 900         case 0 ... 3:
 901                 *val = vcpu->arch.db[dr];
 902                 break;
 903         case 4:
 904                 /* fall through */
 905         case 6:
 906                 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
 907                         *val = vcpu->arch.dr6;
 908                 else
 909                         *val = kvm_x86_ops->get_dr6(vcpu);
 910                 break;
 911         case 5:
 912                 /* fall through */
 913         default: /* 7 */
 914                 *val = vcpu->arch.dr7;
 915                 break;
 916         }
 917         return 0;
 918 }
 919 EXPORT_SYMBOL_GPL(kvm_get_dr);
 920
 921 bool kvm_rdpmc(struct kvm_vcpu *vcpu)
 922 {
 923         u32 ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
 924         u64 data;
 925         int err;
 926
 927         err = kvm_pmu_rdpmc(vcpu, ecx, &data);
 928         if (err)
 929                 return err;
 930         kvm_register_write(vcpu, VCPU_REGS_RAX, (u32)data);
 931         kvm_register_write(vcpu, VCPU_REGS_RDX, data >> 32);
 932         return err;
 933 }
 934 EXPORT_SYMBOL_GPL(kvm_rdpmc);
 935
 936 /*
 937  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
 938  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
 939  *
 940  * This list is modified at module load time to reflect the
 941  * capabilities of the host cpu. This capabilities test skips MSRs that are
 942  * kvm-specific. Those are put in emulated_msrs; filtering of emulated_msrs
 943  * may depend on host virtualization features rather than host cpu features.
 944  */
 945
 946 static u32 msrs_to_save[] = {
 947         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
 948         MSR_STAR,
 949 #ifdef CONFIG_X86_64
 950         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
 951 #endif
 952         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA,
 953         MSR_IA32_FEATURE_CONTROL, MSR_IA32_BNDCFGS
 954 };
 955
 956 static unsigned num_msrs_to_save;
 957
 958 static u32 emulated_msrs[] = {
 959         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
 960         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
 961         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
 962         HV_X64_MSR_TIME_REF_COUNT, HV_X64_MSR_REFERENCE_TSC,
 963         HV_X64_MSR_CRASH_P0, HV_X64_MSR_CRASH_P1, HV_X64_MSR_CRASH_P2,
 964         HV_X64_MSR_CRASH_P3, HV_X64_MSR_CRASH_P4, HV_X64_MSR_CRASH_CTL,
 965         HV_X64_MSR_RESET,
 966         HV_X64_MSR_VP_INDEX,
 967         HV_X64_MSR_VP_RUNTIME,
 968         HV_X64_MSR_APIC_ASSIST_PAGE, MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
 969         MSR_KVM_PV_EOI_EN,
 970
 971         MSR_IA32_TSC_ADJUST,
 972         MSR_IA32_TSCDEADLINE,
 973         MSR_IA32_MISC_ENABLE,
 974         MSR_IA32_MCG_STATUS,
 975         MSR_IA32_MCG_CTL,
 976         MSR_IA32_SMBASE,
 977 };
 978
 979 static unsigned num_emulated_msrs;
 980
 981 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
 982 {
 983         if (efer & efer_reserved_bits)
 984                 return false;
 985
 986         if (efer & EFER_FFXSR) {
 987                 struct kvm_cpuid_entry2 *feat;
 988
 989                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 990                 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT)))
 991                         return false;
 992         }
 993
 994         if (efer & EFER_SVME) {
 995                 struct kvm_cpuid_entry2 *feat;
 996
 997                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 998                 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM)))
 999                         return false;
1000         }
1001
1002         return true;
1003 }
1004 EXPORT_SYMBOL_GPL(kvm_valid_efer);
1005
1006 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
1007 {
1008         u64 old_efer = vcpu->arch.efer;
1009
1010         if (!kvm_valid_efer(vcpu, efer))
1011                 return 1;
1012
1013         if (is_paging(vcpu)
1014             && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
1015                 return 1;
1016
1017         efer &= ~EFER_LMA;
1018         efer |= vcpu->arch.efer & EFER_LMA;
1019
1020         kvm_x86_ops->set_efer(vcpu, efer);
1021
1022         /* Update reserved bits */
1023         if ((efer ^ old_efer) & EFER_NX)
1024                 kvm_mmu_reset_context(vcpu);
1025
1026         return 0;
1027 }
1028
1029 void kvm_enable_efer_bits(u64 mask)
1030 {
1031        efer_reserved_bits &= ~mask;
1032 }
1033 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
1034
1035 /*
1036  * Writes msr value into into the appropriate "register".
1037  * Returns 0 on success, non-0 otherwise.
1038  * Assumes vcpu_load() was already called.
1039  */
1040 int kvm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
1041 {
1042         switch (msr->index) {
1043         case MSR_FS_BASE:
1044         case MSR_GS_BASE:
1045         case MSR_KERNEL_GS_BASE:
1046         case MSR_CSTAR:
1047         case MSR_LSTAR:
1048                 if (is_noncanonical_address(msr->data))
1049                         return 1;
1050                 break;
1051         case MSR_IA32_SYSENTER_EIP:
1052         case MSR_IA32_SYSENTER_ESP:
1053                 /*
1054                  * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1055                  * non-canonical address is written on Intel but not on
1056                  * AMD (which ignores the top 32-bits, because it does
1057                  * not implement 64-bit SYSENTER).
1058                  *
1059                  * 64-bit code should hence be able to write a non-canonical
1060                  * value on AMD.  Making the address canonical ensures that
1061                  * vmentry does not fail on Intel after writing a non-canonical
1062                  * value, and that something deterministic happens if the guest
1063                  * invokes 64-bit SYSENTER.
1064                  */
1065                 msr->data = get_canonical(msr->data);
1066         }
1067         return kvm_x86_ops->set_msr(vcpu, msr);
1068 }
1069 EXPORT_SYMBOL_GPL(kvm_set_msr);
1070
1071 /*
1072  * Adapt set_msr() to msr_io()'s calling convention
1073  */
1074 static int do_get_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1075 {
1076         struct msr_data msr;
1077         int r;
1078
1079         msr.index = index;
1080         msr.host_initiated = true;
1081         r = kvm_get_msr(vcpu, &msr);
1082         if (r)
1083                 return r;
1084
1085         *data = msr.data;
1086         return 0;
1087 }
1088
1089 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1090 {
1091         struct msr_data msr;
1092
1093         msr.data = *data;
1094         msr.index = index;
1095         msr.host_initiated = true;
1096         return kvm_set_msr(vcpu, &msr);
1097 }
1098
1099 #ifdef CONFIG_X86_64
1100 struct pvclock_gtod_data {
1101         seqcount_t      seq;
1102
1103         struct { /* extract of a clocksource struct */
1104                 int vclock_mode;
1105                 cycle_t cycle_last;
1106                 cycle_t mask;
1107                 u32     mult;
1108                 u32     shift;
1109         } clock;
1110
1111         u64             boot_ns;
1112         u64             nsec_base;
1113 };
1114
1115 static struct pvclock_gtod_data pvclock_gtod_data;
1116
1117 static void update_pvclock_gtod(struct timekeeper *tk)
1118 {
1119         struct pvclock_gtod_data *vdata = &pvclock_gtod_data;
1120         u64 boot_ns;
1121
1122         boot_ns = ktime_to_ns(ktime_add(tk->tkr_mono.base, tk->offs_boot));
1123
1124         write_seqcount_begin(&vdata->seq);
1125
1126         /* copy pvclock gtod data */
1127         vdata->clock.vclock_mode        = tk->tkr_mono.clock->archdata.vclock_mode;
1128         vdata->clock.cycle_last         = tk->tkr_mono.cycle_last;
1129         vdata->clock.mask               = tk->tkr_mono.mask;
1130         vdata->clock.mult               = tk->tkr_mono.mult;
1131         vdata->clock.shift              = tk->tkr_mono.shift;
1132
1133         vdata->boot_ns                  = boot_ns;
1134         vdata->nsec_base                = tk->tkr_mono.xtime_nsec;
1135
1136         write_seqcount_end(&vdata->seq);
1137 }
1138 #endif
1139
1140 void kvm_set_pending_timer(struct kvm_vcpu *vcpu)
1141 {
1142         /*
1143          * Note: KVM_REQ_PENDING_TIMER is implicitly checked in
1144          * vcpu_enter_guest.  This function is only called from
1145          * the physical CPU that is running vcpu.
1146          */
1147         kvm_make_request(KVM_REQ_PENDING_TIMER, vcpu);
1148 }
1149
1150 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
1151 {
1152         int version;
1153         int r;
1154         struct pvclock_wall_clock wc;
1155         struct timespec boot;
1156
1157         if (!wall_clock)
1158                 return;
1159
1160         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
1161         if (r)
1162                 return;
1163
1164         if (version & 1)
1165                 ++version;  /* first time write, random junk */
1166
1167         ++version;
1168
1169         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
1170
1171         /*
1172          * The guest calculates current wall clock time by adding
1173          * system time (updated by kvm_guest_time_update below) to the
1174          * wall clock specified here.  guest system time equals host
1175          * system time for us, thus we must fill in host boot time here.
1176          */
1177         getboottime(&boot);
1178
1179         if (kvm->arch.kvmclock_offset) {
1180                 struct timespec ts = ns_to_timespec(kvm->arch.kvmclock_offset);
1181                 boot = timespec_sub(boot, ts);
1182         }
1183         wc.sec = boot.tv_sec;
1184         wc.nsec = boot.tv_nsec;
1185         wc.version = version;
1186
1187         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
1188
1189         version++;
1190         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
1191 }
1192
1193 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
1194 {
1195         uint32_t quotient, remainder;
1196
1197         /* Don't try to replace with do_div(), this one calculates
1198          * "(dividend << 32) / divisor" */
1199         __asm__ ( "divl %4"
1200                   : "=a" (quotient), "=d" (remainder)
1201                   : "0" (0), "1" (dividend), "r" (divisor) );
1202         return quotient;
1203 }
1204
1205 static void kvm_get_time_scale(uint32_t scaled_khz, uint32_t base_khz,
1206                                s8 *pshift, u32 *pmultiplier)
1207 {
1208         uint64_t scaled64;
1209         int32_t  shift = 0;
1210         uint64_t tps64;
1211         uint32_t tps32;
1212
1213         tps64 = base_khz * 1000LL;
1214         scaled64 = scaled_khz * 1000LL;
1215         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
1216                 tps64 >>= 1;
1217                 shift--;
1218         }
1219
1220         tps32 = (uint32_t)tps64;
1221         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
1222                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
1223                         scaled64 >>= 1;
1224                 else
1225                         tps32 <<= 1;
1226                 shift++;
1227         }
1228
1229         *pshift = shift;
1230         *pmultiplier = div_frac(scaled64, tps32);
1231
1232         pr_debug("%s: base_khz %u => %u, shift %d, mul %u\n",
1233                  __func__, base_khz, scaled_khz, shift, *pmultiplier);
1234 }
1235
1236 #ifdef CONFIG_X86_64
1237 static atomic_t kvm_guest_has_master_clock = ATOMIC_INIT(0);
1238 #endif
1239
1240 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
1241 static unsigned long max_tsc_khz;
1242
1243 static inline u64 nsec_to_cycles(struct kvm_vcpu *vcpu, u64 nsec)
1244 {
1245         return pvclock_scale_delta(nsec, vcpu->arch.virtual_tsc_mult,
1246                                    vcpu->arch.virtual_tsc_shift);
1247 }
1248
1249 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
1250 {
1251         u64 v = (u64)khz * (1000000 + ppm);
1252         do_div(v, 1000000);
1253         return v;
1254 }
1255
1256 static int set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz, bool scale)
1257 {
1258         u64 ratio;
1259
1260         /* Guest TSC same frequency as host TSC? */
1261         if (!scale) {
1262                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
1263                 return 0;
1264         }
1265
1266         /* TSC scaling supported? */
1267         if (!kvm_has_tsc_control) {
1268                 if (user_tsc_khz > tsc_khz) {
1269                         vcpu->arch.tsc_catchup = 1;
1270                         vcpu->arch.tsc_always_catchup = 1;
1271                         return 0;
1272                 } else {
1273                         WARN(1, "user requested TSC rate below hardware speed\n");
1274                         return -1;
1275                 }
1276         }
1277
1278         /* TSC scaling required  - calculate ratio */
1279         ratio = mul_u64_u32_div(1ULL << kvm_tsc_scaling_ratio_frac_bits,
1280                                 user_tsc_khz, tsc_khz);
1281
1282         if (ratio == 0 || ratio >= kvm_max_tsc_scaling_ratio) {
1283                 WARN_ONCE(1, "Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
1284                           user_tsc_khz);
1285                 return -1;
1286         }
1287
1288         vcpu->arch.tsc_scaling_ratio = ratio;
1289         return 0;
1290 }
1291
1292 static int kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 this_tsc_khz)
1293 {
1294         u32 thresh_lo, thresh_hi;
1295         int use_scaling = 0;
1296
1297         /* tsc_khz can be zero if TSC calibration fails */
1298         if (this_tsc_khz == 0) {
1299                 /* set tsc_scaling_ratio to a safe value */
1300                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
1301                 return -1;
1302         }
1303
1304         /* Compute a scale to convert nanoseconds in TSC cycles */
1305         kvm_get_time_scale(this_tsc_khz, NSEC_PER_SEC / 1000,
1306                            &vcpu->arch.virtual_tsc_shift,
1307                            &vcpu->arch.virtual_tsc_mult);
1308         vcpu->arch.virtual_tsc_khz = this_tsc_khz;
1309
1310         /*
1311          * Compute the variation in TSC rate which is acceptable
1312          * within the range of tolerance and decide if the
1313          * rate being applied is within that bounds of the hardware
1314          * rate.  If so, no scaling or compensation need be done.
1315          */
1316         thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
1317         thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
1318         if (this_tsc_khz < thresh_lo || this_tsc_khz > thresh_hi) {
1319                 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", this_tsc_khz, thresh_lo, thresh_hi);
1320                 use_scaling = 1;
1321         }
1322         return set_tsc_khz(vcpu, this_tsc_khz, use_scaling);
1323 }
1324
1325 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
1326 {
1327         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
1328                                       vcpu->arch.virtual_tsc_mult,
1329                                       vcpu->arch.virtual_tsc_shift);
1330         tsc += vcpu->arch.this_tsc_write;
1331         return tsc;
1332 }
1333
1334 static void kvm_track_tsc_matching(struct kvm_vcpu *vcpu)
1335 {
1336 #ifdef CONFIG_X86_64
1337         bool vcpus_matched;
1338         struct kvm_arch *ka = &vcpu->kvm->arch;
1339         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1340
1341         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1342                          atomic_read(&vcpu->kvm->online_vcpus));
1343
1344         /*
1345          * Once the masterclock is enabled, always perform request in
1346          * order to update it.
1347          *
1348          * In order to enable masterclock, the host clocksource must be TSC
1349          * and the vcpus need to have matched TSCs.  When that happens,
1350          * perform request to enable masterclock.
1351          */
1352         if (ka->use_master_clock ||
1353             (gtod->clock.vclock_mode == VCLOCK_TSC && vcpus_matched))
1354                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
1355
1356         trace_kvm_track_tsc(vcpu->vcpu_id, ka->nr_vcpus_matched_tsc,
1357                             atomic_read(&vcpu->kvm->online_vcpus),
1358                             ka->use_master_clock, gtod->clock.vclock_mode);
1359 #endif
1360 }
1361
1362 static void update_ia32_tsc_adjust_msr(struct kvm_vcpu *vcpu, s64 offset)
1363 {
1364         u64 curr_offset = kvm_x86_ops->read_tsc_offset(vcpu);
1365         vcpu->arch.ia32_tsc_adjust_msr += offset - curr_offset;
1366 }
1367
1368 /*
1369  * Multiply tsc by a fixed point number represented by ratio.
1370  *
1371  * The most significant 64-N bits (mult) of ratio represent the
1372  * integral part of the fixed point number; the remaining N bits
1373  * (frac) represent the fractional part, ie. ratio represents a fixed
1374  * point number (mult + frac * 2^(-N)).
1375  *
1376  * N equals to kvm_tsc_scaling_ratio_frac_bits.
1377  */
1378 static inline u64 __scale_tsc(u64 ratio, u64 tsc)
1379 {
1380         return mul_u64_u64_shr(tsc, ratio, kvm_tsc_scaling_ratio_frac_bits);
1381 }
1382
1383 u64 kvm_scale_tsc(struct kvm_vcpu *vcpu, u64 tsc)
1384 {
1385         u64 _tsc = tsc;
1386         u64 ratio = vcpu->arch.tsc_scaling_ratio;
1387
1388         if (ratio != kvm_default_tsc_scaling_ratio)
1389                 _tsc = __scale_tsc(ratio, tsc);
1390
1391         return _tsc;
1392 }
1393 EXPORT_SYMBOL_GPL(kvm_scale_tsc);
1394
1395 static u64 kvm_compute_tsc_offset(struct kvm_vcpu *vcpu, u64 target_tsc)
1396 {
1397         u64 tsc;
1398
1399         tsc = kvm_scale_tsc(vcpu, rdtsc());
1400
1401         return target_tsc - tsc;
1402 }
1403
1404 void kvm_write_tsc(struct kvm_vcpu *vcpu, struct msr_data *msr)
1405 {
1406         struct kvm *kvm = vcpu->kvm;
1407         u64 offset, ns, elapsed;
1408         unsigned long flags;
1409         s64 usdiff;
1410         bool matched;
1411         bool already_matched;
1412         u64 data = msr->data;
1413
1414         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1415         offset = kvm_compute_tsc_offset(vcpu, data);
1416         ns = get_kernel_ns();
1417         elapsed = ns - kvm->arch.last_tsc_nsec;
1418
1419         if (vcpu->arch.virtual_tsc_khz) {
1420                 int faulted = 0;
1421
1422                 /* n.b - signed multiplication and division required */
1423                 usdiff = data - kvm->arch.last_tsc_write;
1424 #ifdef CONFIG_X86_64
1425                 usdiff = (usdiff * 1000) / vcpu->arch.virtual_tsc_khz;
1426 #else
1427                 /* do_div() only does unsigned */
1428                 asm("1: idivl %[divisor]\n"
1429                     "2: xor %%edx, %%edx\n"
1430                     "   movl $0, %[faulted]\n"
1431                     "3:\n"
1432                     ".section .fixup,\"ax\"\n"
1433                     "4: movl $1, %[faulted]\n"
1434                     "   jmp  3b\n"
1435                     ".previous\n"
1436
1437                 _ASM_EXTABLE(1b, 4b)
1438
1439                 : "=A"(usdiff), [faulted] "=r" (faulted)
1440                 : "A"(usdiff * 1000), [divisor] "rm"(vcpu->arch.virtual_tsc_khz));
1441
1442 #endif
1443                 do_div(elapsed, 1000);
1444                 usdiff -= elapsed;
1445                 if (usdiff < 0)
1446                         usdiff = -usdiff;
1447
1448                 /* idivl overflow => difference is larger than USEC_PER_SEC */
1449                 if (faulted)
1450                         usdiff = USEC_PER_SEC;
1451         } else
1452                 usdiff = USEC_PER_SEC; /* disable TSC match window below */
1453
1454         /*
1455          * Special case: TSC write with a small delta (1 second) of virtual
1456          * cycle time against real time is interpreted as an attempt to
1457          * synchronize the CPU.
1458          *
1459          * For a reliable TSC, we can match TSC offsets, and for an unstable
1460          * TSC, we add elapsed time in this computation.  We could let the
1461          * compensation code attempt to catch up if we fall behind, but
1462          * it's better to try to match offsets from the beginning.
1463          */
1464         if (usdiff < USEC_PER_SEC &&
1465             vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
1466                 if (!check_tsc_unstable()) {
1467                         offset = kvm->arch.cur_tsc_offset;
1468                         pr_debug("kvm: matched tsc offset for %llu\n", data);
1469                 } else {
1470                         u64 delta = nsec_to_cycles(vcpu, elapsed);
1471                         data += delta;
1472                         offset = kvm_compute_tsc_offset(vcpu, data);
1473                         pr_debug("kvm: adjusted tsc offset by %llu\n", delta);
1474                 }
1475                 matched = true;
1476                 already_matched = (vcpu->arch.this_tsc_generation == kvm->arch.cur_tsc_generation);
1477         } else {
1478                 /*
1479                  * We split periods of matched TSC writes into generations.
1480                  * For each generation, we track the original measured
1481                  * nanosecond time, offset, and write, so if TSCs are in
1482                  * sync, we can match exact offset, and if not, we can match
1483                  * exact software computation in compute_guest_tsc()
1484                  *
1485                  * These values are tracked in kvm->arch.cur_xxx variables.
1486                  */
1487                 kvm->arch.cur_tsc_generation++;
1488                 kvm->arch.cur_tsc_nsec = ns;
1489                 kvm->arch.cur_tsc_write = data;
1490                 kvm->arch.cur_tsc_offset = offset;
1491                 matched = false;
1492                 pr_debug("kvm: new tsc generation %llu, clock %llu\n",
1493                          kvm->arch.cur_tsc_generation, data);
1494         }
1495
1496         /*
1497          * We also track th most recent recorded KHZ, write and time to
1498          * allow the matching interval to be extended at each write.
1499          */
1500         kvm->arch.last_tsc_nsec = ns;
1501         kvm->arch.last_tsc_write = data;
1502         kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
1503
1504         vcpu->arch.last_guest_tsc = data;
1505
1506         /* Keep track of which generation this VCPU has synchronized to */
1507         vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
1508         vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
1509         vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
1510
1511         if (guest_cpuid_has_tsc_adjust(vcpu) && !msr->host_initiated)
1512                 update_ia32_tsc_adjust_msr(vcpu, offset);
1513         kvm_x86_ops->write_tsc_offset(vcpu, offset);
1514         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1515
1516         spin_lock(&kvm->arch.pvclock_gtod_sync_lock);
1517         if (!matched) {
1518                 kvm->arch.nr_vcpus_matched_tsc = 0;
1519         } else if (!already_matched) {
1520                 kvm->arch.nr_vcpus_matched_tsc++;
1521         }
1522
1523         kvm_track_tsc_matching(vcpu);
1524         spin_unlock(&kvm->arch.pvclock_gtod_sync_lock);
1525 }
1526
1527 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1528
1529 static inline void adjust_tsc_offset_guest(struct kvm_vcpu *vcpu,
1530                                            s64 adjustment)
1531 {
1532         kvm_x86_ops->adjust_tsc_offset_guest(vcpu, adjustment);
1533 }
1534
1535 static inline void adjust_tsc_offset_host(struct kvm_vcpu *vcpu, s64 adjustment)
1536 {
1537         if (vcpu->arch.tsc_scaling_ratio != kvm_default_tsc_scaling_ratio)
1538                 WARN_ON(adjustment < 0);
1539         adjustment = kvm_scale_tsc(vcpu, (u64) adjustment);
1540         kvm_x86_ops->adjust_tsc_offset_guest(vcpu, adjustment);
1541 }
1542
1543 #ifdef CONFIG_X86_64
1544
1545 static cycle_t read_tsc(void)
1546 {
1547         cycle_t ret = (cycle_t)rdtsc_ordered();
1548         u64 last = pvclock_gtod_data.clock.cycle_last;
1549
1550         if (likely(ret >= last))
1551                 return ret;
1552
1553         /*
1554          * GCC likes to generate cmov here, but this branch is extremely
1555          * predictable (it's just a funciton of time and the likely is
1556          * very likely) and there's a data dependence, so force GCC
1557          * to generate a branch instead.  I don't barrier() because
1558          * we don't actually need a barrier, and if this function
1559          * ever gets inlined it will generate worse code.
1560          */
1561         asm volatile ("");
1562         return last;
1563 }
1564
1565 static inline u64 vgettsc(cycle_t *cycle_now)
1566 {
1567         long v;
1568         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1569
1570         *cycle_now = read_tsc();
1571
1572         v = (*cycle_now - gtod->clock.cycle_last) & gtod->clock.mask;
1573         return v * gtod->clock.mult;
1574 }
1575
1576 static int do_monotonic_boot(s64 *t, cycle_t *cycle_now)
1577 {
1578         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1579         unsigned long seq;
1580         int mode;
1581         u64 ns;
1582
1583         do {
1584                 seq = read_seqcount_begin(&gtod->seq);
1585                 mode = gtod->clock.vclock_mode;
1586                 ns = gtod->nsec_base;
1587                 ns += vgettsc(cycle_now);
1588                 ns >>= gtod->clock.shift;
1589                 ns += gtod->boot_ns;
1590         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
1591         *t = ns;
1592
1593         return mode;
1594 }
1595
1596 /* returns true if host is using tsc clocksource */
1597 static bool kvm_get_time_and_clockread(s64 *kernel_ns, cycle_t *cycle_now)
1598 {
1599         /* checked again under seqlock below */
1600         if (pvclock_gtod_data.clock.vclock_mode != VCLOCK_TSC)
1601                 return false;
1602
1603         return do_monotonic_boot(kernel_ns, cycle_now) == VCLOCK_TSC;
1604 }
1605 #endif
1606
1607 /*
1608  *
1609  * Assuming a stable TSC across physical CPUS, and a stable TSC
1610  * across virtual CPUs, the following condition is possible.
1611  * Each numbered line represents an event visible to both
1612  * CPUs at the next numbered event.
1613  *
1614  * "timespecX" represents host monotonic time. "tscX" represents
1615  * RDTSC value.
1616  *
1617  *              VCPU0 on CPU0           |       VCPU1 on CPU1
1618  *
1619  * 1.  read timespec0,tsc0
1620  * 2.                                   | timespec1 = timespec0 + N
1621  *                                      | tsc1 = tsc0 + M
1622  * 3. transition to guest               | transition to guest
1623  * 4. ret0 = timespec0 + (rdtsc - tsc0) |
1624  * 5.                                   | ret1 = timespec1 + (rdtsc - tsc1)
1625  *                                      | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
1626  *
1627  * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
1628  *
1629  *      - ret0 < ret1
1630  *      - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
1631  *              ...
1632  *      - 0 < N - M => M < N
1633  *
1634  * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
1635  * always the case (the difference between two distinct xtime instances
1636  * might be smaller then the difference between corresponding TSC reads,
1637  * when updating guest vcpus pvclock areas).
1638  *
1639  * To avoid that problem, do not allow visibility of distinct
1640  * system_timestamp/tsc_timestamp values simultaneously: use a master
1641  * copy of host monotonic time values. Update that master copy
1642  * in lockstep.
1643  *
1644  * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
1645  *
1646  */
1647
1648 static void pvclock_update_vm_gtod_copy(struct kvm *kvm)
1649 {
1650 #ifdef CONFIG_X86_64
1651         struct kvm_arch *ka = &kvm->arch;
1652         int vclock_mode;
1653         bool host_tsc_clocksource, vcpus_matched;
1654
1655         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1656                         atomic_read(&kvm->online_vcpus));
1657
1658         /*
1659          * If the host uses TSC clock, then passthrough TSC as stable
1660          * to the guest.
1661          */
1662         host_tsc_clocksource = kvm_get_time_and_clockread(
1663                                         &ka->master_kernel_ns,
1664                                         &ka->master_cycle_now);
1665
1666         ka->use_master_clock = host_tsc_clocksource && vcpus_matched
1667                                 && !backwards_tsc_observed
1668                                 && !ka->boot_vcpu_runs_old_kvmclock;
1669
1670         if (ka->use_master_clock)
1671                 atomic_set(&kvm_guest_has_master_clock, 1);
1672
1673         vclock_mode = pvclock_gtod_data.clock.vclock_mode;
1674         trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode,
1675                                         vcpus_matched);
1676 #endif
1677 }
1678
1679 static void kvm_gen_update_masterclock(struct kvm *kvm)
1680 {
1681 #ifdef CONFIG_X86_64
1682         int i;
1683         struct kvm_vcpu *vcpu;
1684         struct kvm_arch *ka = &kvm->arch;
1685
1686         spin_lock(&ka->pvclock_gtod_sync_lock);
1687         kvm_make_mclock_inprogress_request(kvm);
1688         /* no guest entries from this point */
1689         pvclock_update_vm_gtod_copy(kvm);
1690
1691         kvm_for_each_vcpu(i, vcpu, kvm)
1692                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1693
1694         /* guest entries allowed */
1695         kvm_for_each_vcpu(i, vcpu, kvm)
1696                 clear_bit(KVM_REQ_MCLOCK_INPROGRESS, &vcpu->requests);
1697
1698         spin_unlock(&ka->pvclock_gtod_sync_lock);
1699 #endif
1700 }
1701
1702 static int kvm_guest_time_update(struct kvm_vcpu *v)
1703 {
1704         unsigned long flags, this_tsc_khz;
1705         struct kvm_vcpu_arch *vcpu = &v->arch;
1706         struct kvm_arch *ka = &v->kvm->arch;
1707         s64 kernel_ns;
1708         u64 tsc_timestamp, host_tsc;
1709         struct pvclock_vcpu_time_info guest_hv_clock;
1710         u8 pvclock_flags;
1711         bool use_master_clock;
1712
1713         kernel_ns = 0;
1714         host_tsc = 0;
1715
1716         /*
1717          * If the host uses TSC clock, then passthrough TSC as stable
1718          * to the guest.
1719          */
1720         spin_lock(&ka->pvclock_gtod_sync_lock);
1721         use_master_clock = ka->use_master_clock;
1722         if (use_master_clock) {
1723                 host_tsc = ka->master_cycle_now;
1724                 kernel_ns = ka->master_kernel_ns;
1725         }
1726         spin_unlock(&ka->pvclock_gtod_sync_lock);
1727
1728         /* Keep irq disabled to prevent changes to the clock */
1729         local_irq_save(flags);
1730         this_tsc_khz = __this_cpu_read(cpu_tsc_khz);
1731         if (unlikely(this_tsc_khz == 0)) {
1732                 local_irq_restore(flags);
1733                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1734                 return 1;
1735         }
1736         if (!use_master_clock) {
1737                 host_tsc = rdtsc();
1738                 kernel_ns = get_kernel_ns();
1739         }
1740
1741         tsc_timestamp = kvm_x86_ops->read_l1_tsc(v, host_tsc);
1742
1743         /*
1744          * We may have to catch up the TSC to match elapsed wall clock
1745          * time for two reasons, even if kvmclock is used.
1746          *   1) CPU could have been running below the maximum TSC rate
1747          *   2) Broken TSC compensation resets the base at each VCPU
1748          *      entry to avoid unknown leaps of TSC even when running
1749          *      again on the same CPU.  This may cause apparent elapsed
1750          *      time to disappear, and the guest to stand still or run
1751          *      very slowly.
1752          */
1753         if (vcpu->tsc_catchup) {
1754                 u64 tsc = compute_guest_tsc(v, kernel_ns);
1755                 if (tsc > tsc_timestamp) {
1756                         adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
1757                         tsc_timestamp = tsc;
1758                 }
1759         }
1760
1761         local_irq_restore(flags);
1762
1763         if (!vcpu->pv_time_enabled)
1764                 return 0;
1765
1766         if (unlikely(vcpu->hw_tsc_khz != this_tsc_khz)) {
1767                 kvm_get_time_scale(NSEC_PER_SEC / 1000, this_tsc_khz,
1768                                    &vcpu->hv_clock.tsc_shift,
1769                                    &vcpu->hv_clock.tsc_to_system_mul);
1770                 vcpu->hw_tsc_khz = this_tsc_khz;
1771         }
1772
1773         /* With all the info we got, fill in the values */
1774         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
1775         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
1776         vcpu->last_guest_tsc = tsc_timestamp;
1777
1778         if (unlikely(kvm_read_guest_cached(v->kvm, &vcpu->pv_time,
1779                 &guest_hv_clock, sizeof(guest_hv_clock))))
1780                 return 0;
1781
1782         /* This VCPU is paused, but it's legal for a guest to read another
1783          * VCPU's kvmclock, so we really have to follow the specification where
1784          * it says that version is odd if data is being modified, and even after
1785          * it is consistent.
1786          *
1787          * Version field updates must be kept separate.  This is because
1788          * kvm_write_guest_cached might use a "rep movs" instruction, and
1789          * writes within a string instruction are weakly ordered.  So there
1790          * are three writes overall.
1791          *
1792          * As a small optimization, only write the version field in the first
1793          * and third write.  The vcpu->pv_time cache is still valid, because the
1794          * version field is the first in the struct.
1795          */
1796         BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info, version) != 0);
1797
1798         vcpu->hv_clock.version = guest_hv_clock.version + 1;
1799         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1800                                 &vcpu->hv_clock,
1801                                 sizeof(vcpu->hv_clock.version));
1802
1803         smp_wmb();
1804
1805         /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
1806         pvclock_flags = (guest_hv_clock.flags & PVCLOCK_GUEST_STOPPED);
1807
1808         if (vcpu->pvclock_set_guest_stopped_request) {
1809                 pvclock_flags |= PVCLOCK_GUEST_STOPPED;
1810                 vcpu->pvclock_set_guest_stopped_request = false;
1811         }
1812
1813         /* If the host uses TSC clocksource, then it is stable */
1814         if (use_master_clock)
1815                 pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;
1816
1817         vcpu->hv_clock.flags = pvclock_flags;
1818
1819         trace_kvm_pvclock_update(v->vcpu_id, &vcpu->hv_clock);
1820
1821         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1822                                 &vcpu->hv_clock,
1823                                 sizeof(vcpu->hv_clock));
1824
1825         smp_wmb();
1826
1827         vcpu->hv_clock.version++;
1828         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1829                                 &vcpu->hv_clock,
1830                                 sizeof(vcpu->hv_clock.version));
1831         return 0;
1832 }
1833
1834 /*
1835  * kvmclock updates which are isolated to a given vcpu, such as
1836  * vcpu->cpu migration, should not allow system_timestamp from
1837  * the rest of the vcpus to remain static. Otherwise ntp frequency
1838  * correction applies to one vcpu's system_timestamp but not
1839  * the others.
1840  *
1841  * So in those cases, request a kvmclock update for all vcpus.
1842  * We need to rate-limit these requests though, as they can
1843  * considerably slow guests that have a large number of vcpus.
1844  * The time for a remote vcpu to update its kvmclock is bound
1845  * by the delay we use to rate-limit the updates.
1846  */
1847
1848 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
1849
1850 static void kvmclock_update_fn(struct work_struct *work)
1851 {
1852         int i;
1853         struct delayed_work *dwork = to_delayed_work(work);
1854         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
1855                                            kvmclock_update_work);
1856         struct kvm *kvm = container_of(ka, struct kvm, arch);
1857         struct kvm_vcpu *vcpu;
1858
1859         kvm_for_each_vcpu(i, vcpu, kvm) {
1860                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1861                 kvm_vcpu_kick(vcpu);
1862         }
1863 }
1864
1865 static void kvm_gen_kvmclock_update(struct kvm_vcpu *v)
1866 {
1867         struct kvm *kvm = v->kvm;
1868
1869         kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1870         schedule_delayed_work(&kvm->arch.kvmclock_update_work,
1871                                         KVMCLOCK_UPDATE_DELAY);
1872 }
1873
1874 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
1875
1876 static void kvmclock_sync_fn(struct work_struct *work)
1877 {
1878         struct delayed_work *dwork = to_delayed_work(work);
1879         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
1880                                            kvmclock_sync_work);
1881         struct kvm *kvm = container_of(ka, struct kvm, arch);
1882
1883         if (!kvmclock_periodic_sync)
1884                 return;
1885
1886         schedule_delayed_work(&kvm->arch.kvmclock_update_work, 0);
1887         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
1888                                         KVMCLOCK_SYNC_PERIOD);
1889 }
1890
1891 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1892 {
1893         u64 mcg_cap = vcpu->arch.mcg_cap;
1894         unsigned bank_num = mcg_cap & 0xff;
1895
1896         switch (msr) {
1897         case MSR_IA32_MCG_STATUS:
1898                 vcpu->arch.mcg_status = data;
1899                 break;
1900         case MSR_IA32_MCG_CTL:
1901                 if (!(mcg_cap & MCG_CTL_P))
1902                         return 1;
1903                 if (data != 0 && data != ~(u64)0)
1904                         return -1;
1905                 vcpu->arch.mcg_ctl = data;
1906                 break;
1907         default:
1908                 if (msr >= MSR_IA32_MC0_CTL &&
1909                     msr < MSR_IA32_MCx_CTL(bank_num)) {
1910                         u32 offset = msr - MSR_IA32_MC0_CTL;
1911                         /* only 0 or all 1s can be written to IA32_MCi_CTL
1912                          * some Linux kernels though clear bit 10 in bank 4 to
1913                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1914                          * this to avoid an uncatched #GP in the guest
1915                          */
1916                         if ((offset & 0x3) == 0 &&
1917                             data != 0 && (data | (1 << 10)) != ~(u64)0)
1918                                 return -1;
1919                         vcpu->arch.mce_banks[offset] = data;
1920                         break;
1921                 }
1922                 return 1;
1923         }
1924         return 0;
1925 }
1926
1927 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
1928 {
1929         struct kvm *kvm = vcpu->kvm;
1930         int lm = is_long_mode(vcpu);
1931         u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
1932                 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
1933         u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
1934                 : kvm->arch.xen_hvm_config.blob_size_32;
1935         u32 page_num = data & ~PAGE_MASK;
1936         u64 page_addr = data & PAGE_MASK;
1937         u8 *page;
1938         int r;
1939
1940         r = -E2BIG;
1941         if (page_num >= blob_size)
1942                 goto out;
1943         r = -ENOMEM;
1944         page = memdup_user(blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE);
1945         if (IS_ERR(page)) {
1946                 r = PTR_ERR(page);
1947                 goto out;
1948         }
1949         if (kvm_vcpu_write_guest(vcpu, page_addr, page, PAGE_SIZE))
1950                 goto out_free;
1951         r = 0;
1952 out_free:
1953         kfree(page);
1954 out:
1955         return r;
1956 }
1957
1958 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
1959 {
1960         gpa_t gpa = data & ~0x3f;
1961
1962         /* Bits 2:5 are reserved, Should be zero */
1963         if (data & 0x3c)
1964                 return 1;
1965
1966         vcpu->arch.apf.msr_val = data;
1967
1968         if (!(data & KVM_ASYNC_PF_ENABLED)) {
1969                 kvm_clear_async_pf_completion_queue(vcpu);
1970                 kvm_async_pf_hash_reset(vcpu);
1971                 return 0;
1972         }
1973
1974         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa,
1975                                         sizeof(u32)))
1976                 return 1;
1977
1978         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
1979         kvm_async_pf_wakeup_all(vcpu);
1980         return 0;
1981 }
1982
1983 static void kvmclock_reset(struct kvm_vcpu *vcpu)
1984 {
1985         vcpu->arch.pv_time_enabled = false;
1986 }
1987
1988 static void accumulate_steal_time(struct kvm_vcpu *vcpu)
1989 {
1990         u64 delta;
1991
1992         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
1993                 return;
1994
1995         delta = current->sched_info.run_delay - vcpu->arch.st.last_steal;
1996         vcpu->arch.st.last_steal = current->sched_info.run_delay;
1997         vcpu->arch.st.accum_steal = delta;
1998 }
1999
2000 static void record_steal_time(struct kvm_vcpu *vcpu)
2001 {
2002         accumulate_steal_time(vcpu);
2003
2004         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
2005                 return;
2006
2007         if (unlikely(kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2008                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time))))
2009                 return;
2010
2011         vcpu->arch.st.steal.steal += vcpu->arch.st.accum_steal;
2012         vcpu->arch.st.steal.version += 2;
2013         vcpu->arch.st.accum_steal = 0;
2014
2015         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2016                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2017 }
2018
2019 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2020 {
2021         bool pr = false;
2022         u32 msr = msr_info->index;
2023         u64 data = msr_info->data;
2024
2025         switch (msr) {
2026         case MSR_AMD64_NB_CFG:
2027         case MSR_IA32_UCODE_REV:
2028         case MSR_IA32_UCODE_WRITE:
2029         case MSR_VM_HSAVE_PA:
2030         case MSR_AMD64_PATCH_LOADER:
2031         case MSR_AMD64_BU_CFG2:
2032                 break;
2033
2034         case MSR_EFER:
2035                 return set_efer(vcpu, data);
2036         case MSR_K7_HWCR:
2037                 data &= ~(u64)0x40;     /* ignore flush filter disable */
2038                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
2039                 data &= ~(u64)0x8;      /* ignore TLB cache disable */
2040                 data &= ~(u64)0x40000;  /* ignore Mc status write enable */
2041                 if (data != 0) {
2042                         vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
2043                                     data);
2044                         return 1;
2045                 }
2046                 break;
2047         case MSR_FAM10H_MMIO_CONF_BASE:
2048                 if (data != 0) {
2049                         vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
2050                                     "0x%llx\n", data);
2051                         return 1;
2052                 }
2053                 break;
2054         case MSR_IA32_DEBUGCTLMSR:
2055                 if (!data) {
2056                         /* We support the non-activated case already */
2057                         break;
2058                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
2059                         /* Values other than LBR and BTF are vendor-specific,
2060                            thus reserved and should throw a #GP */
2061                         return 1;
2062                 }
2063                 vcpu_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
2064                             __func__, data);
2065                 break;
2066         case 0x200 ... 0x2ff:
2067                 return kvm_mtrr_set_msr(vcpu, msr, data);
2068         case MSR_IA32_APICBASE:
2069                 return kvm_set_apic_base(vcpu, msr_info);
2070         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2071                 return kvm_x2apic_msr_write(vcpu, msr, data);
2072         case MSR_IA32_TSCDEADLINE:
2073                 kvm_set_lapic_tscdeadline_msr(vcpu, data);
2074                 break;
2075         case MSR_IA32_TSC_ADJUST:
2076                 if (guest_cpuid_has_tsc_adjust(vcpu)) {
2077                         if (!msr_info->host_initiated) {
2078                                 s64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;
2079                                 adjust_tsc_offset_guest(vcpu, adj);
2080                         }
2081                         vcpu->arch.ia32_tsc_adjust_msr = data;
2082                 }
2083                 break;
2084         case MSR_IA32_MISC_ENABLE:
2085                 vcpu->arch.ia32_misc_enable_msr = data;
2086                 break;
2087         case MSR_IA32_SMBASE:
2088                 if (!msr_info->host_initiated)
2089                         return 1;
2090                 vcpu->arch.smbase = data;
2091                 break;
2092         case MSR_KVM_WALL_CLOCK_NEW:
2093         case MSR_KVM_WALL_CLOCK:
2094                 vcpu->kvm->arch.wall_clock = data;
2095                 kvm_write_wall_clock(vcpu->kvm, data);
2096                 break;
2097         case MSR_KVM_SYSTEM_TIME_NEW:
2098         case MSR_KVM_SYSTEM_TIME: {
2099                 u64 gpa_offset;
2100                 struct kvm_arch *ka = &vcpu->kvm->arch;
2101
2102                 kvmclock_reset(vcpu);
2103
2104                 if (vcpu->vcpu_id == 0 && !msr_info->host_initiated) {
2105                         bool tmp = (msr == MSR_KVM_SYSTEM_TIME);
2106
2107                         if (ka->boot_vcpu_runs_old_kvmclock != tmp)
2108                                 set_bit(KVM_REQ_MASTERCLOCK_UPDATE,
2109                                         &vcpu->requests);
2110
2111                         ka->boot_vcpu_runs_old_kvmclock = tmp;
2112                 }
2113
2114                 vcpu->arch.time = data;
2115                 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2116
2117                 /* we verify if the enable bit is set... */
2118                 if (!(data & 1))
2119                         break;
2120
2121                 gpa_offset = data & ~(PAGE_MASK | 1);
2122
2123                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm,
2124                      &vcpu->arch.pv_time, data & ~1ULL,
2125                      sizeof(struct pvclock_vcpu_time_info)))
2126                         vcpu->arch.pv_time_enabled = false;
2127                 else
2128                         vcpu->arch.pv_time_enabled = true;
2129
2130                 break;
2131         }
2132         case MSR_KVM_ASYNC_PF_EN:
2133                 if (kvm_pv_enable_async_pf(vcpu, data))
2134                         return 1;
2135                 break;
2136         case MSR_KVM_STEAL_TIME:
2137
2138                 if (unlikely(!sched_info_on()))
2139                         return 1;
2140
2141                 if (data & KVM_STEAL_RESERVED_MASK)
2142                         return 1;
2143
2144                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.st.stime,
2145                                                 data & KVM_STEAL_VALID_BITS,
2146                                                 sizeof(struct kvm_steal_time)))
2147                         return 1;
2148
2149                 vcpu->arch.st.msr_val = data;
2150
2151                 if (!(data & KVM_MSR_ENABLED))
2152                         break;
2153
2154                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2155
2156                 break;
2157         case MSR_KVM_PV_EOI_EN:
2158                 if (kvm_lapic_enable_pv_eoi(vcpu, data))
2159                         return 1;
2160                 break;
2161
2162         case MSR_IA32_MCG_CTL:
2163         case MSR_IA32_MCG_STATUS:
2164         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
2165                 return set_msr_mce(vcpu, msr, data);
2166
2167         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
2168         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
2169                 pr = true; /* fall through */
2170         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
2171         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
2172                 if (kvm_pmu_is_valid_msr(vcpu, msr))
2173                         return kvm_pmu_set_msr(vcpu, msr_info);
2174
2175                 if (pr || data != 0)
2176                         vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
2177                                     "0x%x data 0x%llx\n", msr, data);
2178                 break;
2179         case MSR_K7_CLK_CTL:
2180                 /*
2181                  * Ignore all writes to this no longer documented MSR.
2182                  * Writes are only relevant for old K7 processors,
2183                  * all pre-dating SVM, but a recommended workaround from
2184                  * AMD for these chips. It is possible to specify the
2185                  * affected processor models on the command line, hence
2186                  * the need to ignore the workaround.
2187                  */
2188                 break;
2189         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2190         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
2191         case HV_X64_MSR_CRASH_CTL:
2192                 return kvm_hv_set_msr_common(vcpu, msr, data,
2193                                              msr_info->host_initiated);
2194         case MSR_IA32_BBL_CR_CTL3:
2195                 /* Drop writes to this legacy MSR -- see rdmsr
2196                  * counterpart for further detail.
2197                  */
2198                 vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n", msr, data);
2199                 break;
2200         case MSR_AMD64_OSVW_ID_LENGTH:
2201                 if (!guest_cpuid_has_osvw(vcpu))
2202                         return 1;
2203                 vcpu->arch.osvw.length = data;
2204                 break;
2205         case MSR_AMD64_OSVW_STATUS:
2206                 if (!guest_cpuid_has_osvw(vcpu))
2207                         return 1;
2208                 vcpu->arch.osvw.status = data;
2209                 break;
2210         default:
2211                 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
2212                         return xen_hvm_config(vcpu, data);
2213                 if (kvm_pmu_is_valid_msr(vcpu, msr))
2214                         return kvm_pmu_set_msr(vcpu, msr_info);
2215                 if (!ignore_msrs) {
2216                         vcpu_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
2217                                     msr, data);
2218                         return 1;
2219                 } else {
2220                         vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
2221                                     msr, data);
2222                         break;
2223                 }
2224         }
2225         return 0;
2226 }
2227 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
2228
2229
2230 /*
2231  * Reads an msr value (of 'msr_index') into 'pdata'.
2232  * Returns 0 on success, non-0 otherwise.
2233  * Assumes vcpu_load() was already called.
2234  */
2235 int kvm_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
2236 {
2237         return kvm_x86_ops->get_msr(vcpu, msr);
2238 }
2239 EXPORT_SYMBOL_GPL(kvm_get_msr);
2240
2241 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2242 {
2243         u64 data;
2244         u64 mcg_cap = vcpu->arch.mcg_cap;
2245         unsigned bank_num = mcg_cap & 0xff;
2246
2247         switch (msr) {
2248         case MSR_IA32_P5_MC_ADDR:
2249         case MSR_IA32_P5_MC_TYPE:
2250                 data = 0;
2251                 break;
2252         case MSR_IA32_MCG_CAP:
2253                 data = vcpu->arch.mcg_cap;
2254                 break;
2255         case MSR_IA32_MCG_CTL:
2256                 if (!(mcg_cap & MCG_CTL_P))
2257                         return 1;
2258                 data = vcpu->arch.mcg_ctl;
2259                 break;
2260         case MSR_IA32_MCG_STATUS:
2261                 data = vcpu->arch.mcg_status;
2262                 break;
2263         default:
2264                 if (msr >= MSR_IA32_MC0_CTL &&
2265                     msr < MSR_IA32_MCx_CTL(bank_num)) {
2266                         u32 offset = msr - MSR_IA32_MC0_CTL;
2267                         data = vcpu->arch.mce_banks[offset];
2268                         break;
2269                 }
2270                 return 1;
2271         }
2272         *pdata = data;
2273         return 0;
2274 }
2275
2276 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2277 {
2278         switch (msr_info->index) {
2279         case MSR_IA32_PLATFORM_ID:
2280         case MSR_IA32_EBL_CR_POWERON:
2281         case MSR_IA32_DEBUGCTLMSR:
2282         case MSR_IA32_LASTBRANCHFROMIP:
2283         case MSR_IA32_LASTBRANCHTOIP:
2284         case MSR_IA32_LASTINTFROMIP:
2285         case MSR_IA32_LASTINTTOIP:
2286         case MSR_K8_SYSCFG:
2287         case MSR_K8_TSEG_ADDR:
2288         case MSR_K8_TSEG_MASK:
2289         case MSR_K7_HWCR:
2290         case MSR_VM_HSAVE_PA:
2291         case MSR_K8_INT_PENDING_MSG:
2292         case MSR_AMD64_NB_CFG:
2293         case MSR_FAM10H_MMIO_CONF_BASE:
2294         case MSR_AMD64_BU_CFG2:
2295                 msr_info->data = 0;
2296                 break;
2297         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
2298         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
2299         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
2300         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
2301                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
2302                         return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);
2303                 msr_info->data = 0;
2304                 break;
2305         case MSR_IA32_UCODE_REV:
2306                 msr_info->data = 0x100000000ULL;
2307                 break;
2308         case MSR_MTRRcap:
2309         case 0x200 ... 0x2ff:
2310                 return kvm_mtrr_get_msr(vcpu, msr_info->index, &msr_info->data);
2311         case 0xcd: /* fsb frequency */
2312                 msr_info->data = 3;
2313                 break;
2314                 /*
2315                  * MSR_EBC_FREQUENCY_ID
2316                  * Conservative value valid for even the basic CPU models.
2317                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
2318                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
2319                  * and 266MHz for model 3, or 4. Set Core Clock
2320                  * Frequency to System Bus Frequency Ratio to 1 (bits
2321                  * 31:24) even though these are only valid for CPU
2322                  * models > 2, however guests may end up dividing or
2323                  * multiplying by zero otherwise.
2324                  */
2325         case MSR_EBC_FREQUENCY_ID:
2326                 msr_info->data = 1 << 24;
2327                 break;
2328         case MSR_IA32_APICBASE:
2329                 msr_info->data = kvm_get_apic_base(vcpu);
2330                 break;
2331         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2332                 return kvm_x2apic_msr_read(vcpu, msr_info->index, &msr_info->data);
2333                 break;
2334         case MSR_IA32_TSCDEADLINE:
2335                 msr_info->data = kvm_get_lapic_tscdeadline_msr(vcpu);
2336                 break;
2337         case MSR_IA32_TSC_ADJUST:
2338                 msr_info->data = (u64)vcpu->arch.ia32_tsc_adjust_msr;
2339                 break;
2340         case MSR_IA32_MISC_ENABLE:
2341                 msr_info->data = vcpu->arch.ia32_misc_enable_msr;
2342                 break;
2343         case MSR_IA32_SMBASE:
2344                 if (!msr_info->host_initiated)
2345                         return 1;
2346                 msr_info->data = vcpu->arch.smbase;
2347                 break;
2348         case MSR_IA32_PERF_STATUS:
2349                 /* TSC increment by tick */
2350                 msr_info->data = 1000ULL;
2351                 /* CPU multiplier */
2352                 msr_info->data |= (((uint64_t)4ULL) << 40);
2353                 break;
2354         case MSR_EFER:
2355                 msr_info->data = vcpu->arch.efer;
2356                 break;
2357         case MSR_KVM_WALL_CLOCK:
2358         case MSR_KVM_WALL_CLOCK_NEW:
2359                 msr_info->data = vcpu->kvm->arch.wall_clock;
2360                 break;
2361         case MSR_KVM_SYSTEM_TIME:
2362         case MSR_KVM_SYSTEM_TIME_NEW:
2363                 msr_info->data = vcpu->arch.time;
2364                 break;
2365         case MSR_KVM_ASYNC_PF_EN:
2366                 msr_info->data = vcpu->arch.apf.msr_val;
2367                 break;
2368         case MSR_KVM_STEAL_TIME:
2369                 msr_info->data = vcpu->arch.st.msr_val;
2370                 break;
2371         case MSR_KVM_PV_EOI_EN:
2372                 msr_info->data = vcpu->arch.pv_eoi.msr_val;
2373                 break;
2374         case MSR_IA32_P5_MC_ADDR:
2375         case MSR_IA32_P5_MC_TYPE:
2376         case MSR_IA32_MCG_CAP:
2377         case MSR_IA32_MCG_CTL:
2378         case MSR_IA32_MCG_STATUS:
2379         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
2380                 return get_msr_mce(vcpu, msr_info->index, &msr_info->data);
2381         case MSR_K7_CLK_CTL:
2382                 /*
2383                  * Provide expected ramp-up count for K7. All other
2384                  * are set to zero, indicating minimum divisors for
2385                  * every field.
2386                  *
2387                  * This prevents guest kernels on AMD host with CPU
2388                  * type 6, model 8 and higher from exploding due to
2389                  * the rdmsr failing.
2390                  */
2391                 msr_info->data = 0x20000000;
2392                 break;
2393         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2394         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
2395         case HV_X64_MSR_CRASH_CTL:
2396                 return kvm_hv_get_msr_common(vcpu,
2397                                              msr_info->index, &msr_info->data);
2398                 break;
2399         case MSR_IA32_BBL_CR_CTL3:
2400                 /* This legacy MSR exists but isn't fully documented in current
2401                  * silicon.  It is however accessed by winxp in very narrow
2402                  * scenarios where it sets bit #19, itself documented as
2403                  * a "reserved" bit.  Best effort attempt to source coherent
2404                  * read data here should the balance of the register be
2405                  * interpreted by the guest:
2406                  *
2407                  * L2 cache control register 3: 64GB range, 256KB size,
2408                  * enabled, latency 0x1, configured
2409                  */
2410                 msr_info->data = 0xbe702111;
2411                 break;
2412         case MSR_AMD64_OSVW_ID_LENGTH:
2413                 if (!guest_cpuid_has_osvw(vcpu))
2414                         return 1;
2415                 msr_info->data = vcpu->arch.osvw.length;
2416                 break;
2417         case MSR_AMD64_OSVW_STATUS:
2418                 if (!guest_cpuid_has_osvw(vcpu))
2419                         return 1;
2420                 msr_info->data = vcpu->arch.osvw.status;
2421                 break;
2422         default:
2423                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
2424                         return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);
2425                 if (!ignore_msrs) {
2426                         vcpu_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr_info->index);
2427                         return 1;
2428                 } else {
2429                         vcpu_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr_info->index);
2430                         msr_info->data = 0;
2431                 }
2432                 break;
2433         }
2434         return 0;
2435 }
2436 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
2437
2438 /*
2439  * Read or write a bunch of msrs. All parameters are kernel addresses.
2440  *
2441  * @return number of msrs set successfully.
2442  */
2443 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
2444                     struct kvm_msr_entry *entries,
2445                     int (*do_msr)(struct kvm_vcpu *vcpu,
2446                                   unsigned index, u64 *data))
2447 {
2448         int i, idx;
2449
2450         idx = srcu_read_lock(&vcpu->kvm->srcu);
2451         for (i = 0; i < msrs->nmsrs; ++i)
2452                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
2453                         break;
2454         srcu_read_unlock(&vcpu->kvm->srcu, idx);
2455
2456         return i;
2457 }
2458
2459 /*
2460  * Read or write a bunch of msrs. Parameters are user addresses.
2461  *
2462  * @return number of msrs set successfully.
2463  */
2464 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
2465                   int (*do_msr)(struct kvm_vcpu *vcpu,
2466                                 unsigned index, u64 *data),
2467                   int writeback)
2468 {
2469         struct kvm_msrs msrs;
2470         struct kvm_msr_entry *entries;
2471         int r, n;
2472         unsigned size;
2473
2474         r = -EFAULT;
2475         if (copy_from_user(&msrs, user_msrs, sizeof msrs))
2476                 goto out;
2477
2478         r = -E2BIG;
2479         if (msrs.nmsrs >= MAX_IO_MSRS)
2480                 goto out;
2481
2482         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
2483         entries = memdup_user(user_msrs->entries, size);
2484         if (IS_ERR(entries)) {
2485                 r = PTR_ERR(entries);
2486                 goto out;
2487         }
2488
2489         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
2490         if (r < 0)
2491                 goto out_free;
2492
2493         r = -EFAULT;
2494         if (writeback && copy_to_user(user_msrs->entries, entries, size))
2495                 goto out_free;
2496
2497         r = n;
2498
2499 out_free:
2500         kfree(entries);
2501 out:
2502         return r;
2503 }
2504
2505 int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
2506 {
2507         int r;
2508
2509         switch (ext) {
2510         case KVM_CAP_IRQCHIP:
2511         case KVM_CAP_HLT:
2512         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
2513         case KVM_CAP_SET_TSS_ADDR:
2514         case KVM_CAP_EXT_CPUID:
2515         case KVM_CAP_EXT_EMUL_CPUID:
2516         case KVM_CAP_CLOCKSOURCE:
2517         case KVM_CAP_PIT:
2518         case KVM_CAP_NOP_IO_DELAY:
2519         case KVM_CAP_MP_STATE:
2520         case KVM_CAP_SYNC_MMU:
2521         case KVM_CAP_USER_NMI:
2522         case KVM_CAP_REINJECT_CONTROL:
2523         case KVM_CAP_IRQ_INJECT_STATUS:
2524         case KVM_CAP_IOEVENTFD:
2525         case KVM_CAP_IOEVENTFD_NO_LENGTH:
2526         case KVM_CAP_PIT2:
2527         case KVM_CAP_PIT_STATE2:
2528         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
2529         case KVM_CAP_XEN_HVM:
2530         case KVM_CAP_ADJUST_CLOCK:
2531         case KVM_CAP_VCPU_EVENTS:
2532         case KVM_CAP_HYPERV:
2533         case KVM_CAP_HYPERV_VAPIC:
2534         case KVM_CAP_HYPERV_SPIN:
2535         case KVM_CAP_PCI_SEGMENT:
2536         case KVM_CAP_DEBUGREGS:
2537         case KVM_CAP_X86_ROBUST_SINGLESTEP:
2538         case KVM_CAP_XSAVE:
2539         case KVM_CAP_ASYNC_PF:
2540         case KVM_CAP_GET_TSC_KHZ:
2541         case KVM_CAP_KVMCLOCK_CTRL:
2542         case KVM_CAP_READONLY_MEM:
2543         case KVM_CAP_HYPERV_TIME:
2544         case KVM_CAP_IOAPIC_POLARITY_IGNORED:
2545         case KVM_CAP_TSC_DEADLINE_TIMER:
2546         case KVM_CAP_ENABLE_CAP_VM:
2547         case KVM_CAP_DISABLE_QUIRKS:
2548         case KVM_CAP_SET_BOOT_CPU_ID:
2549         case KVM_CAP_SPLIT_IRQCHIP:
2550 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2551         case KVM_CAP_ASSIGN_DEV_IRQ:
2552         case KVM_CAP_PCI_2_3:
2553 #endif
2554                 r = 1;
2555                 break;
2556         case KVM_CAP_X86_SMM:
2557                 /* SMBASE is usually relocated above 1M on modern chipsets,
2558                  * and SMM handlers might indeed rely on 4G segment limits,
2559                  * so do not report SMM to be available if real mode is
2560                  * emulated via vm86 mode.  Still, do not go to great lengths
2561                  * to avoid userspace's usage of the feature, because it is a
2562                  * fringe case that is not enabled except via specific settings
2563                  * of the module parameters.
2564                  */
2565                 r = kvm_x86_ops->cpu_has_high_real_mode_segbase();
2566                 break;
2567         case KVM_CAP_COALESCED_MMIO:
2568                 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
2569                 break;
2570         case KVM_CAP_VAPIC:
2571                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
2572                 break;
2573         case KVM_CAP_NR_VCPUS:
2574                 r = KVM_SOFT_MAX_VCPUS;
2575                 break;
2576         case KVM_CAP_MAX_VCPUS:
2577                 r = KVM_MAX_VCPUS;
2578                 break;
2579         case KVM_CAP_NR_MEMSLOTS:
2580                 r = KVM_USER_MEM_SLOTS;
2581                 break;
2582         case KVM_CAP_PV_MMU:    /* obsolete */
2583                 r = 0;
2584                 break;
2585 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2586         case KVM_CAP_IOMMU:
2587                 r = iommu_present(&pci_bus_type);
2588                 break;
2589 #endif
2590         case KVM_CAP_MCE:
2591                 r = KVM_MAX_MCE_BANKS;
2592                 break;
2593         case KVM_CAP_XCRS:
2594                 r = cpu_has_xsave;
2595                 break;
2596         case KVM_CAP_TSC_CONTROL:
2597                 r = kvm_has_tsc_control;
2598                 break;
2599         default:
2600                 r = 0;
2601                 break;
2602         }
2603         return r;
2604
2605 }
2606
2607 long kvm_arch_dev_ioctl(struct file *filp,
2608                         unsigned int ioctl, unsigned long arg)
2609 {
2610         void __user *argp = (void __user *)arg;
2611         long r;
2612
2613         switch (ioctl) {
2614         case KVM_GET_MSR_INDEX_LIST: {
2615                 struct kvm_msr_list __user *user_msr_list = argp;
2616                 struct kvm_msr_list msr_list;
2617                 unsigned n;
2618
2619                 r = -EFAULT;
2620                 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
2621                         goto out;
2622                 n = msr_list.nmsrs;
2623                 msr_list.nmsrs = num_msrs_to_save + num_emulated_msrs;
2624                 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
2625                         goto out;
2626                 r = -E2BIG;
2627                 if (n < msr_list.nmsrs)
2628                         goto out;
2629                 r = -EFAULT;
2630                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
2631                                  num_msrs_to_save * sizeof(u32)))
2632                         goto out;
2633                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
2634                                  &emulated_msrs,
2635                                  num_emulated_msrs * sizeof(u32)))
2636                         goto out;
2637                 r = 0;
2638                 break;
2639         }
2640         case KVM_GET_SUPPORTED_CPUID:
2641         case KVM_GET_EMULATED_CPUID: {
2642                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2643                 struct kvm_cpuid2 cpuid;
2644
2645                 r = -EFAULT;
2646                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2647                         goto out;
2648
2649                 r = kvm_dev_ioctl_get_cpuid(&cpuid, cpuid_arg->entries,
2650                                             ioctl);
2651                 if (r)
2652                         goto out;
2653
2654                 r = -EFAULT;
2655                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2656                         goto out;
2657                 r = 0;
2658                 break;
2659         }
2660         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
2661                 u64 mce_cap;
2662
2663                 mce_cap = KVM_MCE_CAP_SUPPORTED;
2664                 r = -EFAULT;
2665                 if (copy_to_user(argp, &mce_cap, sizeof mce_cap))
2666                         goto out;
2667                 r = 0;
2668                 break;
2669         }
2670         default:
2671                 r = -EINVAL;
2672         }
2673 out:
2674         return r;
2675 }
2676
2677 static void wbinvd_ipi(void *garbage)
2678 {
2679         wbinvd();
2680 }
2681
2682 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
2683 {
2684         return kvm_arch_has_noncoherent_dma(vcpu->kvm);
2685 }
2686
2687 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
2688 {
2689         /* Address WBINVD may be executed by guest */
2690         if (need_emulate_wbinvd(vcpu)) {
2691                 if (kvm_x86_ops->has_wbinvd_exit())
2692                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
2693                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
2694                         smp_call_function_single(vcpu->cpu,
2695                                         wbinvd_ipi, NULL, 1);
2696         }
2697
2698         kvm_x86_ops->vcpu_load(vcpu, cpu);
2699
2700         /* Apply any externally detected TSC adjustments (due to suspend) */
2701         if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
2702                 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
2703                 vcpu->arch.tsc_offset_adjustment = 0;
2704                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2705         }
2706
2707         if (unlikely(vcpu->cpu != cpu) || check_tsc_unstable()) {
2708                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
2709                                 rdtsc() - vcpu->arch.last_host_tsc;
2710                 if (tsc_delta < 0)
2711                         mark_tsc_unstable("KVM discovered backwards TSC");
2712                 if (check_tsc_unstable()) {
2713                         u64 offset = kvm_compute_tsc_offset(vcpu,
2714                                                 vcpu->arch.last_guest_tsc);
2715                         kvm_x86_ops->write_tsc_offset(vcpu, offset);
2716                         vcpu->arch.tsc_catchup = 1;
2717                 }
2718                 /*
2719                  * On a host with synchronized TSC, there is no need to update
2720                  * kvmclock on vcpu->cpu migration
2721                  */
2722                 if (!vcpu->kvm->arch.use_master_clock || vcpu->cpu == -1)
2723                         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2724                 if (vcpu->cpu != cpu)
2725                         kvm_migrate_timers(vcpu);
2726                 vcpu->cpu = cpu;
2727         }
2728
2729         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2730 }
2731
2732 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
2733 {
2734         kvm_x86_ops->vcpu_put(vcpu);
2735         kvm_put_guest_fpu(vcpu);
2736         vcpu->arch.last_host_tsc = rdtsc();
2737 }
2738
2739 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
2740                                     struct kvm_lapic_state *s)
2741 {
2742         kvm_x86_ops->sync_pir_to_irr(vcpu);
2743         memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
2744
2745         return 0;
2746 }
2747
2748 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
2749                                     struct kvm_lapic_state *s)
2750 {
2751         kvm_apic_post_state_restore(vcpu, s);
2752         update_cr8_intercept(vcpu);
2753
2754         return 0;
2755 }
2756
2757 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
2758                                     struct kvm_interrupt *irq)
2759 {
2760         if (irq->irq >= KVM_NR_INTERRUPTS)
2761                 return -EINVAL;
2762
2763         if (!irqchip_in_kernel(vcpu->kvm)) {
2764                 kvm_queue_interrupt(vcpu, irq->irq, false);
2765                 kvm_make_request(KVM_REQ_EVENT, vcpu);
2766                 return 0;
2767         }
2768
2769         /*
2770          * With in-kernel LAPIC, we only use this to inject EXTINT, so
2771          * fail for in-kernel 8259.
2772          */
2773         if (pic_in_kernel(vcpu->kvm))
2774                 return -ENXIO;
2775
2776         if (vcpu->arch.pending_external_vector != -1)
2777                 return -EEXIST;
2778
2779         vcpu->arch.pending_external_vector = irq->irq;
2780         return 0;
2781 }
2782
2783 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
2784 {
2785         kvm_inject_nmi(vcpu);
2786
2787         return 0;
2788 }
2789
2790 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu *vcpu)
2791 {
2792         kvm_make_request(KVM_REQ_SMI, vcpu);
2793
2794         return 0;
2795 }
2796
2797 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
2798                                            struct kvm_tpr_access_ctl *tac)
2799 {
2800         if (tac->flags)
2801                 return -EINVAL;
2802         vcpu->arch.tpr_access_reporting = !!tac->enabled;
2803         return 0;
2804 }
2805
2806 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
2807                                         u64 mcg_cap)
2808 {
2809         int r;
2810         unsigned bank_num = mcg_cap & 0xff, bank;
2811
2812         r = -EINVAL;
2813         if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
2814                 goto out;
2815         if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000))
2816                 goto out;
2817         r = 0;
2818         vcpu->arch.mcg_cap = mcg_cap;
2819         /* Init IA32_MCG_CTL to all 1s */
2820         if (mcg_cap & MCG_CTL_P)
2821                 vcpu->arch.mcg_ctl = ~(u64)0;
2822         /* Init IA32_MCi_CTL to all 1s */
2823         for (bank = 0; bank < bank_num; bank++)
2824                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
2825 out:
2826         return r;
2827 }
2828
2829 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
2830                                       struct kvm_x86_mce *mce)
2831 {
2832         u64 mcg_cap = vcpu->arch.mcg_cap;
2833         unsigned bank_num = mcg_cap & 0xff;
2834         u64 *banks = vcpu->arch.mce_banks;
2835
2836         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
2837                 return -EINVAL;
2838         /*
2839          * if IA32_MCG_CTL is not all 1s, the uncorrected error
2840          * reporting is disabled
2841          */
2842         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
2843             vcpu->arch.mcg_ctl != ~(u64)0)
2844                 return 0;
2845         banks += 4 * mce->bank;
2846         /*
2847          * if IA32_MCi_CTL is not all 1s, the uncorrected error
2848          * reporting is disabled for the bank
2849          */
2850         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
2851                 return 0;
2852         if (mce->status & MCI_STATUS_UC) {
2853                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
2854                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
2855                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
2856                         return 0;
2857                 }
2858                 if (banks[1] & MCI_STATUS_VAL)
2859                         mce->status |= MCI_STATUS_OVER;
2860                 banks[2] = mce->addr;
2861                 banks[3] = mce->misc;
2862                 vcpu->arch.mcg_status = mce->mcg_status;
2863                 banks[1] = mce->status;
2864                 kvm_queue_exception(vcpu, MC_VECTOR);
2865         } else if (!(banks[1] & MCI_STATUS_VAL)
2866                    || !(banks[1] & MCI_STATUS_UC)) {
2867                 if (banks[1] & MCI_STATUS_VAL)
2868                         mce->status |= MCI_STATUS_OVER;
2869                 banks[2] = mce->addr;
2870                 banks[3] = mce->misc;
2871                 banks[1] = mce->status;
2872         } else
2873                 banks[1] |= MCI_STATUS_OVER;
2874         return 0;
2875 }
2876
2877 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
2878                                                struct kvm_vcpu_events *events)
2879 {
2880         process_nmi(vcpu);
2881         events->exception.injected =
2882                 vcpu->arch.exception.pending &&
2883                 !kvm_exception_is_soft(vcpu->arch.exception.nr);
2884         events->exception.nr = vcpu->arch.exception.nr;
2885         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
2886         events->exception.pad = 0;
2887         events->exception.error_code = vcpu->arch.exception.error_code;
2888
2889         events->interrupt.injected =
2890                 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
2891         events->interrupt.nr = vcpu->arch.interrupt.nr;
2892         events->interrupt.soft = 0;
2893         events->interrupt.shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
2894
2895         events->nmi.injected = vcpu->arch.nmi_injected;
2896         events->nmi.pending = vcpu->arch.nmi_pending != 0;
2897         events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
2898         events->nmi.pad = 0;
2899
2900         events->sipi_vector = 0; /* never valid when reporting to user space */
2901
2902         events->smi.smm = is_smm(vcpu);
2903         events->smi.pending = vcpu->arch.smi_pending;
2904         events->smi.smm_inside_nmi =
2905                 !!(vcpu->arch.hflags & HF_SMM_INSIDE_NMI_MASK);
2906         events->smi.latched_init = kvm_lapic_latched_init(vcpu);
2907
2908         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
2909                          | KVM_VCPUEVENT_VALID_SHADOW
2910                          | KVM_VCPUEVENT_VALID_SMM);
2911         memset(&events->reserved, 0, sizeof(events->reserved));
2912 }
2913
2914 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
2915                                               struct kvm_vcpu_events *events)
2916 {
2917         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2918                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2919                               | KVM_VCPUEVENT_VALID_SHADOW
2920                               | KVM_VCPUEVENT_VALID_SMM))
2921                 return -EINVAL;
2922
2923         process_nmi(vcpu);
2924         vcpu->arch.exception.pending = events->exception.injected;
2925         vcpu->arch.exception.nr = events->exception.nr;
2926         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
2927         vcpu->arch.exception.error_code = events->exception.error_code;
2928
2929         vcpu->arch.interrupt.pending = events->interrupt.injected;
2930         vcpu->arch.interrupt.nr = events->interrupt.nr;
2931         vcpu->arch.interrupt.soft = events->interrupt.soft;
2932         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
2933                 kvm_x86_ops->set_interrupt_shadow(vcpu,
2934                                                   events->interrupt.shadow);
2935
2936         vcpu->arch.nmi_injected = events->nmi.injected;
2937         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
2938                 vcpu->arch.nmi_pending = events->nmi.pending;
2939         kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
2940
2941         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR &&
2942             kvm_vcpu_has_lapic(vcpu))
2943                 vcpu->arch.apic->sipi_vector = events->sipi_vector;
2944
2945         if (events->flags & KVM_VCPUEVENT_VALID_SMM) {
2946                 if (events->smi.smm)
2947                         vcpu->arch.hflags |= HF_SMM_MASK;
2948                 else
2949                         vcpu->arch.hflags &= ~HF_SMM_MASK;
2950                 vcpu->arch.smi_pending = events->smi.pending;
2951                 if (events->smi.smm_inside_nmi)
2952                         vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
2953                 else
2954                         vcpu->arch.hflags &= ~HF_SMM_INSIDE_NMI_MASK;
2955                 if (kvm_vcpu_has_lapic(vcpu)) {
2956                         if (events->smi.latched_init)
2957                                 set_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
2958                         else
2959                                 clear_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
2960                 }
2961         }
2962
2963         kvm_make_request(KVM_REQ_EVENT, vcpu);
2964
2965         return 0;
2966 }
2967
2968 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
2969                                              struct kvm_debugregs *dbgregs)
2970 {
2971         unsigned long val;
2972
2973         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
2974         kvm_get_dr(vcpu, 6, &val);
2975         dbgregs->dr6 = val;
2976         dbgregs->dr7 = vcpu->arch.dr7;
2977         dbgregs->flags = 0;
2978         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
2979 }
2980
2981 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
2982                                             struct kvm_debugregs *dbgregs)
2983 {
2984         if (dbgregs->flags)
2985                 return -EINVAL;
2986
2987         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
2988         kvm_update_dr0123(vcpu);
2989         vcpu->arch.dr6 = dbgregs->dr6;
2990         kvm_update_dr6(vcpu);
2991         vcpu->arch.dr7 = dbgregs->dr7;
2992         kvm_update_dr7(vcpu);
2993
2994         return 0;
2995 }
2996
2997 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
2998
2999 static void fill_xsave(u8 *dest, struct kvm_vcpu *vcpu)
3000 {
3001         struct xregs_state *xsave = &vcpu->arch.guest_fpu.state.xsave;
3002         u64 xstate_bv = xsave->header.xfeatures;
3003         u64 valid;
3004
3005         /*
3006          * Copy legacy XSAVE area, to avoid complications with CPUID
3007          * leaves 0 and 1 in the loop below.
3008          */
3009         memcpy(dest, xsave, XSAVE_HDR_OFFSET);
3010
3011         /* Set XSTATE_BV */
3012         *(u64 *)(dest + XSAVE_HDR_OFFSET) = xstate_bv;
3013
3014         /*
3015          * Copy each region from the possibly compacted offset to the
3016          * non-compacted offset.
3017          */
3018         valid = xstate_bv & ~XSTATE_FPSSE;
3019         while (valid) {
3020                 u64 feature = valid & -valid;
3021                 int index = fls64(feature) - 1;
3022                 void *src = get_xsave_addr(xsave, feature);
3023
3024                 if (src) {
3025                         u32 size, offset, ecx, edx;
3026                         cpuid_count(XSTATE_CPUID, index,
3027                                     &size, &offset, &ecx, &edx);
3028                         memcpy(dest + offset, src, size);
3029                 }
3030
3031                 valid -= feature;
3032         }
3033 }
3034
3035 static void load_xsave(struct kvm_vcpu *vcpu, u8 *src)
3036 {
3037         struct xregs_state *xsave = &vcpu->arch.guest_fpu.state.xsave;
3038         u64 xstate_bv = *(u64 *)(src + XSAVE_HDR_OFFSET);
3039         u64 valid;
3040
3041         /*
3042          * Copy legacy XSAVE area, to avoid complications with CPUID
3043          * leaves 0 and 1 in the loop below.
3044          */
3045         memcpy(xsave, src, XSAVE_HDR_OFFSET);
3046
3047         /* Set XSTATE_BV and possibly XCOMP_BV.  */
3048         xsave->header.xfeatures = xstate_bv;
3049         if (cpu_has_xsaves)
3050                 xsave->header.xcomp_bv = host_xcr0 | XSTATE_COMPACTION_ENABLED;
3051
3052         /*
3053          * Copy each region from the non-compacted offset to the
3054          * possibly compacted offset.
3055          */
3056         valid = xstate_bv & ~XSTATE_FPSSE;
3057         while (valid) {
3058                 u64 feature = valid & -valid;
3059                 int index = fls64(feature) - 1;
3060                 void *dest = get_xsave_addr(xsave, feature);
3061
3062                 if (dest) {
3063                         u32 size, offset, ecx, edx;
3064                         cpuid_count(XSTATE_CPUID, index,
3065                                     &size, &offset, &ecx, &edx);
3066                         memcpy(dest, src + offset, size);
3067                 }
3068
3069                 valid -= feature;
3070         }
3071 }
3072
3073 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
3074                                          struct kvm_xsave *guest_xsave)
3075 {
3076         if (cpu_has_xsave) {
3077                 memset(guest_xsave, 0, sizeof(struct kvm_xsave));
3078                 fill_xsave((u8 *) guest_xsave->region, vcpu);
3079         } else {
3080                 memcpy(guest_xsave->region,
3081                         &vcpu->arch.guest_fpu.state.fxsave,
3082                         sizeof(struct fxregs_state));
3083                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
3084                         XSTATE_FPSSE;
3085         }
3086 }
3087
3088 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
3089                                         struct kvm_xsave *guest_xsave)
3090 {
3091         u64 xstate_bv =
3092                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
3093
3094         if (cpu_has_xsave) {
3095                 /*
3096                  * Here we allow setting states that are not present in
3097                  * CPUID leaf 0xD, index 0, EDX:EAX.  This is for compatibility
3098                  * with old userspace.
3099                  */
3100                 if (xstate_bv & ~kvm_supported_xcr0())
3101                         return -EINVAL;
3102                 load_xsave(vcpu, (u8 *)guest_xsave->region);
3103         } else {
3104                 if (xstate_bv & ~XSTATE_FPSSE)
3105                         return -EINVAL;
3106                 memcpy(&vcpu->arch.guest_fpu.state.fxsave,
3107                         guest_xsave->region, sizeof(struct fxregs_state));
3108         }
3109         return 0;
3110 }
3111
3112 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
3113                                         struct kvm_xcrs *guest_xcrs)
3114 {
3115         if (!cpu_has_xsave) {
3116                 guest_xcrs->nr_xcrs = 0;
3117                 return;
3118         }
3119
3120         guest_xcrs->nr_xcrs = 1;
3121         guest_xcrs->flags = 0;
3122         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
3123         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
3124 }
3125
3126 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
3127                                        struct kvm_xcrs *guest_xcrs)
3128 {
3129         int i, r = 0;
3130
3131         if (!cpu_has_xsave)
3132                 return -EINVAL;
3133
3134         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
3135                 return -EINVAL;
3136
3137         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
3138                 /* Only support XCR0 currently */
3139                 if (guest_xcrs->xcrs[i].xcr == XCR_XFEATURE_ENABLED_MASK) {
3140                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
3141                                 guest_xcrs->xcrs[i].value);
3142                         break;
3143                 }
3144         if (r)
3145                 r = -EINVAL;
3146         return r;
3147 }
3148
3149 /*
3150  * kvm_set_guest_paused() indicates to the guest kernel that it has been
3151  * stopped by the hypervisor.  This function will be called from the host only.
3152  * EINVAL is returned when the host attempts to set the flag for a guest that
3153  * does not support pv clocks.
3154  */
3155 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
3156 {
3157         if (!vcpu->arch.pv_time_enabled)
3158                 return -EINVAL;
3159         vcpu->arch.pvclock_set_guest_stopped_request = true;
3160         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3161         return 0;
3162 }
3163
3164 long kvm_arch_vcpu_ioctl(struct file *filp,
3165                          unsigned int ioctl, unsigned long arg)
3166 {
3167         struct kvm_vcpu *vcpu = filp->private_data;
3168         void __user *argp = (void __user *)arg;
3169         int r;
3170         union {
3171                 struct kvm_lapic_state *lapic;
3172                 struct kvm_xsave *xsave;
3173                 struct kvm_xcrs *xcrs;
3174                 void *buffer;
3175         } u;
3176
3177         u.buffer = NULL;
3178         switch (ioctl) {
3179         case KVM_GET_LAPIC: {
3180                 r = -EINVAL;
3181                 if (!vcpu->arch.apic)
3182                         goto out;
3183                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
3184
3185                 r = -ENOMEM;
3186                 if (!u.lapic)
3187                         goto out;
3188                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
3189                 if (r)
3190                         goto out;
3191                 r = -EFAULT;
3192                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
3193                         goto out;
3194                 r = 0;
3195                 break;
3196         }
3197         case KVM_SET_LAPIC: {
3198                 r = -EINVAL;
3199                 if (!vcpu->arch.apic)
3200                         goto out;
3201                 u.lapic = memdup_user(argp, sizeof(*u.lapic));
3202                 if (IS_ERR(u.lapic))
3203                         return PTR_ERR(u.lapic);
3204
3205                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
3206                 break;
3207         }
3208         case KVM_INTERRUPT: {
3209                 struct kvm_interrupt irq;
3210
3211                 r = -EFAULT;
3212                 if (copy_from_user(&irq, argp, sizeof irq))
3213                         goto out;
3214                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
3215                 break;
3216         }
3217         case KVM_NMI: {
3218                 r = kvm_vcpu_ioctl_nmi(vcpu);
3219                 break;
3220         }
3221         case KVM_SMI: {
3222                 r = kvm_vcpu_ioctl_smi(vcpu);
3223                 break;
3224         }
3225         case KVM_SET_CPUID: {
3226                 struct kvm_cpuid __user *cpuid_arg = argp;
3227                 struct kvm_cpuid cpuid;
3228
3229                 r = -EFAULT;
3230                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3231                         goto out;
3232                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
3233                 break;
3234         }
3235         case KVM_SET_CPUID2: {
3236                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3237                 struct kvm_cpuid2 cpuid;
3238
3239                 r = -EFAULT;
3240                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3241                         goto out;
3242                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
3243                                               cpuid_arg->entries);
3244                 break;
3245         }
3246         case KVM_GET_CPUID2: {
3247                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3248                 struct kvm_cpuid2 cpuid;
3249
3250                 r = -EFAULT;
3251                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3252                         goto out;
3253                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
3254                                               cpuid_arg->entries);
3255                 if (r)
3256                         goto out;
3257                 r = -EFAULT;
3258                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
3259                         goto out;
3260                 r = 0;
3261                 break;
3262         }
3263         case KVM_GET_MSRS:
3264                 r = msr_io(vcpu, argp, do_get_msr, 1);
3265                 break;
3266         case KVM_SET_MSRS:
3267                 r = msr_io(vcpu, argp, do_set_msr, 0);
3268                 break;
3269         case KVM_TPR_ACCESS_REPORTING: {
3270                 struct kvm_tpr_access_ctl tac;
3271
3272                 r = -EFAULT;
3273                 if (copy_from_user(&tac, argp, sizeof tac))
3274                         goto out;
3275                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
3276                 if (r)
3277                         goto out;
3278                 r = -EFAULT;
3279                 if (copy_to_user(argp, &tac, sizeof tac))
3280                         goto out;
3281                 r = 0;
3282                 break;
3283         };
3284         case KVM_SET_VAPIC_ADDR: {
3285                 struct kvm_vapic_addr va;
3286
3287                 r = -EINVAL;
3288                 if (!lapic_in_kernel(vcpu))
3289                         goto out;
3290                 r = -EFAULT;
3291                 if (copy_from_user(&va, argp, sizeof va))
3292                         goto out;
3293                 r = kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
3294                 break;
3295         }
3296         case KVM_X86_SETUP_MCE: {
3297                 u64 mcg_cap;
3298
3299                 r = -EFAULT;
3300                 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
3301                         goto out;
3302                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
3303                 break;
3304         }
3305         case KVM_X86_SET_MCE: {
3306                 struct kvm_x86_mce mce;
3307
3308                 r = -EFAULT;
3309                 if (copy_from_user(&mce, argp, sizeof mce))
3310                         goto out;
3311                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
3312                 break;
3313         }
3314         case KVM_GET_VCPU_EVENTS: {
3315                 struct kvm_vcpu_events events;
3316
3317                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
3318
3319                 r = -EFAULT;
3320                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
3321                         break;
3322                 r = 0;
3323                 break;
3324         }
3325         case KVM_SET_VCPU_EVENTS: {
3326                 struct kvm_vcpu_events events;
3327
3328                 r = -EFAULT;
3329                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
3330                         break;
3331
3332                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
3333                 break;
3334         }
3335         case KVM_GET_DEBUGREGS: {
3336                 struct kvm_debugregs dbgregs;
3337
3338                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
3339
3340                 r = -EFAULT;
3341                 if (copy_to_user(argp, &dbgregs,
3342                                  sizeof(struct kvm_debugregs)))
3343                         break;
3344                 r = 0;
3345                 break;
3346         }
3347         case KVM_SET_DEBUGREGS: {
3348                 struct kvm_debugregs dbgregs;
3349
3350                 r = -EFAULT;
3351                 if (copy_from_user(&dbgregs, argp,
3352                                    sizeof(struct kvm_debugregs)))
3353                         break;
3354
3355                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
3356                 break;
3357         }
3358         case KVM_GET_XSAVE: {
3359                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
3360                 r = -ENOMEM;
3361                 if (!u.xsave)
3362                         break;
3363
3364                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
3365
3366                 r = -EFAULT;
3367                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
3368                         break;
3369                 r = 0;
3370                 break;
3371         }
3372         case KVM_SET_XSAVE: {
3373                 u.xsave = memdup_user(argp, sizeof(*u.xsave));
3374                 if (IS_ERR(u.xsave))
3375                         return PTR_ERR(u.xsave);
3376
3377                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
3378                 break;
3379         }
3380         case KVM_GET_XCRS: {
3381                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
3382                 r = -ENOMEM;
3383                 if (!u.xcrs)
3384                         break;
3385
3386                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
3387
3388                 r = -EFAULT;
3389                 if (copy_to_user(argp, u.xcrs,
3390                                  sizeof(struct kvm_xcrs)))
3391                         break;
3392                 r = 0;
3393                 break;
3394         }
3395         case KVM_SET_XCRS: {
3396                 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
3397                 if (IS_ERR(u.xcrs))
3398                         return PTR_ERR(u.xcrs);
3399
3400                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
3401                 break;
3402         }
3403         case KVM_SET_TSC_KHZ: {
3404                 u32 user_tsc_khz;
3405
3406                 r = -EINVAL;
3407                 user_tsc_khz = (u32)arg;
3408
3409                 if (user_tsc_khz >= kvm_max_guest_tsc_khz)
3410                         goto out;
3411
3412                 if (user_tsc_khz == 0)
3413                         user_tsc_khz = tsc_khz;
3414
3415                 if (!kvm_set_tsc_khz(vcpu, user_tsc_khz))
3416                         r = 0;
3417
3418                 goto out;
3419         }
3420         case KVM_GET_TSC_KHZ: {
3421                 r = vcpu->arch.virtual_tsc_khz;
3422                 goto out;
3423         }
3424         case KVM_KVMCLOCK_CTRL: {
3425                 r = kvm_set_guest_paused(vcpu);
3426                 goto out;
3427         }
3428         default:
3429                 r = -EINVAL;
3430         }
3431 out:
3432         kfree(u.buffer);
3433         return r;
3434 }
3435
3436 int kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
3437 {
3438         return VM_FAULT_SIGBUS;
3439 }
3440
3441 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
3442 {
3443         int ret;
3444
3445         if (addr > (unsigned int)(-3 * PAGE_SIZE))
3446                 return -EINVAL;
3447         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
3448         return ret;
3449 }
3450
3451 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
3452                                               u64 ident_addr)
3453 {
3454         kvm->arch.ept_identity_map_addr = ident_addr;
3455         return 0;
3456 }
3457
3458 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
3459                                           u32 kvm_nr_mmu_pages)
3460 {
3461         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
3462                 return -EINVAL;
3463
3464         mutex_lock(&kvm->slots_lock);
3465
3466         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
3467         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
3468
3469         mutex_unlock(&kvm->slots_lock);
3470         return 0;
3471 }
3472
3473 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
3474 {
3475         return kvm->arch.n_max_mmu_pages;
3476 }
3477
3478 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3479 {
3480         int r;
3481
3482         r = 0;
3483         switch (chip->chip_id) {
3484         case KVM_IRQCHIP_PIC_MASTER:
3485                 memcpy(&chip->chip.pic,
3486                         &pic_irqchip(kvm)->pics[0],
3487                         sizeof(struct kvm_pic_state));
3488                 break;
3489         case KVM_IRQCHIP_PIC_SLAVE:
3490                 memcpy(&chip->chip.pic,
3491                         &pic_irqchip(kvm)->pics[1],
3492                         sizeof(struct kvm_pic_state));
3493                 break;
3494         case KVM_IRQCHIP_IOAPIC:
3495                 r = kvm_get_ioapic(kvm, &chip->chip.ioapic);
3496                 break;
3497         default:
3498                 r = -EINVAL;
3499                 break;
3500         }
3501         return r;
3502 }
3503
3504 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3505 {
3506         int r;
3507
3508         r = 0;
3509         switch (chip->chip_id) {
3510         case KVM_IRQCHIP_PIC_MASTER:
3511                 spin_lock(&pic_irqchip(kvm)->lock);
3512                 memcpy(&pic_irqchip(kvm)->pics[0],
3513                         &chip->chip.pic,
3514                         sizeof(struct kvm_pic_state));
3515                 spin_unlock(&pic_irqchip(kvm)->lock);
3516                 break;
3517         case KVM_IRQCHIP_PIC_SLAVE:
3518                 spin_lock(&pic_irqchip(kvm)->lock);
3519                 memcpy(&pic_irqchip(kvm)->pics[1],
3520                         &chip->chip.pic,
3521                         sizeof(struct kvm_pic_state));
3522                 spin_unlock(&pic_irqchip(kvm)->lock);
3523                 break;
3524         case KVM_IRQCHIP_IOAPIC:
3525                 r = kvm_set_ioapic(kvm, &chip->chip.ioapic);
3526                 break;
3527         default:
3528                 r = -EINVAL;
3529                 break;
3530         }
3531         kvm_pic_update_irq(pic_irqchip(kvm));
3532         return r;
3533 }
3534
3535 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3536 {
3537         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3538         memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
3539         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3540         return 0;
3541 }
3542
3543 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3544 {
3545         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3546         memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
3547         kvm_pit_load_count(kvm, 0, ps->channels[0].count, 0);
3548         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3549         return 0;
3550 }
3551
3552 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3553 {
3554         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3555         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
3556                 sizeof(ps->channels));
3557         ps->flags = kvm->arch.vpit->pit_state.flags;
3558         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3559         memset(&ps->reserved, 0, sizeof(ps->reserved));
3560         return 0;
3561 }
3562
3563 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3564 {
3565         int start = 0;
3566         u32 prev_legacy, cur_legacy;
3567         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3568         prev_legacy = kvm->arch.vpit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
3569         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
3570         if (!prev_legacy && cur_legacy)
3571                 start = 1;
3572         memcpy(&kvm->arch.vpit->pit_state.channels, &ps->channels,
3573                sizeof(kvm->arch.vpit->pit_state.channels));
3574         kvm->arch.vpit->pit_state.flags = ps->flags;
3575         kvm_pit_load_count(kvm, 0, kvm->arch.vpit->pit_state.channels[0].count, start);
3576         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3577         return 0;
3578 }
3579
3580 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
3581                                  struct kvm_reinject_control *control)
3582 {
3583         if (!kvm->arch.vpit)
3584                 return -ENXIO;
3585         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3586         kvm->arch.vpit->pit_state.reinject = control->pit_reinject;
3587         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3588         return 0;
3589 }
3590
3591 /**
3592  * kvm_vm_ioctl_get_dirty_log - get and clear the log of dirty pages in a slot
3593  * @kvm: kvm instance
3594  * @log: slot id and address to which we copy the log
3595  *
3596  * Steps 1-4 below provide general overview of dirty page logging. See
3597  * kvm_get_dirty_log_protect() function description for additional details.
3598  *
3599  * We call kvm_get_dirty_log_protect() to handle steps 1-3, upon return we
3600  * always flush the TLB (step 4) even if previous step failed  and the dirty
3601  * bitmap may be corrupt. Regardless of previous outcome the KVM logging API
3602  * does not preclude user space subsequent dirty log read. Flushing TLB ensures
3603  * writes will be marked dirty for next log read.
3604  *
3605  *   1. Take a snapshot of the bit and clear it if needed.
3606  *   2. Write protect the corresponding page.
3607  *   3. Copy the snapshot to the userspace.
3608  *   4. Flush TLB's if needed.
3609  */
3610 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
3611 {
3612         bool is_dirty = false;
3613         int r;
3614
3615         mutex_lock(&kvm->slots_lock);
3616
3617         /*
3618          * Flush potentially hardware-cached dirty pages to dirty_bitmap.
3619          */
3620         if (kvm_x86_ops->flush_log_dirty)
3621                 kvm_x86_ops->flush_log_dirty(kvm);
3622
3623         r = kvm_get_dirty_log_protect(kvm, log, &is_dirty);
3624
3625         /*
3626          * All the TLBs can be flushed out of mmu lock, see the comments in
3627          * kvm_mmu_slot_remove_write_access().
3628          */
3629         lockdep_assert_held(&kvm->slots_lock);
3630         if (is_dirty)
3631                 kvm_flush_remote_tlbs(kvm);
3632
3633         mutex_unlock(&kvm->slots_lock);
3634         return r;
3635 }
3636
3637 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
3638                         bool line_status)
3639 {
3640         if (!irqchip_in_kernel(kvm))
3641                 return -ENXIO;
3642
3643         irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
3644                                         irq_event->irq, irq_event->level,
3645                                         line_status);
3646         return 0;
3647 }
3648
3649 static int kvm_vm_ioctl_enable_cap(struct kvm *kvm,
3650                                    struct kvm_enable_cap *cap)
3651 {
3652         int r;
3653
3654         if (cap->flags)
3655                 return -EINVAL;
3656
3657         switch (cap->cap) {
3658         case KVM_CAP_DISABLE_QUIRKS:
3659                 kvm->arch.disabled_quirks = cap->args[0];
3660                 r = 0;
3661                 break;
3662         case KVM_CAP_SPLIT_IRQCHIP: {
3663                 mutex_lock(&kvm->lock);
3664                 r = -EINVAL;
3665                 if (cap->args[0] > MAX_NR_RESERVED_IOAPIC_PINS)
3666                         goto split_irqchip_unlock;
3667                 r = -EEXIST;
3668                 if (irqchip_in_kernel(kvm))
3669                         goto split_irqchip_unlock;
3670                 if (atomic_read(&kvm->online_vcpus))
3671                         goto split_irqchip_unlock;
3672                 r = kvm_setup_empty_irq_routing(kvm);
3673                 if (r)
3674                         goto split_irqchip_unlock;
3675                 /* Pairs with irqchip_in_kernel. */
3676                 smp_wmb();
3677                 kvm->arch.irqchip_split = true;
3678                 kvm->arch.nr_reserved_ioapic_pins = cap->args[0];
3679                 r = 0;
3680 split_irqchip_unlock:
3681                 mutex_unlock(&kvm->lock);
3682                 break;
3683         }
3684         default:
3685                 r = -EINVAL;
3686                 break;
3687         }
3688         return r;
3689 }
3690
3691 long kvm_arch_vm_ioctl(struct file *filp,
3692                        unsigned int ioctl, unsigned long arg)
3693 {
3694         struct kvm *kvm = filp->private_data;
3695         void __user *argp = (void __user *)arg;
3696         int r = -ENOTTY;
3697         /*
3698          * This union makes it completely explicit to gcc-3.x
3699          * that these two variables' stack usage should be
3700          * combined, not added together.
3701          */
3702         union {
3703                 struct kvm_pit_state ps;
3704                 struct kvm_pit_state2 ps2;
3705                 struct kvm_pit_config pit_config;
3706         } u;
3707
3708         switch (ioctl) {
3709         case KVM_SET_TSS_ADDR:
3710                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
3711                 break;
3712         case KVM_SET_IDENTITY_MAP_ADDR: {
3713                 u64 ident_addr;
3714
3715                 r = -EFAULT;
3716                 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
3717                         goto out;
3718                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
3719                 break;
3720         }
3721         case KVM_SET_NR_MMU_PAGES:
3722                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
3723                 break;
3724         case KVM_GET_NR_MMU_PAGES:
3725                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
3726                 break;
3727         case KVM_CREATE_IRQCHIP: {
3728                 struct kvm_pic *vpic;
3729
3730                 mutex_lock(&kvm->lock);
3731                 r = -EEXIST;
3732                 if (kvm->arch.vpic)
3733                         goto create_irqchip_unlock;
3734                 r = -EINVAL;
3735                 if (atomic_read(&kvm->online_vcpus))
3736                         goto create_irqchip_unlock;
3737                 r = -ENOMEM;
3738                 vpic = kvm_create_pic(kvm);
3739                 if (vpic) {
3740                         r = kvm_ioapic_init(kvm);
3741                         if (r) {
3742                                 mutex_lock(&kvm->slots_lock);
3743                                 kvm_destroy_pic(vpic);
3744                                 mutex_unlock(&kvm->slots_lock);
3745                                 goto create_irqchip_unlock;
3746                         }
3747                 } else
3748                         goto create_irqchip_unlock;
3749                 r = kvm_setup_default_irq_routing(kvm);
3750                 if (r) {
3751                         mutex_lock(&kvm->slots_lock);
3752                         mutex_lock(&kvm->irq_lock);
3753                         kvm_ioapic_destroy(kvm);
3754                         kvm_destroy_pic(vpic);
3755                         mutex_unlock(&kvm->irq_lock);
3756                         mutex_unlock(&kvm->slots_lock);
3757                         goto create_irqchip_unlock;
3758                 }
3759                 /* Write kvm->irq_routing before kvm->arch.vpic.  */
3760                 smp_wmb();
3761                 kvm->arch.vpic = vpic;
3762         create_irqchip_unlock:
3763                 mutex_unlock(&kvm->lock);
3764                 break;
3765         }
3766         case KVM_CREATE_PIT:
3767                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
3768                 goto create_pit;
3769         case KVM_CREATE_PIT2:
3770                 r = -EFAULT;
3771                 if (copy_from_user(&u.pit_config, argp,
3772                                    sizeof(struct kvm_pit_config)))
3773                         goto out;
3774         create_pit:
3775                 mutex_lock(&kvm->slots_lock);
3776                 r = -EEXIST;
3777                 if (kvm->arch.vpit)
3778                         goto create_pit_unlock;
3779                 r = -ENOMEM;
3780                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
3781                 if (kvm->arch.vpit)
3782                         r = 0;
3783         create_pit_unlock:
3784                 mutex_unlock(&kvm->slots_lock);
3785                 break;
3786         case KVM_GET_IRQCHIP: {
3787                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3788                 struct kvm_irqchip *chip;
3789
3790                 chip = memdup_user(argp, sizeof(*chip));
3791                 if (IS_ERR(chip)) {
3792                         r = PTR_ERR(chip);
3793                         goto out;
3794                 }
3795
3796                 r = -ENXIO;
3797                 if (!irqchip_in_kernel(kvm) || irqchip_split(kvm))
3798                         goto get_irqchip_out;
3799                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
3800                 if (r)
3801                         goto get_irqchip_out;
3802                 r = -EFAULT;
3803                 if (copy_to_user(argp, chip, sizeof *chip))
3804                         goto get_irqchip_out;
3805                 r = 0;
3806         get_irqchip_out:
3807                 kfree(chip);
3808                 break;
3809         }
3810         case KVM_SET_IRQCHIP: {
3811                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3812                 struct kvm_irqchip *chip;
3813
3814                 chip = memdup_user(argp, sizeof(*chip));
3815                 if (IS_ERR(chip)) {
3816                         r = PTR_ERR(chip);
3817                         goto out;
3818                 }
3819
3820                 r = -ENXIO;
3821                 if (!irqchip_in_kernel(kvm) || irqchip_split(kvm))
3822                         goto set_irqchip_out;
3823                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
3824                 if (r)
3825                         goto set_irqchip_out;
3826                 r = 0;
3827         set_irqchip_out:
3828                 kfree(chip);
3829                 break;
3830         }
3831         case KVM_GET_PIT: {
3832                 r = -EFAULT;
3833                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
3834                         goto out;
3835                 r = -ENXIO;
3836                 if (!kvm->arch.vpit)
3837                         goto out;
3838                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
3839                 if (r)
3840                         goto out;
3841                 r = -EFAULT;
3842                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
3843                         goto out;
3844                 r = 0;
3845                 break;
3846         }
3847         case KVM_SET_PIT: {
3848                 r = -EFAULT;
3849                 if (copy_from_user(&u.ps, argp, sizeof u.ps))
3850                         goto out;
3851                 r = -ENXIO;
3852                 if (!kvm->arch.vpit)
3853                         goto out;
3854                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
3855                 break;
3856         }
3857         case KVM_GET_PIT2: {
3858                 r = -ENXIO;
3859                 if (!kvm->arch.vpit)
3860                         goto out;
3861                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
3862                 if (r)
3863                         goto out;
3864                 r = -EFAULT;
3865                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
3866                         goto out;
3867                 r = 0;
3868                 break;
3869         }
3870         case KVM_SET_PIT2: {
3871                 r = -EFAULT;
3872                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
3873                         goto out;
3874                 r = -ENXIO;
3875                 if (!kvm->arch.vpit)
3876                         goto out;
3877                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
3878                 break;
3879         }
3880         case KVM_REINJECT_CONTROL: {
3881                 struct kvm_reinject_control control;
3882                 r =  -EFAULT;
3883                 if (copy_from_user(&control, argp, sizeof(control)))
3884                         goto out;
3885                 r = kvm_vm_ioctl_reinject(kvm, &control);
3886                 break;
3887         }
3888         case KVM_SET_BOOT_CPU_ID:
3889                 r = 0;
3890                 mutex_lock(&kvm->lock);
3891                 if (atomic_read(&kvm->online_vcpus) != 0)
3892                         r = -EBUSY;
3893                 else
3894                         kvm->arch.bsp_vcpu_id = arg;
3895                 mutex_unlock(&kvm->lock);
3896                 break;
3897         case KVM_XEN_HVM_CONFIG: {
3898                 r = -EFAULT;
3899                 if (copy_from_user(&kvm->arch.xen_hvm_config, argp,
3900                                    sizeof(struct kvm_xen_hvm_config)))
3901                         goto out;
3902                 r = -EINVAL;
3903                 if (kvm->arch.xen_hvm_config.flags)
3904                         goto out;
3905                 r = 0;
3906                 break;
3907         }
3908         case KVM_SET_CLOCK: {
3909                 struct kvm_clock_data user_ns;
3910                 u64 now_ns;
3911                 s64 delta;
3912
3913                 r = -EFAULT;
3914                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
3915                         goto out;
3916
3917                 r = -EINVAL;
3918                 if (user_ns.flags)
3919                         goto out;
3920
3921                 r = 0;
3922                 local_irq_disable();
3923                 now_ns = get_kernel_ns();
3924                 delta = user_ns.clock - now_ns;
3925                 local_irq_enable();
3926                 kvm->arch.kvmclock_offset = delta;
3927                 kvm_gen_update_masterclock(kvm);
3928                 break;
3929         }
3930         case KVM_GET_CLOCK: {
3931                 struct kvm_clock_data user_ns;
3932                 u64 now_ns;
3933
3934                 local_irq_disable();
3935                 now_ns = get_kernel_ns();
3936                 user_ns.clock = kvm->arch.kvmclock_offset + now_ns;
3937                 local_irq_enable();
3938                 user_ns.flags = 0;
3939                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
3940
3941                 r = -EFAULT;
3942                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
3943                         goto out;
3944                 r = 0;
3945                 break;
3946         }
3947         case KVM_ENABLE_CAP: {
3948                 struct kvm_enable_cap cap;
3949
3950                 r = -EFAULT;
3951                 if (copy_from_user(&cap, argp, sizeof(cap)))
3952                         goto out;
3953                 r = kvm_vm_ioctl_enable_cap(kvm, &cap);
3954                 break;
3955         }
3956         default:
3957                 r = kvm_vm_ioctl_assigned_device(kvm, ioctl, arg);
3958         }
3959 out:
3960         return r;
3961 }
3962
3963 static void kvm_init_msr_list(void)
3964 {
3965         u32 dummy[2];
3966         unsigned i, j;
3967
3968         for (i = j = 0; i < ARRAY_SIZE(msrs_to_save); i++) {
3969                 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
3970                         continue;
3971
3972                 /*
3973                  * Even MSRs that are valid in the host may not be exposed
3974                  * to the guests in some cases.  We could work around this
3975                  * in VMX with the generic MSR save/load machinery, but it
3976                  * is not really worthwhile since it will really only
3977                  * happen with nested virtualization.
3978                  */
3979                 switch (msrs_to_save[i]) {
3980                 case MSR_IA32_BNDCFGS:
3981                         if (!kvm_x86_ops->mpx_supported())
3982                                 continue;
3983                         break;
3984                 default:
3985                         break;
3986                 }
3987
3988                 if (j < i)
3989                         msrs_to_save[j] = msrs_to_save[i];
3990                 j++;
3991         }
3992         num_msrs_to_save = j;
3993
3994         for (i = j = 0; i < ARRAY_SIZE(emulated_msrs); i++) {
3995                 switch (emulated_msrs[i]) {
3996                 case MSR_IA32_SMBASE:
3997                         if (!kvm_x86_ops->cpu_has_high_real_mode_segbase())
3998                                 continue;
3999                         break;
4000                 default:
4001                         break;
4002                 }
4003
4004                 if (j < i)
4005                         emulated_msrs[j] = emulated_msrs[i];
4006                 j++;
4007         }
4008         num_emulated_msrs = j;
4009 }
4010
4011 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
4012                            const void *v)
4013 {
4014         int handled = 0;
4015         int n;
4016
4017         do {
4018                 n = min(len, 8);
4019                 if (!(vcpu->arch.apic &&
4020                       !kvm_iodevice_write(vcpu, &vcpu->arch.apic->dev, addr, n, v))
4021                     && kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, n, v))
4022                         break;
4023                 handled += n;
4024                 addr += n;
4025                 len -= n;
4026                 v += n;
4027         } while (len);
4028
4029         return handled;
4030 }
4031
4032 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
4033 {
4034         int handled = 0;
4035         int n;
4036
4037         do {
4038                 n = min(len, 8);
4039                 if (!(vcpu->arch.apic &&
4040                       !kvm_iodevice_read(vcpu, &vcpu->arch.apic->dev,
4041                                          addr, n, v))
4042                     && kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, n, v))
4043                         break;
4044                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, *(u64 *)v);
4045                 handled += n;
4046                 addr += n;
4047                 len -= n;
4048                 v += n;
4049         } while (len);
4050
4051         return handled;
4052 }
4053
4054 static void kvm_set_segment(struct kvm_vcpu *vcpu,
4055                         struct kvm_segment *var, int seg)
4056 {
4057         kvm_x86_ops->set_segment(vcpu, var, seg);
4058 }
4059
4060 void kvm_get_segment(struct kvm_vcpu *vcpu,
4061                      struct kvm_segment *var, int seg)
4062 {
4063         kvm_x86_ops->get_segment(vcpu, var, seg);
4064 }
4065
4066 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
4067                            struct x86_exception *exception)
4068 {
4069         gpa_t t_gpa;
4070
4071         BUG_ON(!mmu_is_nested(vcpu));
4072
4073         /* NPT walks are always user-walks */
4074         access |= PFERR_USER_MASK;
4075         t_gpa  = vcpu->arch.mmu.gva_to_gpa(vcpu, gpa, access, exception);
4076
4077         return t_gpa;
4078 }
4079
4080 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
4081                               struct x86_exception *exception)
4082 {
4083         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4084         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4085 }
4086
4087  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
4088                                 struct x86_exception *exception)
4089 {
4090         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4091         access |= PFERR_FETCH_MASK;
4092         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4093 }
4094
4095 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
4096                                struct x86_exception *exception)
4097 {
4098         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4099         access |= PFERR_WRITE_MASK;
4100         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4101 }
4102
4103 /* uses this to access any guest's mapped memory without checking CPL */
4104 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
4105                                 struct x86_exception *exception)
4106 {
4107         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
4108 }
4109
4110 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
4111                                       struct kvm_vcpu *vcpu, u32 access,
4112                                       struct x86_exception *exception)
4113 {
4114         void *data = val;
4115         int r = X86EMUL_CONTINUE;
4116
4117         while (bytes) {
4118                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
4119                                                             exception);
4120                 unsigned offset = addr & (PAGE_SIZE-1);
4121                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
4122                 int ret;
4123
4124                 if (gpa == UNMAPPED_GVA)
4125                         return X86EMUL_PROPAGATE_FAULT;
4126                 ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, data,
4127                                                offset, toread);
4128                 if (ret < 0) {
4129                         r = X86EMUL_IO_NEEDED;
4130                         goto out;
4131                 }
4132
4133                 bytes -= toread;
4134                 data += toread;
4135                 addr += toread;
4136         }
4137 out:
4138         return r;
4139 }
4140
4141 /* used for instruction fetching */
4142 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
4143                                 gva_t addr, void *val, unsigned int bytes,
4144                                 struct x86_exception *exception)
4145 {
4146         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4147         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4148         unsigned offset;
4149         int ret;
4150
4151         /* Inline kvm_read_guest_virt_helper for speed.  */
4152         gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access|PFERR_FETCH_MASK,
4153                                                     exception);
4154         if (unlikely(gpa == UNMAPPED_GVA))
4155                 return X86EMUL_PROPAGATE_FAULT;
4156
4157         offset = addr & (PAGE_SIZE-1);
4158         if (WARN_ON(offset + bytes > PAGE_SIZE))
4159                 bytes = (unsigned)PAGE_SIZE - offset;
4160         ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, val,
4161                                        offset, bytes);
4162         if (unlikely(ret < 0))
4163                 return X86EMUL_IO_NEEDED;
4164
4165         return X86EMUL_CONTINUE;
4166 }
4167
4168 int kvm_read_guest_virt(struct x86_emulate_ctxt *ctxt,
4169                                gva_t addr, void *val, unsigned int bytes,
4170                                struct x86_exception *exception)
4171 {
4172         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4173         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4174
4175         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
4176                                           exception);
4177 }
4178 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
4179
4180 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt *ctxt,
4181                                       gva_t addr, void *val, unsigned int bytes,
4182                                       struct x86_exception *exception)
4183 {
4184         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4185         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, exception);
4186 }
4187
4188 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt *ctxt,
4189                 unsigned long addr, void *val, unsigned int bytes)
4190 {
4191         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4192         int r = kvm_vcpu_read_guest(vcpu, addr, val, bytes);
4193
4194         return r < 0 ? X86EMUL_IO_NEEDED : X86EMUL_CONTINUE;
4195 }
4196
4197 int kvm_write_guest_virt_system(struct x86_emulate_ctxt *ctxt,
4198                                        gva_t addr, void *val,
4199                                        unsigned int bytes,
4200                                        struct x86_exception *exception)
4201 {
4202         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4203         void *data = val;
4204         int r = X86EMUL_CONTINUE;
4205
4206         while (bytes) {
4207                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
4208                                                              PFERR_WRITE_MASK,
4209                                                              exception);
4210                 unsigned offset = addr & (PAGE_SIZE-1);
4211                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
4212                 int ret;
4213
4214                 if (gpa == UNMAPPED_GVA)
4215                         return X86EMUL_PROPAGATE_FAULT;
4216                 ret = kvm_vcpu_write_guest(vcpu, gpa, data, towrite);
4217                 if (ret < 0) {
4218                         r = X86EMUL_IO_NEEDED;
4219                         goto out;
4220                 }
4221
4222                 bytes -= towrite;
4223                 data += towrite;
4224                 addr += towrite;
4225         }
4226 out:
4227         return r;
4228 }
4229 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
4230
4231 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
4232                                 gpa_t *gpa, struct x86_exception *exception,
4233                                 bool write)
4234 {
4235         u32 access = ((kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0)
4236                 | (write ? PFERR_WRITE_MASK : 0);
4237
4238         if (vcpu_match_mmio_gva(vcpu, gva)
4239             && !permission_fault(vcpu, vcpu->arch.walk_mmu,
4240                                  vcpu->arch.access, access)) {
4241                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
4242                                         (gva & (PAGE_SIZE - 1));
4243                 trace_vcpu_match_mmio(gva, *gpa, write, false);
4244                 return 1;
4245         }
4246
4247         *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4248
4249         if (*gpa == UNMAPPED_GVA)
4250                 return -1;
4251
4252         /* For APIC access vmexit */
4253         if ((*gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4254                 return 1;
4255
4256         if (vcpu_match_mmio_gpa(vcpu, *gpa)) {
4257                 trace_vcpu_match_mmio(gva, *gpa, write, true);
4258                 return 1;
4259         }
4260
4261         return 0;
4262 }
4263
4264 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
4265                         const void *val, int bytes)
4266 {
4267         int ret;
4268
4269         ret = kvm_vcpu_write_guest(vcpu, gpa, val, bytes);
4270         if (ret < 0)
4271                 return 0;
4272         kvm_mmu_pte_write(vcpu, gpa, val, bytes);
4273         return 1;
4274 }
4275
4276 struct read_write_emulator_ops {
4277         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
4278                                   int bytes);
4279         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
4280                                   void *val, int bytes);
4281         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4282                                int bytes, void *val);
4283         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4284                                     void *val, int bytes);
4285         bool write;
4286 };
4287
4288 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
4289 {
4290         if (vcpu->mmio_read_completed) {
4291                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
4292                                vcpu->mmio_fragments[0].gpa, *(u64 *)val);
4293                 vcpu->mmio_read_completed = 0;
4294                 return 1;
4295         }
4296
4297         return 0;
4298 }
4299
4300 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4301                         void *val, int bytes)
4302 {
4303         return !kvm_vcpu_read_guest(vcpu, gpa, val, bytes);
4304 }
4305
4306 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4307                          void *val, int bytes)
4308 {
4309         return emulator_write_phys(vcpu, gpa, val, bytes);
4310 }
4311
4312 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
4313 {
4314         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
4315         return vcpu_mmio_write(vcpu, gpa, bytes, val);
4316 }
4317
4318 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4319                           void *val, int bytes)
4320 {
4321         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
4322         return X86EMUL_IO_NEEDED;
4323 }
4324
4325 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4326                            void *val, int bytes)
4327 {
4328         struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
4329
4330         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
4331         return X86EMUL_CONTINUE;
4332 }
4333
4334 static const struct read_write_emulator_ops read_emultor = {
4335         .read_write_prepare = read_prepare,
4336         .read_write_emulate = read_emulate,
4337         .read_write_mmio = vcpu_mmio_read,
4338         .read_write_exit_mmio = read_exit_mmio,
4339 };
4340
4341 static const struct read_write_emulator_ops write_emultor = {
4342         .read_write_emulate = write_emulate,
4343         .read_write_mmio = write_mmio,
4344         .read_write_exit_mmio = write_exit_mmio,
4345         .write = true,
4346 };
4347
4348 static int emulator_read_write_onepage(unsigned long addr, void *val,
4349                                        unsigned int bytes,
4350                                        struct x86_exception *exception,
4351                                        struct kvm_vcpu *vcpu,
4352                                        const struct read_write_emulator_ops *ops)
4353 {
4354         gpa_t gpa;
4355         int handled, ret;
4356         bool write = ops->write;
4357         struct kvm_mmio_fragment *frag;
4358
4359         ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
4360
4361         if (ret < 0)
4362                 return X86EMUL_PROPAGATE_FAULT;
4363
4364         /* For APIC access vmexit */
4365         if (ret)
4366                 goto mmio;
4367
4368         if (ops->read_write_emulate(vcpu, gpa, val, bytes))
4369                 return X86EMUL_CONTINUE;
4370
4371 mmio:
4372         /*
4373          * Is this MMIO handled locally?
4374          */
4375         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
4376         if (handled == bytes)
4377                 return X86EMUL_CONTINUE;
4378
4379         gpa += handled;
4380         bytes -= handled;
4381         val += handled;
4382
4383         WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS);
4384         frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
4385         frag->gpa = gpa;
4386         frag->data = val;
4387         frag->len = bytes;
4388         return X86EMUL_CONTINUE;
4389 }
4390
4391 static int emulator_read_write(struct x86_emulate_ctxt *ctxt,
4392                         unsigned long addr,
4393                         void *val, unsigned int bytes,
4394                         struct x86_exception *exception,
4395                         const struct read_write_emulator_ops *ops)
4396 {
4397         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4398         gpa_t gpa;
4399         int rc;
4400
4401         if (ops->read_write_prepare &&
4402                   ops->read_write_prepare(vcpu, val, bytes))
4403                 return X86EMUL_CONTINUE;
4404
4405         vcpu->mmio_nr_fragments = 0;
4406
4407         /* Crossing a page boundary? */
4408         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
4409                 int now;
4410
4411                 now = -addr & ~PAGE_MASK;
4412                 rc = emulator_read_write_onepage(addr, val, now, exception,
4413                                                  vcpu, ops);
4414
4415                 if (rc != X86EMUL_CONTINUE)
4416                         return rc;
4417                 addr += now;
4418                 if (ctxt->mode != X86EMUL_MODE_PROT64)
4419                         addr = (u32)addr;
4420                 val += now;
4421                 bytes -= now;
4422         }
4423
4424         rc = emulator_read_write_onepage(addr, val, bytes, exception,
4425                                          vcpu, ops);
4426         if (rc != X86EMUL_CONTINUE)
4427                 return rc;
4428
4429         if (!vcpu->mmio_nr_fragments)
4430                 return rc;
4431
4432         gpa = vcpu->mmio_fragments[0].gpa;
4433
4434         vcpu->mmio_needed = 1;
4435         vcpu->mmio_cur_fragment = 0;
4436
4437         vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len);
4438         vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
4439         vcpu->run->exit_reason = KVM_EXIT_MMIO;
4440         vcpu->run->mmio.phys_addr = gpa;
4441
4442         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
4443 }
4444
4445 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
4446                                   unsigned long addr,
4447                                   void *val,
4448                                   unsigned int bytes,
4449                                   struct x86_exception *exception)
4450 {
4451         return emulator_read_write(ctxt, addr, val, bytes,
4452                                    exception, &read_emultor);
4453 }
4454
4455 static int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
4456                             unsigned long addr,
4457                             const void *val,
4458                             unsigned int bytes,
4459                             struct x86_exception *exception)
4460 {
4461         return emulator_read_write(ctxt, addr, (void *)val, bytes,
4462                                    exception, &write_emultor);
4463 }
4464
4465 #define CMPXCHG_TYPE(t, ptr, old, new) \
4466         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
4467
4468 #ifdef CONFIG_X86_64
4469 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
4470 #else
4471 #  define CMPXCHG64(ptr, old, new) \
4472         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
4473 #endif
4474
4475 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
4476                                      unsigned long addr,
4477                                      const void *old,
4478                                      const void *new,
4479                                      unsigned int bytes,
4480                                      struct x86_exception *exception)
4481 {
4482         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4483         gpa_t gpa;
4484         struct page *page;
4485         char *kaddr;
4486         bool exchanged;
4487
4488         /* guests cmpxchg8b have to be emulated atomically */
4489         if (bytes > 8 || (bytes & (bytes - 1)))
4490                 goto emul_write;
4491
4492         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
4493
4494         if (gpa == UNMAPPED_GVA ||
4495             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4496                 goto emul_write;
4497
4498         if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
4499                 goto emul_write;
4500
4501         page = kvm_vcpu_gfn_to_page(vcpu, gpa >> PAGE_SHIFT);
4502         if (is_error_page(page))
4503                 goto emul_write;
4504
4505         kaddr = kmap_atomic(page);
4506         kaddr += offset_in_page(gpa);
4507         switch (bytes) {
4508         case 1:
4509                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
4510                 break;
4511         case 2:
4512                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
4513                 break;
4514         case 4:
4515                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
4516                 break;
4517         case 8:
4518                 exchanged = CMPXCHG64(kaddr, old, new);
4519                 break;
4520         default:
4521                 BUG();
4522         }
4523         kunmap_atomic(kaddr);
4524         kvm_release_page_dirty(page);
4525
4526         if (!exchanged)
4527                 return X86EMUL_CMPXCHG_FAILED;
4528
4529         kvm_vcpu_mark_page_dirty(vcpu, gpa >> PAGE_SHIFT);
4530         kvm_mmu_pte_write(vcpu, gpa, new, bytes);
4531
4532         return X86EMUL_CONTINUE;
4533
4534 emul_write:
4535         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
4536
4537         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
4538 }
4539
4540 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
4541 {
4542         /* TODO: String I/O for in kernel device */
4543         int r;
4544
4545         if (vcpu->arch.pio.in)
4546                 r = kvm_io_bus_read(vcpu, KVM_PIO_BUS, vcpu->arch.pio.port,
4547                                     vcpu->arch.pio.size, pd);
4548         else
4549                 r = kvm_io_bus_write(vcpu, KVM_PIO_BUS,
4550                                      vcpu->arch.pio.port, vcpu->arch.pio.size,
4551                                      pd);
4552         return r;
4553 }
4554
4555 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
4556                                unsigned short port, void *val,
4557                                unsigned int count, bool in)
4558 {
4559         vcpu->arch.pio.port = port;
4560         vcpu->arch.pio.in = in;
4561         vcpu->arch.pio.count  = count;
4562         vcpu->arch.pio.size = size;
4563
4564         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
4565                 vcpu->arch.pio.count = 0;
4566                 return 1;
4567         }
4568
4569         vcpu->run->exit_reason = KVM_EXIT_IO;
4570         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
4571         vcpu->run->io.size = size;
4572         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
4573         vcpu->run->io.count = count;
4574         vcpu->run->io.port = port;
4575
4576         return 0;
4577 }
4578
4579 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
4580                                     int size, unsigned short port, void *val,
4581                                     unsigned int count)
4582 {
4583         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4584         int ret;
4585
4586         if (vcpu->arch.pio.count)
4587                 goto data_avail;
4588
4589         ret = emulator_pio_in_out(vcpu, size, port, val, count, true);
4590         if (ret) {
4591 data_avail:
4592                 memcpy(val, vcpu->arch.pio_data, size * count);
4593                 trace_kvm_pio(KVM_PIO_IN, port, size, count, vcpu->arch.pio_data);
4594                 vcpu->arch.pio.count = 0;
4595                 return 1;
4596         }
4597
4598         return 0;
4599 }
4600
4601 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
4602                                      int size, unsigned short port,
4603                                      const void *val, unsigned int count)
4604 {
4605         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4606
4607         memcpy(vcpu->arch.pio_data, val, size * count);
4608         trace_kvm_pio(KVM_PIO_OUT, port, size, count, vcpu->arch.pio_data);
4609         return emulator_pio_in_out(vcpu, size, port, (void *)val, count, false);
4610 }
4611
4612 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
4613 {
4614         return kvm_x86_ops->get_segment_base(vcpu, seg);
4615 }
4616
4617 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
4618 {
4619         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
4620 }
4621
4622 int kvm_emulate_wbinvd_noskip(struct kvm_vcpu *vcpu)
4623 {
4624         if (!need_emulate_wbinvd(vcpu))
4625                 return X86EMUL_CONTINUE;
4626
4627         if (kvm_x86_ops->has_wbinvd_exit()) {
4628                 int cpu = get_cpu();
4629
4630                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
4631                 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
4632                                 wbinvd_ipi, NULL, 1);
4633                 put_cpu();
4634                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
4635         } else
4636                 wbinvd();
4637         return X86EMUL_CONTINUE;
4638 }
4639
4640 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
4641 {
4642         kvm_x86_ops->skip_emulated_instruction(vcpu);
4643         return kvm_emulate_wbinvd_noskip(vcpu);
4644 }
4645 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
4646
4647
4648
4649 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
4650 {
4651         kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt));
4652 }
4653
4654 static int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr,
4655                            unsigned long *dest)
4656 {
4657         return kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
4658 }
4659
4660 static int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
4661                            unsigned long value)
4662 {
4663
4664         return __kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
4665 }
4666
4667 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
4668 {
4669         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
4670 }
4671
4672 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
4673 {
4674         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4675         unsigned long value;
4676
4677         switch (cr) {
4678         case 0:
4679                 value = kvm_read_cr0(vcpu);
4680                 break;
4681         case 2:
4682                 value = vcpu->arch.cr2;
4683                 break;
4684         case 3:
4685                 value = kvm_read_cr3(vcpu);
4686                 break;
4687         case 4:
4688                 value = kvm_read_cr4(vcpu);
4689                 break;
4690         case 8:
4691                 value = kvm_get_cr8(vcpu);
4692                 break;
4693         default:
4694                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
4695                 return 0;
4696         }
4697
4698         return value;
4699 }
4700
4701 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
4702 {
4703         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4704         int res = 0;
4705
4706         switch (cr) {
4707         case 0:
4708                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
4709                 break;
4710         case 2:
4711                 vcpu->arch.cr2 = val;
4712                 break;
4713         case 3:
4714                 res = kvm_set_cr3(vcpu, val);
4715                 break;
4716         case 4:
4717                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
4718                 break;
4719         case 8:
4720                 res = kvm_set_cr8(vcpu, val);
4721                 break;
4722         default:
4723                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
4724                 res = -1;
4725         }
4726
4727         return res;
4728 }
4729
4730 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
4731 {
4732         return kvm_x86_ops->get_cpl(emul_to_vcpu(ctxt));
4733 }
4734
4735 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4736 {
4737         kvm_x86_ops->get_gdt(emul_to_vcpu(ctxt), dt);
4738 }
4739
4740 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4741 {
4742         kvm_x86_ops->get_idt(emul_to_vcpu(ctxt), dt);
4743 }
4744
4745 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4746 {
4747         kvm_x86_ops->set_gdt(emul_to_vcpu(ctxt), dt);
4748 }
4749
4750 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4751 {
4752         kvm_x86_ops->set_idt(emul_to_vcpu(ctxt), dt);
4753 }
4754
4755 static unsigned long emulator_get_cached_segment_base(
4756         struct x86_emulate_ctxt *ctxt, int seg)
4757 {
4758         return get_segment_base(emul_to_vcpu(ctxt), seg);
4759 }
4760
4761 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
4762                                  struct desc_struct *desc, u32 *base3,
4763                                  int seg)
4764 {
4765         struct kvm_segment var;
4766
4767         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
4768         *selector = var.selector;
4769
4770         if (var.unusable) {
4771                 memset(desc, 0, sizeof(*desc));
4772                 return false;
4773         }
4774
4775         if (var.g)
4776                 var.limit >>= 12;
4777         set_desc_limit(desc, var.limit);
4778         set_desc_base(desc, (unsigned long)var.base);
4779 #ifdef CONFIG_X86_64
4780         if (base3)
4781                 *base3 = var.base >> 32;
4782 #endif
4783         desc->type = var.type;
4784         desc->s = var.s;
4785         desc->dpl = var.dpl;
4786         desc->p = var.present;
4787         desc->avl = var.avl;
4788         desc->l = var.l;
4789         desc->d = var.db;
4790         desc->g = var.g;
4791
4792         return true;
4793 }
4794
4795 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
4796                                  struct desc_struct *desc, u32 base3,
4797                                  int seg)
4798 {
4799         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4800         struct kvm_segment var;
4801
4802         var.selector = selector;
4803         var.base = get_desc_base(desc);
4804 #ifdef CONFIG_X86_64
4805         var.base |= ((u64)base3) << 32;
4806 #endif
4807         var.limit = get_desc_limit(desc);
4808         if (desc->g)
4809                 var.limit = (var.limit << 12) | 0xfff;
4810         var.type = desc->type;
4811         var.dpl = desc->dpl;
4812         var.db = desc->d;
4813         var.s = desc->s;
4814         var.l = desc->l;
4815         var.g = desc->g;
4816         var.avl = desc->avl;
4817         var.present = desc->p;
4818         var.unusable = !var.present;
4819         var.padding = 0;
4820
4821         kvm_set_segment(vcpu, &var, seg);
4822         return;
4823 }
4824
4825 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
4826                             u32 msr_index, u64 *pdata)
4827 {
4828         struct msr_data msr;
4829         int r;
4830
4831         msr.index = msr_index;
4832         msr.host_initiated = false;
4833         r = kvm_get_msr(emul_to_vcpu(ctxt), &msr);
4834         if (r)
4835                 return r;
4836
4837         *pdata = msr.data;
4838         return 0;
4839 }
4840
4841 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
4842                             u32 msr_index, u64 data)
4843 {
4844         struct msr_data msr;
4845
4846         msr.data = data;
4847         msr.index = msr_index;
4848         msr.host_initiated = false;
4849         return kvm_set_msr(emul_to_vcpu(ctxt), &msr);
4850 }
4851
4852 static u64 emulator_get_smbase(struct x86_emulate_ctxt *ctxt)
4853 {
4854         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4855
4856         return vcpu->arch.smbase;
4857 }
4858
4859 static void emulator_set_smbase(struct x86_emulate_ctxt *ctxt, u64 smbase)
4860 {
4861         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4862
4863         vcpu->arch.smbase = smbase;
4864 }
4865
4866 static int emulator_check_pmc(struct x86_emulate_ctxt *ctxt,
4867                               u32 pmc)
4868 {
4869         return kvm_pmu_is_valid_msr_idx(emul_to_vcpu(ctxt), pmc);
4870 }
4871
4872 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
4873                              u32 pmc, u64 *pdata)
4874 {
4875         return kvm_pmu_rdpmc(emul_to_vcpu(ctxt), pmc, pdata);
4876 }
4877
4878 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
4879 {
4880         emul_to_vcpu(ctxt)->arch.halt_request = 1;
4881 }
4882
4883 static void emulator_get_fpu(struct x86_emulate_ctxt *ctxt)
4884 {
4885         preempt_disable();
4886         kvm_load_guest_fpu(emul_to_vcpu(ctxt));
4887         /*
4888          * CR0.TS may reference the host fpu state, not the guest fpu state,
4889          * so it may be clear at this point.
4890          */
4891         clts();
4892 }
4893
4894 static void emulator_put_fpu(struct x86_emulate_ctxt *ctxt)
4895 {
4896         preempt_enable();
4897 }
4898
4899 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
4900                               struct x86_instruction_info *info,
4901                               enum x86_intercept_stage stage)
4902 {
4903         return kvm_x86_ops->check_intercept(emul_to_vcpu(ctxt), info, stage);
4904 }
4905
4906 static void emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
4907                                u32 *eax, u32 *ebx, u32 *ecx, u32 *edx)
4908 {
4909         kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx);
4910 }
4911
4912 static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
4913 {
4914         return kvm_register_read(emul_to_vcpu(ctxt), reg);
4915 }
4916
4917 static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
4918 {
4919         kvm_register_write(emul_to_vcpu(ctxt), reg, val);
4920 }
4921
4922 static void emulator_set_nmi_mask(struct x86_emulate_ctxt *ctxt, bool masked)
4923 {
4924         kvm_x86_ops->set_nmi_mask(emul_to_vcpu(ctxt), masked);
4925 }
4926
4927 static const struct x86_emulate_ops emulate_ops = {
4928         .read_gpr            = emulator_read_gpr,
4929         .write_gpr           = emulator_write_gpr,
4930         .read_std            = kvm_read_guest_virt_system,
4931         .write_std           = kvm_write_guest_virt_system,
4932         .read_phys           = kvm_read_guest_phys_system,
4933         .fetch               = kvm_fetch_guest_virt,
4934         .read_emulated       = emulator_read_emulated,
4935         .write_emulated      = emulator_write_emulated,
4936         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
4937         .invlpg              = emulator_invlpg,
4938         .pio_in_emulated     = emulator_pio_in_emulated,
4939         .pio_out_emulated    = emulator_pio_out_emulated,
4940         .get_segment         = emulator_get_segment,
4941         .set_segment         = emulator_set_segment,
4942         .get_cached_segment_base = emulator_get_cached_segment_base,
4943         .get_gdt             = emulator_get_gdt,
4944         .get_idt             = emulator_get_idt,
4945         .set_gdt             = emulator_set_gdt,
4946         .set_idt             = emulator_set_idt,
4947         .get_cr              = emulator_get_cr,
4948         .set_cr              = emulator_set_cr,
4949         .cpl                 = emulator_get_cpl,
4950         .get_dr              = emulator_get_dr,
4951         .set_dr              = emulator_set_dr,
4952         .get_smbase          = emulator_get_smbase,
4953         .set_smbase          = emulator_set_smbase,
4954         .set_msr             = emulator_set_msr,
4955         .get_msr             = emulator_get_msr,
4956         .check_pmc           = emulator_check_pmc,
4957         .read_pmc            = emulator_read_pmc,
4958         .halt                = emulator_halt,
4959         .wbinvd              = emulator_wbinvd,
4960         .fix_hypercall       = emulator_fix_hypercall,
4961         .get_fpu             = emulator_get_fpu,
4962         .put_fpu             = emulator_put_fpu,
4963         .intercept           = emulator_intercept,
4964         .get_cpuid           = emulator_get_cpuid,
4965         .set_nmi_mask        = emulator_set_nmi_mask,
4966 };
4967
4968 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
4969 {
4970         u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
4971         /*
4972          * an sti; sti; sequence only disable interrupts for the first
4973          * instruction. So, if the last instruction, be it emulated or
4974          * not, left the system with the INT_STI flag enabled, it
4975          * means that the last instruction is an sti. We should not
4976          * leave the flag on in this case. The same goes for mov ss
4977          */
4978         if (int_shadow & mask)
4979                 mask = 0;
4980         if (unlikely(int_shadow || mask)) {
4981                 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
4982                 if (!mask)
4983                         kvm_make_request(KVM_REQ_EVENT, vcpu);
4984         }
4985 }
4986
4987 static bool inject_emulated_exception(struct kvm_vcpu *vcpu)
4988 {
4989         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4990         if (ctxt->exception.vector == PF_VECTOR)
4991                 return kvm_propagate_fault(vcpu, &ctxt->exception);
4992
4993         if (ctxt->exception.error_code_valid)
4994                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
4995                                       ctxt->exception.error_code);
4996         else
4997                 kvm_queue_exception(vcpu, ctxt->exception.vector);
4998         return false;
4999 }
5000
5001 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
5002 {
5003         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5004         int cs_db, cs_l;
5005
5006         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
5007
5008         ctxt->eflags = kvm_get_rflags(vcpu);
5009         ctxt->eip = kvm_rip_read(vcpu);
5010         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
5011                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
5012                      (cs_l && is_long_mode(vcpu))       ? X86EMUL_MODE_PROT64 :
5013                      cs_db                              ? X86EMUL_MODE_PROT32 :
5014                                                           X86EMUL_MODE_PROT16;
5015         BUILD_BUG_ON(HF_GUEST_MASK != X86EMUL_GUEST_MASK);
5016         BUILD_BUG_ON(HF_SMM_MASK != X86EMUL_SMM_MASK);
5017         BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK != X86EMUL_SMM_INSIDE_NMI_MASK);
5018         ctxt->emul_flags = vcpu->arch.hflags;
5019
5020         init_decode_cache(ctxt);
5021         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
5022 }
5023
5024 int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
5025 {
5026         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5027         int ret;
5028
5029         init_emulate_ctxt(vcpu);
5030
5031         ctxt->op_bytes = 2;
5032         ctxt->ad_bytes = 2;
5033         ctxt->_eip = ctxt->eip + inc_eip;
5034         ret = emulate_int_real(ctxt, irq);
5035
5036         if (ret != X86EMUL_CONTINUE)
5037                 return EMULATE_FAIL;
5038
5039         ctxt->eip = ctxt->_eip;
5040         kvm_rip_write(vcpu, ctxt->eip);
5041         kvm_set_rflags(vcpu, ctxt->eflags);
5042
5043         if (irq == NMI_VECTOR)
5044                 vcpu->arch.nmi_pending = 0;
5045         else
5046                 vcpu->arch.interrupt.pending = false;
5047
5048         return EMULATE_DONE;
5049 }
5050 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
5051
5052 static int handle_emulation_failure(struct kvm_vcpu *vcpu)
5053 {
5054         int r = EMULATE_DONE;
5055
5056         ++vcpu->stat.insn_emulation_fail;
5057         trace_kvm_emulate_insn_failed(vcpu);
5058         if (!is_guest_mode(vcpu) && kvm_x86_ops->get_cpl(vcpu) == 0) {
5059                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
5060                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
5061                 vcpu->run->internal.ndata = 0;
5062                 r = EMULATE_FAIL;
5063         }
5064         kvm_queue_exception(vcpu, UD_VECTOR);
5065
5066         return r;
5067 }
5068
5069 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t cr2,
5070                                   bool write_fault_to_shadow_pgtable,
5071                                   int emulation_type)
5072 {
5073         gpa_t gpa = cr2;
5074         pfn_t pfn;
5075
5076         if (emulation_type & EMULTYPE_NO_REEXECUTE)
5077                 return false;
5078
5079         if (!vcpu->arch.mmu.direct_map) {
5080                 /*
5081                  * Write permission should be allowed since only
5082                  * write access need to be emulated.
5083                  */
5084                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
5085
5086                 /*
5087                  * If the mapping is invalid in guest, let cpu retry
5088                  * it to generate fault.
5089                  */
5090                 if (gpa == UNMAPPED_GVA)
5091                         return true;
5092         }
5093
5094         /*
5095          * Do not retry the unhandleable instruction if it faults on the
5096          * readonly host memory, otherwise it will goto a infinite loop:
5097          * retry instruction -> write #PF -> emulation fail -> retry
5098          * instruction -> ...
5099          */
5100         pfn = gfn_to_pfn(vcpu->kvm, gpa_to_gfn(gpa));
5101
5102         /*
5103          * If the instruction failed on the error pfn, it can not be fixed,
5104          * report the error to userspace.
5105          */
5106         if (is_error_noslot_pfn(pfn))
5107                 return false;
5108
5109         kvm_release_pfn_clean(pfn);
5110
5111         /* The instructions are well-emulated on direct mmu. */
5112         if (vcpu->arch.mmu.direct_map) {
5113                 unsigned int indirect_shadow_pages;
5114
5115                 spin_lock(&vcpu->kvm->mmu_lock);
5116                 indirect_shadow_pages = vcpu->kvm->arch.indirect_shadow_pages;
5117                 spin_unlock(&vcpu->kvm->mmu_lock);
5118
5119                 if (indirect_shadow_pages)
5120                         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5121
5122                 return true;
5123         }
5124
5125         /*
5126          * if emulation was due to access to shadowed page table
5127          * and it failed try to unshadow page and re-enter the
5128          * guest to let CPU execute the instruction.
5129          */
5130         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5131
5132         /*
5133          * If the access faults on its page table, it can not
5134          * be fixed by unprotecting shadow page and it should
5135          * be reported to userspace.
5136          */
5137         return !write_fault_to_shadow_pgtable;
5138 }
5139
5140 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
5141                               unsigned long cr2,  int emulation_type)
5142 {
5143         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5144         unsigned long last_retry_eip, last_retry_addr, gpa = cr2;
5145
5146         last_retry_eip = vcpu->arch.last_retry_eip;
5147         last_retry_addr = vcpu->arch.last_retry_addr;
5148
5149         /*
5150          * If the emulation is caused by #PF and it is non-page_table
5151          * writing instruction, it means the VM-EXIT is caused by shadow
5152          * page protected, we can zap the shadow page and retry this
5153          * instruction directly.
5154          *
5155          * Note: if the guest uses a non-page-table modifying instruction
5156          * on the PDE that points to the instruction, then we will unmap
5157          * the instruction and go to an infinite loop. So, we cache the
5158          * last retried eip and the last fault address, if we meet the eip
5159          * and the address again, we can break out of the potential infinite
5160          * loop.
5161          */
5162         vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
5163
5164         if (!(emulation_type & EMULTYPE_RETRY))
5165                 return false;
5166
5167         if (x86_page_table_writing_insn(ctxt))
5168                 return false;
5169
5170         if (ctxt->eip == last_retry_eip && last_retry_addr == cr2)
5171                 return false;
5172
5173         vcpu->arch.last_retry_eip = ctxt->eip;
5174         vcpu->arch.last_retry_addr = cr2;
5175
5176         if (!vcpu->arch.mmu.direct_map)
5177                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
5178
5179         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5180
5181         return true;
5182 }
5183
5184 static int complete_emulated_mmio(struct kvm_vcpu *vcpu);
5185 static int complete_emulated_pio(struct kvm_vcpu *vcpu);
5186
5187 static void kvm_smm_changed(struct kvm_vcpu *vcpu)
5188 {
5189         if (!(vcpu->arch.hflags & HF_SMM_MASK)) {
5190                 /* This is a good place to trace that we are exiting SMM.  */
5191                 trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, false);
5192
5193                 if (unlikely(vcpu->arch.smi_pending)) {
5194                         kvm_make_request(KVM_REQ_SMI, vcpu);
5195                         vcpu->arch.smi_pending = 0;
5196                 } else {
5197                         /* Process a latched INIT, if any.  */
5198                         kvm_make_request(KVM_REQ_EVENT, vcpu);
5199                 }
5200         }
5201
5202         kvm_mmu_reset_context(vcpu);
5203 }
5204
5205 static void kvm_set_hflags(struct kvm_vcpu *vcpu, unsigned emul_flags)
5206 {
5207         unsigned changed = vcpu->arch.hflags ^ emul_flags;
5208
5209         vcpu->arch.hflags = emul_flags;
5210
5211         if (changed & HF_SMM_MASK)
5212                 kvm_smm_changed(vcpu);
5213 }
5214
5215 static int kvm_vcpu_check_hw_bp(unsigned long addr, u32 type, u32 dr7,
5216                                 unsigned long *db)
5217 {
5218         u32 dr6 = 0;
5219         int i;
5220         u32 enable, rwlen;
5221
5222         enable = dr7;
5223         rwlen = dr7 >> 16;
5224         for (i = 0; i < 4; i++, enable >>= 2, rwlen >>= 4)
5225                 if ((enable & 3) && (rwlen & 15) == type && db[i] == addr)
5226                         dr6 |= (1 << i);
5227         return dr6;
5228 }
5229
5230 static void kvm_vcpu_check_singlestep(struct kvm_vcpu *vcpu, unsigned long rflags, int *r)
5231 {
5232         struct kvm_run *kvm_run = vcpu->run;
5233
5234         /*
5235          * rflags is the old, "raw" value of the flags.  The new value has
5236          * not been saved yet.
5237          *
5238          * This is correct even for TF set by the guest, because "the
5239          * processor will not generate this exception after the instruction
5240          * that sets the TF flag".
5241          */
5242         if (unlikely(rflags & X86_EFLAGS_TF)) {
5243                 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
5244                         kvm_run->debug.arch.dr6 = DR6_BS | DR6_FIXED_1 |
5245                                                   DR6_RTM;
5246                         kvm_run->debug.arch.pc = vcpu->arch.singlestep_rip;
5247                         kvm_run->debug.arch.exception = DB_VECTOR;
5248                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
5249                         *r = EMULATE_USER_EXIT;
5250                 } else {
5251                         vcpu->arch.emulate_ctxt.eflags &= ~X86_EFLAGS_TF;
5252                         /*
5253                          * "Certain debug exceptions may clear bit 0-3.  The
5254                          * remaining contents of the DR6 register are never
5255                          * cleared by the processor".
5256                          */
5257                         vcpu->arch.dr6 &= ~15;
5258                         vcpu->arch.dr6 |= DR6_BS | DR6_RTM;
5259                         kvm_queue_exception(vcpu, DB_VECTOR);
5260                 }
5261         }
5262 }
5263
5264 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu *vcpu, int *r)
5265 {
5266         if (unlikely(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) &&
5267             (vcpu->arch.guest_debug_dr7 & DR7_BP_EN_MASK)) {
5268                 struct kvm_run *kvm_run = vcpu->run;
5269                 unsigned long eip = kvm_get_linear_rip(vcpu);
5270                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
5271                                            vcpu->arch.guest_debug_dr7,
5272                                            vcpu->arch.eff_db);
5273
5274                 if (dr6 != 0) {
5275                         kvm_run->debug.arch.dr6 = dr6 | DR6_FIXED_1 | DR6_RTM;
5276                         kvm_run->debug.arch.pc = eip;
5277                         kvm_run->debug.arch.exception = DB_VECTOR;
5278                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
5279                         *r = EMULATE_USER_EXIT;
5280                         return true;
5281                 }
5282         }
5283
5284         if (unlikely(vcpu->arch.dr7 & DR7_BP_EN_MASK) &&
5285             !(kvm_get_rflags(vcpu) & X86_EFLAGS_RF)) {
5286                 unsigned long eip = kvm_get_linear_rip(vcpu);
5287                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
5288                                            vcpu->arch.dr7,
5289                                            vcpu->arch.db);
5290
5291                 if (dr6 != 0) {
5292                         vcpu->arch.dr6 &= ~15;
5293                         vcpu->arch.dr6 |= dr6 | DR6_RTM;
5294                         kvm_queue_exception(vcpu, DB_VECTOR);
5295                         *r = EMULATE_DONE;
5296                         return true;
5297                 }
5298         }
5299
5300         return false;
5301 }
5302
5303 int x86_emulate_instruction(struct kvm_vcpu *vcpu,
5304                             unsigned long cr2,
5305                             int emulation_type,
5306                             void *insn,
5307                             int insn_len)
5308 {
5309         int r;
5310         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5311         bool writeback = true;
5312         bool write_fault_to_spt = vcpu->arch.write_fault_to_shadow_pgtable;
5313
5314         /*
5315          * Clear write_fault_to_shadow_pgtable here to ensure it is
5316          * never reused.
5317          */
5318         vcpu->arch.write_fault_to_shadow_pgtable = false;
5319         kvm_clear_exception_queue(vcpu);
5320
5321         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
5322                 init_emulate_ctxt(vcpu);
5323
5324                 /*
5325                  * We will reenter on the same instruction since
5326                  * we do not set complete_userspace_io.  This does not
5327                  * handle watchpoints yet, those would be handled in
5328                  * the emulate_ops.
5329                  */
5330                 if (kvm_vcpu_check_breakpoint(vcpu, &r))
5331                         return r;
5332
5333                 ctxt->interruptibility = 0;
5334                 ctxt->have_exception = false;
5335                 ctxt->exception.vector = -1;
5336                 ctxt->perm_ok = false;
5337
5338                 ctxt->ud = emulation_type & EMULTYPE_TRAP_UD;
5339
5340                 r = x86_decode_insn(ctxt, insn, insn_len);
5341
5342                 trace_kvm_emulate_insn_start(vcpu);
5343                 ++vcpu->stat.insn_emulation;
5344                 if (r != EMULATION_OK)  {
5345                         if (emulation_type & EMULTYPE_TRAP_UD)
5346                                 return EMULATE_FAIL;
5347                         if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
5348                                                 emulation_type))
5349                                 return EMULATE_DONE;
5350                         if (emulation_type & EMULTYPE_SKIP)
5351                                 return EMULATE_FAIL;
5352                         return handle_emulation_failure(vcpu);
5353                 }
5354         }
5355
5356         if (emulation_type & EMULTYPE_SKIP) {
5357                 kvm_rip_write(vcpu, ctxt->_eip);
5358                 if (ctxt->eflags & X86_EFLAGS_RF)
5359                         kvm_set_rflags(vcpu, ctxt->eflags & ~X86_EFLAGS_RF);
5360                 return EMULATE_DONE;
5361         }
5362
5363         if (retry_instruction(ctxt, cr2, emulation_type))
5364                 return EMULATE_DONE;
5365
5366         /* this is needed for vmware backdoor interface to work since it
5367            changes registers values  during IO operation */
5368         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
5369                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
5370                 emulator_invalidate_register_cache(ctxt);
5371         }
5372
5373 restart:
5374         r = x86_emulate_insn(ctxt);
5375
5376         if (r == EMULATION_INTERCEPTED)
5377                 return EMULATE_DONE;
5378
5379         if (r == EMULATION_FAILED) {
5380                 if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
5381                                         emulation_type))
5382                         return EMULATE_DONE;
5383
5384                 return handle_emulation_failure(vcpu);
5385         }
5386
5387         if (ctxt->have_exception) {
5388                 r = EMULATE_DONE;
5389                 if (inject_emulated_exception(vcpu))
5390                         return r;
5391         } else if (vcpu->arch.pio.count) {
5392                 if (!vcpu->arch.pio.in) {
5393                         /* FIXME: return into emulator if single-stepping.  */
5394                         vcpu->arch.pio.count = 0;
5395                 } else {
5396                         writeback = false;
5397                         vcpu->arch.complete_userspace_io = complete_emulated_pio;
5398                 }
5399                 r = EMULATE_USER_EXIT;
5400         } else if (vcpu->mmio_needed) {
5401                 if (!vcpu->mmio_is_write)
5402                         writeback = false;
5403                 r = EMULATE_USER_EXIT;
5404                 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
5405         } else if (r == EMULATION_RESTART)
5406                 goto restart;
5407         else
5408                 r = EMULATE_DONE;
5409
5410         if (writeback) {
5411                 unsigned long rflags = kvm_x86_ops->get_rflags(vcpu);
5412                 toggle_interruptibility(vcpu, ctxt->interruptibility);
5413                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
5414                 if (vcpu->arch.hflags != ctxt->emul_flags)
5415                         kvm_set_hflags(vcpu, ctxt->emul_flags);
5416                 kvm_rip_write(vcpu, ctxt->eip);
5417                 if (r == EMULATE_DONE)
5418                         kvm_vcpu_check_singlestep(vcpu, rflags, &r);
5419                 if (!ctxt->have_exception ||
5420                     exception_type(ctxt->exception.vector) == EXCPT_TRAP)
5421                         __kvm_set_rflags(vcpu, ctxt->eflags);
5422
5423                 /*
5424                  * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
5425                  * do nothing, and it will be requested again as soon as
5426                  * the shadow expires.  But we still need to check here,
5427                  * because POPF has no interrupt shadow.
5428                  */
5429                 if (unlikely((ctxt->eflags & ~rflags) & X86_EFLAGS_IF))
5430                         kvm_make_request(KVM_REQ_EVENT, vcpu);
5431         } else
5432                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
5433
5434         return r;
5435 }
5436 EXPORT_SYMBOL_GPL(x86_emulate_instruction);
5437
5438 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port)
5439 {
5440         unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
5441         int ret = emulator_pio_out_emulated(&vcpu->arch.emulate_ctxt,
5442                                             size, port, &val, 1);
5443         /* do not return to emulator after return from userspace */
5444         vcpu->arch.pio.count = 0;
5445         return ret;
5446 }
5447 EXPORT_SYMBOL_GPL(kvm_fast_pio_out);
5448
5449 static void tsc_bad(void *info)
5450 {
5451         __this_cpu_write(cpu_tsc_khz, 0);
5452 }
5453
5454 static void tsc_khz_changed(void *data)
5455 {
5456         struct cpufreq_freqs *freq = data;
5457         unsigned long khz = 0;
5458
5459         if (data)
5460                 khz = freq->new;
5461         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
5462                 khz = cpufreq_quick_get(raw_smp_processor_id());
5463         if (!khz)
5464                 khz = tsc_khz;
5465         __this_cpu_write(cpu_tsc_khz, khz);
5466 }
5467
5468 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
5469                                      void *data)
5470 {
5471         struct cpufreq_freqs *freq = data;
5472         struct kvm *kvm;
5473         struct kvm_vcpu *vcpu;
5474         int i, send_ipi = 0;
5475
5476         /*
5477          * We allow guests to temporarily run on slowing clocks,
5478          * provided we notify them after, or to run on accelerating
5479          * clocks, provided we notify them before.  Thus time never
5480          * goes backwards.
5481          *
5482          * However, we have a problem.  We can't atomically update
5483          * the frequency of a given CPU from this function; it is
5484          * merely a notifier, which can be called from any CPU.
5485          * Changing the TSC frequency at arbitrary points in time
5486          * requires a recomputation of local variables related to
5487          * the TSC for each VCPU.  We must flag these local variables
5488          * to be updated and be sure the update takes place with the
5489          * new frequency before any guests proceed.
5490          *
5491          * Unfortunately, the combination of hotplug CPU and frequency
5492          * change creates an intractable locking scenario; the order
5493          * of when these callouts happen is undefined with respect to
5494          * CPU hotplug, and they can race with each other.  As such,
5495          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
5496          * undefined; you can actually have a CPU frequency change take
5497          * place in between the computation of X and the setting of the
5498          * variable.  To protect against this problem, all updates of
5499          * the per_cpu tsc_khz variable are done in an interrupt
5500          * protected IPI, and all callers wishing to update the value
5501          * must wait for a synchronous IPI to complete (which is trivial
5502          * if the caller is on the CPU already).  This establishes the
5503          * necessary total order on variable updates.
5504          *
5505          * Note that because a guest time update may take place
5506          * anytime after the setting of the VCPU's request bit, the
5507          * correct TSC value must be set before the request.  However,
5508          * to ensure the update actually makes it to any guest which
5509          * starts running in hardware virtualization between the set
5510          * and the acquisition of the spinlock, we must also ping the
5511          * CPU after setting the request bit.
5512          *
5513          */
5514
5515         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
5516                 return 0;
5517         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
5518                 return 0;
5519
5520         smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5521
5522         spin_lock(&kvm_lock);
5523         list_for_each_entry(kvm, &vm_list, vm_list) {
5524                 kvm_for_each_vcpu(i, vcpu, kvm) {
5525                         if (vcpu->cpu != freq->cpu)
5526                                 continue;
5527                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
5528                         if (vcpu->cpu != smp_processor_id())
5529                                 send_ipi = 1;
5530                 }
5531         }
5532         spin_unlock(&kvm_lock);
5533
5534         if (freq->old < freq->new && send_ipi) {
5535                 /*
5536                  * We upscale the frequency.  Must make the guest
5537                  * doesn't see old kvmclock values while running with
5538                  * the new frequency, otherwise we risk the guest sees
5539                  * time go backwards.
5540                  *
5541                  * In case we update the frequency for another cpu
5542                  * (which might be in guest context) send an interrupt
5543                  * to kick the cpu out of guest context.  Next time
5544                  * guest context is entered kvmclock will be updated,
5545                  * so the guest will not see stale values.
5546                  */
5547                 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5548         }
5549         return 0;
5550 }
5551
5552 static struct notifier_block kvmclock_cpufreq_notifier_block = {
5553         .notifier_call  = kvmclock_cpufreq_notifier
5554 };
5555
5556 static int kvmclock_cpu_notifier(struct notifier_block *nfb,
5557                                         unsigned long action, void *hcpu)
5558 {
5559         unsigned int cpu = (unsigned long)hcpu;
5560
5561         switch (action) {
5562                 case CPU_ONLINE:
5563                 case CPU_DOWN_FAILED:
5564                         smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
5565                         break;
5566                 case CPU_DOWN_PREPARE:
5567                         smp_call_function_single(cpu, tsc_bad, NULL, 1);
5568                         break;
5569         }
5570         return NOTIFY_OK;
5571 }
5572
5573 static struct notifier_block kvmclock_cpu_notifier_block = {
5574         .notifier_call  = kvmclock_cpu_notifier,
5575         .priority = -INT_MAX
5576 };
5577
5578 static void kvm_timer_init(void)
5579 {
5580         int cpu;
5581
5582         max_tsc_khz = tsc_khz;
5583
5584         cpu_notifier_register_begin();
5585         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
5586 #ifdef CONFIG_CPU_FREQ
5587                 struct cpufreq_policy policy;
5588                 memset(&policy, 0, sizeof(policy));
5589                 cpu = get_cpu();
5590                 cpufreq_get_policy(&policy, cpu);
5591                 if (policy.cpuinfo.max_freq)
5592                         max_tsc_khz = policy.cpuinfo.max_freq;
5593                 put_cpu();
5594 #endif
5595                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
5596                                           CPUFREQ_TRANSITION_NOTIFIER);
5597         }
5598         pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz);
5599         for_each_online_cpu(cpu)
5600                 smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
5601
5602         __register_hotcpu_notifier(&kvmclock_cpu_notifier_block);
5603         cpu_notifier_register_done();
5604
5605 }
5606
5607 static DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
5608
5609 int kvm_is_in_guest(void)
5610 {
5611         return __this_cpu_read(current_vcpu) != NULL;
5612 }
5613
5614 static int kvm_is_user_mode(void)
5615 {
5616         int user_mode = 3;
5617
5618         if (__this_cpu_read(current_vcpu))
5619                 user_mode = kvm_x86_ops->get_cpl(__this_cpu_read(current_vcpu));
5620
5621         return user_mode != 0;
5622 }
5623
5624 static unsigned long kvm_get_guest_ip(void)
5625 {
5626         unsigned long ip = 0;
5627
5628         if (__this_cpu_read(current_vcpu))
5629                 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
5630
5631         return ip;
5632 }
5633
5634 static struct perf_guest_info_callbacks kvm_guest_cbs = {
5635         .is_in_guest            = kvm_is_in_guest,
5636         .is_user_mode           = kvm_is_user_mode,
5637         .get_guest_ip           = kvm_get_guest_ip,
5638 };
5639
5640 void kvm_before_handle_nmi(struct kvm_vcpu *vcpu)
5641 {
5642         __this_cpu_write(current_vcpu, vcpu);
5643 }
5644 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi);
5645
5646 void kvm_after_handle_nmi(struct kvm_vcpu *vcpu)
5647 {
5648         __this_cpu_write(current_vcpu, NULL);
5649 }
5650 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi);
5651
5652 static void kvm_set_mmio_spte_mask(void)
5653 {
5654         u64 mask;
5655         int maxphyaddr = boot_cpu_data.x86_phys_bits;
5656
5657         /*
5658          * Set the reserved bits and the present bit of an paging-structure
5659          * entry to generate page fault with PFER.RSV = 1.
5660          */
5661          /* Mask the reserved physical address bits. */
5662         mask = rsvd_bits(maxphyaddr, 51);
5663
5664         /* Bit 62 is always reserved for 32bit host. */
5665         mask |= 0x3ull << 62;
5666
5667         /* Set the present bit. */
5668         mask |= 1ull;
5669
5670 #ifdef CONFIG_X86_64
5671         /*
5672          * If reserved bit is not supported, clear the present bit to disable
5673          * mmio page fault.
5674          */
5675         if (maxphyaddr == 52)
5676                 mask &= ~1ull;
5677 #endif
5678
5679         kvm_mmu_set_mmio_spte_mask(mask);
5680 }
5681
5682 #ifdef CONFIG_X86_64
5683 static void pvclock_gtod_update_fn(struct work_struct *work)
5684 {
5685         struct kvm *kvm;
5686
5687         struct kvm_vcpu *vcpu;
5688         int i;
5689
5690         spin_lock(&kvm_lock);
5691         list_for_each_entry(kvm, &vm_list, vm_list)
5692                 kvm_for_each_vcpu(i, vcpu, kvm)
5693                         kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
5694         atomic_set(&kvm_guest_has_master_clock, 0);
5695         spin_unlock(&kvm_lock);
5696 }
5697
5698 static DECLARE_WORK(pvclock_gtod_work, pvclock_gtod_update_fn);
5699
5700 /*
5701  * Notification about pvclock gtod data update.
5702  */
5703 static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused,
5704                                void *priv)
5705 {
5706         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
5707         struct timekeeper *tk = priv;
5708
5709         update_pvclock_gtod(tk);
5710
5711         /* disable master clock if host does not trust, or does not
5712          * use, TSC clocksource
5713          */
5714         if (gtod->clock.vclock_mode != VCLOCK_TSC &&
5715             atomic_read(&kvm_guest_has_master_clock) != 0)
5716                 queue_work(system_long_wq, &pvclock_gtod_work);
5717
5718         return 0;
5719 }
5720
5721 static struct notifier_block pvclock_gtod_notifier = {
5722         .notifier_call = pvclock_gtod_notify,
5723 };
5724 #endif
5725
5726 int kvm_arch_init(void *opaque)
5727 {
5728         int r;
5729         struct kvm_x86_ops *ops = opaque;
5730
5731         if (kvm_x86_ops) {
5732                 printk(KERN_ERR "kvm: already loaded the other module\n");
5733                 r = -EEXIST;
5734                 goto out;
5735         }
5736
5737         if (!ops->cpu_has_kvm_support()) {
5738                 printk(KERN_ERR "kvm: no hardware support\n");
5739                 r = -EOPNOTSUPP;
5740                 goto out;
5741         }
5742         if (ops->disabled_by_bios()) {
5743                 printk(KERN_ERR "kvm: disabled by bios\n");
5744                 r = -EOPNOTSUPP;
5745                 goto out;
5746         }
5747
5748         r = -ENOMEM;
5749         shared_msrs = alloc_percpu(struct kvm_shared_msrs);
5750         if (!shared_msrs) {
5751                 printk(KERN_ERR "kvm: failed to allocate percpu kvm_shared_msrs\n");
5752                 goto out;
5753         }
5754
5755         r = kvm_mmu_module_init();
5756         if (r)
5757                 goto out_free_percpu;
5758
5759         kvm_set_mmio_spte_mask();
5760
5761         kvm_x86_ops = ops;
5762
5763         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
5764                         PT_DIRTY_MASK, PT64_NX_MASK, 0);
5765
5766         kvm_timer_init();
5767
5768         perf_register_guest_info_callbacks(&kvm_guest_cbs);
5769
5770         if (cpu_has_xsave)
5771                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
5772
5773         kvm_lapic_init();
5774 #ifdef CONFIG_X86_64
5775         pvclock_gtod_register_notifier(&pvclock_gtod_notifier);
5776 #endif
5777
5778         return 0;
5779
5780 out_free_percpu:
5781         free_percpu(shared_msrs);
5782 out:
5783         return r;
5784 }
5785
5786 void kvm_arch_exit(void)
5787 {
5788         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
5789
5790         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
5791                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
5792                                             CPUFREQ_TRANSITION_NOTIFIER);
5793         unregister_hotcpu_notifier(&kvmclock_cpu_notifier_block);
5794 #ifdef CONFIG_X86_64
5795         pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier);
5796 #endif
5797         kvm_x86_ops = NULL;
5798         kvm_mmu_module_exit();
5799         free_percpu(shared_msrs);
5800 }
5801
5802 int kvm_vcpu_halt(struct kvm_vcpu *vcpu)
5803 {
5804         ++vcpu->stat.halt_exits;
5805         if (lapic_in_kernel(vcpu)) {
5806                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
5807                 return 1;
5808         } else {
5809                 vcpu->run->exit_reason = KVM_EXIT_HLT;
5810                 return 0;
5811         }
5812 }
5813 EXPORT_SYMBOL_GPL(kvm_vcpu_halt);
5814
5815 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
5816 {
5817         kvm_x86_ops->skip_emulated_instruction(vcpu);
5818         return kvm_vcpu_halt(vcpu);
5819 }
5820 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
5821
5822 /*
5823  * kvm_pv_kick_cpu_op:  Kick a vcpu.
5824  *
5825  * @apicid - apicid of vcpu to be kicked.
5826  */
5827 static void kvm_pv_kick_cpu_op(struct kvm *kvm, unsigned long flags, int apicid)
5828 {
5829         struct kvm_lapic_irq lapic_irq;
5830
5831         lapic_irq.shorthand = 0;
5832         lapic_irq.dest_mode = 0;
5833         lapic_irq.dest_id = apicid;
5834         lapic_irq.msi_redir_hint = false;
5835
5836         lapic_irq.delivery_mode = APIC_DM_REMRD;
5837         kvm_irq_delivery_to_apic(kvm, NULL, &lapic_irq, NULL);
5838 }
5839
5840 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
5841 {
5842         unsigned long nr, a0, a1, a2, a3, ret;
5843         int op_64_bit, r = 1;
5844
5845         kvm_x86_ops->skip_emulated_instruction(vcpu);
5846
5847         if (kvm_hv_hypercall_enabled(vcpu->kvm))
5848                 return kvm_hv_hypercall(vcpu);
5849
5850         nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
5851         a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
5852         a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
5853         a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
5854         a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
5855
5856         trace_kvm_hypercall(nr, a0, a1, a2, a3);
5857
5858         op_64_bit = is_64_bit_mode(vcpu);
5859         if (!op_64_bit) {
5860                 nr &= 0xFFFFFFFF;
5861                 a0 &= 0xFFFFFFFF;
5862                 a1 &= 0xFFFFFFFF;
5863                 a2 &= 0xFFFFFFFF;
5864                 a3 &= 0xFFFFFFFF;
5865         }
5866
5867         if (kvm_x86_ops->get_cpl(vcpu) != 0) {
5868                 ret = -KVM_EPERM;
5869                 goto out;
5870         }
5871
5872         switch (nr) {
5873         case KVM_HC_VAPIC_POLL_IRQ:
5874                 ret = 0;
5875                 break;
5876         case KVM_HC_KICK_CPU:
5877                 kvm_pv_kick_cpu_op(vcpu->kvm, a0, a1);
5878                 ret = 0;
5879                 break;
5880         default:
5881                 ret = -KVM_ENOSYS;
5882                 break;
5883         }
5884 out:
5885         if (!op_64_bit)
5886                 ret = (u32)ret;
5887         kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
5888         ++vcpu->stat.hypercalls;
5889         return r;
5890 }
5891 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
5892
5893 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
5894 {
5895         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5896         char instruction[3];
5897         unsigned long rip = kvm_rip_read(vcpu);
5898
5899         kvm_x86_ops->patch_hypercall(vcpu, instruction);
5900
5901         return emulator_write_emulated(ctxt, rip, instruction, 3, NULL);
5902 }
5903
5904 /*
5905  * Check if userspace requested an interrupt window, and that the
5906  * interrupt window is open.
5907  *
5908  * No need to exit to userspace if we already have an interrupt queued.
5909  */
5910 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
5911 {
5912         if (!vcpu->run->request_interrupt_window || pic_in_kernel(vcpu->kvm))
5913                 return false;
5914
5915         if (kvm_cpu_has_interrupt(vcpu))
5916                 return false;
5917
5918         return (irqchip_split(vcpu->kvm)
5919                 ? kvm_apic_accept_pic_intr(vcpu)
5920                 : kvm_arch_interrupt_allowed(vcpu));
5921 }
5922
5923 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
5924 {
5925         struct kvm_run *kvm_run = vcpu->run;
5926
5927         kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
5928         kvm_run->flags = is_smm(vcpu) ? KVM_RUN_X86_SMM : 0;
5929         kvm_run->cr8 = kvm_get_cr8(vcpu);
5930         kvm_run->apic_base = kvm_get_apic_base(vcpu);
5931         if (!irqchip_in_kernel(vcpu->kvm))
5932                 kvm_run->ready_for_interrupt_injection =
5933                         kvm_arch_interrupt_allowed(vcpu) &&
5934                         !kvm_cpu_has_interrupt(vcpu) &&
5935                         !kvm_event_needs_reinjection(vcpu);
5936         else if (!pic_in_kernel(vcpu->kvm))
5937                 kvm_run->ready_for_interrupt_injection =
5938                         kvm_apic_accept_pic_intr(vcpu) &&
5939                         !kvm_cpu_has_interrupt(vcpu);
5940         else
5941                 kvm_run->ready_for_interrupt_injection = 1;
5942 }
5943
5944 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
5945 {
5946         int max_irr, tpr;
5947
5948         if (!kvm_x86_ops->update_cr8_intercept)
5949                 return;
5950
5951         if (!vcpu->arch.apic)
5952                 return;
5953
5954         if (!vcpu->arch.apic->vapic_addr)
5955                 max_irr = kvm_lapic_find_highest_irr(vcpu);
5956         else
5957                 max_irr = -1;
5958
5959         if (max_irr != -1)
5960                 max_irr >>= 4;
5961
5962         tpr = kvm_lapic_get_cr8(vcpu);
5963
5964         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
5965 }
5966
5967 static int inject_pending_event(struct kvm_vcpu *vcpu, bool req_int_win)
5968 {
5969         int r;
5970
5971         /* try to reinject previous events if any */
5972         if (vcpu->arch.exception.pending) {
5973                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
5974                                         vcpu->arch.exception.has_error_code,
5975                                         vcpu->arch.exception.error_code);
5976
5977                 if (exception_type(vcpu->arch.exception.nr) == EXCPT_FAULT)
5978                         __kvm_set_rflags(vcpu, kvm_get_rflags(vcpu) |
5979                                              X86_EFLAGS_RF);
5980
5981                 if (vcpu->arch.exception.nr == DB_VECTOR &&
5982                     (vcpu->arch.dr7 & DR7_GD)) {
5983                         vcpu->arch.dr7 &= ~DR7_GD;
5984                         kvm_update_dr7(vcpu);
5985                 }
5986
5987                 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
5988                                           vcpu->arch.exception.has_error_code,
5989                                           vcpu->arch.exception.error_code,
5990                                           vcpu->arch.exception.reinject);
5991                 return 0;
5992         }
5993
5994         if (vcpu->arch.nmi_injected) {
5995                 kvm_x86_ops->set_nmi(vcpu);
5996                 return 0;
5997         }
5998
5999         if (vcpu->arch.interrupt.pending) {
6000                 kvm_x86_ops->set_irq(vcpu);
6001                 return 0;
6002         }
6003
6004         if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
6005                 r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
6006                 if (r != 0)
6007                         return r;
6008         }
6009
6010         /* try to inject new event if pending */
6011         if (vcpu->arch.nmi_pending) {
6012                 if (kvm_x86_ops->nmi_allowed(vcpu)) {
6013                         --vcpu->arch.nmi_pending;
6014                         vcpu->arch.nmi_injected = true;
6015                         kvm_x86_ops->set_nmi(vcpu);
6016                 }
6017         } else if (kvm_cpu_has_injectable_intr(vcpu)) {
6018                 /*
6019                  * Because interrupts can be injected asynchronously, we are
6020                  * calling check_nested_events again here to avoid a race condition.
6021                  * See https://lkml.org/lkml/2014/7/2/60 for discussion about this
6022                  * proposal and current concerns.  Perhaps we should be setting
6023                  * KVM_REQ_EVENT only on certain events and not unconditionally?
6024                  */
6025                 if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
6026                         r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
6027                         if (r != 0)
6028                                 return r;
6029                 }
6030                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
6031                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
6032                                             false);
6033                         kvm_x86_ops->set_irq(vcpu);
6034                 }
6035         }
6036         return 0;
6037 }
6038
6039 static void process_nmi(struct kvm_vcpu *vcpu)
6040 {
6041         unsigned limit = 2;
6042
6043         /*
6044          * x86 is limited to one NMI running, and one NMI pending after it.
6045          * If an NMI is already in progress, limit further NMIs to just one.
6046          * Otherwise, allow two (and we'll inject the first one immediately).
6047          */
6048         if (kvm_x86_ops->get_nmi_mask(vcpu) || vcpu->arch.nmi_injected)
6049                 limit = 1;
6050
6051         vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
6052         vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
6053         kvm_make_request(KVM_REQ_EVENT, vcpu);
6054 }
6055
6056 #define put_smstate(type, buf, offset, val)                       \
6057         *(type *)((buf) + (offset) - 0x7e00) = val
6058
6059 static u32 process_smi_get_segment_flags(struct kvm_segment *seg)
6060 {
6061         u32 flags = 0;
6062         flags |= seg->g       << 23;
6063         flags |= seg->db      << 22;
6064         flags |= seg->l       << 21;
6065         flags |= seg->avl     << 20;
6066         flags |= seg->present << 15;
6067         flags |= seg->dpl     << 13;
6068         flags |= seg->s       << 12;
6069         flags |= seg->type    << 8;
6070         return flags;
6071 }
6072
6073 static void process_smi_save_seg_32(struct kvm_vcpu *vcpu, char *buf, int n)
6074 {
6075         struct kvm_segment seg;
6076         int offset;
6077
6078         kvm_get_segment(vcpu, &seg, n);
6079         put_smstate(u32, buf, 0x7fa8 + n * 4, seg.selector);
6080
6081         if (n < 3)
6082                 offset = 0x7f84 + n * 12;
6083         else
6084                 offset = 0x7f2c + (n - 3) * 12;
6085
6086         put_smstate(u32, buf, offset + 8, seg.base);
6087         put_smstate(u32, buf, offset + 4, seg.limit);
6088         put_smstate(u32, buf, offset, process_smi_get_segment_flags(&seg));
6089 }
6090
6091 #ifdef CONFIG_X86_64
6092 static void process_smi_save_seg_64(struct kvm_vcpu *vcpu, char *buf, int n)
6093 {
6094         struct kvm_segment seg;
6095         int offset;
6096         u16 flags;
6097
6098         kvm_get_segment(vcpu, &seg, n);
6099         offset = 0x7e00 + n * 16;
6100
6101         flags = process_smi_get_segment_flags(&seg) >> 8;
6102         put_smstate(u16, buf, offset, seg.selector);
6103         put_smstate(u16, buf, offset + 2, flags);
6104         put_smstate(u32, buf, offset + 4, seg.limit);
6105         put_smstate(u64, buf, offset + 8, seg.base);
6106 }
6107 #endif
6108
6109 static void process_smi_save_state_32(struct kvm_vcpu *vcpu, char *buf)
6110 {
6111         struct desc_ptr dt;
6112         struct kvm_segment seg;
6113         unsigned long val;
6114         int i;
6115
6116         put_smstate(u32, buf, 0x7ffc, kvm_read_cr0(vcpu));
6117         put_smstate(u32, buf, 0x7ff8, kvm_read_cr3(vcpu));
6118         put_smstate(u32, buf, 0x7ff4, kvm_get_rflags(vcpu));
6119         put_smstate(u32, buf, 0x7ff0, kvm_rip_read(vcpu));
6120
6121         for (i = 0; i < 8; i++)
6122                 put_smstate(u32, buf, 0x7fd0 + i * 4, kvm_register_read(vcpu, i));
6123
6124         kvm_get_dr(vcpu, 6, &val);
6125         put_smstate(u32, buf, 0x7fcc, (u32)val);
6126         kvm_get_dr(vcpu, 7, &val);
6127         put_smstate(u32, buf, 0x7fc8, (u32)val);
6128
6129         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
6130         put_smstate(u32, buf, 0x7fc4, seg.selector);
6131         put_smstate(u32, buf, 0x7f64, seg.base);
6132         put_smstate(u32, buf, 0x7f60, seg.limit);
6133         put_smstate(u32, buf, 0x7f5c, process_smi_get_segment_flags(&seg));
6134
6135         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
6136         put_smstate(u32, buf, 0x7fc0, seg.selector);
6137         put_smstate(u32, buf, 0x7f80, seg.base);
6138         put_smstate(u32, buf, 0x7f7c, seg.limit);
6139         put_smstate(u32, buf, 0x7f78, process_smi_get_segment_flags(&seg));
6140
6141         kvm_x86_ops->get_gdt(vcpu, &dt);
6142         put_smstate(u32, buf, 0x7f74, dt.address);
6143         put_smstate(u32, buf, 0x7f70, dt.size);
6144
6145         kvm_x86_ops->get_idt(vcpu, &dt);
6146         put_smstate(u32, buf, 0x7f58, dt.address);
6147         put_smstate(u32, buf, 0x7f54, dt.size);
6148
6149         for (i = 0; i < 6; i++)
6150                 process_smi_save_seg_32(vcpu, buf, i);
6151
6152         put_smstate(u32, buf, 0x7f14, kvm_read_cr4(vcpu));
6153
6154         /* revision id */
6155         put_smstate(u32, buf, 0x7efc, 0x00020000);
6156         put_smstate(u32, buf, 0x7ef8, vcpu->arch.smbase);
6157 }
6158
6159 static void process_smi_save_state_64(struct kvm_vcpu *vcpu, char *buf)
6160 {
6161 #ifdef CONFIG_X86_64
6162         struct desc_ptr dt;
6163         struct kvm_segment seg;
6164         unsigned long val;
6165         int i;
6166
6167         for (i = 0; i < 16; i++)
6168                 put_smstate(u64, buf, 0x7ff8 - i * 8, kvm_register_read(vcpu, i));
6169
6170         put_smstate(u64, buf, 0x7f78, kvm_rip_read(vcpu));
6171         put_smstate(u32, buf, 0x7f70, kvm_get_rflags(vcpu));
6172
6173         kvm_get_dr(vcpu, 6, &val);
6174         put_smstate(u64, buf, 0x7f68, val);
6175         kvm_get_dr(vcpu, 7, &val);
6176         put_smstate(u64, buf, 0x7f60, val);
6177
6178         put_smstate(u64, buf, 0x7f58, kvm_read_cr0(vcpu));
6179         put_smstate(u64, buf, 0x7f50, kvm_read_cr3(vcpu));
6180         put_smstate(u64, buf, 0x7f48, kvm_read_cr4(vcpu));
6181
6182         put_smstate(u32, buf, 0x7f00, vcpu->arch.smbase);
6183
6184         /* revision id */
6185         put_smstate(u32, buf, 0x7efc, 0x00020064);
6186
6187         put_smstate(u64, buf, 0x7ed0, vcpu->arch.efer);
6188
6189         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
6190         put_smstate(u16, buf, 0x7e90, seg.selector);
6191         put_smstate(u16, buf, 0x7e92, process_smi_get_segment_flags(&seg) >> 8);
6192         put_smstate(u32, buf, 0x7e94, seg.limit);
6193         put_smstate(u64, buf, 0x7e98, seg.base);
6194
6195         kvm_x86_ops->get_idt(vcpu, &dt);
6196         put_smstate(u32, buf, 0x7e84, dt.size);
6197         put_smstate(u64, buf, 0x7e88, dt.address);
6198
6199         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
6200         put_smstate(u16, buf, 0x7e70, seg.selector);
6201         put_smstate(u16, buf, 0x7e72, process_smi_get_segment_flags(&seg) >> 8);
6202         put_smstate(u32, buf, 0x7e74, seg.limit);
6203         put_smstate(u64, buf, 0x7e78, seg.base);
6204
6205         kvm_x86_ops->get_gdt(vcpu, &dt);
6206         put_smstate(u32, buf, 0x7e64, dt.size);
6207         put_smstate(u64, buf, 0x7e68, dt.address);
6208
6209         for (i = 0; i < 6; i++)
6210                 process_smi_save_seg_64(vcpu, buf, i);
6211 #else
6212         WARN_ON_ONCE(1);
6213 #endif
6214 }
6215
6216 static void process_smi(struct kvm_vcpu *vcpu)
6217 {
6218         struct kvm_segment cs, ds;
6219         struct desc_ptr dt;
6220         char buf[512];
6221         u32 cr0;
6222
6223         if (is_smm(vcpu)) {
6224                 vcpu->arch.smi_pending = true;
6225                 return;
6226         }
6227
6228         trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, true);
6229         vcpu->arch.hflags |= HF_SMM_MASK;
6230         memset(buf, 0, 512);
6231         if (guest_cpuid_has_longmode(vcpu))
6232                 process_smi_save_state_64(vcpu, buf);
6233         else
6234                 process_smi_save_state_32(vcpu, buf);
6235
6236         kvm_vcpu_write_guest(vcpu, vcpu->arch.smbase + 0xfe00, buf, sizeof(buf));
6237
6238         if (kvm_x86_ops->get_nmi_mask(vcpu))
6239                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
6240         else
6241                 kvm_x86_ops->set_nmi_mask(vcpu, true);
6242
6243         kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
6244         kvm_rip_write(vcpu, 0x8000);
6245
6246         cr0 = vcpu->arch.cr0 & ~(X86_CR0_PE | X86_CR0_EM | X86_CR0_TS | X86_CR0_PG);
6247         kvm_x86_ops->set_cr0(vcpu, cr0);
6248         vcpu->arch.cr0 = cr0;
6249
6250         kvm_x86_ops->set_cr4(vcpu, 0);
6251
6252         /* Undocumented: IDT limit is set to zero on entry to SMM.  */
6253         dt.address = dt.size = 0;
6254         kvm_x86_ops->set_idt(vcpu, &dt);
6255
6256         __kvm_set_dr(vcpu, 7, DR7_FIXED_1);
6257
6258         cs.selector = (vcpu->arch.smbase >> 4) & 0xffff;
6259         cs.base = vcpu->arch.smbase;
6260
6261         ds.selector = 0;
6262         ds.base = 0;
6263
6264         cs.limit    = ds.limit = 0xffffffff;
6265         cs.type     = ds.type = 0x3;
6266         cs.dpl      = ds.dpl = 0;
6267         cs.db       = ds.db = 0;
6268         cs.s        = ds.s = 1;
6269         cs.l        = ds.l = 0;
6270         cs.g        = ds.g = 1;
6271         cs.avl      = ds.avl = 0;
6272         cs.present  = ds.present = 1;
6273         cs.unusable = ds.unusable = 0;
6274         cs.padding  = ds.padding = 0;
6275
6276         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
6277         kvm_set_segment(vcpu, &ds, VCPU_SREG_DS);
6278         kvm_set_segment(vcpu, &ds, VCPU_SREG_ES);
6279         kvm_set_segment(vcpu, &ds, VCPU_SREG_FS);
6280         kvm_set_segment(vcpu, &ds, VCPU_SREG_GS);
6281         kvm_set_segment(vcpu, &ds, VCPU_SREG_SS);
6282
6283         if (guest_cpuid_has_longmode(vcpu))
6284                 kvm_x86_ops->set_efer(vcpu, 0);
6285
6286         kvm_update_cpuid(vcpu);
6287         kvm_mmu_reset_context(vcpu);
6288 }
6289
6290 static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu)
6291 {
6292         if (!kvm_apic_hw_enabled(vcpu->arch.apic))
6293                 return;
6294
6295         memset(vcpu->arch.eoi_exit_bitmap, 0, 256 / 8);
6296
6297         if (irqchip_split(vcpu->kvm))
6298                 kvm_scan_ioapic_routes(vcpu, vcpu->arch.eoi_exit_bitmap);
6299         else {
6300                 kvm_x86_ops->sync_pir_to_irr(vcpu);
6301                 kvm_ioapic_scan_entry(vcpu, vcpu->arch.eoi_exit_bitmap);
6302         }
6303         kvm_x86_ops->load_eoi_exitmap(vcpu);
6304 }
6305
6306 static void kvm_vcpu_flush_tlb(struct kvm_vcpu *vcpu)
6307 {
6308         ++vcpu->stat.tlb_flush;
6309         kvm_x86_ops->tlb_flush(vcpu);
6310 }
6311
6312 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu)
6313 {
6314         struct page *page = NULL;
6315
6316         if (!lapic_in_kernel(vcpu))
6317                 return;
6318
6319         if (!kvm_x86_ops->set_apic_access_page_addr)
6320                 return;
6321
6322         page = gfn_to_page(vcpu->kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
6323         if (is_error_page(page))
6324                 return;
6325         kvm_x86_ops->set_apic_access_page_addr(vcpu, page_to_phys(page));
6326
6327         /*
6328          * Do not pin apic access page in memory, the MMU notifier
6329          * will call us again if it is migrated or swapped out.
6330          */
6331         put_page(page);
6332 }
6333 EXPORT_SYMBOL_GPL(kvm_vcpu_reload_apic_access_page);
6334
6335 void kvm_arch_mmu_notifier_invalidate_page(struct kvm *kvm,
6336                                            unsigned long address)
6337 {
6338         /*
6339          * The physical address of apic access page is stored in the VMCS.
6340          * Update it when it becomes invalid.
6341          */
6342         if (address == gfn_to_hva(kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT))
6343                 kvm_make_all_cpus_request(kvm, KVM_REQ_APIC_PAGE_RELOAD);
6344 }
6345
6346 /*
6347  * Returns 1 to let vcpu_run() continue the guest execution loop without
6348  * exiting to the userspace.  Otherwise, the value will be returned to the
6349  * userspace.
6350  */
6351 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
6352 {
6353         int r;
6354         bool req_int_win = !lapic_in_kernel(vcpu) &&
6355                 vcpu->run->request_interrupt_window;
6356         bool req_immediate_exit = false;
6357
6358         if (vcpu->requests) {
6359                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
6360                         kvm_mmu_unload(vcpu);
6361                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
6362                         __kvm_migrate_timers(vcpu);
6363                 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu))
6364                         kvm_gen_update_masterclock(vcpu->kvm);
6365                 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu))
6366                         kvm_gen_kvmclock_update(vcpu);
6367                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
6368                         r = kvm_guest_time_update(vcpu);
6369                         if (unlikely(r))
6370                                 goto out;
6371                 }
6372                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
6373                         kvm_mmu_sync_roots(vcpu);
6374                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
6375                         kvm_vcpu_flush_tlb(vcpu);
6376                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
6377                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
6378                         r = 0;
6379                         goto out;
6380                 }
6381                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
6382                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
6383                         r = 0;
6384                         goto out;
6385                 }
6386                 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU, vcpu)) {
6387                         vcpu->fpu_active = 0;
6388                         kvm_x86_ops->fpu_deactivate(vcpu);
6389                 }
6390                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
6391                         /* Page is swapped out. Do synthetic halt */
6392                         vcpu->arch.apf.halted = true;
6393                         r = 1;
6394                         goto out;
6395                 }
6396                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
6397                         record_steal_time(vcpu);
6398                 if (kvm_check_request(KVM_REQ_SMI, vcpu))
6399                         process_smi(vcpu);
6400                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
6401                         process_nmi(vcpu);
6402                 if (kvm_check_request(KVM_REQ_PMU, vcpu))
6403                         kvm_pmu_handle_event(vcpu);
6404                 if (kvm_check_request(KVM_REQ_PMI, vcpu))
6405                         kvm_pmu_deliver_pmi(vcpu);
6406                 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT, vcpu)) {
6407                         BUG_ON(vcpu->arch.pending_ioapic_eoi > 255);
6408                         if (test_bit(vcpu->arch.pending_ioapic_eoi,
6409                                      (void *) vcpu->arch.eoi_exit_bitmap)) {
6410                                 vcpu->run->exit_reason = KVM_EXIT_IOAPIC_EOI;
6411                                 vcpu->run->eoi.vector =
6412                                                 vcpu->arch.pending_ioapic_eoi;
6413                                 r = 0;
6414                                 goto out;
6415                         }
6416                 }
6417                 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC, vcpu))
6418                         vcpu_scan_ioapic(vcpu);
6419                 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD, vcpu))
6420                         kvm_vcpu_reload_apic_access_page(vcpu);
6421                 if (kvm_check_request(KVM_REQ_HV_CRASH, vcpu)) {
6422                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
6423                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_CRASH;
6424                         r = 0;
6425                         goto out;
6426                 }
6427                 if (kvm_check_request(KVM_REQ_HV_RESET, vcpu)) {
6428                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
6429                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_RESET;
6430                         r = 0;
6431                         goto out;
6432                 }
6433         }
6434
6435         /*
6436          * KVM_REQ_EVENT is not set when posted interrupts are set by
6437          * VT-d hardware, so we have to update RVI unconditionally.
6438          */
6439         if (kvm_lapic_enabled(vcpu)) {
6440                 /*
6441                  * Update architecture specific hints for APIC
6442                  * virtual interrupt delivery.
6443                  */
6444                 if (kvm_x86_ops->hwapic_irr_update)
6445                         kvm_x86_ops->hwapic_irr_update(vcpu,
6446                                 kvm_lapic_find_highest_irr(vcpu));
6447         }
6448
6449         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
6450                 kvm_apic_accept_events(vcpu);
6451                 if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
6452                         r = 1;
6453                         goto out;
6454                 }
6455
6456                 if (inject_pending_event(vcpu, req_int_win) != 0)
6457                         req_immediate_exit = true;
6458                 /* enable NMI/IRQ window open exits if needed */
6459                 else if (vcpu->arch.nmi_pending)
6460                         kvm_x86_ops->enable_nmi_window(vcpu);
6461                 else if (kvm_cpu_has_injectable_intr(vcpu) || req_int_win)
6462                         kvm_x86_ops->enable_irq_window(vcpu);
6463
6464                 if (kvm_lapic_enabled(vcpu)) {
6465                         update_cr8_intercept(vcpu);
6466                         kvm_lapic_sync_to_vapic(vcpu);
6467                 }
6468         }
6469
6470         r = kvm_mmu_reload(vcpu);
6471         if (unlikely(r)) {
6472                 goto cancel_injection;
6473         }
6474
6475         preempt_disable();
6476
6477         kvm_x86_ops->prepare_guest_switch(vcpu);
6478         if (vcpu->fpu_active)
6479                 kvm_load_guest_fpu(vcpu);
6480         kvm_load_guest_xcr0(vcpu);
6481
6482         vcpu->mode = IN_GUEST_MODE;
6483
6484         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
6485
6486         /* We should set ->mode before check ->requests,
6487          * see the comment in make_all_cpus_request.
6488          */
6489         smp_mb__after_srcu_read_unlock();
6490
6491         local_irq_disable();
6492
6493         if (vcpu->mode == EXITING_GUEST_MODE || vcpu->requests
6494             || need_resched() || signal_pending(current)) {
6495                 vcpu->mode = OUTSIDE_GUEST_MODE;
6496                 smp_wmb();
6497                 local_irq_enable();
6498                 preempt_enable();
6499                 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
6500                 r = 1;
6501                 goto cancel_injection;
6502         }
6503
6504         if (req_immediate_exit)
6505                 smp_send_reschedule(vcpu->cpu);
6506
6507         __kvm_guest_enter();
6508
6509         if (unlikely(vcpu->arch.switch_db_regs)) {
6510                 set_debugreg(0, 7);
6511                 set_debugreg(vcpu->arch.eff_db[0], 0);
6512                 set_debugreg(vcpu->arch.eff_db[1], 1);
6513                 set_debugreg(vcpu->arch.eff_db[2], 2);
6514                 set_debugreg(vcpu->arch.eff_db[3], 3);
6515                 set_debugreg(vcpu->arch.dr6, 6);
6516                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
6517         }
6518
6519         trace_kvm_entry(vcpu->vcpu_id);
6520         wait_lapic_expire(vcpu);
6521         kvm_x86_ops->run(vcpu);
6522
6523         /*
6524          * Do this here before restoring debug registers on the host.  And
6525          * since we do this before handling the vmexit, a DR access vmexit
6526          * can (a) read the correct value of the debug registers, (b) set
6527          * KVM_DEBUGREG_WONT_EXIT again.
6528          */
6529         if (unlikely(vcpu->arch.switch_db_regs & KVM_DEBUGREG_WONT_EXIT)) {
6530                 int i;
6531
6532                 WARN_ON(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP);
6533                 kvm_x86_ops->sync_dirty_debug_regs(vcpu);
6534                 for (i = 0; i < KVM_NR_DB_REGS; i++)
6535                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
6536         }
6537
6538         /*
6539          * If the guest has used debug registers, at least dr7
6540          * will be disabled while returning to the host.
6541          * If we don't have active breakpoints in the host, we don't
6542          * care about the messed up debug address registers. But if
6543          * we have some of them active, restore the old state.
6544          */
6545         if (hw_breakpoint_active())
6546                 hw_breakpoint_restore();
6547
6548         vcpu->arch.last_guest_tsc = kvm_x86_ops->read_l1_tsc(vcpu,
6549                                                            rdtsc());
6550
6551         vcpu->mode = OUTSIDE_GUEST_MODE;
6552         smp_wmb();
6553
6554         /* Interrupt is enabled by handle_external_intr() */
6555         kvm_x86_ops->handle_external_intr(vcpu);
6556
6557         ++vcpu->stat.exits;
6558
6559         /*
6560          * We must have an instruction between local_irq_enable() and
6561          * kvm_guest_exit(), so the timer interrupt isn't delayed by
6562          * the interrupt shadow.  The stat.exits increment will do nicely.
6563          * But we need to prevent reordering, hence this barrier():
6564          */
6565         barrier();
6566
6567         kvm_guest_exit();
6568
6569         preempt_enable();
6570
6571         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
6572
6573         /*
6574          * Profile KVM exit RIPs:
6575          */
6576         if (unlikely(prof_on == KVM_PROFILING)) {
6577                 unsigned long rip = kvm_rip_read(vcpu);
6578                 profile_hit(KVM_PROFILING, (void *)rip);
6579         }
6580
6581         if (unlikely(vcpu->arch.tsc_always_catchup))
6582                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
6583
6584         if (vcpu->arch.apic_attention)
6585                 kvm_lapic_sync_from_vapic(vcpu);
6586
6587         r = kvm_x86_ops->handle_exit(vcpu);
6588         return r;
6589
6590 cancel_injection:
6591         kvm_x86_ops->cancel_injection(vcpu);
6592         if (unlikely(vcpu->arch.apic_attention))
6593                 kvm_lapic_sync_from_vapic(vcpu);
6594 out:
6595         return r;
6596 }
6597
6598 static inline int vcpu_block(struct kvm *kvm, struct kvm_vcpu *vcpu)
6599 {
6600         if (!kvm_arch_vcpu_runnable(vcpu) &&
6601             (!kvm_x86_ops->pre_block || kvm_x86_ops->pre_block(vcpu) == 0)) {
6602                 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
6603                 kvm_vcpu_block(vcpu);
6604                 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
6605
6606                 if (kvm_x86_ops->post_block)
6607                         kvm_x86_ops->post_block(vcpu);
6608
6609                 if (!kvm_check_request(KVM_REQ_UNHALT, vcpu))
6610                         return 1;
6611         }
6612
6613         kvm_apic_accept_events(vcpu);
6614         switch(vcpu->arch.mp_state) {
6615         case KVM_MP_STATE_HALTED:
6616                 vcpu->arch.pv.pv_unhalted = false;
6617                 vcpu->arch.mp_state =
6618                         KVM_MP_STATE_RUNNABLE;
6619         case KVM_MP_STATE_RUNNABLE:
6620                 vcpu->arch.apf.halted = false;
6621                 break;
6622         case KVM_MP_STATE_INIT_RECEIVED:
6623                 break;
6624         default:
6625                 return -EINTR;
6626                 break;
6627         }
6628         return 1;
6629 }
6630
6631 static inline bool kvm_vcpu_running(struct kvm_vcpu *vcpu)
6632 {
6633         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
6634                 !vcpu->arch.apf.halted);
6635 }
6636
6637 static int vcpu_run(struct kvm_vcpu *vcpu)
6638 {
6639         int r;
6640         struct kvm *kvm = vcpu->kvm;
6641
6642         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
6643
6644         for (;;) {
6645                 if (kvm_vcpu_running(vcpu)) {
6646                         r = vcpu_enter_guest(vcpu);
6647                 } else {
6648                         r = vcpu_block(kvm, vcpu);
6649                 }
6650
6651                 if (r <= 0)
6652                         break;
6653
6654                 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
6655                 if (kvm_cpu_has_pending_timer(vcpu))
6656                         kvm_inject_pending_timer_irqs(vcpu);
6657
6658                 if (dm_request_for_irq_injection(vcpu)) {
6659                         r = 0;
6660                         vcpu->run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
6661                         ++vcpu->stat.request_irq_exits;
6662                         break;
6663                 }
6664
6665                 kvm_check_async_pf_completion(vcpu);
6666
6667                 if (signal_pending(current)) {
6668                         r = -EINTR;
6669                         vcpu->run->exit_reason = KVM_EXIT_INTR;
6670                         ++vcpu->stat.signal_exits;
6671                         break;
6672                 }
6673                 if (need_resched()) {
6674                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
6675                         cond_resched();
6676                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
6677                 }
6678         }
6679
6680         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
6681
6682         return r;
6683 }
6684
6685 static inline int complete_emulated_io(struct kvm_vcpu *vcpu)
6686 {
6687         int r;
6688         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
6689         r = emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
6690         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
6691         if (r != EMULATE_DONE)
6692                 return 0;
6693         return 1;
6694 }
6695
6696 static int complete_emulated_pio(struct kvm_vcpu *vcpu)
6697 {
6698         BUG_ON(!vcpu->arch.pio.count);
6699
6700         return complete_emulated_io(vcpu);
6701 }
6702
6703 /*
6704  * Implements the following, as a state machine:
6705  *
6706  * read:
6707  *   for each fragment
6708  *     for each mmio piece in the fragment
6709  *       write gpa, len
6710  *       exit
6711  *       copy data
6712  *   execute insn
6713  *
6714  * write:
6715  *   for each fragment
6716  *     for each mmio piece in the fragment
6717  *       write gpa, len
6718  *       copy data
6719  *       exit
6720  */
6721 static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
6722 {
6723         struct kvm_run *run = vcpu->run;
6724         struct kvm_mmio_fragment *frag;
6725         unsigned len;
6726
6727         BUG_ON(!vcpu->mmio_needed);
6728
6729         /* Complete previous fragment */
6730         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
6731         len = min(8u, frag->len);
6732         if (!vcpu->mmio_is_write)
6733                 memcpy(frag->data, run->mmio.data, len);
6734
6735         if (frag->len <= 8) {
6736                 /* Switch to the next fragment. */
6737                 frag++;
6738                 vcpu->mmio_cur_fragment++;
6739         } else {
6740                 /* Go forward to the next mmio piece. */
6741                 frag->data += len;
6742                 frag->gpa += len;
6743                 frag->len -= len;
6744         }
6745
6746         if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
6747                 vcpu->mmio_needed = 0;
6748
6749                 /* FIXME: return into emulator if single-stepping.  */
6750                 if (vcpu->mmio_is_write)
6751                         return 1;
6752                 vcpu->mmio_read_completed = 1;
6753                 return complete_emulated_io(vcpu);
6754         }
6755
6756         run->exit_reason = KVM_EXIT_MMIO;
6757         run->mmio.phys_addr = frag->gpa;
6758         if (vcpu->mmio_is_write)
6759                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
6760         run->mmio.len = min(8u, frag->len);
6761         run->mmio.is_write = vcpu->mmio_is_write;
6762         vcpu->arch.complete_userspace_io = complete_emulated_mmio;
6763         return 0;
6764 }
6765
6766
6767 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
6768 {
6769         struct fpu *fpu = &current->thread.fpu;
6770         int r;
6771         sigset_t sigsaved;
6772
6773         fpu__activate_curr(fpu);
6774
6775         if (vcpu->sigset_active)
6776                 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
6777
6778         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
6779                 kvm_vcpu_block(vcpu);
6780                 kvm_apic_accept_events(vcpu);
6781                 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
6782                 r = -EAGAIN;
6783                 goto out;
6784         }
6785
6786         /* re-sync apic's tpr */
6787         if (!lapic_in_kernel(vcpu)) {
6788                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
6789                         r = -EINVAL;
6790                         goto out;
6791                 }
6792         }
6793
6794         if (unlikely(vcpu->arch.complete_userspace_io)) {
6795                 int (*cui)(struct kvm_vcpu *) = vcpu->arch.complete_userspace_io;
6796                 vcpu->arch.complete_userspace_io = NULL;
6797                 r = cui(vcpu);
6798                 if (r <= 0)
6799                         goto out;
6800         } else
6801                 WARN_ON(vcpu->arch.pio.count || vcpu->mmio_needed);
6802
6803         r = vcpu_run(vcpu);
6804
6805 out:
6806         post_kvm_run_save(vcpu);
6807         if (vcpu->sigset_active)
6808                 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
6809
6810         return r;
6811 }
6812
6813 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
6814 {
6815         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
6816                 /*
6817                  * We are here if userspace calls get_regs() in the middle of
6818                  * instruction emulation. Registers state needs to be copied
6819                  * back from emulation context to vcpu. Userspace shouldn't do
6820                  * that usually, but some bad designed PV devices (vmware
6821                  * backdoor interface) need this to work
6822                  */
6823                 emulator_writeback_register_cache(&vcpu->arch.emulate_ctxt);
6824                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
6825         }
6826         regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
6827         regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
6828         regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
6829         regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
6830         regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
6831         regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
6832         regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
6833         regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
6834 #ifdef CONFIG_X86_64
6835         regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
6836         regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
6837         regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
6838         regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
6839         regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
6840         regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
6841         regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
6842         regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
6843 #endif
6844
6845         regs->rip = kvm_rip_read(vcpu);
6846         regs->rflags = kvm_get_rflags(vcpu);
6847
6848         return 0;
6849 }
6850
6851 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
6852 {
6853         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
6854         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
6855
6856         kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
6857         kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
6858         kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
6859         kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
6860         kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
6861         kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
6862         kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
6863         kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
6864 #ifdef CONFIG_X86_64
6865         kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
6866         kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
6867         kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
6868         kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
6869         kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
6870         kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
6871         kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
6872         kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
6873 #endif
6874
6875         kvm_rip_write(vcpu, regs->rip);
6876         kvm_set_rflags(vcpu, regs->rflags);
6877
6878         vcpu->arch.exception.pending = false;
6879
6880         kvm_make_request(KVM_REQ_EVENT, vcpu);
6881
6882         return 0;
6883 }
6884
6885 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
6886 {
6887         struct kvm_segment cs;
6888
6889         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
6890         *db = cs.db;
6891         *l = cs.l;
6892 }
6893 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
6894
6895 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
6896                                   struct kvm_sregs *sregs)
6897 {
6898         struct desc_ptr dt;
6899
6900         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
6901         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
6902         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
6903         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
6904         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
6905         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
6906
6907         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
6908         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
6909
6910         kvm_x86_ops->get_idt(vcpu, &dt);
6911         sregs->idt.limit = dt.size;
6912         sregs->idt.base = dt.address;
6913         kvm_x86_ops->get_gdt(vcpu, &dt);
6914         sregs->gdt.limit = dt.size;
6915         sregs->gdt.base = dt.address;
6916
6917         sregs->cr0 = kvm_read_cr0(vcpu);
6918         sregs->cr2 = vcpu->arch.cr2;
6919         sregs->cr3 = kvm_read_cr3(vcpu);
6920         sregs->cr4 = kvm_read_cr4(vcpu);
6921         sregs->cr8 = kvm_get_cr8(vcpu);
6922         sregs->efer = vcpu->arch.efer;
6923         sregs->apic_base = kvm_get_apic_base(vcpu);
6924
6925         memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
6926
6927         if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
6928                 set_bit(vcpu->arch.interrupt.nr,
6929                         (unsigned long *)sregs->interrupt_bitmap);
6930
6931         return 0;
6932 }
6933
6934 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
6935                                     struct kvm_mp_state *mp_state)
6936 {
6937         kvm_apic_accept_events(vcpu);
6938         if (vcpu->arch.mp_state == KVM_MP_STATE_HALTED &&
6939                                         vcpu->arch.pv.pv_unhalted)
6940                 mp_state->mp_state = KVM_MP_STATE_RUNNABLE;
6941         else
6942                 mp_state->mp_state = vcpu->arch.mp_state;
6943
6944         return 0;
6945 }
6946
6947 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
6948                                     struct kvm_mp_state *mp_state)
6949 {
6950         if (!kvm_vcpu_has_lapic(vcpu) &&
6951             mp_state->mp_state != KVM_MP_STATE_RUNNABLE)
6952                 return -EINVAL;
6953
6954         if (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED) {
6955                 vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
6956                 set_bit(KVM_APIC_SIPI, &vcpu->arch.apic->pending_events);
6957         } else
6958                 vcpu->arch.mp_state = mp_state->mp_state;
6959         kvm_make_request(KVM_REQ_EVENT, vcpu);
6960         return 0;
6961 }
6962
6963 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
6964                     int reason, bool has_error_code, u32 error_code)
6965 {
6966         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
6967         int ret;
6968
6969         init_emulate_ctxt(vcpu);
6970
6971         ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
6972                                    has_error_code, error_code);
6973
6974         if (ret)
6975                 return EMULATE_FAIL;
6976
6977         kvm_rip_write(vcpu, ctxt->eip);
6978         kvm_set_rflags(vcpu, ctxt->eflags);
6979         kvm_make_request(KVM_REQ_EVENT, vcpu);
6980         return EMULATE_DONE;
6981 }
6982 EXPORT_SYMBOL_GPL(kvm_task_switch);
6983
6984 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
6985                                   struct kvm_sregs *sregs)
6986 {
6987         struct msr_data apic_base_msr;
6988         int mmu_reset_needed = 0;
6989         int pending_vec, max_bits, idx;
6990         struct desc_ptr dt;
6991
6992         if (!guest_cpuid_has_xsave(vcpu) && (sregs->cr4 & X86_CR4_OSXSAVE))
6993                 return -EINVAL;
6994
6995         dt.size = sregs->idt.limit;
6996         dt.address = sregs->idt.base;
6997         kvm_x86_ops->set_idt(vcpu, &dt);
6998         dt.size = sregs->gdt.limit;
6999         dt.address = sregs->gdt.base;
7000         kvm_x86_ops->set_gdt(vcpu, &dt);
7001
7002         vcpu->arch.cr2 = sregs->cr2;
7003         mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
7004         vcpu->arch.cr3 = sregs->cr3;
7005         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
7006
7007         kvm_set_cr8(vcpu, sregs->cr8);
7008
7009         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
7010         kvm_x86_ops->set_efer(vcpu, sregs->efer);
7011         apic_base_msr.data = sregs->apic_base;
7012         apic_base_msr.host_initiated = true;
7013         kvm_set_apic_base(vcpu, &apic_base_msr);
7014
7015         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
7016         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
7017         vcpu->arch.cr0 = sregs->cr0;
7018
7019         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
7020         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
7021         if (sregs->cr4 & X86_CR4_OSXSAVE)
7022                 kvm_update_cpuid(vcpu);
7023
7024         idx = srcu_read_lock(&vcpu->kvm->srcu);
7025         if (!is_long_mode(vcpu) && is_pae(vcpu)) {
7026                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
7027                 mmu_reset_needed = 1;
7028         }
7029         srcu_read_unlock(&vcpu->kvm->srcu, idx);
7030
7031         if (mmu_reset_needed)
7032                 kvm_mmu_reset_context(vcpu);
7033
7034         max_bits = KVM_NR_INTERRUPTS;
7035         pending_vec = find_first_bit(
7036                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
7037         if (pending_vec < max_bits) {
7038                 kvm_queue_interrupt(vcpu, pending_vec, false);
7039                 pr_debug("Set back pending irq %d\n", pending_vec);
7040         }
7041
7042         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
7043         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
7044         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
7045         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
7046         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
7047         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
7048
7049         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
7050         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
7051
7052         update_cr8_intercept(vcpu);
7053
7054         /* Older userspace won't unhalt the vcpu on reset. */
7055         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
7056             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
7057             !is_protmode(vcpu))
7058                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
7059
7060         kvm_make_request(KVM_REQ_EVENT, vcpu);
7061
7062         return 0;
7063 }
7064
7065 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
7066                                         struct kvm_guest_debug *dbg)
7067 {
7068         unsigned long rflags;
7069         int i, r;
7070
7071         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
7072                 r = -EBUSY;
7073                 if (vcpu->arch.exception.pending)
7074                         goto out;
7075                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
7076                         kvm_queue_exception(vcpu, DB_VECTOR);
7077                 else
7078                         kvm_queue_exception(vcpu, BP_VECTOR);
7079         }
7080
7081         /*
7082          * Read rflags as long as potentially injected trace flags are still
7083          * filtered out.
7084          */
7085         rflags = kvm_get_rflags(vcpu);
7086
7087         vcpu->guest_debug = dbg->control;
7088         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
7089                 vcpu->guest_debug = 0;
7090
7091         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
7092                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
7093                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
7094                 vcpu->arch.guest_debug_dr7 = dbg->arch.debugreg[7];
7095         } else {
7096                 for (i = 0; i < KVM_NR_DB_REGS; i++)
7097                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
7098         }
7099         kvm_update_dr7(vcpu);
7100
7101         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
7102                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
7103                         get_segment_base(vcpu, VCPU_SREG_CS);
7104
7105         /*
7106          * Trigger an rflags update that will inject or remove the trace
7107          * flags.
7108          */
7109         kvm_set_rflags(vcpu, rflags);
7110
7111         kvm_x86_ops->update_db_bp_intercept(vcpu);
7112
7113         r = 0;
7114
7115 out:
7116
7117         return r;
7118 }
7119
7120 /*
7121  * Translate a guest virtual address to a guest physical address.
7122  */
7123 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
7124                                     struct kvm_translation *tr)
7125 {
7126         unsigned long vaddr = tr->linear_address;
7127         gpa_t gpa;
7128         int idx;
7129
7130         idx = srcu_read_lock(&vcpu->kvm->srcu);
7131         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
7132         srcu_read_unlock(&vcpu->kvm->srcu, idx);
7133         tr->physical_address = gpa;
7134         tr->valid = gpa != UNMAPPED_GVA;
7135         tr->writeable = 1;
7136         tr->usermode = 0;
7137
7138         return 0;
7139 }
7140
7141 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
7142 {
7143         struct fxregs_state *fxsave =
7144                         &vcpu->arch.guest_fpu.state.fxsave;
7145
7146         memcpy(fpu->fpr, fxsave->st_space, 128);
7147         fpu->fcw = fxsave->cwd;
7148         fpu->fsw = fxsave->swd;
7149         fpu->ftwx = fxsave->twd;
7150         fpu->last_opcode = fxsave->fop;
7151         fpu->last_ip = fxsave->rip;
7152         fpu->last_dp = fxsave->rdp;
7153         memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
7154
7155         return 0;
7156 }
7157
7158 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
7159 {
7160         struct fxregs_state *fxsave =
7161                         &vcpu->arch.guest_fpu.state.fxsave;
7162
7163         memcpy(fxsave->st_space, fpu->fpr, 128);
7164         fxsave->cwd = fpu->fcw;
7165         fxsave->swd = fpu->fsw;
7166         fxsave->twd = fpu->ftwx;
7167         fxsave->fop = fpu->last_opcode;
7168         fxsave->rip = fpu->last_ip;
7169         fxsave->rdp = fpu->last_dp;
7170         memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
7171
7172         return 0;
7173 }
7174
7175 static void fx_init(struct kvm_vcpu *vcpu)
7176 {
7177         fpstate_init(&vcpu->arch.guest_fpu.state);
7178         if (cpu_has_xsaves)
7179                 vcpu->arch.guest_fpu.state.xsave.header.xcomp_bv =
7180                         host_xcr0 | XSTATE_COMPACTION_ENABLED;
7181
7182         /*
7183          * Ensure guest xcr0 is valid for loading
7184          */
7185         vcpu->arch.xcr0 = XSTATE_FP;
7186
7187         vcpu->arch.cr0 |= X86_CR0_ET;
7188 }
7189
7190 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
7191 {
7192         if (vcpu->guest_fpu_loaded)
7193                 return;
7194
7195         /*
7196          * Restore all possible states in the guest,
7197          * and assume host would use all available bits.
7198          * Guest xcr0 would be loaded later.
7199          */
7200         kvm_put_guest_xcr0(vcpu);
7201         vcpu->guest_fpu_loaded = 1;
7202         __kernel_fpu_begin();
7203         __copy_kernel_to_fpregs(&vcpu->arch.guest_fpu.state);
7204         trace_kvm_fpu(1);
7205 }
7206
7207 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
7208 {
7209         kvm_put_guest_xcr0(vcpu);
7210
7211         if (!vcpu->guest_fpu_loaded) {
7212                 vcpu->fpu_counter = 0;
7213                 return;
7214         }
7215
7216         vcpu->guest_fpu_loaded = 0;
7217         copy_fpregs_to_fpstate(&vcpu->arch.guest_fpu);
7218         __kernel_fpu_end();
7219         ++vcpu->stat.fpu_reload;
7220         /*
7221          * If using eager FPU mode, or if the guest is a frequent user
7222          * of the FPU, just leave the FPU active for next time.
7223          * Every 255 times fpu_counter rolls over to 0; a guest that uses
7224          * the FPU in bursts will revert to loading it on demand.
7225          */
7226         if (!vcpu->arch.eager_fpu) {
7227                 if (++vcpu->fpu_counter < 5)
7228                         kvm_make_request(KVM_REQ_DEACTIVATE_FPU, vcpu);
7229         }
7230         trace_kvm_fpu(0);
7231 }
7232
7233 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
7234 {
7235         kvmclock_reset(vcpu);
7236
7237         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
7238         kvm_x86_ops->vcpu_free(vcpu);
7239 }
7240
7241 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
7242                                                 unsigned int id)
7243 {
7244         struct kvm_vcpu *vcpu;
7245
7246         if (check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
7247                 printk_once(KERN_WARNING
7248                 "kvm: SMP vm created on host with unstable TSC; "
7249                 "guest TSC will not be reliable\n");
7250
7251         vcpu = kvm_x86_ops->vcpu_create(kvm, id);
7252
7253         return vcpu;
7254 }
7255
7256 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
7257 {
7258         int r;
7259
7260         kvm_vcpu_mtrr_init(vcpu);
7261         r = vcpu_load(vcpu);
7262         if (r)
7263                 return r;
7264         kvm_vcpu_reset(vcpu, false);
7265         kvm_mmu_setup(vcpu);
7266         vcpu_put(vcpu);
7267         return r;
7268 }
7269
7270 void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
7271 {
7272         struct msr_data msr;
7273         struct kvm *kvm = vcpu->kvm;
7274
7275         if (vcpu_load(vcpu))
7276                 return;
7277         msr.data = 0x0;
7278         msr.index = MSR_IA32_TSC;
7279         msr.host_initiated = true;
7280         kvm_write_tsc(vcpu, &msr);
7281         vcpu_put(vcpu);
7282
7283         if (!kvmclock_periodic_sync)
7284                 return;
7285
7286         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
7287                                         KVMCLOCK_SYNC_PERIOD);
7288 }
7289
7290 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
7291 {
7292         int r;
7293         vcpu->arch.apf.msr_val = 0;
7294
7295         r = vcpu_load(vcpu);
7296         BUG_ON(r);
7297         kvm_mmu_unload(vcpu);
7298         vcpu_put(vcpu);
7299
7300         kvm_x86_ops->vcpu_free(vcpu);
7301 }
7302
7303 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)
7304 {
7305         vcpu->arch.hflags = 0;
7306
7307         atomic_set(&vcpu->arch.nmi_queued, 0);
7308         vcpu->arch.nmi_pending = 0;
7309         vcpu->arch.nmi_injected = false;
7310         kvm_clear_interrupt_queue(vcpu);
7311         kvm_clear_exception_queue(vcpu);
7312
7313         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
7314         kvm_update_dr0123(vcpu);
7315         vcpu->arch.dr6 = DR6_INIT;
7316         kvm_update_dr6(vcpu);
7317         vcpu->arch.dr7 = DR7_FIXED_1;
7318         kvm_update_dr7(vcpu);
7319
7320         vcpu->arch.cr2 = 0;
7321
7322         kvm_make_request(KVM_REQ_EVENT, vcpu);
7323         vcpu->arch.apf.msr_val = 0;
7324         vcpu->arch.st.msr_val = 0;
7325
7326         kvmclock_reset(vcpu);
7327
7328         kvm_clear_async_pf_completion_queue(vcpu);
7329         kvm_async_pf_hash_reset(vcpu);
7330         vcpu->arch.apf.halted = false;
7331
7332         if (!init_event) {
7333                 kvm_pmu_reset(vcpu);
7334                 vcpu->arch.smbase = 0x30000;
7335         }
7336
7337         memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
7338         vcpu->arch.regs_avail = ~0;
7339         vcpu->arch.regs_dirty = ~0;
7340
7341         kvm_x86_ops->vcpu_reset(vcpu, init_event);
7342 }
7343
7344 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector)
7345 {
7346         struct kvm_segment cs;
7347
7348         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
7349         cs.selector = vector << 8;
7350         cs.base = vector << 12;
7351         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
7352         kvm_rip_write(vcpu, 0);
7353 }
7354
7355 int kvm_arch_hardware_enable(void)
7356 {
7357         struct kvm *kvm;
7358         struct kvm_vcpu *vcpu;
7359         int i;
7360         int ret;
7361         u64 local_tsc;
7362         u64 max_tsc = 0;
7363         bool stable, backwards_tsc = false;
7364
7365         kvm_shared_msr_cpu_online();
7366         ret = kvm_x86_ops->hardware_enable();
7367         if (ret != 0)
7368                 return ret;
7369
7370         local_tsc = rdtsc();
7371         stable = !check_tsc_unstable();
7372         list_for_each_entry(kvm, &vm_list, vm_list) {
7373                 kvm_for_each_vcpu(i, vcpu, kvm) {
7374                         if (!stable && vcpu->cpu == smp_processor_id())
7375                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
7376                         if (stable && vcpu->arch.last_host_tsc > local_tsc) {
7377                                 backwards_tsc = true;
7378                                 if (vcpu->arch.last_host_tsc > max_tsc)
7379                                         max_tsc = vcpu->arch.last_host_tsc;
7380                         }
7381                 }
7382         }
7383
7384         /*
7385          * Sometimes, even reliable TSCs go backwards.  This happens on
7386          * platforms that reset TSC during suspend or hibernate actions, but
7387          * maintain synchronization.  We must compensate.  Fortunately, we can
7388          * detect that condition here, which happens early in CPU bringup,
7389          * before any KVM threads can be running.  Unfortunately, we can't
7390          * bring the TSCs fully up to date with real time, as we aren't yet far
7391          * enough into CPU bringup that we know how much real time has actually
7392          * elapsed; our helper function, get_kernel_ns() will be using boot
7393          * variables that haven't been updated yet.
7394          *
7395          * So we simply find the maximum observed TSC above, then record the
7396          * adjustment to TSC in each VCPU.  When the VCPU later gets loaded,
7397          * the adjustment will be applied.  Note that we accumulate
7398          * adjustments, in case multiple suspend cycles happen before some VCPU
7399          * gets a chance to run again.  In the event that no KVM threads get a
7400          * chance to run, we will miss the entire elapsed period, as we'll have
7401          * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
7402          * loose cycle time.  This isn't too big a deal, since the loss will be
7403          * uniform across all VCPUs (not to mention the scenario is extremely
7404          * unlikely). It is possible that a second hibernate recovery happens
7405          * much faster than a first, causing the observed TSC here to be
7406          * smaller; this would require additional padding adjustment, which is
7407          * why we set last_host_tsc to the local tsc observed here.
7408          *
7409          * N.B. - this code below runs only on platforms with reliable TSC,
7410          * as that is the only way backwards_tsc is set above.  Also note
7411          * that this runs for ALL vcpus, which is not a bug; all VCPUs should
7412          * have the same delta_cyc adjustment applied if backwards_tsc
7413          * is detected.  Note further, this adjustment is only done once,
7414          * as we reset last_host_tsc on all VCPUs to stop this from being
7415          * called multiple times (one for each physical CPU bringup).
7416          *
7417          * Platforms with unreliable TSCs don't have to deal with this, they
7418          * will be compensated by the logic in vcpu_load, which sets the TSC to
7419          * catchup mode.  This will catchup all VCPUs to real time, but cannot
7420          * guarantee that they stay in perfect synchronization.
7421          */
7422         if (backwards_tsc) {
7423                 u64 delta_cyc = max_tsc - local_tsc;
7424                 backwards_tsc_observed = true;
7425                 list_for_each_entry(kvm, &vm_list, vm_list) {
7426                         kvm_for_each_vcpu(i, vcpu, kvm) {
7427                                 vcpu->arch.tsc_offset_adjustment += delta_cyc;
7428                                 vcpu->arch.last_host_tsc = local_tsc;
7429                                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
7430                         }
7431
7432                         /*
7433                          * We have to disable TSC offset matching.. if you were
7434                          * booting a VM while issuing an S4 host suspend....
7435                          * you may have some problem.  Solving this issue is
7436                          * left as an exercise to the reader.
7437                          */
7438                         kvm->arch.last_tsc_nsec = 0;
7439                         kvm->arch.last_tsc_write = 0;
7440                 }
7441
7442         }
7443         return 0;
7444 }
7445
7446 void kvm_arch_hardware_disable(void)
7447 {
7448         kvm_x86_ops->hardware_disable();
7449         drop_user_return_notifiers();
7450 }
7451
7452 int kvm_arch_hardware_setup(void)
7453 {
7454         int r;
7455
7456         r = kvm_x86_ops->hardware_setup();
7457         if (r != 0)
7458                 return r;
7459
7460         if (kvm_has_tsc_control) {
7461                 /*
7462                  * Make sure the user can only configure tsc_khz values that
7463                  * fit into a signed integer.
7464                  * A min value is not calculated needed because it will always
7465                  * be 1 on all machines.
7466                  */
7467                 u64 max = min(0x7fffffffULL,
7468                               __scale_tsc(kvm_max_tsc_scaling_ratio, tsc_khz));
7469                 kvm_max_guest_tsc_khz = max;
7470
7471                 kvm_default_tsc_scaling_ratio = 1ULL << kvm_tsc_scaling_ratio_frac_bits;
7472         }
7473
7474         kvm_init_msr_list();
7475         return 0;
7476 }
7477
7478 void kvm_arch_hardware_unsetup(void)
7479 {
7480         kvm_x86_ops->hardware_unsetup();
7481 }
7482
7483 void kvm_arch_check_processor_compat(void *rtn)
7484 {
7485         kvm_x86_ops->check_processor_compatibility(rtn);
7486 }
7487
7488 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu)
7489 {
7490         return vcpu->kvm->arch.bsp_vcpu_id == vcpu->vcpu_id;
7491 }
7492 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp);
7493
7494 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu)
7495 {
7496         return (vcpu->arch.apic_base & MSR_IA32_APICBASE_BSP) != 0;
7497 }
7498
7499 bool kvm_vcpu_compatible(struct kvm_vcpu *vcpu)
7500 {
7501         return irqchip_in_kernel(vcpu->kvm) == lapic_in_kernel(vcpu);
7502 }
7503
7504 struct static_key kvm_no_apic_vcpu __read_mostly;
7505
7506 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
7507 {
7508         struct page *page;
7509         struct kvm *kvm;
7510         int r;
7511
7512         BUG_ON(vcpu->kvm == NULL);
7513         kvm = vcpu->kvm;
7514
7515         vcpu->arch.pv.pv_unhalted = false;
7516         vcpu->arch.emulate_ctxt.ops = &emulate_ops;
7517         if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_reset_bsp(vcpu))
7518                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
7519         else
7520                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
7521
7522         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
7523         if (!page) {
7524                 r = -ENOMEM;
7525                 goto fail;
7526         }
7527         vcpu->arch.pio_data = page_address(page);
7528
7529         kvm_set_tsc_khz(vcpu, max_tsc_khz);
7530
7531         r = kvm_mmu_create(vcpu);
7532         if (r < 0)
7533                 goto fail_free_pio_data;
7534
7535         if (irqchip_in_kernel(kvm)) {
7536                 r = kvm_create_lapic(vcpu);
7537                 if (r < 0)
7538                         goto fail_mmu_destroy;
7539         } else
7540                 static_key_slow_inc(&kvm_no_apic_vcpu);
7541
7542         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
7543                                        GFP_KERNEL);
7544         if (!vcpu->arch.mce_banks) {
7545                 r = -ENOMEM;
7546                 goto fail_free_lapic;
7547         }
7548         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
7549
7550         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask, GFP_KERNEL)) {
7551                 r = -ENOMEM;
7552                 goto fail_free_mce_banks;
7553         }
7554
7555         fx_init(vcpu);
7556
7557         vcpu->arch.ia32_tsc_adjust_msr = 0x0;
7558         vcpu->arch.pv_time_enabled = false;
7559
7560         vcpu->arch.guest_supported_xcr0 = 0;
7561         vcpu->arch.guest_xstate_size = XSAVE_HDR_SIZE + XSAVE_HDR_OFFSET;
7562
7563         vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu);
7564
7565         vcpu->arch.pat = MSR_IA32_CR_PAT_DEFAULT;
7566
7567         kvm_async_pf_hash_reset(vcpu);
7568         kvm_pmu_init(vcpu);
7569
7570         vcpu->arch.pending_external_vector = -1;
7571
7572         return 0;
7573
7574 fail_free_mce_banks:
7575         kfree(vcpu->arch.mce_banks);
7576 fail_free_lapic:
7577         kvm_free_lapic(vcpu);
7578 fail_mmu_destroy:
7579         kvm_mmu_destroy(vcpu);
7580 fail_free_pio_data:
7581         free_page((unsigned long)vcpu->arch.pio_data);
7582 fail:
7583         return r;
7584 }
7585
7586 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
7587 {
7588         int idx;
7589
7590         kvm_pmu_destroy(vcpu);
7591         kfree(vcpu->arch.mce_banks);
7592         kvm_free_lapic(vcpu);
7593         idx = srcu_read_lock(&vcpu->kvm->srcu);
7594         kvm_mmu_destroy(vcpu);
7595         srcu_read_unlock(&vcpu->kvm->srcu, idx);
7596         free_page((unsigned long)vcpu->arch.pio_data);
7597         if (!lapic_in_kernel(vcpu))
7598                 static_key_slow_dec(&kvm_no_apic_vcpu);
7599 }
7600
7601 void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu)
7602 {
7603         kvm_x86_ops->sched_in(vcpu, cpu);
7604 }
7605
7606 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
7607 {
7608         if (type)
7609                 return -EINVAL;
7610
7611         INIT_HLIST_HEAD(&kvm->arch.mask_notifier_list);
7612         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
7613         INIT_LIST_HEAD(&kvm->arch.zapped_obsolete_pages);
7614         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
7615         atomic_set(&kvm->arch.noncoherent_dma_count, 0);
7616
7617         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
7618         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
7619         /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
7620         set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID,
7621                 &kvm->arch.irq_sources_bitmap);
7622
7623         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
7624         mutex_init(&kvm->arch.apic_map_lock);
7625         spin_lock_init(&kvm->arch.pvclock_gtod_sync_lock);
7626
7627         pvclock_update_vm_gtod_copy(kvm);
7628
7629         INIT_DELAYED_WORK(&kvm->arch.kvmclock_update_work, kvmclock_update_fn);
7630         INIT_DELAYED_WORK(&kvm->arch.kvmclock_sync_work, kvmclock_sync_fn);
7631
7632         return 0;
7633 }
7634
7635 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
7636 {
7637         int r;
7638         r = vcpu_load(vcpu);
7639         BUG_ON(r);
7640         kvm_mmu_unload(vcpu);
7641         vcpu_put(vcpu);
7642 }
7643
7644 static void kvm_free_vcpus(struct kvm *kvm)
7645 {
7646         unsigned int i;
7647         struct kvm_vcpu *vcpu;
7648
7649         /*
7650          * Unpin any mmu pages first.
7651          */
7652         kvm_for_each_vcpu(i, vcpu, kvm) {
7653                 kvm_clear_async_pf_completion_queue(vcpu);
7654                 kvm_unload_vcpu_mmu(vcpu);
7655         }
7656         kvm_for_each_vcpu(i, vcpu, kvm)
7657                 kvm_arch_vcpu_free(vcpu);
7658
7659         mutex_lock(&kvm->lock);
7660         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
7661                 kvm->vcpus[i] = NULL;
7662
7663         atomic_set(&kvm->online_vcpus, 0);
7664         mutex_unlock(&kvm->lock);
7665 }
7666
7667 void kvm_arch_sync_events(struct kvm *kvm)
7668 {
7669         cancel_delayed_work_sync(&kvm->arch.kvmclock_sync_work);
7670         cancel_delayed_work_sync(&kvm->arch.kvmclock_update_work);
7671         kvm_free_all_assigned_devices(kvm);
7672         kvm_free_pit(kvm);
7673 }
7674
7675 int __x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size)
7676 {
7677         int i, r;
7678         unsigned long hva;
7679         struct kvm_memslots *slots = kvm_memslots(kvm);
7680         struct kvm_memory_slot *slot, old;
7681
7682         /* Called with kvm->slots_lock held.  */
7683         if (WARN_ON(id >= KVM_MEM_SLOTS_NUM))
7684                 return -EINVAL;
7685
7686         slot = id_to_memslot(slots, id);
7687         if (size) {
7688                 if (WARN_ON(slot->npages))
7689                         return -EEXIST;
7690
7691                 /*
7692                  * MAP_SHARED to prevent internal slot pages from being moved
7693                  * by fork()/COW.
7694                  */
7695                 hva = vm_mmap(NULL, 0, size, PROT_READ | PROT_WRITE,
7696                               MAP_SHARED | MAP_ANONYMOUS, 0);
7697                 if (IS_ERR((void *)hva))
7698                         return PTR_ERR((void *)hva);
7699         } else {
7700                 if (!slot->npages)
7701                         return 0;
7702
7703                 hva = 0;
7704         }
7705
7706         old = *slot;
7707         for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
7708                 struct kvm_userspace_memory_region m;
7709
7710                 m.slot = id | (i << 16);
7711                 m.flags = 0;
7712                 m.guest_phys_addr = gpa;
7713                 m.userspace_addr = hva;
7714                 m.memory_size = size;
7715                 r = __kvm_set_memory_region(kvm, &m);
7716                 if (r < 0)
7717                         return r;
7718         }
7719
7720         if (!size) {
7721                 r = vm_munmap(old.userspace_addr, old.npages * PAGE_SIZE);
7722                 WARN_ON(r < 0);
7723         }
7724
7725         return 0;
7726 }
7727 EXPORT_SYMBOL_GPL(__x86_set_memory_region);
7728
7729 int x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size)
7730 {
7731         int r;
7732
7733         mutex_lock(&kvm->slots_lock);
7734         r = __x86_set_memory_region(kvm, id, gpa, size);
7735         mutex_unlock(&kvm->slots_lock);
7736
7737         return r;
7738 }
7739 EXPORT_SYMBOL_GPL(x86_set_memory_region);
7740
7741 void kvm_arch_destroy_vm(struct kvm *kvm)
7742 {
7743         if (current->mm == kvm->mm) {
7744                 /*
7745                  * Free memory regions allocated on behalf of userspace,
7746                  * unless the the memory map has changed due to process exit
7747                  * or fd copying.
7748                  */
7749                 x86_set_memory_region(kvm, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT, 0, 0);
7750                 x86_set_memory_region(kvm, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT, 0, 0);
7751                 x86_set_memory_region(kvm, TSS_PRIVATE_MEMSLOT, 0, 0);
7752         }
7753         kvm_iommu_unmap_guest(kvm);
7754         kfree(kvm->arch.vpic);
7755         kfree(kvm->arch.vioapic);
7756         kvm_free_vcpus(kvm);
7757         kfree(rcu_dereference_check(kvm->arch.apic_map, 1));
7758 }
7759
7760 void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *free,
7761                            struct kvm_memory_slot *dont)
7762 {
7763         int i;
7764
7765         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
7766                 if (!dont || free->arch.rmap[i] != dont->arch.rmap[i]) {
7767                         kvfree(free->arch.rmap[i]);
7768                         free->arch.rmap[i] = NULL;
7769                 }
7770                 if (i == 0)
7771                         continue;
7772
7773                 if (!dont || free->arch.lpage_info[i - 1] !=
7774                              dont->arch.lpage_info[i - 1]) {
7775                         kvfree(free->arch.lpage_info[i - 1]);
7776                         free->arch.lpage_info[i - 1] = NULL;
7777                 }
7778         }
7779 }
7780
7781 int kvm_arch_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot,
7782                             unsigned long npages)
7783 {
7784         int i;
7785
7786         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
7787                 unsigned long ugfn;
7788                 int lpages;
7789                 int level = i + 1;
7790
7791                 lpages = gfn_to_index(slot->base_gfn + npages - 1,
7792                                       slot->base_gfn, level) + 1;
7793
7794                 slot->arch.rmap[i] =
7795                         kvm_kvzalloc(lpages * sizeof(*slot->arch.rmap[i]));
7796                 if (!slot->arch.rmap[i])
7797                         goto out_free;
7798                 if (i == 0)
7799                         continue;
7800
7801                 slot->arch.lpage_info[i - 1] = kvm_kvzalloc(lpages *
7802                                         sizeof(*slot->arch.lpage_info[i - 1]));
7803                 if (!slot->arch.lpage_info[i - 1])
7804                         goto out_free;
7805
7806                 if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
7807                         slot->arch.lpage_info[i - 1][0].write_count = 1;
7808                 if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
7809                         slot->arch.lpage_info[i - 1][lpages - 1].write_count = 1;
7810                 ugfn = slot->userspace_addr >> PAGE_SHIFT;
7811                 /*
7812                  * If the gfn and userspace address are not aligned wrt each
7813                  * other, or if explicitly asked to, disable large page
7814                  * support for this slot
7815                  */
7816                 if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1) ||
7817                     !kvm_largepages_enabled()) {
7818                         unsigned long j;
7819
7820                         for (j = 0; j < lpages; ++j)
7821                                 slot->arch.lpage_info[i - 1][j].write_count = 1;
7822                 }
7823         }
7824
7825         return 0;
7826
7827 out_free:
7828         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
7829                 kvfree(slot->arch.rmap[i]);
7830                 slot->arch.rmap[i] = NULL;
7831                 if (i == 0)
7832                         continue;
7833
7834                 kvfree(slot->arch.lpage_info[i - 1]);
7835                 slot->arch.lpage_info[i - 1] = NULL;
7836         }
7837         return -ENOMEM;
7838 }
7839
7840 void kvm_arch_memslots_updated(struct kvm *kvm, struct kvm_memslots *slots)
7841 {
7842         /*
7843          * memslots->generation has been incremented.
7844          * mmio generation may have reached its maximum value.
7845          */
7846         kvm_mmu_invalidate_mmio_sptes(kvm, slots);
7847 }
7848
7849 int kvm_arch_prepare_memory_region(struct kvm *kvm,
7850                                 struct kvm_memory_slot *memslot,
7851                                 const struct kvm_userspace_memory_region *mem,
7852                                 enum kvm_mr_change change)
7853 {
7854         return 0;
7855 }
7856
7857 static void kvm_mmu_slot_apply_flags(struct kvm *kvm,
7858                                      struct kvm_memory_slot *new)
7859 {
7860         /* Still write protect RO slot */
7861         if (new->flags & KVM_MEM_READONLY) {
7862                 kvm_mmu_slot_remove_write_access(kvm, new);
7863                 return;
7864         }
7865
7866         /*
7867          * Call kvm_x86_ops dirty logging hooks when they are valid.
7868          *
7869          * kvm_x86_ops->slot_disable_log_dirty is called when:
7870          *
7871          *  - KVM_MR_CREATE with dirty logging is disabled
7872          *  - KVM_MR_FLAGS_ONLY with dirty logging is disabled in new flag
7873          *
7874          * The reason is, in case of PML, we need to set D-bit for any slots
7875          * with dirty logging disabled in order to eliminate unnecessary GPA
7876          * logging in PML buffer (and potential PML buffer full VMEXT). This
7877          * guarantees leaving PML enabled during guest's lifetime won't have
7878          * any additonal overhead from PML when guest is running with dirty
7879          * logging disabled for memory slots.
7880          *
7881          * kvm_x86_ops->slot_enable_log_dirty is called when switching new slot
7882          * to dirty logging mode.
7883          *
7884          * If kvm_x86_ops dirty logging hooks are invalid, use write protect.
7885          *
7886          * In case of write protect:
7887          *
7888          * Write protect all pages for dirty logging.
7889          *
7890          * All the sptes including the large sptes which point to this
7891          * slot are set to readonly. We can not create any new large
7892          * spte on this slot until the end of the logging.
7893          *
7894          * See the comments in fast_page_fault().
7895          */
7896         if (new->flags & KVM_MEM_LOG_DIRTY_PAGES) {
7897                 if (kvm_x86_ops->slot_enable_log_dirty)
7898                         kvm_x86_ops->slot_enable_log_dirty(kvm, new);
7899                 else
7900                         kvm_mmu_slot_remove_write_access(kvm, new);
7901         } else {
7902                 if (kvm_x86_ops->slot_disable_log_dirty)
7903                         kvm_x86_ops->slot_disable_log_dirty(kvm, new);
7904         }
7905 }
7906
7907 void kvm_arch_commit_memory_region(struct kvm *kvm,
7908                                 const struct kvm_userspace_memory_region *mem,
7909                                 const struct kvm_memory_slot *old,
7910                                 const struct kvm_memory_slot *new,
7911                                 enum kvm_mr_change change)
7912 {
7913         int nr_mmu_pages = 0;
7914
7915         if (!kvm->arch.n_requested_mmu_pages)
7916                 nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
7917
7918         if (nr_mmu_pages)
7919                 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
7920
7921         /*
7922          * Dirty logging tracks sptes in 4k granularity, meaning that large
7923          * sptes have to be split.  If live migration is successful, the guest
7924          * in the source machine will be destroyed and large sptes will be
7925          * created in the destination. However, if the guest continues to run
7926          * in the source machine (for example if live migration fails), small
7927          * sptes will remain around and cause bad performance.
7928          *
7929          * Scan sptes if dirty logging has been stopped, dropping those
7930          * which can be collapsed into a single large-page spte.  Later
7931          * page faults will create the large-page sptes.
7932          */
7933         if ((change != KVM_MR_DELETE) &&
7934                 (old->flags & KVM_MEM_LOG_DIRTY_PAGES) &&
7935                 !(new->flags & KVM_MEM_LOG_DIRTY_PAGES))
7936                 kvm_mmu_zap_collapsible_sptes(kvm, new);
7937
7938         /*
7939          * Set up write protection and/or dirty logging for the new slot.
7940          *
7941          * For KVM_MR_DELETE and KVM_MR_MOVE, the shadow pages of old slot have
7942          * been zapped so no dirty logging staff is needed for old slot. For
7943          * KVM_MR_FLAGS_ONLY, the old slot is essentially the same one as the
7944          * new and it's also covered when dealing with the new slot.
7945          *
7946          * FIXME: const-ify all uses of struct kvm_memory_slot.
7947          */
7948         if (change != KVM_MR_DELETE)
7949                 kvm_mmu_slot_apply_flags(kvm, (struct kvm_memory_slot *) new);
7950 }
7951
7952 void kvm_arch_flush_shadow_all(struct kvm *kvm)
7953 {
7954         kvm_mmu_invalidate_zap_all_pages(kvm);
7955 }
7956
7957 void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
7958                                    struct kvm_memory_slot *slot)
7959 {
7960         kvm_mmu_invalidate_zap_all_pages(kvm);
7961 }
7962
7963 static inline bool kvm_vcpu_has_events(struct kvm_vcpu *vcpu)
7964 {
7965         if (!list_empty_careful(&vcpu->async_pf.done))
7966                 return true;
7967
7968         if (kvm_apic_has_events(vcpu))
7969                 return true;
7970
7971         if (vcpu->arch.pv.pv_unhalted)
7972                 return true;
7973
7974         if (atomic_read(&vcpu->arch.nmi_queued))
7975                 return true;
7976
7977         if (test_bit(KVM_REQ_SMI, &vcpu->requests))
7978                 return true;
7979
7980         if (kvm_arch_interrupt_allowed(vcpu) &&
7981             kvm_cpu_has_interrupt(vcpu))
7982                 return true;
7983
7984         return false;
7985 }
7986
7987 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
7988 {
7989         if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events)
7990                 kvm_x86_ops->check_nested_events(vcpu, false);
7991
7992         return kvm_vcpu_running(vcpu) || kvm_vcpu_has_events(vcpu);
7993 }
7994
7995 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
7996 {
7997         return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
7998 }
7999
8000 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
8001 {
8002         return kvm_x86_ops->interrupt_allowed(vcpu);
8003 }
8004
8005 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu)
8006 {
8007         if (is_64_bit_mode(vcpu))
8008                 return kvm_rip_read(vcpu);
8009         return (u32)(get_segment_base(vcpu, VCPU_SREG_CS) +
8010                      kvm_rip_read(vcpu));
8011 }
8012 EXPORT_SYMBOL_GPL(kvm_get_linear_rip);
8013
8014 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
8015 {
8016         return kvm_get_linear_rip(vcpu) == linear_rip;
8017 }
8018 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
8019
8020 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
8021 {
8022         unsigned long rflags;
8023
8024         rflags = kvm_x86_ops->get_rflags(vcpu);
8025         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
8026                 rflags &= ~X86_EFLAGS_TF;
8027         return rflags;
8028 }
8029 EXPORT_SYMBOL_GPL(kvm_get_rflags);
8030
8031 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
8032 {
8033         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
8034             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
8035                 rflags |= X86_EFLAGS_TF;
8036         kvm_x86_ops->set_rflags(vcpu, rflags);
8037 }
8038
8039 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
8040 {
8041         __kvm_set_rflags(vcpu, rflags);
8042         kvm_make_request(KVM_REQ_EVENT, vcpu);
8043 }
8044 EXPORT_SYMBOL_GPL(kvm_set_rflags);
8045
8046 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
8047 {
8048         int r;
8049
8050         if ((vcpu->arch.mmu.direct_map != work->arch.direct_map) ||
8051               work->wakeup_all)
8052                 return;
8053
8054         r = kvm_mmu_reload(vcpu);
8055         if (unlikely(r))
8056                 return;
8057
8058         if (!vcpu->arch.mmu.direct_map &&
8059               work->arch.cr3 != vcpu->arch.mmu.get_cr3(vcpu))
8060                 return;
8061
8062         vcpu->arch.mmu.page_fault(vcpu, work->gva, 0, true);
8063 }
8064
8065 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
8066 {
8067         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
8068 }
8069
8070 static inline u32 kvm_async_pf_next_probe(u32 key)
8071 {
8072         return (key + 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU) - 1);
8073 }
8074
8075 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
8076 {
8077         u32 key = kvm_async_pf_hash_fn(gfn);
8078
8079         while (vcpu->arch.apf.gfns[key] != ~0)
8080                 key = kvm_async_pf_next_probe(key);
8081
8082         vcpu->arch.apf.gfns[key] = gfn;
8083 }
8084
8085 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
8086 {
8087         int i;
8088         u32 key = kvm_async_pf_hash_fn(gfn);
8089
8090         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU) &&
8091                      (vcpu->arch.apf.gfns[key] != gfn &&
8092                       vcpu->arch.apf.gfns[key] != ~0); i++)
8093                 key = kvm_async_pf_next_probe(key);
8094
8095         return key;
8096 }
8097
8098 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
8099 {
8100         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
8101 }
8102
8103 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
8104 {
8105         u32 i, j, k;
8106
8107         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
8108         while (true) {
8109                 vcpu->arch.apf.gfns[i] = ~0;
8110                 do {
8111                         j = kvm_async_pf_next_probe(j);
8112                         if (vcpu->arch.apf.gfns[j] == ~0)
8113                                 return;
8114                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
8115                         /*
8116                          * k lies cyclically in ]i,j]
8117                          * |    i.k.j |
8118                          * |....j i.k.| or  |.k..j i...|
8119                          */
8120                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
8121                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
8122                 i = j;
8123         }
8124 }
8125
8126 static int apf_put_user(struct kvm_vcpu *vcpu, u32 val)
8127 {
8128
8129         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &val,
8130                                       sizeof(val));
8131 }
8132
8133 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
8134                                      struct kvm_async_pf *work)
8135 {
8136         struct x86_exception fault;
8137
8138         trace_kvm_async_pf_not_present(work->arch.token, work->gva);
8139         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
8140
8141         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) ||
8142             (vcpu->arch.apf.send_user_only &&
8143              kvm_x86_ops->get_cpl(vcpu) == 0))
8144                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
8145         else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_NOT_PRESENT)) {
8146                 fault.vector = PF_VECTOR;
8147                 fault.error_code_valid = true;
8148                 fault.error_code = 0;
8149                 fault.nested_page_fault = false;
8150                 fault.address = work->arch.token;
8151                 kvm_inject_page_fault(vcpu, &fault);
8152         }
8153 }
8154
8155 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
8156                                  struct kvm_async_pf *work)
8157 {
8158         struct x86_exception fault;
8159
8160         trace_kvm_async_pf_ready(work->arch.token, work->gva);
8161         if (work->wakeup_all)
8162                 work->arch.token = ~0; /* broadcast wakeup */
8163         else
8164                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
8165
8166         if ((vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) &&
8167             !apf_put_user(vcpu, KVM_PV_REASON_PAGE_READY)) {
8168                 fault.vector = PF_VECTOR;
8169                 fault.error_code_valid = true;
8170                 fault.error_code = 0;
8171                 fault.nested_page_fault = false;
8172                 fault.address = work->arch.token;
8173                 kvm_inject_page_fault(vcpu, &fault);
8174         }
8175         vcpu->arch.apf.halted = false;
8176         vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
8177 }
8178
8179 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu)
8180 {
8181         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED))
8182                 return true;
8183         else
8184                 return !kvm_event_needs_reinjection(vcpu) &&
8185                         kvm_x86_ops->interrupt_allowed(vcpu);
8186 }
8187
8188 void kvm_arch_start_assignment(struct kvm *kvm)
8189 {
8190         atomic_inc(&kvm->arch.assigned_device_count);
8191 }
8192 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment);
8193
8194 void kvm_arch_end_assignment(struct kvm *kvm)
8195 {
8196         atomic_dec(&kvm->arch.assigned_device_count);
8197 }
8198 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment);
8199
8200 bool kvm_arch_has_assigned_device(struct kvm *kvm)
8201 {
8202         return atomic_read(&kvm->arch.assigned_device_count);
8203 }
8204 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device);
8205
8206 void kvm_arch_register_noncoherent_dma(struct kvm *kvm)
8207 {
8208         atomic_inc(&kvm->arch.noncoherent_dma_count);
8209 }
8210 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma);
8211
8212 void kvm_arch_unregister_noncoherent_dma(struct kvm *kvm)
8213 {
8214         atomic_dec(&kvm->arch.noncoherent_dma_count);
8215 }
8216 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma);
8217
8218 bool kvm_arch_has_noncoherent_dma(struct kvm *kvm)
8219 {
8220         return atomic_read(&kvm->arch.noncoherent_dma_count);
8221 }
8222 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma);
8223
8224 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer *cons,
8225                                       struct irq_bypass_producer *prod)
8226 {
8227         struct kvm_kernel_irqfd *irqfd =
8228                 container_of(cons, struct kvm_kernel_irqfd, consumer);
8229
8230         if (kvm_x86_ops->update_pi_irte) {
8231                 irqfd->producer = prod;
8232                 return kvm_x86_ops->update_pi_irte(irqfd->kvm,
8233                                 prod->irq, irqfd->gsi, 1);
8234         }
8235
8236         return -EINVAL;
8237 }
8238
8239 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer *cons,
8240                                       struct irq_bypass_producer *prod)
8241 {
8242         int ret;
8243         struct kvm_kernel_irqfd *irqfd =
8244                 container_of(cons, struct kvm_kernel_irqfd, consumer);
8245
8246         if (!kvm_x86_ops->update_pi_irte) {
8247                 WARN_ON(irqfd->producer != NULL);
8248                 return;
8249         }
8250
8251         WARN_ON(irqfd->producer != prod);
8252         irqfd->producer = NULL;
8253
8254         /*
8255          * When producer of consumer is unregistered, we change back to
8256          * remapped mode, so we can re-use the current implementation
8257          * when the irq is masked/disabed or the consumer side (KVM
8258          * int this case doesn't want to receive the interrupts.
8259         */
8260         ret = kvm_x86_ops->update_pi_irte(irqfd->kvm, prod->irq, irqfd->gsi, 0);
8261         if (ret)
8262                 printk(KERN_INFO "irq bypass consumer (token %p) unregistration"
8263                        " fails: %d\n", irqfd->consumer.token, ret);
8264 }
8265
8266 int kvm_arch_update_irqfd_routing(struct kvm *kvm, unsigned int host_irq,
8267                                    uint32_t guest_irq, bool set)
8268 {
8269         if (!kvm_x86_ops->update_pi_irte)
8270                 return -EINVAL;
8271
8272         return kvm_x86_ops->update_pi_irte(kvm, host_irq, guest_irq, set);
8273 }
8274
8275 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
8276 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio);
8277 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
8278 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
8279 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
8280 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
8281 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
8282 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
8283 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
8284 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
8285 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
8286 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
8287 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);
8288 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset);
8289 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window);
8290 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full);
8291 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update);