arch/x86/kvm/x86.c

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * derived from drivers/kvm/kvm_main.c
   5  *
   6  * Copyright (C) 2006 Qumranet, Inc.
   7  * Copyright (C) 2008 Qumranet, Inc.
   8  * Copyright IBM Corporation, 2008
   9  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  10  *
  11  * Authors:
  12  *   Avi Kivity   <avi@qumranet.com>
  13  *   Yaniv Kamay  <yaniv@qumranet.com>
  14  *   Amit Shah    <amit.shah@qumranet.com>
  15  *   Ben-Ami Yassour <benami@il.ibm.com>
  16  *
  17  * This work is licensed under the terms of the GNU GPL, version 2.  See
  18  * the COPYING file in the top-level directory.
  19  *
  20  */
  21
  22 #include <linux/kvm_host.h>
  23 #include "irq.h"
  24 #include "mmu.h"
  25 #include "i8254.h"
  26 #include "tss.h"
  27 #include "kvm_cache_regs.h"
  28 #include "x86.h"
  29 #include "cpuid.h"
  30 #include "assigned-dev.h"
  31 #include "pmu.h"
  32 #include "hyperv.h"
  33
  34 #include <linux/clocksource.h>
  35 #include <linux/interrupt.h>
  36 #include <linux/kvm.h>
  37 #include <linux/fs.h>
  38 #include <linux/vmalloc.h>
  39 #include <linux/module.h>
  40 #include <linux/mman.h>
  41 #include <linux/highmem.h>
  42 #include <linux/iommu.h>
  43 #include <linux/intel-iommu.h>
  44 #include <linux/cpufreq.h>
  45 #include <linux/user-return-notifier.h>
  46 #include <linux/srcu.h>
  47 #include <linux/slab.h>
  48 #include <linux/perf_event.h>
  49 #include <linux/uaccess.h>
  50 #include <linux/hash.h>
  51 #include <linux/pci.h>
  52 #include <linux/timekeeper_internal.h>
  53 #include <linux/pvclock_gtod.h>
  54 #include <linux/kvm_irqfd.h>
  55 #include <linux/irqbypass.h>
  56 #include <trace/events/kvm.h>
  57
  58 #define CREATE_TRACE_POINTS
  59 #include "trace.h"
  60
  61 #include <asm/debugreg.h>
  62 #include <asm/msr.h>
  63 #include <asm/desc.h>
  64 #include <asm/mce.h>
  65 #include <linux/kernel_stat.h>
  66 #include <asm/fpu/internal.h> /* Ugh! */
  67 #include <asm/pvclock.h>
  68 #include <asm/div64.h>
  69 #include <asm/irq_remapping.h>
  70
  71 #define MAX_IO_MSRS 256
  72 #define KVM_MAX_MCE_BANKS 32
  73 #define KVM_MCE_CAP_SUPPORTED (MCG_CTL_P | MCG_SER_P)
  74
  75 #define emul_to_vcpu(ctxt) \
  76         container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
  77
  78 /* EFER defaults:
  79  * - enable syscall per default because its emulated by KVM
  80  * - enable LME and LMA per default on 64 bit KVM
  81  */
  82 #ifdef CONFIG_X86_64
  83 static
  84 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
  85 #else
  86 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
  87 #endif
  88
  89 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
  90 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
  91
  92 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
  93 static void process_nmi(struct kvm_vcpu *vcpu);
  94 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
  95
  96 struct kvm_x86_ops *kvm_x86_ops __read_mostly;
  97 EXPORT_SYMBOL_GPL(kvm_x86_ops);
  98
  99 static bool __read_mostly ignore_msrs = 0;
 100 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
 101
 102 unsigned int min_timer_period_us = 500;
 103 module_param(min_timer_period_us, uint, S_IRUGO | S_IWUSR);
 104
 105 static bool __read_mostly kvmclock_periodic_sync = true;
 106 module_param(kvmclock_periodic_sync, bool, S_IRUGO);
 107
 108 bool __read_mostly kvm_has_tsc_control;
 109 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
 110 u32  __read_mostly kvm_max_guest_tsc_khz;
 111 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
 112 u8   __read_mostly kvm_tsc_scaling_ratio_frac_bits;
 113 EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits);
 114 u64  __read_mostly kvm_max_tsc_scaling_ratio;
 115 EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio);
 116 static u64 __read_mostly kvm_default_tsc_scaling_ratio;
 117
 118 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
 119 static u32 __read_mostly tsc_tolerance_ppm = 250;
 120 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
 121
 122 /* lapic timer advance (tscdeadline mode only) in nanoseconds */
 123 unsigned int __read_mostly lapic_timer_advance_ns = 0;
 124 module_param(lapic_timer_advance_ns, uint, S_IRUGO | S_IWUSR);
 125
 126 static bool __read_mostly backwards_tsc_observed = false;
 127
 128 #define KVM_NR_SHARED_MSRS 16
 129
 130 struct kvm_shared_msrs_global {
 131         int nr;
 132         u32 msrs[KVM_NR_SHARED_MSRS];
 133 };
 134
 135 struct kvm_shared_msrs {
 136         struct user_return_notifier urn;
 137         bool registered;
 138         struct kvm_shared_msr_values {
 139                 u64 host;
 140                 u64 curr;
 141         } values[KVM_NR_SHARED_MSRS];
 142 };
 143
 144 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
 145 static struct kvm_shared_msrs __percpu *shared_msrs;
 146
 147 struct kvm_stats_debugfs_item debugfs_entries[] = {
 148         { "pf_fixed", VCPU_STAT(pf_fixed) },
 149         { "pf_guest", VCPU_STAT(pf_guest) },
 150         { "tlb_flush", VCPU_STAT(tlb_flush) },
 151         { "invlpg", VCPU_STAT(invlpg) },
 152         { "exits", VCPU_STAT(exits) },
 153         { "io_exits", VCPU_STAT(io_exits) },
 154         { "mmio_exits", VCPU_STAT(mmio_exits) },
 155         { "signal_exits", VCPU_STAT(signal_exits) },
 156         { "irq_window", VCPU_STAT(irq_window_exits) },
 157         { "nmi_window", VCPU_STAT(nmi_window_exits) },
 158         { "halt_exits", VCPU_STAT(halt_exits) },
 159         { "halt_successful_poll", VCPU_STAT(halt_successful_poll) },
 160         { "halt_attempted_poll", VCPU_STAT(halt_attempted_poll) },
 161         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
 162         { "hypercalls", VCPU_STAT(hypercalls) },
 163         { "request_irq", VCPU_STAT(request_irq_exits) },
 164         { "irq_exits", VCPU_STAT(irq_exits) },
 165         { "host_state_reload", VCPU_STAT(host_state_reload) },
 166         { "efer_reload", VCPU_STAT(efer_reload) },
 167         { "fpu_reload", VCPU_STAT(fpu_reload) },
 168         { "insn_emulation", VCPU_STAT(insn_emulation) },
 169         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
 170         { "irq_injections", VCPU_STAT(irq_injections) },
 171         { "nmi_injections", VCPU_STAT(nmi_injections) },
 172         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
 173         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
 174         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
 175         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
 176         { "mmu_flooded", VM_STAT(mmu_flooded) },
 177         { "mmu_recycled", VM_STAT(mmu_recycled) },
 178         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
 179         { "mmu_unsync", VM_STAT(mmu_unsync) },
 180         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
 181         { "largepages", VM_STAT(lpages) },
 182         { NULL }
 183 };
 184
 185 u64 __read_mostly host_xcr0;
 186
 187 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
 188
 189 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 190 {
 191         int i;
 192         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU); i++)
 193                 vcpu->arch.apf.gfns[i] = ~0;
 194 }
 195
 196 static void kvm_on_user_return(struct user_return_notifier *urn)
 197 {
 198         unsigned slot;
 199         struct kvm_shared_msrs *locals
 200                 = container_of(urn, struct kvm_shared_msrs, urn);
 201         struct kvm_shared_msr_values *values;
 202
 203         for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
 204                 values = &locals->values[slot];
 205                 if (values->host != values->curr) {
 206                         wrmsrl(shared_msrs_global.msrs[slot], values->host);
 207                         values->curr = values->host;
 208                 }
 209         }
 210         locals->registered = false;
 211         user_return_notifier_unregister(urn);
 212 }
 213
 214 static void shared_msr_update(unsigned slot, u32 msr)
 215 {
 216         u64 value;
 217         unsigned int cpu = smp_processor_id();
 218         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 219
 220         /* only read, and nobody should modify it at this time,
 221          * so don't need lock */
 222         if (slot >= shared_msrs_global.nr) {
 223                 printk(KERN_ERR "kvm: invalid MSR slot!");
 224                 return;
 225         }
 226         rdmsrl_safe(msr, &value);
 227         smsr->values[slot].host = value;
 228         smsr->values[slot].curr = value;
 229 }
 230
 231 void kvm_define_shared_msr(unsigned slot, u32 msr)
 232 {
 233         BUG_ON(slot >= KVM_NR_SHARED_MSRS);
 234         shared_msrs_global.msrs[slot] = msr;
 235         if (slot >= shared_msrs_global.nr)
 236                 shared_msrs_global.nr = slot + 1;
 237 }
 238 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
 239
 240 static void kvm_shared_msr_cpu_online(void)
 241 {
 242         unsigned i;
 243
 244         for (i = 0; i < shared_msrs_global.nr; ++i)
 245                 shared_msr_update(i, shared_msrs_global.msrs[i]);
 246 }
 247
 248 int kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
 249 {
 250         unsigned int cpu = smp_processor_id();
 251         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 252         int err;
 253
 254         if (((value ^ smsr->values[slot].curr) & mask) == 0)
 255                 return 0;
 256         smsr->values[slot].curr = value;
 257         err = wrmsrl_safe(shared_msrs_global.msrs[slot], value);
 258         if (err)
 259                 return 1;
 260
 261         if (!smsr->registered) {
 262                 smsr->urn.on_user_return = kvm_on_user_return;
 263                 user_return_notifier_register(&smsr->urn);
 264                 smsr->registered = true;
 265         }
 266         return 0;
 267 }
 268 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
 269
 270 static void drop_user_return_notifiers(void)
 271 {
 272         unsigned int cpu = smp_processor_id();
 273         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 274
 275         if (smsr->registered)
 276                 kvm_on_user_return(&smsr->urn);
 277 }
 278
 279 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 280 {
 281         return vcpu->arch.apic_base;
 282 }
 283 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 284
 285 int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
 286 {
 287         u64 old_state = vcpu->arch.apic_base &
 288                 (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE);
 289         u64 new_state = msr_info->data &
 290                 (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE);
 291         u64 reserved_bits = ((~0ULL) << cpuid_maxphyaddr(vcpu)) |
 292                 0x2ff | (guest_cpuid_has_x2apic(vcpu) ? 0 : X2APIC_ENABLE);
 293
 294         if (!msr_info->host_initiated &&
 295             ((msr_info->data & reserved_bits) != 0 ||
 296              new_state == X2APIC_ENABLE ||
 297              (new_state == MSR_IA32_APICBASE_ENABLE &&
 298               old_state == (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE)) ||
 299              (new_state == (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE) &&
 300               old_state == 0)))
 301                 return 1;
 302
 303         kvm_lapic_set_base(vcpu, msr_info->data);
 304         return 0;
 305 }
 306 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 307
 308 asmlinkage __visible void kvm_spurious_fault(void)
 309 {
 310         /* Fault while not rebooting.  We want the trace. */
 311         BUG();
 312 }
 313 EXPORT_SYMBOL_GPL(kvm_spurious_fault);
 314
 315 #define EXCPT_BENIGN            0
 316 #define EXCPT_CONTRIBUTORY      1
 317 #define EXCPT_PF                2
 318
 319 static int exception_class(int vector)
 320 {
 321         switch (vector) {
 322         case PF_VECTOR:
 323                 return EXCPT_PF;
 324         case DE_VECTOR:
 325         case TS_VECTOR:
 326         case NP_VECTOR:
 327         case SS_VECTOR:
 328         case GP_VECTOR:
 329                 return EXCPT_CONTRIBUTORY;
 330         default:
 331                 break;
 332         }
 333         return EXCPT_BENIGN;
 334 }
 335
 336 #define EXCPT_FAULT             0
 337 #define EXCPT_TRAP              1
 338 #define EXCPT_ABORT             2
 339 #define EXCPT_INTERRUPT         3
 340
 341 static int exception_type(int vector)
 342 {
 343         unsigned int mask;
 344
 345         if (WARN_ON(vector > 31 || vector == NMI_VECTOR))
 346                 return EXCPT_INTERRUPT;
 347
 348         mask = 1 << vector;
 349
 350         /* #DB is trap, as instruction watchpoints are handled elsewhere */
 351         if (mask & ((1 << DB_VECTOR) | (1 << BP_VECTOR) | (1 << OF_VECTOR)))
 352                 return EXCPT_TRAP;
 353
 354         if (mask & ((1 << DF_VECTOR) | (1 << MC_VECTOR)))
 355                 return EXCPT_ABORT;
 356
 357         /* Reserved exceptions will result in fault */
 358         return EXCPT_FAULT;
 359 }
 360
 361 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 362                 unsigned nr, bool has_error, u32 error_code,
 363                 bool reinject)
 364 {
 365         u32 prev_nr;
 366         int class1, class2;
 367
 368         kvm_make_request(KVM_REQ_EVENT, vcpu);
 369
 370         if (!vcpu->arch.exception.pending) {
 371         queue:
 372                 if (has_error && !is_protmode(vcpu))
 373                         has_error = false;
 374                 vcpu->arch.exception.pending = true;
 375                 vcpu->arch.exception.has_error_code = has_error;
 376                 vcpu->arch.exception.nr = nr;
 377                 vcpu->arch.exception.error_code = error_code;
 378                 vcpu->arch.exception.reinject = reinject;
 379                 return;
 380         }
 381
 382         /* to check exception */
 383         prev_nr = vcpu->arch.exception.nr;
 384         if (prev_nr == DF_VECTOR) {
 385                 /* triple fault -> shutdown */
 386                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 387                 return;
 388         }
 389         class1 = exception_class(prev_nr);
 390         class2 = exception_class(nr);
 391         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 392                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 393                 /* generate double fault per SDM Table 5-5 */
 394                 vcpu->arch.exception.pending = true;
 395                 vcpu->arch.exception.has_error_code = true;
 396                 vcpu->arch.exception.nr = DF_VECTOR;
 397                 vcpu->arch.exception.error_code = 0;
 398         } else
 399                 /* replace previous exception with a new one in a hope
 400                    that instruction re-execution will regenerate lost
 401                    exception */
 402                 goto queue;
 403 }
 404
 405 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 406 {
 407         kvm_multiple_exception(vcpu, nr, false, 0, false);
 408 }
 409 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 410
 411 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 412 {
 413         kvm_multiple_exception(vcpu, nr, false, 0, true);
 414 }
 415 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 416
 417 void kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 418 {
 419         if (err)
 420                 kvm_inject_gp(vcpu, 0);
 421         else
 422                 kvm_x86_ops->skip_emulated_instruction(vcpu);
 423 }
 424 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 425
 426 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 427 {
 428         ++vcpu->stat.pf_guest;
 429         vcpu->arch.cr2 = fault->address;
 430         kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 431 }
 432 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
 433
 434 static bool kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 435 {
 436         if (mmu_is_nested(vcpu) && !fault->nested_page_fault)
 437                 vcpu->arch.nested_mmu.inject_page_fault(vcpu, fault);
 438         else
 439                 vcpu->arch.mmu.inject_page_fault(vcpu, fault);
 440
 441         return fault->nested_page_fault;
 442 }
 443
 444 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 445 {
 446         atomic_inc(&vcpu->arch.nmi_queued);
 447         kvm_make_request(KVM_REQ_NMI, vcpu);
 448 }
 449 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 450
 451 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 452 {
 453         kvm_multiple_exception(vcpu, nr, true, error_code, false);
 454 }
 455 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 456
 457 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 458 {
 459         kvm_multiple_exception(vcpu, nr, true, error_code, true);
 460 }
 461 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 462
 463 /*
 464  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 465  * a #GP and return false.
 466  */
 467 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 468 {
 469         if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
 470                 return true;
 471         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 472         return false;
 473 }
 474 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 475
 476 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr)
 477 {
 478         if ((dr != 4 && dr != 5) || !kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 479                 return true;
 480
 481         kvm_queue_exception(vcpu, UD_VECTOR);
 482         return false;
 483 }
 484 EXPORT_SYMBOL_GPL(kvm_require_dr);
 485
 486 /*
 487  * This function will be used to read from the physical memory of the currently
 488  * running guest. The difference to kvm_vcpu_read_guest_page is that this function
 489  * can read from guest physical or from the guest's guest physical memory.
 490  */
 491 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 492                             gfn_t ngfn, void *data, int offset, int len,
 493                             u32 access)
 494 {
 495         struct x86_exception exception;
 496         gfn_t real_gfn;
 497         gpa_t ngpa;
 498
 499         ngpa     = gfn_to_gpa(ngfn);
 500         real_gfn = mmu->translate_gpa(vcpu, ngpa, access, &exception);
 501         if (real_gfn == UNMAPPED_GVA)
 502                 return -EFAULT;
 503
 504         real_gfn = gpa_to_gfn(real_gfn);
 505
 506         return kvm_vcpu_read_guest_page(vcpu, real_gfn, data, offset, len);
 507 }
 508 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 509
 510 static int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
 511                                void *data, int offset, int len, u32 access)
 512 {
 513         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
 514                                        data, offset, len, access);
 515 }
 516
 517 /*
 518  * Load the pae pdptrs.  Return true is they are all valid.
 519  */
 520 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 521 {
 522         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 523         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 524         int i;
 525         int ret;
 526         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 527
 528         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 529                                       offset * sizeof(u64), sizeof(pdpte),
 530                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 531         if (ret < 0) {
 532                 ret = 0;
 533                 goto out;
 534         }
 535         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 536                 if (is_present_gpte(pdpte[i]) &&
 537                     (pdpte[i] &
 538                      vcpu->arch.mmu.guest_rsvd_check.rsvd_bits_mask[0][2])) {
 539                         ret = 0;
 540                         goto out;
 541                 }
 542         }
 543         ret = 1;
 544
 545         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 546         __set_bit(VCPU_EXREG_PDPTR,
 547                   (unsigned long *)&vcpu->arch.regs_avail);
 548         __set_bit(VCPU_EXREG_PDPTR,
 549                   (unsigned long *)&vcpu->arch.regs_dirty);
 550 out:
 551
 552         return ret;
 553 }
 554 EXPORT_SYMBOL_GPL(load_pdptrs);
 555
 556 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
 557 {
 558         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
 559         bool changed = true;
 560         int offset;
 561         gfn_t gfn;
 562         int r;
 563
 564         if (is_long_mode(vcpu) || !is_pae(vcpu))
 565                 return false;
 566
 567         if (!test_bit(VCPU_EXREG_PDPTR,
 568                       (unsigned long *)&vcpu->arch.regs_avail))
 569                 return true;
 570
 571         gfn = (kvm_read_cr3(vcpu) & ~31u) >> PAGE_SHIFT;
 572         offset = (kvm_read_cr3(vcpu) & ~31u) & (PAGE_SIZE - 1);
 573         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
 574                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
 575         if (r < 0)
 576                 goto out;
 577         changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
 578 out:
 579
 580         return changed;
 581 }
 582
 583 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 584 {
 585         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 586         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP;
 587
 588         cr0 |= X86_CR0_ET;
 589
 590 #ifdef CONFIG_X86_64
 591         if (cr0 & 0xffffffff00000000UL)
 592                 return 1;
 593 #endif
 594
 595         cr0 &= ~CR0_RESERVED_BITS;
 596
 597         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 598                 return 1;
 599
 600         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 601                 return 1;
 602
 603         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
 604 #ifdef CONFIG_X86_64
 605                 if ((vcpu->arch.efer & EFER_LME)) {
 606                         int cs_db, cs_l;
 607
 608                         if (!is_pae(vcpu))
 609                                 return 1;
 610                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
 611                         if (cs_l)
 612                                 return 1;
 613                 } else
 614 #endif
 615                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 616                                                  kvm_read_cr3(vcpu)))
 617                         return 1;
 618         }
 619
 620         if (!(cr0 & X86_CR0_PG) && kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
 621                 return 1;
 622
 623         kvm_x86_ops->set_cr0(vcpu, cr0);
 624
 625         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 626                 kvm_clear_async_pf_completion_queue(vcpu);
 627                 kvm_async_pf_hash_reset(vcpu);
 628         }
 629
 630         if ((cr0 ^ old_cr0) & update_bits)
 631                 kvm_mmu_reset_context(vcpu);
 632
 633         if (((cr0 ^ old_cr0) & X86_CR0_CD) &&
 634             kvm_arch_has_noncoherent_dma(vcpu->kvm) &&
 635             !kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_CD_NW_CLEARED))
 636                 kvm_zap_gfn_range(vcpu->kvm, 0, ~0ULL);
 637
 638         return 0;
 639 }
 640 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 641
 642 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 643 {
 644         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 645 }
 646 EXPORT_SYMBOL_GPL(kvm_lmsw);
 647
 648 static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
 649 {
 650         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
 651                         !vcpu->guest_xcr0_loaded) {
 652                 /* kvm_set_xcr() also depends on this */
 653                 xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
 654                 vcpu->guest_xcr0_loaded = 1;
 655         }
 656 }
 657
 658 static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
 659 {
 660         if (vcpu->guest_xcr0_loaded) {
 661                 if (vcpu->arch.xcr0 != host_xcr0)
 662                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
 663                 vcpu->guest_xcr0_loaded = 0;
 664         }
 665 }
 666
 667 static int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 668 {
 669         u64 xcr0 = xcr;
 670         u64 old_xcr0 = vcpu->arch.xcr0;
 671         u64 valid_bits;
 672
 673         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 674         if (index != XCR_XFEATURE_ENABLED_MASK)
 675                 return 1;
 676         if (!(xcr0 & XSTATE_FP))
 677                 return 1;
 678         if ((xcr0 & XSTATE_YMM) && !(xcr0 & XSTATE_SSE))
 679                 return 1;
 680
 681         /*
 682          * Do not allow the guest to set bits that we do not support
 683          * saving.  However, xcr0 bit 0 is always set, even if the
 684          * emulated CPU does not support XSAVE (see fx_init).
 685          */
 686         valid_bits = vcpu->arch.guest_supported_xcr0 | XSTATE_FP;
 687         if (xcr0 & ~valid_bits)
 688                 return 1;
 689
 690         if ((!(xcr0 & XSTATE_BNDREGS)) != (!(xcr0 & XSTATE_BNDCSR)))
 691                 return 1;
 692
 693         if (xcr0 & XSTATE_AVX512) {
 694                 if (!(xcr0 & XSTATE_YMM))
 695                         return 1;
 696                 if ((xcr0 & XSTATE_AVX512) != XSTATE_AVX512)
 697                         return 1;
 698         }
 699         kvm_put_guest_xcr0(vcpu);
 700         vcpu->arch.xcr0 = xcr0;
 701
 702         if ((xcr0 ^ old_xcr0) & XSTATE_EXTEND_MASK)
 703                 kvm_update_cpuid(vcpu);
 704         return 0;
 705 }
 706
 707 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 708 {
 709         if (kvm_x86_ops->get_cpl(vcpu) != 0 ||
 710             __kvm_set_xcr(vcpu, index, xcr)) {
 711                 kvm_inject_gp(vcpu, 0);
 712                 return 1;
 713         }
 714         return 0;
 715 }
 716 EXPORT_SYMBOL_GPL(kvm_set_xcr);
 717
 718 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 719 {
 720         unsigned long old_cr4 = kvm_read_cr4(vcpu);
 721         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE |
 722                                    X86_CR4_SMEP | X86_CR4_SMAP;
 723
 724         if (cr4 & CR4_RESERVED_BITS)
 725                 return 1;
 726
 727         if (!guest_cpuid_has_xsave(vcpu) && (cr4 & X86_CR4_OSXSAVE))
 728                 return 1;
 729
 730         if (!guest_cpuid_has_smep(vcpu) && (cr4 & X86_CR4_SMEP))
 731                 return 1;
 732
 733         if (!guest_cpuid_has_smap(vcpu) && (cr4 & X86_CR4_SMAP))
 734                 return 1;
 735
 736         if (!guest_cpuid_has_fsgsbase(vcpu) && (cr4 & X86_CR4_FSGSBASE))
 737                 return 1;
 738
 739         if (is_long_mode(vcpu)) {
 740                 if (!(cr4 & X86_CR4_PAE))
 741                         return 1;
 742         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
 743                    && ((cr4 ^ old_cr4) & pdptr_bits)
 744                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 745                                    kvm_read_cr3(vcpu)))
 746                 return 1;
 747
 748         if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
 749                 if (!guest_cpuid_has_pcid(vcpu))
 750                         return 1;
 751
 752                 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
 753                 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_MASK) || !is_long_mode(vcpu))
 754                         return 1;
 755         }
 756
 757         if (kvm_x86_ops->set_cr4(vcpu, cr4))
 758                 return 1;
 759
 760         if (((cr4 ^ old_cr4) & pdptr_bits) ||
 761             (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
 762                 kvm_mmu_reset_context(vcpu);
 763
 764         if ((cr4 ^ old_cr4) & X86_CR4_OSXSAVE)
 765                 kvm_update_cpuid(vcpu);
 766
 767         return 0;
 768 }
 769 EXPORT_SYMBOL_GPL(kvm_set_cr4);
 770
 771 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 772 {
 773 #ifdef CONFIG_X86_64
 774         cr3 &= ~CR3_PCID_INVD;
 775 #endif
 776
 777         if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
 778                 kvm_mmu_sync_roots(vcpu);
 779                 kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu);
 780                 return 0;
 781         }
 782
 783         if (is_long_mode(vcpu)) {
 784                 if (cr3 & CR3_L_MODE_RESERVED_BITS)
 785                         return 1;
 786         } else if (is_pae(vcpu) && is_paging(vcpu) &&
 787                    !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
 788                 return 1;
 789
 790         vcpu->arch.cr3 = cr3;
 791         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
 792         kvm_mmu_new_cr3(vcpu);
 793         return 0;
 794 }
 795 EXPORT_SYMBOL_GPL(kvm_set_cr3);
 796
 797 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
 798 {
 799         if (cr8 & CR8_RESERVED_BITS)
 800                 return 1;
 801         if (lapic_in_kernel(vcpu))
 802                 kvm_lapic_set_tpr(vcpu, cr8);
 803         else
 804                 vcpu->arch.cr8 = cr8;
 805         return 0;
 806 }
 807 EXPORT_SYMBOL_GPL(kvm_set_cr8);
 808
 809 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
 810 {
 811         if (lapic_in_kernel(vcpu))
 812                 return kvm_lapic_get_cr8(vcpu);
 813         else
 814                 return vcpu->arch.cr8;
 815 }
 816 EXPORT_SYMBOL_GPL(kvm_get_cr8);
 817
 818 static void kvm_update_dr0123(struct kvm_vcpu *vcpu)
 819 {
 820         int i;
 821
 822         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
 823                 for (i = 0; i < KVM_NR_DB_REGS; i++)
 824                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
 825                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_RELOAD;
 826         }
 827 }
 828
 829 static void kvm_update_dr6(struct kvm_vcpu *vcpu)
 830 {
 831         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 832                 kvm_x86_ops->set_dr6(vcpu, vcpu->arch.dr6);
 833 }
 834
 835 static void kvm_update_dr7(struct kvm_vcpu *vcpu)
 836 {
 837         unsigned long dr7;
 838
 839         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
 840                 dr7 = vcpu->arch.guest_debug_dr7;
 841         else
 842                 dr7 = vcpu->arch.dr7;
 843         kvm_x86_ops->set_dr7(vcpu, dr7);
 844         vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_BP_ENABLED;
 845         if (dr7 & DR7_BP_EN_MASK)
 846                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_BP_ENABLED;
 847 }
 848
 849 static u64 kvm_dr6_fixed(struct kvm_vcpu *vcpu)
 850 {
 851         u64 fixed = DR6_FIXED_1;
 852
 853         if (!guest_cpuid_has_rtm(vcpu))
 854                 fixed |= DR6_RTM;
 855         return fixed;
 856 }
 857
 858 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 859 {
 860         switch (dr) {
 861         case 0 ... 3:
 862                 vcpu->arch.db[dr] = val;
 863                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 864                         vcpu->arch.eff_db[dr] = val;
 865                 break;
 866         case 4:
 867                 /* fall through */
 868         case 6:
 869                 if (val & 0xffffffff00000000ULL)
 870                         return -1; /* #GP */
 871                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | kvm_dr6_fixed(vcpu);
 872                 kvm_update_dr6(vcpu);
 873                 break;
 874         case 5:
 875                 /* fall through */
 876         default: /* 7 */
 877                 if (val & 0xffffffff00000000ULL)
 878                         return -1; /* #GP */
 879                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
 880                 kvm_update_dr7(vcpu);
 881                 break;
 882         }
 883
 884         return 0;
 885 }
 886
 887 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 888 {
 889         if (__kvm_set_dr(vcpu, dr, val)) {
 890                 kvm_inject_gp(vcpu, 0);
 891                 return 1;
 892         }
 893         return 0;
 894 }
 895 EXPORT_SYMBOL_GPL(kvm_set_dr);
 896
 897 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 898 {
 899         switch (dr) {
 900         case 0 ... 3:
 901                 *val = vcpu->arch.db[dr];
 902                 break;
 903         case 4:
 904                 /* fall through */
 905         case 6:
 906                 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
 907                         *val = vcpu->arch.dr6;
 908                 else
 909                         *val = kvm_x86_ops->get_dr6(vcpu);
 910                 break;
 911         case 5:
 912                 /* fall through */
 913         default: /* 7 */
 914                 *val = vcpu->arch.dr7;
 915                 break;
 916         }
 917         return 0;
 918 }
 919 EXPORT_SYMBOL_GPL(kvm_get_dr);
 920
 921 bool kvm_rdpmc(struct kvm_vcpu *vcpu)
 922 {
 923         u32 ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
 924         u64 data;
 925         int err;
 926
 927         err = kvm_pmu_rdpmc(vcpu, ecx, &data);
 928         if (err)
 929                 return err;
 930         kvm_register_write(vcpu, VCPU_REGS_RAX, (u32)data);
 931         kvm_register_write(vcpu, VCPU_REGS_RDX, data >> 32);
 932         return err;
 933 }
 934 EXPORT_SYMBOL_GPL(kvm_rdpmc);
 935
 936 /*
 937  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
 938  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
 939  *
 940  * This list is modified at module load time to reflect the
 941  * capabilities of the host cpu. This capabilities test skips MSRs that are
 942  * kvm-specific. Those are put in emulated_msrs; filtering of emulated_msrs
 943  * may depend on host virtualization features rather than host cpu features.
 944  */
 945
 946 static u32 msrs_to_save[] = {
 947         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
 948         MSR_STAR,
 949 #ifdef CONFIG_X86_64
 950         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
 951 #endif
 952         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA,
 953         MSR_IA32_FEATURE_CONTROL, MSR_IA32_BNDCFGS
 954 };
 955
 956 static unsigned num_msrs_to_save;
 957
 958 static u32 emulated_msrs[] = {
 959         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
 960         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
 961         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
 962         HV_X64_MSR_TIME_REF_COUNT, HV_X64_MSR_REFERENCE_TSC,
 963         HV_X64_MSR_CRASH_P0, HV_X64_MSR_CRASH_P1, HV_X64_MSR_CRASH_P2,
 964         HV_X64_MSR_CRASH_P3, HV_X64_MSR_CRASH_P4, HV_X64_MSR_CRASH_CTL,
 965         HV_X64_MSR_RESET,
 966         HV_X64_MSR_VP_INDEX,
 967         HV_X64_MSR_VP_RUNTIME,
 968         HV_X64_MSR_APIC_ASSIST_PAGE, MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
 969         MSR_KVM_PV_EOI_EN,
 970
 971         MSR_IA32_TSC_ADJUST,
 972         MSR_IA32_TSCDEADLINE,
 973         MSR_IA32_MISC_ENABLE,
 974         MSR_IA32_MCG_STATUS,
 975         MSR_IA32_MCG_CTL,
 976         MSR_IA32_SMBASE,
 977 };
 978
 979 static unsigned num_emulated_msrs;
 980
 981 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
 982 {
 983         if (efer & efer_reserved_bits)
 984                 return false;
 985
 986         if (efer & EFER_FFXSR) {
 987                 struct kvm_cpuid_entry2 *feat;
 988
 989                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 990                 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT)))
 991                         return false;
 992         }
 993
 994         if (efer & EFER_SVME) {
 995                 struct kvm_cpuid_entry2 *feat;
 996
 997                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 998                 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM)))
 999                         return false;
1000         }
1001
1002         return true;
1003 }
1004 EXPORT_SYMBOL_GPL(kvm_valid_efer);
1005
1006 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
1007 {
1008         u64 old_efer = vcpu->arch.efer;
1009
1010         if (!kvm_valid_efer(vcpu, efer))
1011                 return 1;
1012
1013         if (is_paging(vcpu)
1014             && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
1015                 return 1;
1016
1017         efer &= ~EFER_LMA;
1018         efer |= vcpu->arch.efer & EFER_LMA;
1019
1020         kvm_x86_ops->set_efer(vcpu, efer);
1021
1022         /* Update reserved bits */
1023         if ((efer ^ old_efer) & EFER_NX)
1024                 kvm_mmu_reset_context(vcpu);
1025
1026         return 0;
1027 }
1028
1029 void kvm_enable_efer_bits(u64 mask)
1030 {
1031        efer_reserved_bits &= ~mask;
1032 }
1033 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
1034
1035 /*
1036  * Writes msr value into into the appropriate "register".
1037  * Returns 0 on success, non-0 otherwise.
1038  * Assumes vcpu_load() was already called.
1039  */
1040 int kvm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
1041 {
1042         switch (msr->index) {
1043         case MSR_FS_BASE:
1044         case MSR_GS_BASE:
1045         case MSR_KERNEL_GS_BASE:
1046         case MSR_CSTAR:
1047         case MSR_LSTAR:
1048                 if (is_noncanonical_address(msr->data))
1049                         return 1;
1050                 break;
1051         case MSR_IA32_SYSENTER_EIP:
1052         case MSR_IA32_SYSENTER_ESP:
1053                 /*
1054                  * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1055                  * non-canonical address is written on Intel but not on
1056                  * AMD (which ignores the top 32-bits, because it does
1057                  * not implement 64-bit SYSENTER).
1058                  *
1059                  * 64-bit code should hence be able to write a non-canonical
1060                  * value on AMD.  Making the address canonical ensures that
1061                  * vmentry does not fail on Intel after writing a non-canonical
1062                  * value, and that something deterministic happens if the guest
1063                  * invokes 64-bit SYSENTER.
1064                  */
1065                 msr->data = get_canonical(msr->data);
1066         }
1067         return kvm_x86_ops->set_msr(vcpu, msr);
1068 }
1069 EXPORT_SYMBOL_GPL(kvm_set_msr);
1070
1071 /*
1072  * Adapt set_msr() to msr_io()'s calling convention
1073  */
1074 static int do_get_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1075 {
1076         struct msr_data msr;
1077         int r;
1078
1079         msr.index = index;
1080         msr.host_initiated = true;
1081         r = kvm_get_msr(vcpu, &msr);
1082         if (r)
1083                 return r;
1084
1085         *data = msr.data;
1086         return 0;
1087 }
1088
1089 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1090 {
1091         struct msr_data msr;
1092
1093         msr.data = *data;
1094         msr.index = index;
1095         msr.host_initiated = true;
1096         return kvm_set_msr(vcpu, &msr);
1097 }
1098
1099 #ifdef CONFIG_X86_64
1100 struct pvclock_gtod_data {
1101         seqcount_t      seq;
1102
1103         struct { /* extract of a clocksource struct */
1104                 int vclock_mode;
1105                 cycle_t cycle_last;
1106                 cycle_t mask;
1107                 u32     mult;
1108                 u32     shift;
1109         } clock;
1110
1111         u64             boot_ns;
1112         u64             nsec_base;
1113 };
1114
1115 static struct pvclock_gtod_data pvclock_gtod_data;
1116
1117 static void update_pvclock_gtod(struct timekeeper *tk)
1118 {
1119         struct pvclock_gtod_data *vdata = &pvclock_gtod_data;
1120         u64 boot_ns;
1121
1122         boot_ns = ktime_to_ns(ktime_add(tk->tkr_mono.base, tk->offs_boot));
1123
1124         write_seqcount_begin(&vdata->seq);
1125
1126         /* copy pvclock gtod data */
1127         vdata->clock.vclock_mode        = tk->tkr_mono.clock->archdata.vclock_mode;
1128         vdata->clock.cycle_last         = tk->tkr_mono.cycle_last;
1129         vdata->clock.mask               = tk->tkr_mono.mask;
1130         vdata->clock.mult               = tk->tkr_mono.mult;
1131         vdata->clock.shift              = tk->tkr_mono.shift;
1132
1133         vdata->boot_ns                  = boot_ns;
1134         vdata->nsec_base                = tk->tkr_mono.xtime_nsec;
1135
1136         write_seqcount_end(&vdata->seq);
1137 }
1138 #endif
1139
1140 void kvm_set_pending_timer(struct kvm_vcpu *vcpu)
1141 {
1142         /*
1143          * Note: KVM_REQ_PENDING_TIMER is implicitly checked in
1144          * vcpu_enter_guest.  This function is only called from
1145          * the physical CPU that is running vcpu.
1146          */
1147         kvm_make_request(KVM_REQ_PENDING_TIMER, vcpu);
1148 }
1149
1150 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
1151 {
1152         int version;
1153         int r;
1154         struct pvclock_wall_clock wc;
1155         struct timespec boot;
1156
1157         if (!wall_clock)
1158                 return;
1159
1160         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
1161         if (r)
1162                 return;
1163
1164         if (version & 1)
1165                 ++version;  /* first time write, random junk */
1166
1167         ++version;
1168
1169         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
1170
1171         /*
1172          * The guest calculates current wall clock time by adding
1173          * system time (updated by kvm_guest_time_update below) to the
1174          * wall clock specified here.  guest system time equals host
1175          * system time for us, thus we must fill in host boot time here.
1176          */
1177         getboottime(&boot);
1178
1179         if (kvm->arch.kvmclock_offset) {
1180                 struct timespec ts = ns_to_timespec(kvm->arch.kvmclock_offset);
1181                 boot = timespec_sub(boot, ts);
1182         }
1183         wc.sec = boot.tv_sec;
1184         wc.nsec = boot.tv_nsec;
1185         wc.version = version;
1186
1187         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
1188
1189         version++;
1190         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
1191 }
1192
1193 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
1194 {
1195         uint32_t quotient, remainder;
1196
1197         /* Don't try to replace with do_div(), this one calculates
1198          * "(dividend << 32) / divisor" */
1199         __asm__ ( "divl %4"
1200                   : "=a" (quotient), "=d" (remainder)
1201                   : "0" (0), "1" (dividend), "r" (divisor) );
1202         return quotient;
1203 }
1204
1205 static void kvm_get_time_scale(uint32_t scaled_khz, uint32_t base_khz,
1206                                s8 *pshift, u32 *pmultiplier)
1207 {
1208         uint64_t scaled64;
1209         int32_t  shift = 0;
1210         uint64_t tps64;
1211         uint32_t tps32;
1212
1213         tps64 = base_khz * 1000LL;
1214         scaled64 = scaled_khz * 1000LL;
1215         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
1216                 tps64 >>= 1;
1217                 shift--;
1218         }
1219
1220         tps32 = (uint32_t)tps64;
1221         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
1222                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
1223                         scaled64 >>= 1;
1224                 else
1225                         tps32 <<= 1;
1226                 shift++;
1227         }
1228
1229         *pshift = shift;
1230         *pmultiplier = div_frac(scaled64, tps32);
1231
1232         pr_debug("%s: base_khz %u => %u, shift %d, mul %u\n",
1233                  __func__, base_khz, scaled_khz, shift, *pmultiplier);
1234 }
1235
1236 #ifdef CONFIG_X86_64
1237 static atomic_t kvm_guest_has_master_clock = ATOMIC_INIT(0);
1238 #endif
1239
1240 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
1241 static unsigned long max_tsc_khz;
1242
1243 static inline u64 nsec_to_cycles(struct kvm_vcpu *vcpu, u64 nsec)
1244 {
1245         return pvclock_scale_delta(nsec, vcpu->arch.virtual_tsc_mult,
1246                                    vcpu->arch.virtual_tsc_shift);
1247 }
1248
1249 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
1250 {
1251         u64 v = (u64)khz * (1000000 + ppm);
1252         do_div(v, 1000000);
1253         return v;
1254 }
1255
1256 static int set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz, bool scale)
1257 {
1258         u64 ratio;
1259
1260         /* Guest TSC same frequency as host TSC? */
1261         if (!scale) {
1262                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
1263                 return 0;
1264         }
1265
1266         /* TSC scaling supported? */
1267         if (!kvm_has_tsc_control) {
1268                 if (user_tsc_khz > tsc_khz) {
1269                         vcpu->arch.tsc_catchup = 1;
1270                         vcpu->arch.tsc_always_catchup = 1;
1271                         return 0;
1272                 } else {
1273                         WARN(1, "user requested TSC rate below hardware speed\n");
1274                         return -1;
1275                 }
1276         }
1277
1278         /* TSC scaling required  - calculate ratio */
1279         ratio = mul_u64_u32_div(1ULL << kvm_tsc_scaling_ratio_frac_bits,
1280                                 user_tsc_khz, tsc_khz);
1281
1282         if (ratio == 0 || ratio >= kvm_max_tsc_scaling_ratio) {
1283                 WARN_ONCE(1, "Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
1284                           user_tsc_khz);
1285                 return -1;
1286         }
1287
1288         vcpu->arch.tsc_scaling_ratio = ratio;
1289         return 0;
1290 }
1291
1292 static int kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 this_tsc_khz)
1293 {
1294         u32 thresh_lo, thresh_hi;
1295         int use_scaling = 0;
1296
1297         /* tsc_khz can be zero if TSC calibration fails */
1298         if (this_tsc_khz == 0) {
1299                 /* set tsc_scaling_ratio to a safe value */
1300                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
1301                 return -1;
1302         }
1303
1304         /* Compute a scale to convert nanoseconds in TSC cycles */
1305         kvm_get_time_scale(this_tsc_khz, NSEC_PER_SEC / 1000,
1306                            &vcpu->arch.virtual_tsc_shift,
1307                            &vcpu->arch.virtual_tsc_mult);
1308         vcpu->arch.virtual_tsc_khz = this_tsc_khz;
1309
1310         /*
1311          * Compute the variation in TSC rate which is acceptable
1312          * within the range of tolerance and decide if the
1313          * rate being applied is within that bounds of the hardware
1314          * rate.  If so, no scaling or compensation need be done.
1315          */
1316         thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
1317         thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
1318         if (this_tsc_khz < thresh_lo || this_tsc_khz > thresh_hi) {
1319                 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", this_tsc_khz, thresh_lo, thresh_hi);
1320                 use_scaling = 1;
1321         }
1322         return set_tsc_khz(vcpu, this_tsc_khz, use_scaling);
1323 }
1324
1325 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
1326 {
1327         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
1328                                       vcpu->arch.virtual_tsc_mult,
1329                                       vcpu->arch.virtual_tsc_shift);
1330         tsc += vcpu->arch.this_tsc_write;
1331         return tsc;
1332 }
1333
1334 static void kvm_track_tsc_matching(struct kvm_vcpu *vcpu)
1335 {
1336 #ifdef CONFIG_X86_64
1337         bool vcpus_matched;
1338         struct kvm_arch *ka = &vcpu->kvm->arch;
1339         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1340
1341         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1342                          atomic_read(&vcpu->kvm->online_vcpus));
1343
1344         /*
1345          * Once the masterclock is enabled, always perform request in
1346          * order to update it.
1347          *
1348          * In order to enable masterclock, the host clocksource must be TSC
1349          * and the vcpus need to have matched TSCs.  When that happens,
1350          * perform request to enable masterclock.
1351          */
1352         if (ka->use_master_clock ||
1353             (gtod->clock.vclock_mode == VCLOCK_TSC && vcpus_matched))
1354                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
1355
1356         trace_kvm_track_tsc(vcpu->vcpu_id, ka->nr_vcpus_matched_tsc,
1357                             atomic_read(&vcpu->kvm->online_vcpus),
1358                             ka->use_master_clock, gtod->clock.vclock_mode);
1359 #endif
1360 }
1361
1362 static void update_ia32_tsc_adjust_msr(struct kvm_vcpu *vcpu, s64 offset)
1363 {
1364         u64 curr_offset = kvm_x86_ops->read_tsc_offset(vcpu);
1365         vcpu->arch.ia32_tsc_adjust_msr += offset - curr_offset;
1366 }
1367
1368 /*
1369  * Multiply tsc by a fixed point number represented by ratio.
1370  *
1371  * The most significant 64-N bits (mult) of ratio represent the
1372  * integral part of the fixed point number; the remaining N bits
1373  * (frac) represent the fractional part, ie. ratio represents a fixed
1374  * point number (mult + frac * 2^(-N)).
1375  *
1376  * N equals to kvm_tsc_scaling_ratio_frac_bits.
1377  */
1378 static inline u64 __scale_tsc(u64 ratio, u64 tsc)
1379 {
1380         return mul_u64_u64_shr(tsc, ratio, kvm_tsc_scaling_ratio_frac_bits);
1381 }
1382
1383 u64 kvm_scale_tsc(struct kvm_vcpu *vcpu, u64 tsc)
1384 {
1385         u64 _tsc = tsc;
1386         u64 ratio = vcpu->arch.tsc_scaling_ratio;
1387
1388         if (ratio != kvm_default_tsc_scaling_ratio)
1389                 _tsc = __scale_tsc(ratio, tsc);
1390
1391         return _tsc;
1392 }
1393 EXPORT_SYMBOL_GPL(kvm_scale_tsc);
1394
1395 static u64 kvm_compute_tsc_offset(struct kvm_vcpu *vcpu, u64 target_tsc)
1396 {
1397         u64 tsc;
1398
1399         tsc = kvm_scale_tsc(vcpu, rdtsc());
1400
1401         return target_tsc - tsc;
1402 }
1403
1404 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc)
1405 {
1406         return kvm_x86_ops->read_l1_tsc(vcpu, kvm_scale_tsc(vcpu, host_tsc));
1407 }
1408 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc);
1409
1410 void kvm_write_tsc(struct kvm_vcpu *vcpu, struct msr_data *msr)
1411 {
1412         struct kvm *kvm = vcpu->kvm;
1413         u64 offset, ns, elapsed;
1414         unsigned long flags;
1415         s64 usdiff;
1416         bool matched;
1417         bool already_matched;
1418         u64 data = msr->data;
1419
1420         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1421         offset = kvm_compute_tsc_offset(vcpu, data);
1422         ns = get_kernel_ns();
1423         elapsed = ns - kvm->arch.last_tsc_nsec;
1424
1425         if (vcpu->arch.virtual_tsc_khz) {
1426                 int faulted = 0;
1427
1428                 /* n.b - signed multiplication and division required */
1429                 usdiff = data - kvm->arch.last_tsc_write;
1430 #ifdef CONFIG_X86_64
1431                 usdiff = (usdiff * 1000) / vcpu->arch.virtual_tsc_khz;
1432 #else
1433                 /* do_div() only does unsigned */
1434                 asm("1: idivl %[divisor]\n"
1435                     "2: xor %%edx, %%edx\n"
1436                     "   movl $0, %[faulted]\n"
1437                     "3:\n"
1438                     ".section .fixup,\"ax\"\n"
1439                     "4: movl $1, %[faulted]\n"
1440                     "   jmp  3b\n"
1441                     ".previous\n"
1442
1443                 _ASM_EXTABLE(1b, 4b)
1444
1445                 : "=A"(usdiff), [faulted] "=r" (faulted)
1446                 : "A"(usdiff * 1000), [divisor] "rm"(vcpu->arch.virtual_tsc_khz));
1447
1448 #endif
1449                 do_div(elapsed, 1000);
1450                 usdiff -= elapsed;
1451                 if (usdiff < 0)
1452                         usdiff = -usdiff;
1453
1454                 /* idivl overflow => difference is larger than USEC_PER_SEC */
1455                 if (faulted)
1456                         usdiff = USEC_PER_SEC;
1457         } else
1458                 usdiff = USEC_PER_SEC; /* disable TSC match window below */
1459
1460         /*
1461          * Special case: TSC write with a small delta (1 second) of virtual
1462          * cycle time against real time is interpreted as an attempt to
1463          * synchronize the CPU.
1464          *
1465          * For a reliable TSC, we can match TSC offsets, and for an unstable
1466          * TSC, we add elapsed time in this computation.  We could let the
1467          * compensation code attempt to catch up if we fall behind, but
1468          * it's better to try to match offsets from the beginning.
1469          */
1470         if (usdiff < USEC_PER_SEC &&
1471             vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
1472                 if (!check_tsc_unstable()) {
1473                         offset = kvm->arch.cur_tsc_offset;
1474                         pr_debug("kvm: matched tsc offset for %llu\n", data);
1475                 } else {
1476                         u64 delta = nsec_to_cycles(vcpu, elapsed);
1477                         data += delta;
1478                         offset = kvm_compute_tsc_offset(vcpu, data);
1479                         pr_debug("kvm: adjusted tsc offset by %llu\n", delta);
1480                 }
1481                 matched = true;
1482                 already_matched = (vcpu->arch.this_tsc_generation == kvm->arch.cur_tsc_generation);
1483         } else {
1484                 /*
1485                  * We split periods of matched TSC writes into generations.
1486                  * For each generation, we track the original measured
1487                  * nanosecond time, offset, and write, so if TSCs are in
1488                  * sync, we can match exact offset, and if not, we can match
1489                  * exact software computation in compute_guest_tsc()
1490                  *
1491                  * These values are tracked in kvm->arch.cur_xxx variables.
1492                  */
1493                 kvm->arch.cur_tsc_generation++;
1494                 kvm->arch.cur_tsc_nsec = ns;
1495                 kvm->arch.cur_tsc_write = data;
1496                 kvm->arch.cur_tsc_offset = offset;
1497                 matched = false;
1498                 pr_debug("kvm: new tsc generation %llu, clock %llu\n",
1499                          kvm->arch.cur_tsc_generation, data);
1500         }
1501
1502         /*
1503          * We also track th most recent recorded KHZ, write and time to
1504          * allow the matching interval to be extended at each write.
1505          */
1506         kvm->arch.last_tsc_nsec = ns;
1507         kvm->arch.last_tsc_write = data;
1508         kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
1509
1510         vcpu->arch.last_guest_tsc = data;
1511
1512         /* Keep track of which generation this VCPU has synchronized to */
1513         vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
1514         vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
1515         vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
1516
1517         if (guest_cpuid_has_tsc_adjust(vcpu) && !msr->host_initiated)
1518                 update_ia32_tsc_adjust_msr(vcpu, offset);
1519         kvm_x86_ops->write_tsc_offset(vcpu, offset);
1520         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1521
1522         spin_lock(&kvm->arch.pvclock_gtod_sync_lock);
1523         if (!matched) {
1524                 kvm->arch.nr_vcpus_matched_tsc = 0;
1525         } else if (!already_matched) {
1526                 kvm->arch.nr_vcpus_matched_tsc++;
1527         }
1528
1529         kvm_track_tsc_matching(vcpu);
1530         spin_unlock(&kvm->arch.pvclock_gtod_sync_lock);
1531 }
1532
1533 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1534
1535 static inline void adjust_tsc_offset_guest(struct kvm_vcpu *vcpu,
1536                                            s64 adjustment)
1537 {
1538         kvm_x86_ops->adjust_tsc_offset_guest(vcpu, adjustment);
1539 }
1540
1541 static inline void adjust_tsc_offset_host(struct kvm_vcpu *vcpu, s64 adjustment)
1542 {
1543         if (vcpu->arch.tsc_scaling_ratio != kvm_default_tsc_scaling_ratio)
1544                 WARN_ON(adjustment < 0);
1545         adjustment = kvm_scale_tsc(vcpu, (u64) adjustment);
1546         kvm_x86_ops->adjust_tsc_offset_guest(vcpu, adjustment);
1547 }
1548
1549 #ifdef CONFIG_X86_64
1550
1551 static cycle_t read_tsc(void)
1552 {
1553         cycle_t ret = (cycle_t)rdtsc_ordered();
1554         u64 last = pvclock_gtod_data.clock.cycle_last;
1555
1556         if (likely(ret >= last))
1557                 return ret;
1558
1559         /*
1560          * GCC likes to generate cmov here, but this branch is extremely
1561          * predictable (it's just a funciton of time and the likely is
1562          * very likely) and there's a data dependence, so force GCC
1563          * to generate a branch instead.  I don't barrier() because
1564          * we don't actually need a barrier, and if this function
1565          * ever gets inlined it will generate worse code.
1566          */
1567         asm volatile ("");
1568         return last;
1569 }
1570
1571 static inline u64 vgettsc(cycle_t *cycle_now)
1572 {
1573         long v;
1574         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1575
1576         *cycle_now = read_tsc();
1577
1578         v = (*cycle_now - gtod->clock.cycle_last) & gtod->clock.mask;
1579         return v * gtod->clock.mult;
1580 }
1581
1582 static int do_monotonic_boot(s64 *t, cycle_t *cycle_now)
1583 {
1584         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1585         unsigned long seq;
1586         int mode;
1587         u64 ns;
1588
1589         do {
1590                 seq = read_seqcount_begin(&gtod->seq);
1591                 mode = gtod->clock.vclock_mode;
1592                 ns = gtod->nsec_base;
1593                 ns += vgettsc(cycle_now);
1594                 ns >>= gtod->clock.shift;
1595                 ns += gtod->boot_ns;
1596         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
1597         *t = ns;
1598
1599         return mode;
1600 }
1601
1602 /* returns true if host is using tsc clocksource */
1603 static bool kvm_get_time_and_clockread(s64 *kernel_ns, cycle_t *cycle_now)
1604 {
1605         /* checked again under seqlock below */
1606         if (pvclock_gtod_data.clock.vclock_mode != VCLOCK_TSC)
1607                 return false;
1608
1609         return do_monotonic_boot(kernel_ns, cycle_now) == VCLOCK_TSC;
1610 }
1611 #endif
1612
1613 /*
1614  *
1615  * Assuming a stable TSC across physical CPUS, and a stable TSC
1616  * across virtual CPUs, the following condition is possible.
1617  * Each numbered line represents an event visible to both
1618  * CPUs at the next numbered event.
1619  *
1620  * "timespecX" represents host monotonic time. "tscX" represents
1621  * RDTSC value.
1622  *
1623  *              VCPU0 on CPU0           |       VCPU1 on CPU1
1624  *
1625  * 1.  read timespec0,tsc0
1626  * 2.                                   | timespec1 = timespec0 + N
1627  *                                      | tsc1 = tsc0 + M
1628  * 3. transition to guest               | transition to guest
1629  * 4. ret0 = timespec0 + (rdtsc - tsc0) |
1630  * 5.                                   | ret1 = timespec1 + (rdtsc - tsc1)
1631  *                                      | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
1632  *
1633  * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
1634  *
1635  *      - ret0 < ret1
1636  *      - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
1637  *              ...
1638  *      - 0 < N - M => M < N
1639  *
1640  * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
1641  * always the case (the difference between two distinct xtime instances
1642  * might be smaller then the difference between corresponding TSC reads,
1643  * when updating guest vcpus pvclock areas).
1644  *
1645  * To avoid that problem, do not allow visibility of distinct
1646  * system_timestamp/tsc_timestamp values simultaneously: use a master
1647  * copy of host monotonic time values. Update that master copy
1648  * in lockstep.
1649  *
1650  * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
1651  *
1652  */
1653
1654 static void pvclock_update_vm_gtod_copy(struct kvm *kvm)
1655 {
1656 #ifdef CONFIG_X86_64
1657         struct kvm_arch *ka = &kvm->arch;
1658         int vclock_mode;
1659         bool host_tsc_clocksource, vcpus_matched;
1660
1661         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1662                         atomic_read(&kvm->online_vcpus));
1663
1664         /*
1665          * If the host uses TSC clock, then passthrough TSC as stable
1666          * to the guest.
1667          */
1668         host_tsc_clocksource = kvm_get_time_and_clockread(
1669                                         &ka->master_kernel_ns,
1670                                         &ka->master_cycle_now);
1671
1672         ka->use_master_clock = host_tsc_clocksource && vcpus_matched
1673                                 && !backwards_tsc_observed
1674                                 && !ka->boot_vcpu_runs_old_kvmclock;
1675
1676         if (ka->use_master_clock)
1677                 atomic_set(&kvm_guest_has_master_clock, 1);
1678
1679         vclock_mode = pvclock_gtod_data.clock.vclock_mode;
1680         trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode,
1681                                         vcpus_matched);
1682 #endif
1683 }
1684
1685 static void kvm_gen_update_masterclock(struct kvm *kvm)
1686 {
1687 #ifdef CONFIG_X86_64
1688         int i;
1689         struct kvm_vcpu *vcpu;
1690         struct kvm_arch *ka = &kvm->arch;
1691
1692         spin_lock(&ka->pvclock_gtod_sync_lock);
1693         kvm_make_mclock_inprogress_request(kvm);
1694         /* no guest entries from this point */
1695         pvclock_update_vm_gtod_copy(kvm);
1696
1697         kvm_for_each_vcpu(i, vcpu, kvm)
1698                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1699
1700         /* guest entries allowed */
1701         kvm_for_each_vcpu(i, vcpu, kvm)
1702                 clear_bit(KVM_REQ_MCLOCK_INPROGRESS, &vcpu->requests);
1703
1704         spin_unlock(&ka->pvclock_gtod_sync_lock);
1705 #endif
1706 }
1707
1708 static int kvm_guest_time_update(struct kvm_vcpu *v)
1709 {
1710         unsigned long flags, this_tsc_khz;
1711         struct kvm_vcpu_arch *vcpu = &v->arch;
1712         struct kvm_arch *ka = &v->kvm->arch;
1713         s64 kernel_ns;
1714         u64 tsc_timestamp, host_tsc;
1715         struct pvclock_vcpu_time_info guest_hv_clock;
1716         u8 pvclock_flags;
1717         bool use_master_clock;
1718
1719         kernel_ns = 0;
1720         host_tsc = 0;
1721
1722         /*
1723          * If the host uses TSC clock, then passthrough TSC as stable
1724          * to the guest.
1725          */
1726         spin_lock(&ka->pvclock_gtod_sync_lock);
1727         use_master_clock = ka->use_master_clock;
1728         if (use_master_clock) {
1729                 host_tsc = ka->master_cycle_now;
1730                 kernel_ns = ka->master_kernel_ns;
1731         }
1732         spin_unlock(&ka->pvclock_gtod_sync_lock);
1733
1734         /* Keep irq disabled to prevent changes to the clock */
1735         local_irq_save(flags);
1736         this_tsc_khz = __this_cpu_read(cpu_tsc_khz);
1737         if (unlikely(this_tsc_khz == 0)) {
1738                 local_irq_restore(flags);
1739                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1740                 return 1;
1741         }
1742         if (!use_master_clock) {
1743                 host_tsc = rdtsc();
1744                 kernel_ns = get_kernel_ns();
1745         }
1746
1747         tsc_timestamp = kvm_read_l1_tsc(v, host_tsc);
1748
1749         /*
1750          * We may have to catch up the TSC to match elapsed wall clock
1751          * time for two reasons, even if kvmclock is used.
1752          *   1) CPU could have been running below the maximum TSC rate
1753          *   2) Broken TSC compensation resets the base at each VCPU
1754          *      entry to avoid unknown leaps of TSC even when running
1755          *      again on the same CPU.  This may cause apparent elapsed
1756          *      time to disappear, and the guest to stand still or run
1757          *      very slowly.
1758          */
1759         if (vcpu->tsc_catchup) {
1760                 u64 tsc = compute_guest_tsc(v, kernel_ns);
1761                 if (tsc > tsc_timestamp) {
1762                         adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
1763                         tsc_timestamp = tsc;
1764                 }
1765         }
1766
1767         local_irq_restore(flags);
1768
1769         if (!vcpu->pv_time_enabled)
1770                 return 0;
1771
1772         if (unlikely(vcpu->hw_tsc_khz != this_tsc_khz)) {
1773                 kvm_get_time_scale(NSEC_PER_SEC / 1000, this_tsc_khz,
1774                                    &vcpu->hv_clock.tsc_shift,
1775                                    &vcpu->hv_clock.tsc_to_system_mul);
1776                 vcpu->hw_tsc_khz = this_tsc_khz;
1777         }
1778
1779         /* With all the info we got, fill in the values */
1780         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
1781         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
1782         vcpu->last_guest_tsc = tsc_timestamp;
1783
1784         if (unlikely(kvm_read_guest_cached(v->kvm, &vcpu->pv_time,
1785                 &guest_hv_clock, sizeof(guest_hv_clock))))
1786                 return 0;
1787
1788         /* This VCPU is paused, but it's legal for a guest to read another
1789          * VCPU's kvmclock, so we really have to follow the specification where
1790          * it says that version is odd if data is being modified, and even after
1791          * it is consistent.
1792          *
1793          * Version field updates must be kept separate.  This is because
1794          * kvm_write_guest_cached might use a "rep movs" instruction, and
1795          * writes within a string instruction are weakly ordered.  So there
1796          * are three writes overall.
1797          *
1798          * As a small optimization, only write the version field in the first
1799          * and third write.  The vcpu->pv_time cache is still valid, because the
1800          * version field is the first in the struct.
1801          */
1802         BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info, version) != 0);
1803
1804         vcpu->hv_clock.version = guest_hv_clock.version + 1;
1805         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1806                                 &vcpu->hv_clock,
1807                                 sizeof(vcpu->hv_clock.version));
1808
1809         smp_wmb();
1810
1811         /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
1812         pvclock_flags = (guest_hv_clock.flags & PVCLOCK_GUEST_STOPPED);
1813
1814         if (vcpu->pvclock_set_guest_stopped_request) {
1815                 pvclock_flags |= PVCLOCK_GUEST_STOPPED;
1816                 vcpu->pvclock_set_guest_stopped_request = false;
1817         }
1818
1819         /* If the host uses TSC clocksource, then it is stable */
1820         if (use_master_clock)
1821                 pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;
1822
1823         vcpu->hv_clock.flags = pvclock_flags;
1824
1825         trace_kvm_pvclock_update(v->vcpu_id, &vcpu->hv_clock);
1826
1827         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1828                                 &vcpu->hv_clock,
1829                                 sizeof(vcpu->hv_clock));
1830
1831         smp_wmb();
1832
1833         vcpu->hv_clock.version++;
1834         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1835                                 &vcpu->hv_clock,
1836                                 sizeof(vcpu->hv_clock.version));
1837         return 0;
1838 }
1839
1840 /*
1841  * kvmclock updates which are isolated to a given vcpu, such as
1842  * vcpu->cpu migration, should not allow system_timestamp from
1843  * the rest of the vcpus to remain static. Otherwise ntp frequency
1844  * correction applies to one vcpu's system_timestamp but not
1845  * the others.
1846  *
1847  * So in those cases, request a kvmclock update for all vcpus.
1848  * We need to rate-limit these requests though, as they can
1849  * considerably slow guests that have a large number of vcpus.
1850  * The time for a remote vcpu to update its kvmclock is bound
1851  * by the delay we use to rate-limit the updates.
1852  */
1853
1854 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
1855
1856 static void kvmclock_update_fn(struct work_struct *work)
1857 {
1858         int i;
1859         struct delayed_work *dwork = to_delayed_work(work);
1860         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
1861                                            kvmclock_update_work);
1862         struct kvm *kvm = container_of(ka, struct kvm, arch);
1863         struct kvm_vcpu *vcpu;
1864
1865         kvm_for_each_vcpu(i, vcpu, kvm) {
1866                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1867                 kvm_vcpu_kick(vcpu);
1868         }
1869 }
1870
1871 static void kvm_gen_kvmclock_update(struct kvm_vcpu *v)
1872 {
1873         struct kvm *kvm = v->kvm;
1874
1875         kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1876         schedule_delayed_work(&kvm->arch.kvmclock_update_work,
1877                                         KVMCLOCK_UPDATE_DELAY);
1878 }
1879
1880 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
1881
1882 static void kvmclock_sync_fn(struct work_struct *work)
1883 {
1884         struct delayed_work *dwork = to_delayed_work(work);
1885         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
1886                                            kvmclock_sync_work);
1887         struct kvm *kvm = container_of(ka, struct kvm, arch);
1888
1889         if (!kvmclock_periodic_sync)
1890                 return;
1891
1892         schedule_delayed_work(&kvm->arch.kvmclock_update_work, 0);
1893         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
1894                                         KVMCLOCK_SYNC_PERIOD);
1895 }
1896
1897 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1898 {
1899         u64 mcg_cap = vcpu->arch.mcg_cap;
1900         unsigned bank_num = mcg_cap & 0xff;
1901
1902         switch (msr) {
1903         case MSR_IA32_MCG_STATUS:
1904                 vcpu->arch.mcg_status = data;
1905                 break;
1906         case MSR_IA32_MCG_CTL:
1907                 if (!(mcg_cap & MCG_CTL_P))
1908                         return 1;
1909                 if (data != 0 && data != ~(u64)0)
1910                         return -1;
1911                 vcpu->arch.mcg_ctl = data;
1912                 break;
1913         default:
1914                 if (msr >= MSR_IA32_MC0_CTL &&
1915                     msr < MSR_IA32_MCx_CTL(bank_num)) {
1916                         u32 offset = msr - MSR_IA32_MC0_CTL;
1917                         /* only 0 or all 1s can be written to IA32_MCi_CTL
1918                          * some Linux kernels though clear bit 10 in bank 4 to
1919                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1920                          * this to avoid an uncatched #GP in the guest
1921                          */
1922                         if ((offset & 0x3) == 0 &&
1923                             data != 0 && (data | (1 << 10)) != ~(u64)0)
1924                                 return -1;
1925                         vcpu->arch.mce_banks[offset] = data;
1926                         break;
1927                 }
1928                 return 1;
1929         }
1930         return 0;
1931 }
1932
1933 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
1934 {
1935         struct kvm *kvm = vcpu->kvm;
1936         int lm = is_long_mode(vcpu);
1937         u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
1938                 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
1939         u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
1940                 : kvm->arch.xen_hvm_config.blob_size_32;
1941         u32 page_num = data & ~PAGE_MASK;
1942         u64 page_addr = data & PAGE_MASK;
1943         u8 *page;
1944         int r;
1945
1946         r = -E2BIG;
1947         if (page_num >= blob_size)
1948                 goto out;
1949         r = -ENOMEM;
1950         page = memdup_user(blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE);
1951         if (IS_ERR(page)) {
1952                 r = PTR_ERR(page);
1953                 goto out;
1954         }
1955         if (kvm_vcpu_write_guest(vcpu, page_addr, page, PAGE_SIZE))
1956                 goto out_free;
1957         r = 0;
1958 out_free:
1959         kfree(page);
1960 out:
1961         return r;
1962 }
1963
1964 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
1965 {
1966         gpa_t gpa = data & ~0x3f;
1967
1968         /* Bits 2:5 are reserved, Should be zero */
1969         if (data & 0x3c)
1970                 return 1;
1971
1972         vcpu->arch.apf.msr_val = data;
1973
1974         if (!(data & KVM_ASYNC_PF_ENABLED)) {
1975                 kvm_clear_async_pf_completion_queue(vcpu);
1976                 kvm_async_pf_hash_reset(vcpu);
1977                 return 0;
1978         }
1979
1980         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa,
1981                                         sizeof(u32)))
1982                 return 1;
1983
1984         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
1985         kvm_async_pf_wakeup_all(vcpu);
1986         return 0;
1987 }
1988
1989 static void kvmclock_reset(struct kvm_vcpu *vcpu)
1990 {
1991         vcpu->arch.pv_time_enabled = false;
1992 }
1993
1994 static void accumulate_steal_time(struct kvm_vcpu *vcpu)
1995 {
1996         u64 delta;
1997
1998         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
1999                 return;
2000
2001         delta = current->sched_info.run_delay - vcpu->arch.st.last_steal;
2002         vcpu->arch.st.last_steal = current->sched_info.run_delay;
2003         vcpu->arch.st.accum_steal = delta;
2004 }
2005
2006 static void record_steal_time(struct kvm_vcpu *vcpu)
2007 {
2008         accumulate_steal_time(vcpu);
2009
2010         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
2011                 return;
2012
2013         if (unlikely(kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2014                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time))))
2015                 return;
2016
2017         vcpu->arch.st.steal.steal += vcpu->arch.st.accum_steal;
2018         vcpu->arch.st.steal.version += 2;
2019         vcpu->arch.st.accum_steal = 0;
2020
2021         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2022                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2023 }
2024
2025 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2026 {
2027         bool pr = false;
2028         u32 msr = msr_info->index;
2029         u64 data = msr_info->data;
2030
2031         switch (msr) {
2032         case MSR_AMD64_NB_CFG:
2033         case MSR_IA32_UCODE_REV:
2034         case MSR_IA32_UCODE_WRITE:
2035         case MSR_VM_HSAVE_PA:
2036         case MSR_AMD64_PATCH_LOADER:
2037         case MSR_AMD64_BU_CFG2:
2038                 break;
2039
2040         case MSR_EFER:
2041                 return set_efer(vcpu, data);
2042         case MSR_K7_HWCR:
2043                 data &= ~(u64)0x40;     /* ignore flush filter disable */
2044                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
2045                 data &= ~(u64)0x8;      /* ignore TLB cache disable */
2046                 data &= ~(u64)0x40000;  /* ignore Mc status write enable */
2047                 if (data != 0) {
2048                         vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
2049                                     data);
2050                         return 1;
2051                 }
2052                 break;
2053         case MSR_FAM10H_MMIO_CONF_BASE:
2054                 if (data != 0) {
2055                         vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
2056                                     "0x%llx\n", data);
2057                         return 1;
2058                 }
2059                 break;
2060         case MSR_IA32_DEBUGCTLMSR:
2061                 if (!data) {
2062                         /* We support the non-activated case already */
2063                         break;
2064                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
2065                         /* Values other than LBR and BTF are vendor-specific,
2066                            thus reserved and should throw a #GP */
2067                         return 1;
2068                 }
2069                 vcpu_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
2070                             __func__, data);
2071                 break;
2072         case 0x200 ... 0x2ff:
2073                 return kvm_mtrr_set_msr(vcpu, msr, data);
2074         case MSR_IA32_APICBASE:
2075                 return kvm_set_apic_base(vcpu, msr_info);
2076         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2077                 return kvm_x2apic_msr_write(vcpu, msr, data);
2078         case MSR_IA32_TSCDEADLINE:
2079                 kvm_set_lapic_tscdeadline_msr(vcpu, data);
2080                 break;
2081         case MSR_IA32_TSC_ADJUST:
2082                 if (guest_cpuid_has_tsc_adjust(vcpu)) {
2083                         if (!msr_info->host_initiated) {
2084                                 s64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;
2085                                 adjust_tsc_offset_guest(vcpu, adj);
2086                         }
2087                         vcpu->arch.ia32_tsc_adjust_msr = data;
2088                 }
2089                 break;
2090         case MSR_IA32_MISC_ENABLE:
2091                 vcpu->arch.ia32_misc_enable_msr = data;
2092                 break;
2093         case MSR_IA32_SMBASE:
2094                 if (!msr_info->host_initiated)
2095                         return 1;
2096                 vcpu->arch.smbase = data;
2097                 break;
2098         case MSR_KVM_WALL_CLOCK_NEW:
2099         case MSR_KVM_WALL_CLOCK:
2100                 vcpu->kvm->arch.wall_clock = data;
2101                 kvm_write_wall_clock(vcpu->kvm, data);
2102                 break;
2103         case MSR_KVM_SYSTEM_TIME_NEW:
2104         case MSR_KVM_SYSTEM_TIME: {
2105                 u64 gpa_offset;
2106                 struct kvm_arch *ka = &vcpu->kvm->arch;
2107
2108                 kvmclock_reset(vcpu);
2109
2110                 if (vcpu->vcpu_id == 0 && !msr_info->host_initiated) {
2111                         bool tmp = (msr == MSR_KVM_SYSTEM_TIME);
2112
2113                         if (ka->boot_vcpu_runs_old_kvmclock != tmp)
2114                                 set_bit(KVM_REQ_MASTERCLOCK_UPDATE,
2115                                         &vcpu->requests);
2116
2117                         ka->boot_vcpu_runs_old_kvmclock = tmp;
2118                 }
2119
2120                 vcpu->arch.time = data;
2121                 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2122
2123                 /* we verify if the enable bit is set... */
2124                 if (!(data & 1))
2125                         break;
2126
2127                 gpa_offset = data & ~(PAGE_MASK | 1);
2128
2129                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm,
2130                      &vcpu->arch.pv_time, data & ~1ULL,
2131                      sizeof(struct pvclock_vcpu_time_info)))
2132                         vcpu->arch.pv_time_enabled = false;
2133                 else
2134                         vcpu->arch.pv_time_enabled = true;
2135
2136                 break;
2137         }
2138         case MSR_KVM_ASYNC_PF_EN:
2139                 if (kvm_pv_enable_async_pf(vcpu, data))
2140                         return 1;
2141                 break;
2142         case MSR_KVM_STEAL_TIME:
2143
2144                 if (unlikely(!sched_info_on()))
2145                         return 1;
2146
2147                 if (data & KVM_STEAL_RESERVED_MASK)
2148                         return 1;
2149
2150                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.st.stime,
2151                                                 data & KVM_STEAL_VALID_BITS,
2152                                                 sizeof(struct kvm_steal_time)))
2153                         return 1;
2154
2155                 vcpu->arch.st.msr_val = data;
2156
2157                 if (!(data & KVM_MSR_ENABLED))
2158                         break;
2159
2160                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2161
2162                 break;
2163         case MSR_KVM_PV_EOI_EN:
2164                 if (kvm_lapic_enable_pv_eoi(vcpu, data))
2165                         return 1;
2166                 break;
2167
2168         case MSR_IA32_MCG_CTL:
2169         case MSR_IA32_MCG_STATUS:
2170         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
2171                 return set_msr_mce(vcpu, msr, data);
2172
2173         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
2174         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
2175                 pr = true; /* fall through */
2176         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
2177         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
2178                 if (kvm_pmu_is_valid_msr(vcpu, msr))
2179                         return kvm_pmu_set_msr(vcpu, msr_info);
2180
2181                 if (pr || data != 0)
2182                         vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
2183                                     "0x%x data 0x%llx\n", msr, data);
2184                 break;
2185         case MSR_K7_CLK_CTL:
2186                 /*
2187                  * Ignore all writes to this no longer documented MSR.
2188                  * Writes are only relevant for old K7 processors,
2189                  * all pre-dating SVM, but a recommended workaround from
2190                  * AMD for these chips. It is possible to specify the
2191                  * affected processor models on the command line, hence
2192                  * the need to ignore the workaround.
2193                  */
2194                 break;
2195         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2196         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
2197         case HV_X64_MSR_CRASH_CTL:
2198                 return kvm_hv_set_msr_common(vcpu, msr, data,
2199                                              msr_info->host_initiated);
2200         case MSR_IA32_BBL_CR_CTL3:
2201                 /* Drop writes to this legacy MSR -- see rdmsr
2202                  * counterpart for further detail.
2203                  */
2204                 vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n", msr, data);
2205                 break;
2206         case MSR_AMD64_OSVW_ID_LENGTH:
2207                 if (!guest_cpuid_has_osvw(vcpu))
2208                         return 1;
2209                 vcpu->arch.osvw.length = data;
2210                 break;
2211         case MSR_AMD64_OSVW_STATUS:
2212                 if (!guest_cpuid_has_osvw(vcpu))
2213                         return 1;
2214                 vcpu->arch.osvw.status = data;
2215                 break;
2216         default:
2217                 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
2218                         return xen_hvm_config(vcpu, data);
2219                 if (kvm_pmu_is_valid_msr(vcpu, msr))
2220                         return kvm_pmu_set_msr(vcpu, msr_info);
2221                 if (!ignore_msrs) {
2222                         vcpu_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
2223                                     msr, data);
2224                         return 1;
2225                 } else {
2226                         vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
2227                                     msr, data);
2228                         break;
2229                 }
2230         }
2231         return 0;
2232 }
2233 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
2234
2235
2236 /*
2237  * Reads an msr value (of 'msr_index') into 'pdata'.
2238  * Returns 0 on success, non-0 otherwise.
2239  * Assumes vcpu_load() was already called.
2240  */
2241 int kvm_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
2242 {
2243         return kvm_x86_ops->get_msr(vcpu, msr);
2244 }
2245 EXPORT_SYMBOL_GPL(kvm_get_msr);
2246
2247 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2248 {
2249         u64 data;
2250         u64 mcg_cap = vcpu->arch.mcg_cap;
2251         unsigned bank_num = mcg_cap & 0xff;
2252
2253         switch (msr) {
2254         case MSR_IA32_P5_MC_ADDR:
2255         case MSR_IA32_P5_MC_TYPE:
2256                 data = 0;
2257                 break;
2258         case MSR_IA32_MCG_CAP:
2259                 data = vcpu->arch.mcg_cap;
2260                 break;
2261         case MSR_IA32_MCG_CTL:
2262                 if (!(mcg_cap & MCG_CTL_P))
2263                         return 1;
2264                 data = vcpu->arch.mcg_ctl;
2265                 break;
2266         case MSR_IA32_MCG_STATUS:
2267                 data = vcpu->arch.mcg_status;
2268                 break;
2269         default:
2270                 if (msr >= MSR_IA32_MC0_CTL &&
2271                     msr < MSR_IA32_MCx_CTL(bank_num)) {
2272                         u32 offset = msr - MSR_IA32_MC0_CTL;
2273                         data = vcpu->arch.mce_banks[offset];
2274                         break;
2275                 }
2276                 return 1;
2277         }
2278         *pdata = data;
2279         return 0;
2280 }
2281
2282 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2283 {
2284         switch (msr_info->index) {
2285         case MSR_IA32_PLATFORM_ID:
2286         case MSR_IA32_EBL_CR_POWERON:
2287         case MSR_IA32_DEBUGCTLMSR:
2288         case MSR_IA32_LASTBRANCHFROMIP:
2289         case MSR_IA32_LASTBRANCHTOIP:
2290         case MSR_IA32_LASTINTFROMIP:
2291         case MSR_IA32_LASTINTTOIP:
2292         case MSR_K8_SYSCFG:
2293         case MSR_K8_TSEG_ADDR:
2294         case MSR_K8_TSEG_MASK:
2295         case MSR_K7_HWCR:
2296         case MSR_VM_HSAVE_PA:
2297         case MSR_K8_INT_PENDING_MSG:
2298         case MSR_AMD64_NB_CFG:
2299         case MSR_FAM10H_MMIO_CONF_BASE:
2300         case MSR_AMD64_BU_CFG2:
2301                 msr_info->data = 0;
2302                 break;
2303         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
2304         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
2305         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
2306         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
2307                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
2308                         return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);
2309                 msr_info->data = 0;
2310                 break;
2311         case MSR_IA32_UCODE_REV:
2312                 msr_info->data = 0x100000000ULL;
2313                 break;
2314         case MSR_MTRRcap:
2315         case 0x200 ... 0x2ff:
2316                 return kvm_mtrr_get_msr(vcpu, msr_info->index, &msr_info->data);
2317         case 0xcd: /* fsb frequency */
2318                 msr_info->data = 3;
2319                 break;
2320                 /*
2321                  * MSR_EBC_FREQUENCY_ID
2322                  * Conservative value valid for even the basic CPU models.
2323                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
2324                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
2325                  * and 266MHz for model 3, or 4. Set Core Clock
2326                  * Frequency to System Bus Frequency Ratio to 1 (bits
2327                  * 31:24) even though these are only valid for CPU
2328                  * models > 2, however guests may end up dividing or
2329                  * multiplying by zero otherwise.
2330                  */
2331         case MSR_EBC_FREQUENCY_ID:
2332                 msr_info->data = 1 << 24;
2333                 break;
2334         case MSR_IA32_APICBASE:
2335                 msr_info->data = kvm_get_apic_base(vcpu);
2336                 break;
2337         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2338                 return kvm_x2apic_msr_read(vcpu, msr_info->index, &msr_info->data);
2339                 break;
2340         case MSR_IA32_TSCDEADLINE:
2341                 msr_info->data = kvm_get_lapic_tscdeadline_msr(vcpu);
2342                 break;
2343         case MSR_IA32_TSC_ADJUST:
2344                 msr_info->data = (u64)vcpu->arch.ia32_tsc_adjust_msr;
2345                 break;
2346         case MSR_IA32_MISC_ENABLE:
2347                 msr_info->data = vcpu->arch.ia32_misc_enable_msr;
2348                 break;
2349         case MSR_IA32_SMBASE:
2350                 if (!msr_info->host_initiated)
2351                         return 1;
2352                 msr_info->data = vcpu->arch.smbase;
2353                 break;
2354         case MSR_IA32_PERF_STATUS:
2355                 /* TSC increment by tick */
2356                 msr_info->data = 1000ULL;
2357                 /* CPU multiplier */
2358                 msr_info->data |= (((uint64_t)4ULL) << 40);
2359                 break;
2360         case MSR_EFER:
2361                 msr_info->data = vcpu->arch.efer;
2362                 break;
2363         case MSR_KVM_WALL_CLOCK:
2364         case MSR_KVM_WALL_CLOCK_NEW:
2365                 msr_info->data = vcpu->kvm->arch.wall_clock;
2366                 break;
2367         case MSR_KVM_SYSTEM_TIME:
2368         case MSR_KVM_SYSTEM_TIME_NEW:
2369                 msr_info->data = vcpu->arch.time;
2370                 break;
2371         case MSR_KVM_ASYNC_PF_EN:
2372                 msr_info->data = vcpu->arch.apf.msr_val;
2373                 break;
2374         case MSR_KVM_STEAL_TIME:
2375                 msr_info->data = vcpu->arch.st.msr_val;
2376                 break;
2377         case MSR_KVM_PV_EOI_EN:
2378                 msr_info->data = vcpu->arch.pv_eoi.msr_val;
2379                 break;
2380         case MSR_IA32_P5_MC_ADDR:
2381         case MSR_IA32_P5_MC_TYPE:
2382         case MSR_IA32_MCG_CAP:
2383         case MSR_IA32_MCG_CTL:
2384         case MSR_IA32_MCG_STATUS:
2385         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
2386                 return get_msr_mce(vcpu, msr_info->index, &msr_info->data);
2387         case MSR_K7_CLK_CTL:
2388                 /*
2389                  * Provide expected ramp-up count for K7. All other
2390                  * are set to zero, indicating minimum divisors for
2391                  * every field.
2392                  *
2393                  * This prevents guest kernels on AMD host with CPU
2394                  * type 6, model 8 and higher from exploding due to
2395                  * the rdmsr failing.
2396                  */
2397                 msr_info->data = 0x20000000;
2398                 break;
2399         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2400         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
2401         case HV_X64_MSR_CRASH_CTL:
2402                 return kvm_hv_get_msr_common(vcpu,
2403                                              msr_info->index, &msr_info->data);
2404                 break;
2405         case MSR_IA32_BBL_CR_CTL3:
2406                 /* This legacy MSR exists but isn't fully documented in current
2407                  * silicon.  It is however accessed by winxp in very narrow
2408                  * scenarios where it sets bit #19, itself documented as
2409                  * a "reserved" bit.  Best effort attempt to source coherent
2410                  * read data here should the balance of the register be
2411                  * interpreted by the guest:
2412                  *
2413                  * L2 cache control register 3: 64GB range, 256KB size,
2414                  * enabled, latency 0x1, configured
2415                  */
2416                 msr_info->data = 0xbe702111;
2417                 break;
2418         case MSR_AMD64_OSVW_ID_LENGTH:
2419                 if (!guest_cpuid_has_osvw(vcpu))
2420                         return 1;
2421                 msr_info->data = vcpu->arch.osvw.length;
2422                 break;
2423         case MSR_AMD64_OSVW_STATUS:
2424                 if (!guest_cpuid_has_osvw(vcpu))
2425                         return 1;
2426                 msr_info->data = vcpu->arch.osvw.status;
2427                 break;
2428         default:
2429                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
2430                         return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);
2431                 if (!ignore_msrs) {
2432                         vcpu_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr_info->index);
2433                         return 1;
2434                 } else {
2435                         vcpu_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr_info->index);
2436                         msr_info->data = 0;
2437                 }
2438                 break;
2439         }
2440         return 0;
2441 }
2442 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
2443
2444 /*
2445  * Read or write a bunch of msrs. All parameters are kernel addresses.
2446  *
2447  * @return number of msrs set successfully.
2448  */
2449 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
2450                     struct kvm_msr_entry *entries,
2451                     int (*do_msr)(struct kvm_vcpu *vcpu,
2452                                   unsigned index, u64 *data))
2453 {
2454         int i, idx;
2455
2456         idx = srcu_read_lock(&vcpu->kvm->srcu);
2457         for (i = 0; i < msrs->nmsrs; ++i)
2458                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
2459                         break;
2460         srcu_read_unlock(&vcpu->kvm->srcu, idx);
2461
2462         return i;
2463 }
2464
2465 /*
2466  * Read or write a bunch of msrs. Parameters are user addresses.
2467  *
2468  * @return number of msrs set successfully.
2469  */
2470 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
2471                   int (*do_msr)(struct kvm_vcpu *vcpu,
2472                                 unsigned index, u64 *data),
2473                   int writeback)
2474 {
2475         struct kvm_msrs msrs;
2476         struct kvm_msr_entry *entries;
2477         int r, n;
2478         unsigned size;
2479
2480         r = -EFAULT;
2481         if (copy_from_user(&msrs, user_msrs, sizeof msrs))
2482                 goto out;
2483
2484         r = -E2BIG;
2485         if (msrs.nmsrs >= MAX_IO_MSRS)
2486                 goto out;
2487
2488         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
2489         entries = memdup_user(user_msrs->entries, size);
2490         if (IS_ERR(entries)) {
2491                 r = PTR_ERR(entries);
2492                 goto out;
2493         }
2494
2495         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
2496         if (r < 0)
2497                 goto out_free;
2498
2499         r = -EFAULT;
2500         if (writeback && copy_to_user(user_msrs->entries, entries, size))
2501                 goto out_free;
2502
2503         r = n;
2504
2505 out_free:
2506         kfree(entries);
2507 out:
2508         return r;
2509 }
2510
2511 int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
2512 {
2513         int r;
2514
2515         switch (ext) {
2516         case KVM_CAP_IRQCHIP:
2517         case KVM_CAP_HLT:
2518         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
2519         case KVM_CAP_SET_TSS_ADDR:
2520         case KVM_CAP_EXT_CPUID:
2521         case KVM_CAP_EXT_EMUL_CPUID:
2522         case KVM_CAP_CLOCKSOURCE:
2523         case KVM_CAP_PIT:
2524         case KVM_CAP_NOP_IO_DELAY:
2525         case KVM_CAP_MP_STATE:
2526         case KVM_CAP_SYNC_MMU:
2527         case KVM_CAP_USER_NMI:
2528         case KVM_CAP_REINJECT_CONTROL:
2529         case KVM_CAP_IRQ_INJECT_STATUS:
2530         case KVM_CAP_IOEVENTFD:
2531         case KVM_CAP_IOEVENTFD_NO_LENGTH:
2532         case KVM_CAP_PIT2:
2533         case KVM_CAP_PIT_STATE2:
2534         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
2535         case KVM_CAP_XEN_HVM:
2536         case KVM_CAP_ADJUST_CLOCK:
2537         case KVM_CAP_VCPU_EVENTS:
2538         case KVM_CAP_HYPERV:
2539         case KVM_CAP_HYPERV_VAPIC:
2540         case KVM_CAP_HYPERV_SPIN:
2541         case KVM_CAP_PCI_SEGMENT:
2542         case KVM_CAP_DEBUGREGS:
2543         case KVM_CAP_X86_ROBUST_SINGLESTEP:
2544         case KVM_CAP_XSAVE:
2545         case KVM_CAP_ASYNC_PF:
2546         case KVM_CAP_GET_TSC_KHZ:
2547         case KVM_CAP_KVMCLOCK_CTRL:
2548         case KVM_CAP_READONLY_MEM:
2549         case KVM_CAP_HYPERV_TIME:
2550         case KVM_CAP_IOAPIC_POLARITY_IGNORED:
2551         case KVM_CAP_TSC_DEADLINE_TIMER:
2552         case KVM_CAP_ENABLE_CAP_VM:
2553         case KVM_CAP_DISABLE_QUIRKS:
2554         case KVM_CAP_SET_BOOT_CPU_ID:
2555         case KVM_CAP_SPLIT_IRQCHIP:
2556 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2557         case KVM_CAP_ASSIGN_DEV_IRQ:
2558         case KVM_CAP_PCI_2_3:
2559 #endif
2560                 r = 1;
2561                 break;
2562         case KVM_CAP_X86_SMM:
2563                 /* SMBASE is usually relocated above 1M on modern chipsets,
2564                  * and SMM handlers might indeed rely on 4G segment limits,
2565                  * so do not report SMM to be available if real mode is
2566                  * emulated via vm86 mode.  Still, do not go to great lengths
2567                  * to avoid userspace's usage of the feature, because it is a
2568                  * fringe case that is not enabled except via specific settings
2569                  * of the module parameters.
2570                  */
2571                 r = kvm_x86_ops->cpu_has_high_real_mode_segbase();
2572                 break;
2573         case KVM_CAP_COALESCED_MMIO:
2574                 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
2575                 break;
2576         case KVM_CAP_VAPIC:
2577                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
2578                 break;
2579         case KVM_CAP_NR_VCPUS:
2580                 r = KVM_SOFT_MAX_VCPUS;
2581                 break;
2582         case KVM_CAP_MAX_VCPUS:
2583                 r = KVM_MAX_VCPUS;
2584                 break;
2585         case KVM_CAP_NR_MEMSLOTS:
2586                 r = KVM_USER_MEM_SLOTS;
2587                 break;
2588         case KVM_CAP_PV_MMU:    /* obsolete */
2589                 r = 0;
2590                 break;
2591 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2592         case KVM_CAP_IOMMU:
2593                 r = iommu_present(&pci_bus_type);
2594                 break;
2595 #endif
2596         case KVM_CAP_MCE:
2597                 r = KVM_MAX_MCE_BANKS;
2598                 break;
2599         case KVM_CAP_XCRS:
2600                 r = cpu_has_xsave;
2601                 break;
2602         case KVM_CAP_TSC_CONTROL:
2603                 r = kvm_has_tsc_control;
2604                 break;
2605         default:
2606                 r = 0;
2607                 break;
2608         }
2609         return r;
2610
2611 }
2612
2613 long kvm_arch_dev_ioctl(struct file *filp,
2614                         unsigned int ioctl, unsigned long arg)
2615 {
2616         void __user *argp = (void __user *)arg;
2617         long r;
2618
2619         switch (ioctl) {
2620         case KVM_GET_MSR_INDEX_LIST: {
2621                 struct kvm_msr_list __user *user_msr_list = argp;
2622                 struct kvm_msr_list msr_list;
2623                 unsigned n;
2624
2625                 r = -EFAULT;
2626                 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
2627                         goto out;
2628                 n = msr_list.nmsrs;
2629                 msr_list.nmsrs = num_msrs_to_save + num_emulated_msrs;
2630                 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
2631                         goto out;
2632                 r = -E2BIG;
2633                 if (n < msr_list.nmsrs)
2634                         goto out;
2635                 r = -EFAULT;
2636                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
2637                                  num_msrs_to_save * sizeof(u32)))
2638                         goto out;
2639                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
2640                                  &emulated_msrs,
2641                                  num_emulated_msrs * sizeof(u32)))
2642                         goto out;
2643                 r = 0;
2644                 break;
2645         }
2646         case KVM_GET_SUPPORTED_CPUID:
2647         case KVM_GET_EMULATED_CPUID: {
2648                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2649                 struct kvm_cpuid2 cpuid;
2650
2651                 r = -EFAULT;
2652                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2653                         goto out;
2654
2655                 r = kvm_dev_ioctl_get_cpuid(&cpuid, cpuid_arg->entries,
2656                                             ioctl);
2657                 if (r)
2658                         goto out;
2659
2660                 r = -EFAULT;
2661                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2662                         goto out;
2663                 r = 0;
2664                 break;
2665         }
2666         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
2667                 u64 mce_cap;
2668
2669                 mce_cap = KVM_MCE_CAP_SUPPORTED;
2670                 r = -EFAULT;
2671                 if (copy_to_user(argp, &mce_cap, sizeof mce_cap))
2672                         goto out;
2673                 r = 0;
2674                 break;
2675         }
2676         default:
2677                 r = -EINVAL;
2678         }
2679 out:
2680         return r;
2681 }
2682
2683 static void wbinvd_ipi(void *garbage)
2684 {
2685         wbinvd();
2686 }
2687
2688 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
2689 {
2690         return kvm_arch_has_noncoherent_dma(vcpu->kvm);
2691 }
2692
2693 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
2694 {
2695         /* Address WBINVD may be executed by guest */
2696         if (need_emulate_wbinvd(vcpu)) {
2697                 if (kvm_x86_ops->has_wbinvd_exit())
2698                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
2699                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
2700                         smp_call_function_single(vcpu->cpu,
2701                                         wbinvd_ipi, NULL, 1);
2702         }
2703
2704         kvm_x86_ops->vcpu_load(vcpu, cpu);
2705
2706         /* Apply any externally detected TSC adjustments (due to suspend) */
2707         if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
2708                 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
2709                 vcpu->arch.tsc_offset_adjustment = 0;
2710                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2711         }
2712
2713         if (unlikely(vcpu->cpu != cpu) || check_tsc_unstable()) {
2714                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
2715                                 rdtsc() - vcpu->arch.last_host_tsc;
2716                 if (tsc_delta < 0)
2717                         mark_tsc_unstable("KVM discovered backwards TSC");
2718                 if (check_tsc_unstable()) {
2719                         u64 offset = kvm_compute_tsc_offset(vcpu,
2720                                                 vcpu->arch.last_guest_tsc);
2721                         kvm_x86_ops->write_tsc_offset(vcpu, offset);
2722                         vcpu->arch.tsc_catchup = 1;
2723                 }
2724                 /*
2725                  * On a host with synchronized TSC, there is no need to update
2726                  * kvmclock on vcpu->cpu migration
2727                  */
2728                 if (!vcpu->kvm->arch.use_master_clock || vcpu->cpu == -1)
2729                         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2730                 if (vcpu->cpu != cpu)
2731                         kvm_migrate_timers(vcpu);
2732                 vcpu->cpu = cpu;
2733         }
2734
2735         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2736 }
2737
2738 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
2739 {
2740         kvm_x86_ops->vcpu_put(vcpu);
2741         kvm_put_guest_fpu(vcpu);
2742         vcpu->arch.last_host_tsc = rdtsc();
2743 }
2744
2745 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
2746                                     struct kvm_lapic_state *s)
2747 {
2748         kvm_x86_ops->sync_pir_to_irr(vcpu);
2749         memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
2750
2751         return 0;
2752 }
2753
2754 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
2755                                     struct kvm_lapic_state *s)
2756 {
2757         kvm_apic_post_state_restore(vcpu, s);
2758         update_cr8_intercept(vcpu);
2759
2760         return 0;
2761 }
2762
2763 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
2764                                     struct kvm_interrupt *irq)
2765 {
2766         if (irq->irq >= KVM_NR_INTERRUPTS)
2767                 return -EINVAL;
2768
2769         if (!irqchip_in_kernel(vcpu->kvm)) {
2770                 kvm_queue_interrupt(vcpu, irq->irq, false);
2771                 kvm_make_request(KVM_REQ_EVENT, vcpu);
2772                 return 0;
2773         }
2774
2775         /*
2776          * With in-kernel LAPIC, we only use this to inject EXTINT, so
2777          * fail for in-kernel 8259.
2778          */
2779         if (pic_in_kernel(vcpu->kvm))
2780                 return -ENXIO;
2781
2782         if (vcpu->arch.pending_external_vector != -1)
2783                 return -EEXIST;
2784
2785         vcpu->arch.pending_external_vector = irq->irq;
2786         return 0;
2787 }
2788
2789 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
2790 {
2791         kvm_inject_nmi(vcpu);
2792
2793         return 0;
2794 }
2795
2796 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu *vcpu)
2797 {
2798         kvm_make_request(KVM_REQ_SMI, vcpu);
2799
2800         return 0;
2801 }
2802
2803 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
2804                                            struct kvm_tpr_access_ctl *tac)
2805 {
2806         if (tac->flags)
2807                 return -EINVAL;
2808         vcpu->arch.tpr_access_reporting = !!tac->enabled;
2809         return 0;
2810 }
2811
2812 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
2813                                         u64 mcg_cap)
2814 {
2815         int r;
2816         unsigned bank_num = mcg_cap & 0xff, bank;
2817
2818         r = -EINVAL;
2819         if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
2820                 goto out;
2821         if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000))
2822                 goto out;
2823         r = 0;
2824         vcpu->arch.mcg_cap = mcg_cap;
2825         /* Init IA32_MCG_CTL to all 1s */
2826         if (mcg_cap & MCG_CTL_P)
2827                 vcpu->arch.mcg_ctl = ~(u64)0;
2828         /* Init IA32_MCi_CTL to all 1s */
2829         for (bank = 0; bank < bank_num; bank++)
2830                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
2831 out:
2832         return r;
2833 }
2834
2835 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
2836                                       struct kvm_x86_mce *mce)
2837 {
2838         u64 mcg_cap = vcpu->arch.mcg_cap;
2839         unsigned bank_num = mcg_cap & 0xff;
2840         u64 *banks = vcpu->arch.mce_banks;
2841
2842         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
2843                 return -EINVAL;
2844         /*
2845          * if IA32_MCG_CTL is not all 1s, the uncorrected error
2846          * reporting is disabled
2847          */
2848         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
2849             vcpu->arch.mcg_ctl != ~(u64)0)
2850                 return 0;
2851         banks += 4 * mce->bank;
2852         /*
2853          * if IA32_MCi_CTL is not all 1s, the uncorrected error
2854          * reporting is disabled for the bank
2855          */
2856         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
2857                 return 0;
2858         if (mce->status & MCI_STATUS_UC) {
2859                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
2860                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
2861                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
2862                         return 0;
2863                 }
2864                 if (banks[1] & MCI_STATUS_VAL)
2865                         mce->status |= MCI_STATUS_OVER;
2866                 banks[2] = mce->addr;
2867                 banks[3] = mce->misc;
2868                 vcpu->arch.mcg_status = mce->mcg_status;
2869                 banks[1] = mce->status;
2870                 kvm_queue_exception(vcpu, MC_VECTOR);
2871         } else if (!(banks[1] & MCI_STATUS_VAL)
2872                    || !(banks[1] & MCI_STATUS_UC)) {
2873                 if (banks[1] & MCI_STATUS_VAL)
2874                         mce->status |= MCI_STATUS_OVER;
2875                 banks[2] = mce->addr;
2876                 banks[3] = mce->misc;
2877                 banks[1] = mce->status;
2878         } else
2879                 banks[1] |= MCI_STATUS_OVER;
2880         return 0;
2881 }
2882
2883 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
2884                                                struct kvm_vcpu_events *events)
2885 {
2886         process_nmi(vcpu);
2887         events->exception.injected =
2888                 vcpu->arch.exception.pending &&
2889                 !kvm_exception_is_soft(vcpu->arch.exception.nr);
2890         events->exception.nr = vcpu->arch.exception.nr;
2891         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
2892         events->exception.pad = 0;
2893         events->exception.error_code = vcpu->arch.exception.error_code;
2894
2895         events->interrupt.injected =
2896                 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
2897         events->interrupt.nr = vcpu->arch.interrupt.nr;
2898         events->interrupt.soft = 0;
2899         events->interrupt.shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
2900
2901         events->nmi.injected = vcpu->arch.nmi_injected;
2902         events->nmi.pending = vcpu->arch.nmi_pending != 0;
2903         events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
2904         events->nmi.pad = 0;
2905
2906         events->sipi_vector = 0; /* never valid when reporting to user space */
2907
2908         events->smi.smm = is_smm(vcpu);
2909         events->smi.pending = vcpu->arch.smi_pending;
2910         events->smi.smm_inside_nmi =
2911                 !!(vcpu->arch.hflags & HF_SMM_INSIDE_NMI_MASK);
2912         events->smi.latched_init = kvm_lapic_latched_init(vcpu);
2913
2914         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
2915                          | KVM_VCPUEVENT_VALID_SHADOW
2916                          | KVM_VCPUEVENT_VALID_SMM);
2917         memset(&events->reserved, 0, sizeof(events->reserved));
2918 }
2919
2920 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
2921                                               struct kvm_vcpu_events *events)
2922 {
2923         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2924                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2925                               | KVM_VCPUEVENT_VALID_SHADOW
2926                               | KVM_VCPUEVENT_VALID_SMM))
2927                 return -EINVAL;
2928
2929         process_nmi(vcpu);
2930         vcpu->arch.exception.pending = events->exception.injected;
2931         vcpu->arch.exception.nr = events->exception.nr;
2932         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
2933         vcpu->arch.exception.error_code = events->exception.error_code;
2934
2935         vcpu->arch.interrupt.pending = events->interrupt.injected;
2936         vcpu->arch.interrupt.nr = events->interrupt.nr;
2937         vcpu->arch.interrupt.soft = events->interrupt.soft;
2938         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
2939                 kvm_x86_ops->set_interrupt_shadow(vcpu,
2940                                                   events->interrupt.shadow);
2941
2942         vcpu->arch.nmi_injected = events->nmi.injected;
2943         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
2944                 vcpu->arch.nmi_pending = events->nmi.pending;
2945         kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
2946
2947         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR &&
2948             kvm_vcpu_has_lapic(vcpu))
2949                 vcpu->arch.apic->sipi_vector = events->sipi_vector;
2950
2951         if (events->flags & KVM_VCPUEVENT_VALID_SMM) {
2952                 if (events->smi.smm)
2953                         vcpu->arch.hflags |= HF_SMM_MASK;
2954                 else
2955                         vcpu->arch.hflags &= ~HF_SMM_MASK;
2956                 vcpu->arch.smi_pending = events->smi.pending;
2957                 if (events->smi.smm_inside_nmi)
2958                         vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
2959                 else
2960                         vcpu->arch.hflags &= ~HF_SMM_INSIDE_NMI_MASK;
2961                 if (kvm_vcpu_has_lapic(vcpu)) {
2962                         if (events->smi.latched_init)
2963                                 set_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
2964                         else
2965                                 clear_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
2966                 }
2967         }
2968
2969         kvm_make_request(KVM_REQ_EVENT, vcpu);
2970
2971         return 0;
2972 }
2973
2974 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
2975                                              struct kvm_debugregs *dbgregs)
2976 {
2977         unsigned long val;
2978
2979         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
2980         kvm_get_dr(vcpu, 6, &val);
2981         dbgregs->dr6 = val;
2982         dbgregs->dr7 = vcpu->arch.dr7;
2983         dbgregs->flags = 0;
2984         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
2985 }
2986
2987 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
2988                                             struct kvm_debugregs *dbgregs)
2989 {
2990         if (dbgregs->flags)
2991                 return -EINVAL;
2992
2993         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
2994         kvm_update_dr0123(vcpu);
2995         vcpu->arch.dr6 = dbgregs->dr6;
2996         kvm_update_dr6(vcpu);
2997         vcpu->arch.dr7 = dbgregs->dr7;
2998         kvm_update_dr7(vcpu);
2999
3000         return 0;
3001 }
3002
3003 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
3004
3005 static void fill_xsave(u8 *dest, struct kvm_vcpu *vcpu)
3006 {
3007         struct xregs_state *xsave = &vcpu->arch.guest_fpu.state.xsave;
3008         u64 xstate_bv = xsave->header.xfeatures;
3009         u64 valid;
3010
3011         /*
3012          * Copy legacy XSAVE area, to avoid complications with CPUID
3013          * leaves 0 and 1 in the loop below.
3014          */
3015         memcpy(dest, xsave, XSAVE_HDR_OFFSET);
3016
3017         /* Set XSTATE_BV */
3018         *(u64 *)(dest + XSAVE_HDR_OFFSET) = xstate_bv;
3019
3020         /*
3021          * Copy each region from the possibly compacted offset to the
3022          * non-compacted offset.
3023          */
3024         valid = xstate_bv & ~XSTATE_FPSSE;
3025         while (valid) {
3026                 u64 feature = valid & -valid;
3027                 int index = fls64(feature) - 1;
3028                 void *src = get_xsave_addr(xsave, feature);
3029
3030                 if (src) {
3031                         u32 size, offset, ecx, edx;
3032                         cpuid_count(XSTATE_CPUID, index,
3033                                     &size, &offset, &ecx, &edx);
3034                         memcpy(dest + offset, src, size);
3035                 }
3036
3037                 valid -= feature;
3038         }
3039 }
3040
3041 static void load_xsave(struct kvm_vcpu *vcpu, u8 *src)
3042 {
3043         struct xregs_state *xsave = &vcpu->arch.guest_fpu.state.xsave;
3044         u64 xstate_bv = *(u64 *)(src + XSAVE_HDR_OFFSET);
3045         u64 valid;
3046
3047         /*
3048          * Copy legacy XSAVE area, to avoid complications with CPUID
3049          * leaves 0 and 1 in the loop below.
3050          */
3051         memcpy(xsave, src, XSAVE_HDR_OFFSET);
3052
3053         /* Set XSTATE_BV and possibly XCOMP_BV.  */
3054         xsave->header.xfeatures = xstate_bv;
3055         if (cpu_has_xsaves)
3056                 xsave->header.xcomp_bv = host_xcr0 | XSTATE_COMPACTION_ENABLED;
3057
3058         /*
3059          * Copy each region from the non-compacted offset to the
3060          * possibly compacted offset.
3061          */
3062         valid = xstate_bv & ~XSTATE_FPSSE;
3063         while (valid) {
3064                 u64 feature = valid & -valid;
3065                 int index = fls64(feature) - 1;
3066                 void *dest = get_xsave_addr(xsave, feature);
3067
3068                 if (dest) {
3069                         u32 size, offset, ecx, edx;
3070                         cpuid_count(XSTATE_CPUID, index,
3071                                     &size, &offset, &ecx, &edx);
3072                         memcpy(dest, src + offset, size);
3073                 }
3074
3075                 valid -= feature;
3076         }
3077 }
3078
3079 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
3080                                          struct kvm_xsave *guest_xsave)
3081 {
3082         if (cpu_has_xsave) {
3083                 memset(guest_xsave, 0, sizeof(struct kvm_xsave));
3084                 fill_xsave((u8 *) guest_xsave->region, vcpu);
3085         } else {
3086                 memcpy(guest_xsave->region,
3087                         &vcpu->arch.guest_fpu.state.fxsave,
3088                         sizeof(struct fxregs_state));
3089                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
3090                         XSTATE_FPSSE;
3091         }
3092 }
3093
3094 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
3095                                         struct kvm_xsave *guest_xsave)
3096 {
3097         u64 xstate_bv =
3098                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
3099
3100         if (cpu_has_xsave) {
3101                 /*
3102                  * Here we allow setting states that are not present in
3103                  * CPUID leaf 0xD, index 0, EDX:EAX.  This is for compatibility
3104                  * with old userspace.
3105                  */
3106                 if (xstate_bv & ~kvm_supported_xcr0())
3107                         return -EINVAL;
3108                 load_xsave(vcpu, (u8 *)guest_xsave->region);
3109         } else {
3110                 if (xstate_bv & ~XSTATE_FPSSE)
3111                         return -EINVAL;
3112                 memcpy(&vcpu->arch.guest_fpu.state.fxsave,
3113                         guest_xsave->region, sizeof(struct fxregs_state));
3114         }
3115         return 0;
3116 }
3117
3118 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
3119                                         struct kvm_xcrs *guest_xcrs)
3120 {
3121         if (!cpu_has_xsave) {
3122                 guest_xcrs->nr_xcrs = 0;
3123                 return;
3124         }
3125
3126         guest_xcrs->nr_xcrs = 1;
3127         guest_xcrs->flags = 0;
3128         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
3129         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
3130 }
3131
3132 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
3133                                        struct kvm_xcrs *guest_xcrs)
3134 {
3135         int i, r = 0;
3136
3137         if (!cpu_has_xsave)
3138                 return -EINVAL;
3139
3140         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
3141                 return -EINVAL;
3142
3143         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
3144                 /* Only support XCR0 currently */
3145                 if (guest_xcrs->xcrs[i].xcr == XCR_XFEATURE_ENABLED_MASK) {
3146                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
3147                                 guest_xcrs->xcrs[i].value);
3148                         break;
3149                 }
3150         if (r)
3151                 r = -EINVAL;
3152         return r;
3153 }
3154
3155 /*
3156  * kvm_set_guest_paused() indicates to the guest kernel that it has been
3157  * stopped by the hypervisor.  This function will be called from the host only.
3158  * EINVAL is returned when the host attempts to set the flag for a guest that
3159  * does not support pv clocks.
3160  */
3161 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
3162 {
3163         if (!vcpu->arch.pv_time_enabled)
3164                 return -EINVAL;
3165         vcpu->arch.pvclock_set_guest_stopped_request = true;
3166         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3167         return 0;
3168 }
3169
3170 long kvm_arch_vcpu_ioctl(struct file *filp,
3171                          unsigned int ioctl, unsigned long arg)
3172 {
3173         struct kvm_vcpu *vcpu = filp->private_data;
3174         void __user *argp = (void __user *)arg;
3175         int r;
3176         union {
3177                 struct kvm_lapic_state *lapic;
3178                 struct kvm_xsave *xsave;
3179                 struct kvm_xcrs *xcrs;
3180                 void *buffer;
3181         } u;
3182
3183         u.buffer = NULL;
3184         switch (ioctl) {
3185         case KVM_GET_LAPIC: {
3186                 r = -EINVAL;
3187                 if (!vcpu->arch.apic)
3188                         goto out;
3189                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
3190
3191                 r = -ENOMEM;
3192                 if (!u.lapic)
3193                         goto out;
3194                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
3195                 if (r)
3196                         goto out;
3197                 r = -EFAULT;
3198                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
3199                         goto out;
3200                 r = 0;
3201                 break;
3202         }
3203         case KVM_SET_LAPIC: {
3204                 r = -EINVAL;
3205                 if (!vcpu->arch.apic)
3206                         goto out;
3207                 u.lapic = memdup_user(argp, sizeof(*u.lapic));
3208                 if (IS_ERR(u.lapic))
3209                         return PTR_ERR(u.lapic);
3210
3211                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
3212                 break;
3213         }
3214         case KVM_INTERRUPT: {
3215                 struct kvm_interrupt irq;
3216
3217                 r = -EFAULT;
3218                 if (copy_from_user(&irq, argp, sizeof irq))
3219                         goto out;
3220                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
3221                 break;
3222         }
3223         case KVM_NMI: {
3224                 r = kvm_vcpu_ioctl_nmi(vcpu);
3225                 break;
3226         }
3227         case KVM_SMI: {
3228                 r = kvm_vcpu_ioctl_smi(vcpu);
3229                 break;
3230         }
3231         case KVM_SET_CPUID: {
3232                 struct kvm_cpuid __user *cpuid_arg = argp;
3233                 struct kvm_cpuid cpuid;
3234
3235                 r = -EFAULT;
3236                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3237                         goto out;
3238                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
3239                 break;
3240         }
3241         case KVM_SET_CPUID2: {
3242                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3243                 struct kvm_cpuid2 cpuid;
3244
3245                 r = -EFAULT;
3246                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3247                         goto out;
3248                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
3249                                               cpuid_arg->entries);
3250                 break;
3251         }
3252         case KVM_GET_CPUID2: {
3253                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3254                 struct kvm_cpuid2 cpuid;
3255
3256                 r = -EFAULT;
3257                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3258                         goto out;
3259                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
3260                                               cpuid_arg->entries);
3261                 if (r)
3262                         goto out;
3263                 r = -EFAULT;
3264                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
3265                         goto out;
3266                 r = 0;
3267                 break;
3268         }
3269         case KVM_GET_MSRS:
3270                 r = msr_io(vcpu, argp, do_get_msr, 1);
3271                 break;
3272         case KVM_SET_MSRS:
3273                 r = msr_io(vcpu, argp, do_set_msr, 0);
3274                 break;
3275         case KVM_TPR_ACCESS_REPORTING: {
3276                 struct kvm_tpr_access_ctl tac;
3277
3278                 r = -EFAULT;
3279                 if (copy_from_user(&tac, argp, sizeof tac))
3280                         goto out;
3281                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
3282                 if (r)
3283                         goto out;
3284                 r = -EFAULT;
3285                 if (copy_to_user(argp, &tac, sizeof tac))
3286                         goto out;
3287                 r = 0;
3288                 break;
3289         };
3290         case KVM_SET_VAPIC_ADDR: {
3291                 struct kvm_vapic_addr va;
3292
3293                 r = -EINVAL;
3294                 if (!lapic_in_kernel(vcpu))
3295                         goto out;
3296                 r = -EFAULT;
3297                 if (copy_from_user(&va, argp, sizeof va))
3298                         goto out;
3299                 r = kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
3300                 break;
3301         }
3302         case KVM_X86_SETUP_MCE: {
3303                 u64 mcg_cap;
3304
3305                 r = -EFAULT;
3306                 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
3307                         goto out;
3308                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
3309                 break;
3310         }
3311         case KVM_X86_SET_MCE: {
3312                 struct kvm_x86_mce mce;
3313
3314                 r = -EFAULT;
3315                 if (copy_from_user(&mce, argp, sizeof mce))
3316                         goto out;
3317                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
3318                 break;
3319         }
3320         case KVM_GET_VCPU_EVENTS: {
3321                 struct kvm_vcpu_events events;
3322
3323                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
3324
3325                 r = -EFAULT;
3326                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
3327                         break;
3328                 r = 0;
3329                 break;
3330         }
3331         case KVM_SET_VCPU_EVENTS: {
3332                 struct kvm_vcpu_events events;
3333
3334                 r = -EFAULT;
3335                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
3336                         break;
3337
3338                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
3339                 break;
3340         }
3341         case KVM_GET_DEBUGREGS: {
3342                 struct kvm_debugregs dbgregs;
3343
3344                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
3345
3346                 r = -EFAULT;
3347                 if (copy_to_user(argp, &dbgregs,
3348                                  sizeof(struct kvm_debugregs)))
3349                         break;
3350                 r = 0;
3351                 break;
3352         }
3353         case KVM_SET_DEBUGREGS: {
3354                 struct kvm_debugregs dbgregs;
3355
3356                 r = -EFAULT;
3357                 if (copy_from_user(&dbgregs, argp,
3358                                    sizeof(struct kvm_debugregs)))
3359                         break;
3360
3361                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
3362                 break;
3363         }
3364         case KVM_GET_XSAVE: {
3365                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
3366                 r = -ENOMEM;
3367                 if (!u.xsave)
3368                         break;
3369
3370                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
3371
3372                 r = -EFAULT;
3373                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
3374                         break;
3375                 r = 0;
3376                 break;
3377         }
3378         case KVM_SET_XSAVE: {
3379                 u.xsave = memdup_user(argp, sizeof(*u.xsave));
3380                 if (IS_ERR(u.xsave))
3381                         return PTR_ERR(u.xsave);
3382
3383                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
3384                 break;
3385         }
3386         case KVM_GET_XCRS: {
3387                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
3388                 r = -ENOMEM;
3389                 if (!u.xcrs)
3390                         break;
3391
3392                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
3393
3394                 r = -EFAULT;
3395                 if (copy_to_user(argp, u.xcrs,
3396                                  sizeof(struct kvm_xcrs)))
3397                         break;
3398                 r = 0;
3399                 break;
3400         }
3401         case KVM_SET_XCRS: {
3402                 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
3403                 if (IS_ERR(u.xcrs))
3404                         return PTR_ERR(u.xcrs);
3405
3406                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
3407                 break;
3408         }
3409         case KVM_SET_TSC_KHZ: {
3410                 u32 user_tsc_khz;
3411
3412                 r = -EINVAL;
3413                 user_tsc_khz = (u32)arg;
3414
3415                 if (user_tsc_khz >= kvm_max_guest_tsc_khz)
3416                         goto out;
3417
3418                 if (user_tsc_khz == 0)
3419                         user_tsc_khz = tsc_khz;
3420
3421                 if (!kvm_set_tsc_khz(vcpu, user_tsc_khz))
3422                         r = 0;
3423
3424                 goto out;
3425         }
3426         case KVM_GET_TSC_KHZ: {
3427                 r = vcpu->arch.virtual_tsc_khz;
3428                 goto out;
3429         }
3430         case KVM_KVMCLOCK_CTRL: {
3431                 r = kvm_set_guest_paused(vcpu);
3432                 goto out;
3433         }
3434         default:
3435                 r = -EINVAL;
3436         }
3437 out:
3438         kfree(u.buffer);
3439         return r;
3440 }
3441
3442 int kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
3443 {
3444         return VM_FAULT_SIGBUS;
3445 }
3446
3447 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
3448 {
3449         int ret;
3450
3451         if (addr > (unsigned int)(-3 * PAGE_SIZE))
3452                 return -EINVAL;
3453         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
3454         return ret;
3455 }
3456
3457 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
3458                                               u64 ident_addr)
3459 {
3460         kvm->arch.ept_identity_map_addr = ident_addr;
3461         return 0;
3462 }
3463
3464 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
3465                                           u32 kvm_nr_mmu_pages)
3466 {
3467         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
3468                 return -EINVAL;
3469
3470         mutex_lock(&kvm->slots_lock);
3471
3472         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
3473         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
3474
3475         mutex_unlock(&kvm->slots_lock);
3476         return 0;
3477 }
3478
3479 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
3480 {
3481         return kvm->arch.n_max_mmu_pages;
3482 }
3483
3484 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3485 {
3486         int r;
3487
3488         r = 0;
3489         switch (chip->chip_id) {
3490         case KVM_IRQCHIP_PIC_MASTER:
3491                 memcpy(&chip->chip.pic,
3492                         &pic_irqchip(kvm)->pics[0],
3493                         sizeof(struct kvm_pic_state));
3494                 break;
3495         case KVM_IRQCHIP_PIC_SLAVE:
3496                 memcpy(&chip->chip.pic,
3497                         &pic_irqchip(kvm)->pics[1],
3498                         sizeof(struct kvm_pic_state));
3499                 break;
3500         case KVM_IRQCHIP_IOAPIC:
3501                 r = kvm_get_ioapic(kvm, &chip->chip.ioapic);
3502                 break;
3503         default:
3504                 r = -EINVAL;
3505                 break;
3506         }
3507         return r;
3508 }
3509
3510 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3511 {
3512         int r;
3513
3514         r = 0;
3515         switch (chip->chip_id) {
3516         case KVM_IRQCHIP_PIC_MASTER:
3517                 spin_lock(&pic_irqchip(kvm)->lock);
3518                 memcpy(&pic_irqchip(kvm)->pics[0],
3519                         &chip->chip.pic,
3520                         sizeof(struct kvm_pic_state));
3521                 spin_unlock(&pic_irqchip(kvm)->lock);
3522                 break;
3523         case KVM_IRQCHIP_PIC_SLAVE:
3524                 spin_lock(&pic_irqchip(kvm)->lock);
3525                 memcpy(&pic_irqchip(kvm)->pics[1],
3526                         &chip->chip.pic,
3527                         sizeof(struct kvm_pic_state));
3528                 spin_unlock(&pic_irqchip(kvm)->lock);
3529                 break;
3530         case KVM_IRQCHIP_IOAPIC:
3531                 r = kvm_set_ioapic(kvm, &chip->chip.ioapic);
3532                 break;
3533         default:
3534                 r = -EINVAL;
3535                 break;
3536         }
3537         kvm_pic_update_irq(pic_irqchip(kvm));
3538         return r;
3539 }
3540
3541 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3542 {
3543         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3544         memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
3545         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3546         return 0;
3547 }
3548
3549 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3550 {
3551         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3552         memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
3553         kvm_pit_load_count(kvm, 0, ps->channels[0].count, 0);
3554         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3555         return 0;
3556 }
3557
3558 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3559 {
3560         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3561         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
3562                 sizeof(ps->channels));
3563         ps->flags = kvm->arch.vpit->pit_state.flags;
3564         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3565         memset(&ps->reserved, 0, sizeof(ps->reserved));
3566         return 0;
3567 }
3568
3569 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3570 {
3571         int start = 0;
3572         u32 prev_legacy, cur_legacy;
3573         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3574         prev_legacy = kvm->arch.vpit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
3575         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
3576         if (!prev_legacy && cur_legacy)
3577                 start = 1;
3578         memcpy(&kvm->arch.vpit->pit_state.channels, &ps->channels,
3579                sizeof(kvm->arch.vpit->pit_state.channels));
3580         kvm->arch.vpit->pit_state.flags = ps->flags;
3581         kvm_pit_load_count(kvm, 0, kvm->arch.vpit->pit_state.channels[0].count, start);
3582         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3583         return 0;
3584 }
3585
3586 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
3587                                  struct kvm_reinject_control *control)
3588 {
3589         if (!kvm->arch.vpit)
3590                 return -ENXIO;
3591         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3592         kvm->arch.vpit->pit_state.reinject = control->pit_reinject;
3593         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3594         return 0;
3595 }
3596
3597 /**
3598  * kvm_vm_ioctl_get_dirty_log - get and clear the log of dirty pages in a slot
3599  * @kvm: kvm instance
3600  * @log: slot id and address to which we copy the log
3601  *
3602  * Steps 1-4 below provide general overview of dirty page logging. See
3603  * kvm_get_dirty_log_protect() function description for additional details.
3604  *
3605  * We call kvm_get_dirty_log_protect() to handle steps 1-3, upon return we
3606  * always flush the TLB (step 4) even if previous step failed  and the dirty
3607  * bitmap may be corrupt. Regardless of previous outcome the KVM logging API
3608  * does not preclude user space subsequent dirty log read. Flushing TLB ensures
3609  * writes will be marked dirty for next log read.
3610  *
3611  *   1. Take a snapshot of the bit and clear it if needed.
3612  *   2. Write protect the corresponding page.
3613  *   3. Copy the snapshot to the userspace.
3614  *   4. Flush TLB's if needed.
3615  */
3616 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
3617 {
3618         bool is_dirty = false;
3619         int r;
3620
3621         mutex_lock(&kvm->slots_lock);
3622
3623         /*
3624          * Flush potentially hardware-cached dirty pages to dirty_bitmap.
3625          */
3626         if (kvm_x86_ops->flush_log_dirty)
3627                 kvm_x86_ops->flush_log_dirty(kvm);
3628
3629         r = kvm_get_dirty_log_protect(kvm, log, &is_dirty);
3630
3631         /*
3632          * All the TLBs can be flushed out of mmu lock, see the comments in
3633          * kvm_mmu_slot_remove_write_access().
3634          */
3635         lockdep_assert_held(&kvm->slots_lock);
3636         if (is_dirty)
3637                 kvm_flush_remote_tlbs(kvm);
3638
3639         mutex_unlock(&kvm->slots_lock);
3640         return r;
3641 }
3642
3643 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
3644                         bool line_status)
3645 {
3646         if (!irqchip_in_kernel(kvm))
3647                 return -ENXIO;
3648
3649         irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
3650                                         irq_event->irq, irq_event->level,
3651                                         line_status);
3652         return 0;
3653 }
3654
3655 static int kvm_vm_ioctl_enable_cap(struct kvm *kvm,
3656                                    struct kvm_enable_cap *cap)
3657 {
3658         int r;
3659
3660         if (cap->flags)
3661                 return -EINVAL;
3662
3663         switch (cap->cap) {
3664         case KVM_CAP_DISABLE_QUIRKS:
3665                 kvm->arch.disabled_quirks = cap->args[0];
3666                 r = 0;
3667                 break;
3668         case KVM_CAP_SPLIT_IRQCHIP: {
3669                 mutex_lock(&kvm->lock);
3670                 r = -EINVAL;
3671                 if (cap->args[0] > MAX_NR_RESERVED_IOAPIC_PINS)
3672                         goto split_irqchip_unlock;
3673                 r = -EEXIST;
3674                 if (irqchip_in_kernel(kvm))
3675                         goto split_irqchip_unlock;
3676                 if (atomic_read(&kvm->online_vcpus))
3677                         goto split_irqchip_unlock;
3678                 r = kvm_setup_empty_irq_routing(kvm);
3679                 if (r)
3680                         goto split_irqchip_unlock;
3681                 /* Pairs with irqchip_in_kernel. */
3682                 smp_wmb();
3683                 kvm->arch.irqchip_split = true;
3684                 kvm->arch.nr_reserved_ioapic_pins = cap->args[0];
3685                 r = 0;
3686 split_irqchip_unlock:
3687                 mutex_unlock(&kvm->lock);
3688                 break;
3689         }
3690         default:
3691                 r = -EINVAL;
3692                 break;
3693         }
3694         return r;
3695 }
3696
3697 long kvm_arch_vm_ioctl(struct file *filp,
3698                        unsigned int ioctl, unsigned long arg)
3699 {
3700         struct kvm *kvm = filp->private_data;
3701         void __user *argp = (void __user *)arg;
3702         int r = -ENOTTY;
3703         /*
3704          * This union makes it completely explicit to gcc-3.x
3705          * that these two variables' stack usage should be
3706          * combined, not added together.
3707          */
3708         union {
3709                 struct kvm_pit_state ps;
3710                 struct kvm_pit_state2 ps2;
3711                 struct kvm_pit_config pit_config;
3712         } u;
3713
3714         switch (ioctl) {
3715         case KVM_SET_TSS_ADDR:
3716                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
3717                 break;
3718         case KVM_SET_IDENTITY_MAP_ADDR: {
3719                 u64 ident_addr;
3720
3721                 r = -EFAULT;
3722                 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
3723                         goto out;
3724                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
3725                 break;
3726         }
3727         case KVM_SET_NR_MMU_PAGES:
3728                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
3729                 break;
3730         case KVM_GET_NR_MMU_PAGES:
3731                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
3732                 break;
3733         case KVM_CREATE_IRQCHIP: {
3734                 struct kvm_pic *vpic;
3735
3736                 mutex_lock(&kvm->lock);
3737                 r = -EEXIST;
3738                 if (kvm->arch.vpic)
3739                         goto create_irqchip_unlock;
3740                 r = -EINVAL;
3741                 if (atomic_read(&kvm->online_vcpus))
3742                         goto create_irqchip_unlock;
3743                 r = -ENOMEM;
3744                 vpic = kvm_create_pic(kvm);
3745                 if (vpic) {
3746                         r = kvm_ioapic_init(kvm);
3747                         if (r) {
3748                                 mutex_lock(&kvm->slots_lock);
3749                                 kvm_destroy_pic(vpic);
3750                                 mutex_unlock(&kvm->slots_lock);
3751                                 goto create_irqchip_unlock;
3752                         }
3753                 } else
3754                         goto create_irqchip_unlock;
3755                 r = kvm_setup_default_irq_routing(kvm);
3756                 if (r) {
3757                         mutex_lock(&kvm->slots_lock);
3758                         mutex_lock(&kvm->irq_lock);
3759                         kvm_ioapic_destroy(kvm);
3760                         kvm_destroy_pic(vpic);
3761                         mutex_unlock(&kvm->irq_lock);
3762                         mutex_unlock(&kvm->slots_lock);
3763                         goto create_irqchip_unlock;
3764                 }
3765                 /* Write kvm->irq_routing before kvm->arch.vpic.  */
3766                 smp_wmb();
3767                 kvm->arch.vpic = vpic;
3768         create_irqchip_unlock:
3769                 mutex_unlock(&kvm->lock);
3770                 break;
3771         }
3772         case KVM_CREATE_PIT:
3773                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
3774                 goto create_pit;
3775         case KVM_CREATE_PIT2:
3776                 r = -EFAULT;
3777                 if (copy_from_user(&u.pit_config, argp,
3778                                    sizeof(struct kvm_pit_config)))
3779                         goto out;
3780         create_pit:
3781                 mutex_lock(&kvm->slots_lock);
3782                 r = -EEXIST;
3783                 if (kvm->arch.vpit)
3784                         goto create_pit_unlock;
3785                 r = -ENOMEM;
3786                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
3787                 if (kvm->arch.vpit)
3788                         r = 0;
3789         create_pit_unlock:
3790                 mutex_unlock(&kvm->slots_lock);
3791                 break;
3792         case KVM_GET_IRQCHIP: {
3793                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3794                 struct kvm_irqchip *chip;
3795
3796                 chip = memdup_user(argp, sizeof(*chip));
3797                 if (IS_ERR(chip)) {
3798                         r = PTR_ERR(chip);
3799                         goto out;
3800                 }
3801
3802                 r = -ENXIO;
3803                 if (!irqchip_in_kernel(kvm) || irqchip_split(kvm))
3804                         goto get_irqchip_out;
3805                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
3806                 if (r)
3807                         goto get_irqchip_out;
3808                 r = -EFAULT;
3809                 if (copy_to_user(argp, chip, sizeof *chip))
3810                         goto get_irqchip_out;
3811                 r = 0;
3812         get_irqchip_out:
3813                 kfree(chip);
3814                 break;
3815         }
3816         case KVM_SET_IRQCHIP: {
3817                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3818                 struct kvm_irqchip *chip;
3819
3820                 chip = memdup_user(argp, sizeof(*chip));
3821                 if (IS_ERR(chip)) {
3822                         r = PTR_ERR(chip);
3823                         goto out;
3824                 }
3825
3826                 r = -ENXIO;
3827                 if (!irqchip_in_kernel(kvm) || irqchip_split(kvm))
3828                         goto set_irqchip_out;
3829                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
3830                 if (r)
3831                         goto set_irqchip_out;
3832                 r = 0;
3833         set_irqchip_out:
3834                 kfree(chip);
3835                 break;
3836         }
3837         case KVM_GET_PIT: {
3838                 r = -EFAULT;
3839                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
3840                         goto out;
3841                 r = -ENXIO;
3842                 if (!kvm->arch.vpit)
3843                         goto out;
3844                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
3845                 if (r)
3846                         goto out;
3847                 r = -EFAULT;
3848                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
3849                         goto out;
3850                 r = 0;
3851                 break;
3852         }
3853         case KVM_SET_PIT: {
3854                 r = -EFAULT;
3855                 if (copy_from_user(&u.ps, argp, sizeof u.ps))
3856                         goto out;
3857                 r = -ENXIO;
3858                 if (!kvm->arch.vpit)
3859                         goto out;
3860                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
3861                 break;
3862         }
3863         case KVM_GET_PIT2: {
3864                 r = -ENXIO;
3865                 if (!kvm->arch.vpit)
3866                         goto out;
3867                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
3868                 if (r)
3869                         goto out;
3870                 r = -EFAULT;
3871                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
3872                         goto out;
3873                 r = 0;
3874                 break;
3875         }
3876         case KVM_SET_PIT2: {
3877                 r = -EFAULT;
3878                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
3879                         goto out;
3880                 r = -ENXIO;
3881                 if (!kvm->arch.vpit)
3882                         goto out;
3883                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
3884                 break;
3885         }
3886         case KVM_REINJECT_CONTROL: {
3887                 struct kvm_reinject_control control;
3888                 r =  -EFAULT;
3889                 if (copy_from_user(&control, argp, sizeof(control)))
3890                         goto out;
3891                 r = kvm_vm_ioctl_reinject(kvm, &control);
3892                 break;
3893         }
3894         case KVM_SET_BOOT_CPU_ID:
3895                 r = 0;
3896                 mutex_lock(&kvm->lock);
3897                 if (atomic_read(&kvm->online_vcpus) != 0)
3898                         r = -EBUSY;
3899                 else
3900                         kvm->arch.bsp_vcpu_id = arg;
3901                 mutex_unlock(&kvm->lock);
3902                 break;
3903         case KVM_XEN_HVM_CONFIG: {
3904                 r = -EFAULT;
3905                 if (copy_from_user(&kvm->arch.xen_hvm_config, argp,
3906                                    sizeof(struct kvm_xen_hvm_config)))
3907                         goto out;
3908                 r = -EINVAL;
3909                 if (kvm->arch.xen_hvm_config.flags)
3910                         goto out;
3911                 r = 0;
3912                 break;
3913         }
3914         case KVM_SET_CLOCK: {
3915                 struct kvm_clock_data user_ns;
3916                 u64 now_ns;
3917                 s64 delta;
3918
3919                 r = -EFAULT;
3920                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
3921                         goto out;
3922
3923                 r = -EINVAL;
3924                 if (user_ns.flags)
3925                         goto out;
3926
3927                 r = 0;
3928                 local_irq_disable();
3929                 now_ns = get_kernel_ns();
3930                 delta = user_ns.clock - now_ns;
3931                 local_irq_enable();
3932                 kvm->arch.kvmclock_offset = delta;
3933                 kvm_gen_update_masterclock(kvm);
3934                 break;
3935         }
3936         case KVM_GET_CLOCK: {
3937                 struct kvm_clock_data user_ns;
3938                 u64 now_ns;
3939
3940                 local_irq_disable();
3941                 now_ns = get_kernel_ns();
3942                 user_ns.clock = kvm->arch.kvmclock_offset + now_ns;
3943                 local_irq_enable();
3944                 user_ns.flags = 0;
3945                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
3946
3947                 r = -EFAULT;
3948                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
3949                         goto out;
3950                 r = 0;
3951                 break;
3952         }
3953         case KVM_ENABLE_CAP: {
3954                 struct kvm_enable_cap cap;
3955
3956                 r = -EFAULT;
3957                 if (copy_from_user(&cap, argp, sizeof(cap)))
3958                         goto out;
3959                 r = kvm_vm_ioctl_enable_cap(kvm, &cap);
3960                 break;
3961         }
3962         default:
3963                 r = kvm_vm_ioctl_assigned_device(kvm, ioctl, arg);
3964         }
3965 out:
3966         return r;
3967 }
3968
3969 static void kvm_init_msr_list(void)
3970 {
3971         u32 dummy[2];
3972         unsigned i, j;
3973
3974         for (i = j = 0; i < ARRAY_SIZE(msrs_to_save); i++) {
3975                 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
3976                         continue;
3977
3978                 /*
3979                  * Even MSRs that are valid in the host may not be exposed
3980                  * to the guests in some cases.  We could work around this
3981                  * in VMX with the generic MSR save/load machinery, but it
3982                  * is not really worthwhile since it will really only
3983                  * happen with nested virtualization.
3984                  */
3985                 switch (msrs_to_save[i]) {
3986                 case MSR_IA32_BNDCFGS:
3987                         if (!kvm_x86_ops->mpx_supported())
3988                                 continue;
3989                         break;
3990                 default:
3991                         break;
3992                 }
3993
3994                 if (j < i)
3995                         msrs_to_save[j] = msrs_to_save[i];
3996                 j++;
3997         }
3998         num_msrs_to_save = j;
3999
4000         for (i = j = 0; i < ARRAY_SIZE(emulated_msrs); i++) {
4001                 switch (emulated_msrs[i]) {
4002                 case MSR_IA32_SMBASE:
4003                         if (!kvm_x86_ops->cpu_has_high_real_mode_segbase())
4004                                 continue;
4005                         break;
4006                 default:
4007                         break;
4008                 }
4009
4010                 if (j < i)
4011                         emulated_msrs[j] = emulated_msrs[i];
4012                 j++;
4013         }
4014         num_emulated_msrs = j;
4015 }
4016
4017 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
4018                            const void *v)
4019 {
4020         int handled = 0;
4021         int n;
4022
4023         do {
4024                 n = min(len, 8);
4025                 if (!(vcpu->arch.apic &&
4026                       !kvm_iodevice_write(vcpu, &vcpu->arch.apic->dev, addr, n, v))
4027                     && kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, n, v))
4028                         break;
4029                 handled += n;
4030                 addr += n;
4031                 len -= n;
4032                 v += n;
4033         } while (len);
4034
4035         return handled;
4036 }
4037
4038 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
4039 {
4040         int handled = 0;
4041         int n;
4042
4043         do {
4044                 n = min(len, 8);
4045                 if (!(vcpu->arch.apic &&
4046                       !kvm_iodevice_read(vcpu, &vcpu->arch.apic->dev,
4047                                          addr, n, v))
4048                     && kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, n, v))
4049                         break;
4050                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, *(u64 *)v);
4051                 handled += n;
4052                 addr += n;
4053                 len -= n;
4054                 v += n;
4055         } while (len);
4056
4057         return handled;
4058 }
4059
4060 static void kvm_set_segment(struct kvm_vcpu *vcpu,
4061                         struct kvm_segment *var, int seg)
4062 {
4063         kvm_x86_ops->set_segment(vcpu, var, seg);
4064 }
4065
4066 void kvm_get_segment(struct kvm_vcpu *vcpu,
4067                      struct kvm_segment *var, int seg)
4068 {
4069         kvm_x86_ops->get_segment(vcpu, var, seg);
4070 }
4071
4072 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
4073                            struct x86_exception *exception)
4074 {
4075         gpa_t t_gpa;
4076
4077         BUG_ON(!mmu_is_nested(vcpu));
4078
4079         /* NPT walks are always user-walks */
4080         access |= PFERR_USER_MASK;
4081         t_gpa  = vcpu->arch.mmu.gva_to_gpa(vcpu, gpa, access, exception);
4082
4083         return t_gpa;
4084 }
4085
4086 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
4087                               struct x86_exception *exception)
4088 {
4089         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4090         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4091 }
4092
4093  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
4094                                 struct x86_exception *exception)
4095 {
4096         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4097         access |= PFERR_FETCH_MASK;
4098         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4099 }
4100
4101 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
4102                                struct x86_exception *exception)
4103 {
4104         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4105         access |= PFERR_WRITE_MASK;
4106         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4107 }
4108
4109 /* uses this to access any guest's mapped memory without checking CPL */
4110 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
4111                                 struct x86_exception *exception)
4112 {
4113         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
4114 }
4115
4116 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
4117                                       struct kvm_vcpu *vcpu, u32 access,
4118                                       struct x86_exception *exception)
4119 {
4120         void *data = val;
4121         int r = X86EMUL_CONTINUE;
4122
4123         while (bytes) {
4124                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
4125                                                             exception);
4126                 unsigned offset = addr & (PAGE_SIZE-1);
4127                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
4128                 int ret;
4129
4130                 if (gpa == UNMAPPED_GVA)
4131                         return X86EMUL_PROPAGATE_FAULT;
4132                 ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, data,
4133                                                offset, toread);
4134                 if (ret < 0) {
4135                         r = X86EMUL_IO_NEEDED;
4136                         goto out;
4137                 }
4138
4139                 bytes -= toread;
4140                 data += toread;
4141                 addr += toread;
4142         }
4143 out:
4144         return r;
4145 }
4146
4147 /* used for instruction fetching */
4148 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
4149                                 gva_t addr, void *val, unsigned int bytes,
4150                                 struct x86_exception *exception)
4151 {
4152         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4153         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4154         unsigned offset;
4155         int ret;
4156
4157         /* Inline kvm_read_guest_virt_helper for speed.  */
4158         gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access|PFERR_FETCH_MASK,
4159                                                     exception);
4160         if (unlikely(gpa == UNMAPPED_GVA))
4161                 return X86EMUL_PROPAGATE_FAULT;
4162
4163         offset = addr & (PAGE_SIZE-1);
4164         if (WARN_ON(offset + bytes > PAGE_SIZE))
4165                 bytes = (unsigned)PAGE_SIZE - offset;
4166         ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, val,
4167                                        offset, bytes);
4168         if (unlikely(ret < 0))
4169                 return X86EMUL_IO_NEEDED;
4170
4171         return X86EMUL_CONTINUE;
4172 }
4173
4174 int kvm_read_guest_virt(struct x86_emulate_ctxt *ctxt,
4175                                gva_t addr, void *val, unsigned int bytes,
4176                                struct x86_exception *exception)
4177 {
4178         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4179         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4180
4181         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
4182                                           exception);
4183 }
4184 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
4185
4186 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt *ctxt,
4187                                       gva_t addr, void *val, unsigned int bytes,
4188                                       struct x86_exception *exception)
4189 {
4190         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4191         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, exception);
4192 }
4193
4194 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt *ctxt,
4195                 unsigned long addr, void *val, unsigned int bytes)
4196 {
4197         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4198         int r = kvm_vcpu_read_guest(vcpu, addr, val, bytes);
4199
4200         return r < 0 ? X86EMUL_IO_NEEDED : X86EMUL_CONTINUE;
4201 }
4202
4203 int kvm_write_guest_virt_system(struct x86_emulate_ctxt *ctxt,
4204                                        gva_t addr, void *val,
4205                                        unsigned int bytes,
4206                                        struct x86_exception *exception)
4207 {
4208         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4209         void *data = val;
4210         int r = X86EMUL_CONTINUE;
4211
4212         while (bytes) {
4213                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
4214                                                              PFERR_WRITE_MASK,
4215                                                              exception);
4216                 unsigned offset = addr & (PAGE_SIZE-1);
4217                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
4218                 int ret;
4219
4220                 if (gpa == UNMAPPED_GVA)
4221                         return X86EMUL_PROPAGATE_FAULT;
4222                 ret = kvm_vcpu_write_guest(vcpu, gpa, data, towrite);
4223                 if (ret < 0) {
4224                         r = X86EMUL_IO_NEEDED;
4225                         goto out;
4226                 }
4227
4228                 bytes -= towrite;
4229                 data += towrite;
4230                 addr += towrite;
4231         }
4232 out:
4233         return r;
4234 }
4235 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
4236
4237 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
4238                                 gpa_t *gpa, struct x86_exception *exception,
4239                                 bool write)
4240 {
4241         u32 access = ((kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0)
4242                 | (write ? PFERR_WRITE_MASK : 0);
4243
4244         if (vcpu_match_mmio_gva(vcpu, gva)
4245             && !permission_fault(vcpu, vcpu->arch.walk_mmu,
4246                                  vcpu->arch.access, access)) {
4247                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
4248                                         (gva & (PAGE_SIZE - 1));
4249                 trace_vcpu_match_mmio(gva, *gpa, write, false);
4250                 return 1;
4251         }
4252
4253         *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4254
4255         if (*gpa == UNMAPPED_GVA)
4256                 return -1;
4257
4258         /* For APIC access vmexit */
4259         if ((*gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4260                 return 1;
4261
4262         if (vcpu_match_mmio_gpa(vcpu, *gpa)) {
4263                 trace_vcpu_match_mmio(gva, *gpa, write, true);
4264                 return 1;
4265         }
4266
4267         return 0;
4268 }
4269
4270 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
4271                         const void *val, int bytes)
4272 {
4273         int ret;
4274
4275         ret = kvm_vcpu_write_guest(vcpu, gpa, val, bytes);
4276         if (ret < 0)
4277                 return 0;
4278         kvm_mmu_pte_write(vcpu, gpa, val, bytes);
4279         return 1;
4280 }
4281
4282 struct read_write_emulator_ops {
4283         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
4284                                   int bytes);
4285         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
4286                                   void *val, int bytes);
4287         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4288                                int bytes, void *val);
4289         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4290                                     void *val, int bytes);
4291         bool write;
4292 };
4293
4294 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
4295 {
4296         if (vcpu->mmio_read_completed) {
4297                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
4298                                vcpu->mmio_fragments[0].gpa, *(u64 *)val);
4299                 vcpu->mmio_read_completed = 0;
4300                 return 1;
4301         }
4302
4303         return 0;
4304 }
4305
4306 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4307                         void *val, int bytes)
4308 {
4309         return !kvm_vcpu_read_guest(vcpu, gpa, val, bytes);
4310 }
4311
4312 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4313                          void *val, int bytes)
4314 {
4315         return emulator_write_phys(vcpu, gpa, val, bytes);
4316 }
4317
4318 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
4319 {
4320         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
4321         return vcpu_mmio_write(vcpu, gpa, bytes, val);
4322 }
4323
4324 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4325                           void *val, int bytes)
4326 {
4327         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
4328         return X86EMUL_IO_NEEDED;
4329 }
4330
4331 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4332                            void *val, int bytes)
4333 {
4334         struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
4335
4336         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
4337         return X86EMUL_CONTINUE;
4338 }
4339
4340 static const struct read_write_emulator_ops read_emultor = {
4341         .read_write_prepare = read_prepare,
4342         .read_write_emulate = read_emulate,
4343         .read_write_mmio = vcpu_mmio_read,
4344         .read_write_exit_mmio = read_exit_mmio,
4345 };
4346
4347 static const struct read_write_emulator_ops write_emultor = {
4348         .read_write_emulate = write_emulate,
4349         .read_write_mmio = write_mmio,
4350         .read_write_exit_mmio = write_exit_mmio,
4351         .write = true,
4352 };
4353
4354 static int emulator_read_write_onepage(unsigned long addr, void *val,
4355                                        unsigned int bytes,
4356                                        struct x86_exception *exception,
4357                                        struct kvm_vcpu *vcpu,
4358                                        const struct read_write_emulator_ops *ops)
4359 {
4360         gpa_t gpa;
4361         int handled, ret;
4362         bool write = ops->write;
4363         struct kvm_mmio_fragment *frag;
4364
4365         ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
4366
4367         if (ret < 0)
4368                 return X86EMUL_PROPAGATE_FAULT;
4369
4370         /* For APIC access vmexit */
4371         if (ret)
4372                 goto mmio;
4373
4374         if (ops->read_write_emulate(vcpu, gpa, val, bytes))
4375                 return X86EMUL_CONTINUE;
4376
4377 mmio:
4378         /*
4379          * Is this MMIO handled locally?
4380          */
4381         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
4382         if (handled == bytes)
4383                 return X86EMUL_CONTINUE;
4384
4385         gpa += handled;
4386         bytes -= handled;
4387         val += handled;
4388
4389         WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS);
4390         frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
4391         frag->gpa = gpa;
4392         frag->data = val;
4393         frag->len = bytes;
4394         return X86EMUL_CONTINUE;
4395 }
4396
4397 static int emulator_read_write(struct x86_emulate_ctxt *ctxt,
4398                         unsigned long addr,
4399                         void *val, unsigned int bytes,
4400                         struct x86_exception *exception,
4401                         const struct read_write_emulator_ops *ops)
4402 {
4403         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4404         gpa_t gpa;
4405         int rc;
4406
4407         if (ops->read_write_prepare &&
4408                   ops->read_write_prepare(vcpu, val, bytes))
4409                 return X86EMUL_CONTINUE;
4410
4411         vcpu->mmio_nr_fragments = 0;
4412
4413         /* Crossing a page boundary? */
4414         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
4415                 int now;
4416
4417                 now = -addr & ~PAGE_MASK;
4418                 rc = emulator_read_write_onepage(addr, val, now, exception,
4419                                                  vcpu, ops);
4420
4421                 if (rc != X86EMUL_CONTINUE)
4422                         return rc;
4423                 addr += now;
4424                 if (ctxt->mode != X86EMUL_MODE_PROT64)
4425                         addr = (u32)addr;
4426                 val += now;
4427                 bytes -= now;
4428         }
4429
4430         rc = emulator_read_write_onepage(addr, val, bytes, exception,
4431                                          vcpu, ops);
4432         if (rc != X86EMUL_CONTINUE)
4433                 return rc;
4434
4435         if (!vcpu->mmio_nr_fragments)
4436                 return rc;
4437
4438         gpa = vcpu->mmio_fragments[0].gpa;
4439
4440         vcpu->mmio_needed = 1;
4441         vcpu->mmio_cur_fragment = 0;
4442
4443         vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len);
4444         vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
4445         vcpu->run->exit_reason = KVM_EXIT_MMIO;
4446         vcpu->run->mmio.phys_addr = gpa;
4447
4448         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
4449 }
4450
4451 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
4452                                   unsigned long addr,
4453                                   void *val,
4454                                   unsigned int bytes,
4455                                   struct x86_exception *exception)
4456 {
4457         return emulator_read_write(ctxt, addr, val, bytes,
4458                                    exception, &read_emultor);
4459 }
4460
4461 static int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
4462                             unsigned long addr,
4463                             const void *val,
4464                             unsigned int bytes,
4465                             struct x86_exception *exception)
4466 {
4467         return emulator_read_write(ctxt, addr, (void *)val, bytes,
4468                                    exception, &write_emultor);
4469 }
4470
4471 #define CMPXCHG_TYPE(t, ptr, old, new) \
4472         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
4473
4474 #ifdef CONFIG_X86_64
4475 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
4476 #else
4477 #  define CMPXCHG64(ptr, old, new) \
4478         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
4479 #endif
4480
4481 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
4482                                      unsigned long addr,
4483                                      const void *old,
4484                                      const void *new,
4485                                      unsigned int bytes,
4486                                      struct x86_exception *exception)
4487 {
4488         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4489         gpa_t gpa;
4490         struct page *page;
4491         char *kaddr;
4492         bool exchanged;
4493
4494         /* guests cmpxchg8b have to be emulated atomically */
4495         if (bytes > 8 || (bytes & (bytes - 1)))
4496                 goto emul_write;
4497
4498         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
4499
4500         if (gpa == UNMAPPED_GVA ||
4501             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4502                 goto emul_write;
4503
4504         if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
4505                 goto emul_write;
4506
4507         page = kvm_vcpu_gfn_to_page(vcpu, gpa >> PAGE_SHIFT);
4508         if (is_error_page(page))
4509                 goto emul_write;
4510
4511         kaddr = kmap_atomic(page);
4512         kaddr += offset_in_page(gpa);
4513         switch (bytes) {
4514         case 1:
4515                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
4516                 break;
4517         case 2:
4518                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
4519                 break;
4520         case 4:
4521                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
4522                 break;
4523         case 8:
4524                 exchanged = CMPXCHG64(kaddr, old, new);
4525                 break;
4526         default:
4527                 BUG();
4528         }
4529         kunmap_atomic(kaddr);
4530         kvm_release_page_dirty(page);
4531
4532         if (!exchanged)
4533                 return X86EMUL_CMPXCHG_FAILED;
4534
4535         kvm_vcpu_mark_page_dirty(vcpu, gpa >> PAGE_SHIFT);
4536         kvm_mmu_pte_write(vcpu, gpa, new, bytes);
4537
4538         return X86EMUL_CONTINUE;
4539
4540 emul_write:
4541         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
4542
4543         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
4544 }
4545
4546 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
4547 {
4548         /* TODO: String I/O for in kernel device */
4549         int r;
4550
4551         if (vcpu->arch.pio.in)
4552                 r = kvm_io_bus_read(vcpu, KVM_PIO_BUS, vcpu->arch.pio.port,
4553                                     vcpu->arch.pio.size, pd);
4554         else
4555                 r = kvm_io_bus_write(vcpu, KVM_PIO_BUS,
4556                                      vcpu->arch.pio.port, vcpu->arch.pio.size,
4557                                      pd);
4558         return r;
4559 }
4560
4561 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
4562                                unsigned short port, void *val,
4563                                unsigned int count, bool in)
4564 {
4565         vcpu->arch.pio.port = port;
4566         vcpu->arch.pio.in = in;
4567         vcpu->arch.pio.count  = count;
4568         vcpu->arch.pio.size = size;
4569
4570         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
4571                 vcpu->arch.pio.count = 0;
4572                 return 1;
4573         }
4574
4575         vcpu->run->exit_reason = KVM_EXIT_IO;
4576         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
4577         vcpu->run->io.size = size;
4578         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
4579         vcpu->run->io.count = count;
4580         vcpu->run->io.port = port;
4581
4582         return 0;
4583 }
4584
4585 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
4586                                     int size, unsigned short port, void *val,
4587                                     unsigned int count)
4588 {
4589         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4590         int ret;
4591
4592         if (vcpu->arch.pio.count)
4593                 goto data_avail;
4594
4595         ret = emulator_pio_in_out(vcpu, size, port, val, count, true);
4596         if (ret) {
4597 data_avail:
4598                 memcpy(val, vcpu->arch.pio_data, size * count);
4599                 trace_kvm_pio(KVM_PIO_IN, port, size, count, vcpu->arch.pio_data);
4600                 vcpu->arch.pio.count = 0;
4601                 return 1;
4602         }
4603
4604         return 0;
4605 }
4606
4607 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
4608                                      int size, unsigned short port,
4609                                      const void *val, unsigned int count)
4610 {
4611         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4612
4613         memcpy(vcpu->arch.pio_data, val, size * count);
4614         trace_kvm_pio(KVM_PIO_OUT, port, size, count, vcpu->arch.pio_data);
4615         return emulator_pio_in_out(vcpu, size, port, (void *)val, count, false);
4616 }
4617
4618 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
4619 {
4620         return kvm_x86_ops->get_segment_base(vcpu, seg);
4621 }
4622
4623 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
4624 {
4625         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
4626 }
4627
4628 int kvm_emulate_wbinvd_noskip(struct kvm_vcpu *vcpu)
4629 {
4630         if (!need_emulate_wbinvd(vcpu))
4631                 return X86EMUL_CONTINUE;
4632
4633         if (kvm_x86_ops->has_wbinvd_exit()) {
4634                 int cpu = get_cpu();
4635
4636                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
4637                 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
4638                                 wbinvd_ipi, NULL, 1);
4639                 put_cpu();
4640                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
4641         } else
4642                 wbinvd();
4643         return X86EMUL_CONTINUE;
4644 }
4645
4646 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
4647 {
4648         kvm_x86_ops->skip_emulated_instruction(vcpu);
4649         return kvm_emulate_wbinvd_noskip(vcpu);
4650 }
4651 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
4652
4653
4654
4655 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
4656 {
4657         kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt));
4658 }
4659
4660 static int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr,
4661                            unsigned long *dest)
4662 {
4663         return kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
4664 }
4665
4666 static int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
4667                            unsigned long value)
4668 {
4669
4670         return __kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
4671 }
4672
4673 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
4674 {
4675         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
4676 }
4677
4678 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
4679 {
4680         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4681         unsigned long value;
4682
4683         switch (cr) {
4684         case 0:
4685                 value = kvm_read_cr0(vcpu);
4686                 break;
4687         case 2:
4688                 value = vcpu->arch.cr2;
4689                 break;
4690         case 3:
4691                 value = kvm_read_cr3(vcpu);
4692                 break;
4693         case 4:
4694                 value = kvm_read_cr4(vcpu);
4695                 break;
4696         case 8:
4697                 value = kvm_get_cr8(vcpu);
4698                 break;
4699         default:
4700                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
4701                 return 0;
4702         }
4703
4704         return value;
4705 }
4706
4707 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
4708 {
4709         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4710         int res = 0;
4711
4712         switch (cr) {
4713         case 0:
4714                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
4715                 break;
4716         case 2:
4717                 vcpu->arch.cr2 = val;
4718                 break;
4719         case 3:
4720                 res = kvm_set_cr3(vcpu, val);
4721                 break;
4722         case 4:
4723                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
4724                 break;
4725         case 8:
4726                 res = kvm_set_cr8(vcpu, val);
4727                 break;
4728         default:
4729                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
4730                 res = -1;
4731         }
4732
4733         return res;
4734 }
4735
4736 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
4737 {
4738         return kvm_x86_ops->get_cpl(emul_to_vcpu(ctxt));
4739 }
4740
4741 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4742 {
4743         kvm_x86_ops->get_gdt(emul_to_vcpu(ctxt), dt);
4744 }
4745
4746 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4747 {
4748         kvm_x86_ops->get_idt(emul_to_vcpu(ctxt), dt);
4749 }
4750
4751 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4752 {
4753         kvm_x86_ops->set_gdt(emul_to_vcpu(ctxt), dt);
4754 }
4755
4756 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4757 {
4758         kvm_x86_ops->set_idt(emul_to_vcpu(ctxt), dt);
4759 }
4760
4761 static unsigned long emulator_get_cached_segment_base(
4762         struct x86_emulate_ctxt *ctxt, int seg)
4763 {
4764         return get_segment_base(emul_to_vcpu(ctxt), seg);
4765 }
4766
4767 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
4768                                  struct desc_struct *desc, u32 *base3,
4769                                  int seg)
4770 {
4771         struct kvm_segment var;
4772
4773         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
4774         *selector = var.selector;
4775
4776         if (var.unusable) {
4777                 memset(desc, 0, sizeof(*desc));
4778                 return false;
4779         }
4780
4781         if (var.g)
4782                 var.limit >>= 12;
4783         set_desc_limit(desc, var.limit);
4784         set_desc_base(desc, (unsigned long)var.base);
4785 #ifdef CONFIG_X86_64
4786         if (base3)
4787                 *base3 = var.base >> 32;
4788 #endif
4789         desc->type = var.type;
4790         desc->s = var.s;
4791         desc->dpl = var.dpl;
4792         desc->p = var.present;
4793         desc->avl = var.avl;
4794         desc->l = var.l;
4795         desc->d = var.db;
4796         desc->g = var.g;
4797
4798         return true;
4799 }
4800
4801 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
4802                                  struct desc_struct *desc, u32 base3,
4803                                  int seg)
4804 {
4805         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4806         struct kvm_segment var;
4807
4808         var.selector = selector;
4809         var.base = get_desc_base(desc);
4810 #ifdef CONFIG_X86_64
4811         var.base |= ((u64)base3) << 32;
4812 #endif
4813         var.limit = get_desc_limit(desc);
4814         if (desc->g)
4815                 var.limit = (var.limit << 12) | 0xfff;
4816         var.type = desc->type;
4817         var.dpl = desc->dpl;
4818         var.db = desc->d;
4819         var.s = desc->s;
4820         var.l = desc->l;
4821         var.g = desc->g;
4822         var.avl = desc->avl;
4823         var.present = desc->p;
4824         var.unusable = !var.present;
4825         var.padding = 0;
4826
4827         kvm_set_segment(vcpu, &var, seg);
4828         return;
4829 }
4830
4831 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
4832                             u32 msr_index, u64 *pdata)
4833 {
4834         struct msr_data msr;
4835         int r;
4836
4837         msr.index = msr_index;
4838         msr.host_initiated = false;
4839         r = kvm_get_msr(emul_to_vcpu(ctxt), &msr);
4840         if (r)
4841                 return r;
4842
4843         *pdata = msr.data;
4844         return 0;
4845 }
4846
4847 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
4848                             u32 msr_index, u64 data)
4849 {
4850         struct msr_data msr;
4851
4852         msr.data = data;
4853         msr.index = msr_index;
4854         msr.host_initiated = false;
4855         return kvm_set_msr(emul_to_vcpu(ctxt), &msr);
4856 }
4857
4858 static u64 emulator_get_smbase(struct x86_emulate_ctxt *ctxt)
4859 {
4860         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4861
4862         return vcpu->arch.smbase;
4863 }
4864
4865 static void emulator_set_smbase(struct x86_emulate_ctxt *ctxt, u64 smbase)
4866 {
4867         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4868
4869         vcpu->arch.smbase = smbase;
4870 }
4871
4872 static int emulator_check_pmc(struct x86_emulate_ctxt *ctxt,
4873                               u32 pmc)
4874 {
4875         return kvm_pmu_is_valid_msr_idx(emul_to_vcpu(ctxt), pmc);
4876 }
4877
4878 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
4879                              u32 pmc, u64 *pdata)
4880 {
4881         return kvm_pmu_rdpmc(emul_to_vcpu(ctxt), pmc, pdata);
4882 }
4883
4884 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
4885 {
4886         emul_to_vcpu(ctxt)->arch.halt_request = 1;
4887 }
4888
4889 static void emulator_get_fpu(struct x86_emulate_ctxt *ctxt)
4890 {
4891         preempt_disable();
4892         kvm_load_guest_fpu(emul_to_vcpu(ctxt));
4893         /*
4894          * CR0.TS may reference the host fpu state, not the guest fpu state,
4895          * so it may be clear at this point.
4896          */
4897         clts();
4898 }
4899
4900 static void emulator_put_fpu(struct x86_emulate_ctxt *ctxt)
4901 {
4902         preempt_enable();
4903 }
4904
4905 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
4906                               struct x86_instruction_info *info,
4907                               enum x86_intercept_stage stage)
4908 {
4909         return kvm_x86_ops->check_intercept(emul_to_vcpu(ctxt), info, stage);
4910 }
4911
4912 static void emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
4913                                u32 *eax, u32 *ebx, u32 *ecx, u32 *edx)
4914 {
4915         kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx);
4916 }
4917
4918 static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
4919 {
4920         return kvm_register_read(emul_to_vcpu(ctxt), reg);
4921 }
4922
4923 static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
4924 {
4925         kvm_register_write(emul_to_vcpu(ctxt), reg, val);
4926 }
4927
4928 static void emulator_set_nmi_mask(struct x86_emulate_ctxt *ctxt, bool masked)
4929 {
4930         kvm_x86_ops->set_nmi_mask(emul_to_vcpu(ctxt), masked);
4931 }
4932
4933 static const struct x86_emulate_ops emulate_ops = {
4934         .read_gpr            = emulator_read_gpr,
4935         .write_gpr           = emulator_write_gpr,
4936         .read_std            = kvm_read_guest_virt_system,
4937         .write_std           = kvm_write_guest_virt_system,
4938         .read_phys           = kvm_read_guest_phys_system,
4939         .fetch               = kvm_fetch_guest_virt,
4940         .read_emulated       = emulator_read_emulated,
4941         .write_emulated      = emulator_write_emulated,
4942         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
4943         .invlpg              = emulator_invlpg,
4944         .pio_in_emulated     = emulator_pio_in_emulated,
4945         .pio_out_emulated    = emulator_pio_out_emulated,
4946         .get_segment         = emulator_get_segment,
4947         .set_segment         = emulator_set_segment,
4948         .get_cached_segment_base = emulator_get_cached_segment_base,
4949         .get_gdt             = emulator_get_gdt,
4950         .get_idt             = emulator_get_idt,
4951         .set_gdt             = emulator_set_gdt,
4952         .set_idt             = emulator_set_idt,
4953         .get_cr              = emulator_get_cr,
4954         .set_cr              = emulator_set_cr,
4955         .cpl                 = emulator_get_cpl,
4956         .get_dr              = emulator_get_dr,
4957         .set_dr              = emulator_set_dr,
4958         .get_smbase          = emulator_get_smbase,
4959         .set_smbase          = emulator_set_smbase,
4960         .set_msr             = emulator_set_msr,
4961         .get_msr             = emulator_get_msr,
4962         .check_pmc           = emulator_check_pmc,
4963         .read_pmc            = emulator_read_pmc,
4964         .halt                = emulator_halt,
4965         .wbinvd              = emulator_wbinvd,
4966         .fix_hypercall       = emulator_fix_hypercall,
4967         .get_fpu             = emulator_get_fpu,
4968         .put_fpu             = emulator_put_fpu,
4969         .intercept           = emulator_intercept,
4970         .get_cpuid           = emulator_get_cpuid,
4971         .set_nmi_mask        = emulator_set_nmi_mask,
4972 };
4973
4974 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
4975 {
4976         u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
4977         /*
4978          * an sti; sti; sequence only disable interrupts for the first
4979          * instruction. So, if the last instruction, be it emulated or
4980          * not, left the system with the INT_STI flag enabled, it
4981          * means that the last instruction is an sti. We should not
4982          * leave the flag on in this case. The same goes for mov ss
4983          */
4984         if (int_shadow & mask)
4985                 mask = 0;
4986         if (unlikely(int_shadow || mask)) {
4987                 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
4988                 if (!mask)
4989                         kvm_make_request(KVM_REQ_EVENT, vcpu);
4990         }
4991 }
4992
4993 static bool inject_emulated_exception(struct kvm_vcpu *vcpu)
4994 {
4995         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4996         if (ctxt->exception.vector == PF_VECTOR)
4997                 return kvm_propagate_fault(vcpu, &ctxt->exception);
4998
4999         if (ctxt->exception.error_code_valid)
5000                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
5001                                       ctxt->exception.error_code);
5002         else
5003                 kvm_queue_exception(vcpu, ctxt->exception.vector);
5004         return false;
5005 }
5006
5007 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
5008 {
5009         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5010         int cs_db, cs_l;
5011
5012         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
5013
5014         ctxt->eflags = kvm_get_rflags(vcpu);
5015         ctxt->eip = kvm_rip_read(vcpu);
5016         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
5017                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
5018                      (cs_l && is_long_mode(vcpu))       ? X86EMUL_MODE_PROT64 :
5019                      cs_db                              ? X86EMUL_MODE_PROT32 :
5020                                                           X86EMUL_MODE_PROT16;
5021         BUILD_BUG_ON(HF_GUEST_MASK != X86EMUL_GUEST_MASK);
5022         BUILD_BUG_ON(HF_SMM_MASK != X86EMUL_SMM_MASK);
5023         BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK != X86EMUL_SMM_INSIDE_NMI_MASK);
5024         ctxt->emul_flags = vcpu->arch.hflags;
5025
5026         init_decode_cache(ctxt);
5027         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
5028 }
5029
5030 int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
5031 {
5032         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5033         int ret;
5034
5035         init_emulate_ctxt(vcpu);
5036
5037         ctxt->op_bytes = 2;
5038         ctxt->ad_bytes = 2;
5039         ctxt->_eip = ctxt->eip + inc_eip;
5040         ret = emulate_int_real(ctxt, irq);
5041
5042         if (ret != X86EMUL_CONTINUE)
5043                 return EMULATE_FAIL;
5044
5045         ctxt->eip = ctxt->_eip;
5046         kvm_rip_write(vcpu, ctxt->eip);
5047         kvm_set_rflags(vcpu, ctxt->eflags);
5048
5049         if (irq == NMI_VECTOR)
5050                 vcpu->arch.nmi_pending = 0;
5051         else
5052                 vcpu->arch.interrupt.pending = false;
5053
5054         return EMULATE_DONE;
5055 }
5056 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
5057
5058 static int handle_emulation_failure(struct kvm_vcpu *vcpu)
5059 {
5060         int r = EMULATE_DONE;
5061
5062         ++vcpu->stat.insn_emulation_fail;
5063         trace_kvm_emulate_insn_failed(vcpu);
5064         if (!is_guest_mode(vcpu) && kvm_x86_ops->get_cpl(vcpu) == 0) {
5065                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
5066                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
5067                 vcpu->run->internal.ndata = 0;
5068                 r = EMULATE_FAIL;
5069         }
5070         kvm_queue_exception(vcpu, UD_VECTOR);
5071
5072         return r;
5073 }
5074
5075 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t cr2,
5076                                   bool write_fault_to_shadow_pgtable,
5077                                   int emulation_type)
5078 {
5079         gpa_t gpa = cr2;
5080         pfn_t pfn;
5081
5082         if (emulation_type & EMULTYPE_NO_REEXECUTE)
5083                 return false;
5084
5085         if (!vcpu->arch.mmu.direct_map) {
5086                 /*
5087                  * Write permission should be allowed since only
5088                  * write access need to be emulated.
5089                  */
5090                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
5091
5092                 /*
5093                  * If the mapping is invalid in guest, let cpu retry
5094                  * it to generate fault.
5095                  */
5096                 if (gpa == UNMAPPED_GVA)
5097                         return true;
5098         }
5099
5100         /*
5101          * Do not retry the unhandleable instruction if it faults on the
5102          * readonly host memory, otherwise it will goto a infinite loop:
5103          * retry instruction -> write #PF -> emulation fail -> retry
5104          * instruction -> ...
5105          */
5106         pfn = gfn_to_pfn(vcpu->kvm, gpa_to_gfn(gpa));
5107
5108         /*
5109          * If the instruction failed on the error pfn, it can not be fixed,
5110          * report the error to userspace.
5111          */
5112         if (is_error_noslot_pfn(pfn))
5113                 return false;
5114
5115         kvm_release_pfn_clean(pfn);
5116
5117         /* The instructions are well-emulated on direct mmu. */
5118         if (vcpu->arch.mmu.direct_map) {
5119                 unsigned int indirect_shadow_pages;
5120
5121                 spin_lock(&vcpu->kvm->mmu_lock);
5122                 indirect_shadow_pages = vcpu->kvm->arch.indirect_shadow_pages;
5123                 spin_unlock(&vcpu->kvm->mmu_lock);
5124
5125                 if (indirect_shadow_pages)
5126                         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5127
5128                 return true;
5129         }
5130
5131         /*
5132          * if emulation was due to access to shadowed page table
5133          * and it failed try to unshadow page and re-enter the
5134          * guest to let CPU execute the instruction.
5135          */
5136         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5137
5138         /*
5139          * If the access faults on its page table, it can not
5140          * be fixed by unprotecting shadow page and it should
5141          * be reported to userspace.
5142          */
5143         return !write_fault_to_shadow_pgtable;
5144 }
5145
5146 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
5147                               unsigned long cr2,  int emulation_type)
5148 {
5149         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5150         unsigned long last_retry_eip, last_retry_addr, gpa = cr2;
5151
5152         last_retry_eip = vcpu->arch.last_retry_eip;
5153         last_retry_addr = vcpu->arch.last_retry_addr;
5154
5155         /*
5156          * If the emulation is caused by #PF and it is non-page_table
5157          * writing instruction, it means the VM-EXIT is caused by shadow
5158          * page protected, we can zap the shadow page and retry this
5159          * instruction directly.
5160          *
5161          * Note: if the guest uses a non-page-table modifying instruction
5162          * on the PDE that points to the instruction, then we will unmap
5163          * the instruction and go to an infinite loop. So, we cache the
5164          * last retried eip and the last fault address, if we meet the eip
5165          * and the address again, we can break out of the potential infinite
5166          * loop.
5167          */
5168         vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
5169
5170         if (!(emulation_type & EMULTYPE_RETRY))
5171                 return false;
5172
5173         if (x86_page_table_writing_insn(ctxt))
5174                 return false;
5175
5176         if (ctxt->eip == last_retry_eip && last_retry_addr == cr2)
5177                 return false;
5178
5179         vcpu->arch.last_retry_eip = ctxt->eip;
5180         vcpu->arch.last_retry_addr = cr2;
5181
5182         if (!vcpu->arch.mmu.direct_map)
5183                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
5184
5185         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5186
5187         return true;
5188 }
5189
5190 static int complete_emulated_mmio(struct kvm_vcpu *vcpu);
5191 static int complete_emulated_pio(struct kvm_vcpu *vcpu);
5192
5193 static void kvm_smm_changed(struct kvm_vcpu *vcpu)
5194 {
5195         if (!(vcpu->arch.hflags & HF_SMM_MASK)) {
5196                 /* This is a good place to trace that we are exiting SMM.  */
5197                 trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, false);
5198
5199                 if (unlikely(vcpu->arch.smi_pending)) {
5200                         kvm_make_request(KVM_REQ_SMI, vcpu);
5201                         vcpu->arch.smi_pending = 0;
5202                 } else {
5203                         /* Process a latched INIT, if any.  */
5204                         kvm_make_request(KVM_REQ_EVENT, vcpu);
5205                 }
5206         }
5207
5208         kvm_mmu_reset_context(vcpu);
5209 }
5210
5211 static void kvm_set_hflags(struct kvm_vcpu *vcpu, unsigned emul_flags)
5212 {
5213         unsigned changed = vcpu->arch.hflags ^ emul_flags;
5214
5215         vcpu->arch.hflags = emul_flags;
5216
5217         if (changed & HF_SMM_MASK)
5218                 kvm_smm_changed(vcpu);
5219 }
5220
5221 static int kvm_vcpu_check_hw_bp(unsigned long addr, u32 type, u32 dr7,
5222                                 unsigned long *db)
5223 {
5224         u32 dr6 = 0;
5225         int i;
5226         u32 enable, rwlen;
5227
5228         enable = dr7;
5229         rwlen = dr7 >> 16;
5230         for (i = 0; i < 4; i++, enable >>= 2, rwlen >>= 4)
5231                 if ((enable & 3) && (rwlen & 15) == type && db[i] == addr)
5232                         dr6 |= (1 << i);
5233         return dr6;
5234 }
5235
5236 static void kvm_vcpu_check_singlestep(struct kvm_vcpu *vcpu, unsigned long rflags, int *r)
5237 {
5238         struct kvm_run *kvm_run = vcpu->run;
5239
5240         /*
5241          * rflags is the old, "raw" value of the flags.  The new value has
5242          * not been saved yet.
5243          *
5244          * This is correct even for TF set by the guest, because "the
5245          * processor will not generate this exception after the instruction
5246          * that sets the TF flag".
5247          */
5248         if (unlikely(rflags & X86_EFLAGS_TF)) {
5249                 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
5250                         kvm_run->debug.arch.dr6 = DR6_BS | DR6_FIXED_1 |
5251                                                   DR6_RTM;
5252                         kvm_run->debug.arch.pc = vcpu->arch.singlestep_rip;
5253                         kvm_run->debug.arch.exception = DB_VECTOR;
5254                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
5255                         *r = EMULATE_USER_EXIT;
5256                 } else {
5257                         vcpu->arch.emulate_ctxt.eflags &= ~X86_EFLAGS_TF;
5258                         /*
5259                          * "Certain debug exceptions may clear bit 0-3.  The
5260                          * remaining contents of the DR6 register are never
5261                          * cleared by the processor".
5262                          */
5263                         vcpu->arch.dr6 &= ~15;
5264                         vcpu->arch.dr6 |= DR6_BS | DR6_RTM;
5265                         kvm_queue_exception(vcpu, DB_VECTOR);
5266                 }
5267         }
5268 }
5269
5270 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu *vcpu, int *r)
5271 {
5272         if (unlikely(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) &&
5273             (vcpu->arch.guest_debug_dr7 & DR7_BP_EN_MASK)) {
5274                 struct kvm_run *kvm_run = vcpu->run;
5275                 unsigned long eip = kvm_get_linear_rip(vcpu);
5276                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
5277                                            vcpu->arch.guest_debug_dr7,
5278                                            vcpu->arch.eff_db);
5279
5280                 if (dr6 != 0) {
5281                         kvm_run->debug.arch.dr6 = dr6 | DR6_FIXED_1 | DR6_RTM;
5282                         kvm_run->debug.arch.pc = eip;
5283                         kvm_run->debug.arch.exception = DB_VECTOR;
5284                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
5285                         *r = EMULATE_USER_EXIT;
5286                         return true;
5287                 }
5288         }
5289
5290         if (unlikely(vcpu->arch.dr7 & DR7_BP_EN_MASK) &&
5291             !(kvm_get_rflags(vcpu) & X86_EFLAGS_RF)) {
5292                 unsigned long eip = kvm_get_linear_rip(vcpu);
5293                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
5294                                            vcpu->arch.dr7,
5295                                            vcpu->arch.db);
5296
5297                 if (dr6 != 0) {
5298                         vcpu->arch.dr6 &= ~15;
5299                         vcpu->arch.dr6 |= dr6 | DR6_RTM;
5300                         kvm_queue_exception(vcpu, DB_VECTOR);
5301                         *r = EMULATE_DONE;
5302                         return true;
5303                 }
5304         }
5305
5306         return false;
5307 }
5308
5309 int x86_emulate_instruction(struct kvm_vcpu *vcpu,
5310                             unsigned long cr2,
5311                             int emulation_type,
5312                             void *insn,
5313                             int insn_len)
5314 {
5315         int r;
5316         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5317         bool writeback = true;
5318         bool write_fault_to_spt = vcpu->arch.write_fault_to_shadow_pgtable;
5319
5320         /*
5321          * Clear write_fault_to_shadow_pgtable here to ensure it is
5322          * never reused.
5323          */
5324         vcpu->arch.write_fault_to_shadow_pgtable = false;
5325         kvm_clear_exception_queue(vcpu);
5326
5327         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
5328                 init_emulate_ctxt(vcpu);
5329
5330                 /*
5331                  * We will reenter on the same instruction since
5332                  * we do not set complete_userspace_io.  This does not
5333                  * handle watchpoints yet, those would be handled in
5334                  * the emulate_ops.
5335                  */
5336                 if (kvm_vcpu_check_breakpoint(vcpu, &r))
5337                         return r;
5338
5339                 ctxt->interruptibility = 0;
5340                 ctxt->have_exception = false;
5341                 ctxt->exception.vector = -1;
5342                 ctxt->perm_ok = false;
5343
5344                 ctxt->ud = emulation_type & EMULTYPE_TRAP_UD;
5345
5346                 r = x86_decode_insn(ctxt, insn, insn_len);
5347
5348                 trace_kvm_emulate_insn_start(vcpu);
5349                 ++vcpu->stat.insn_emulation;
5350                 if (r != EMULATION_OK)  {
5351                         if (emulation_type & EMULTYPE_TRAP_UD)
5352                                 return EMULATE_FAIL;
5353                         if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
5354                                                 emulation_type))
5355                                 return EMULATE_DONE;
5356                         if (emulation_type & EMULTYPE_SKIP)
5357                                 return EMULATE_FAIL;
5358                         return handle_emulation_failure(vcpu);
5359                 }
5360         }
5361
5362         if (emulation_type & EMULTYPE_SKIP) {
5363                 kvm_rip_write(vcpu, ctxt->_eip);
5364                 if (ctxt->eflags & X86_EFLAGS_RF)
5365                         kvm_set_rflags(vcpu, ctxt->eflags & ~X86_EFLAGS_RF);
5366                 return EMULATE_DONE;
5367         }
5368
5369         if (retry_instruction(ctxt, cr2, emulation_type))
5370                 return EMULATE_DONE;
5371
5372         /* this is needed for vmware backdoor interface to work since it
5373            changes registers values  during IO operation */
5374         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
5375                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
5376                 emulator_invalidate_register_cache(ctxt);
5377         }
5378
5379 restart:
5380         r = x86_emulate_insn(ctxt);
5381
5382         if (r == EMULATION_INTERCEPTED)
5383                 return EMULATE_DONE;
5384
5385         if (r == EMULATION_FAILED) {
5386                 if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
5387                                         emulation_type))
5388                         return EMULATE_DONE;
5389
5390                 return handle_emulation_failure(vcpu);
5391         }
5392
5393         if (ctxt->have_exception) {
5394                 r = EMULATE_DONE;
5395                 if (inject_emulated_exception(vcpu))
5396                         return r;
5397         } else if (vcpu->arch.pio.count) {
5398                 if (!vcpu->arch.pio.in) {
5399                         /* FIXME: return into emulator if single-stepping.  */
5400                         vcpu->arch.pio.count = 0;
5401                 } else {
5402                         writeback = false;
5403                         vcpu->arch.complete_userspace_io = complete_emulated_pio;
5404                 }
5405                 r = EMULATE_USER_EXIT;
5406         } else if (vcpu->mmio_needed) {
5407                 if (!vcpu->mmio_is_write)
5408                         writeback = false;
5409                 r = EMULATE_USER_EXIT;
5410                 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
5411         } else if (r == EMULATION_RESTART)
5412                 goto restart;
5413         else
5414                 r = EMULATE_DONE;
5415
5416         if (writeback) {
5417                 unsigned long rflags = kvm_x86_ops->get_rflags(vcpu);
5418                 toggle_interruptibility(vcpu, ctxt->interruptibility);
5419                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
5420                 if (vcpu->arch.hflags != ctxt->emul_flags)
5421                         kvm_set_hflags(vcpu, ctxt->emul_flags);
5422                 kvm_rip_write(vcpu, ctxt->eip);
5423                 if (r == EMULATE_DONE)
5424                         kvm_vcpu_check_singlestep(vcpu, rflags, &r);
5425                 if (!ctxt->have_exception ||
5426                     exception_type(ctxt->exception.vector) == EXCPT_TRAP)
5427                         __kvm_set_rflags(vcpu, ctxt->eflags);
5428
5429                 /*
5430                  * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
5431                  * do nothing, and it will be requested again as soon as
5432                  * the shadow expires.  But we still need to check here,
5433                  * because POPF has no interrupt shadow.
5434                  */
5435                 if (unlikely((ctxt->eflags & ~rflags) & X86_EFLAGS_IF))
5436                         kvm_make_request(KVM_REQ_EVENT, vcpu);
5437         } else
5438                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
5439
5440         return r;
5441 }
5442 EXPORT_SYMBOL_GPL(x86_emulate_instruction);
5443
5444 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port)
5445 {
5446         unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
5447         int ret = emulator_pio_out_emulated(&vcpu->arch.emulate_ctxt,
5448                                             size, port, &val, 1);
5449         /* do not return to emulator after return from userspace */
5450         vcpu->arch.pio.count = 0;
5451         return ret;
5452 }
5453 EXPORT_SYMBOL_GPL(kvm_fast_pio_out);
5454
5455 static void tsc_bad(void *info)
5456 {
5457         __this_cpu_write(cpu_tsc_khz, 0);
5458 }
5459
5460 static void tsc_khz_changed(void *data)
5461 {
5462         struct cpufreq_freqs *freq = data;
5463         unsigned long khz = 0;
5464
5465         if (data)
5466                 khz = freq->new;
5467         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
5468                 khz = cpufreq_quick_get(raw_smp_processor_id());
5469         if (!khz)
5470                 khz = tsc_khz;
5471         __this_cpu_write(cpu_tsc_khz, khz);
5472 }
5473
5474 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
5475                                      void *data)
5476 {
5477         struct cpufreq_freqs *freq = data;
5478         struct kvm *kvm;
5479         struct kvm_vcpu *vcpu;
5480         int i, send_ipi = 0;
5481
5482         /*
5483          * We allow guests to temporarily run on slowing clocks,
5484          * provided we notify them after, or to run on accelerating
5485          * clocks, provided we notify them before.  Thus time never
5486          * goes backwards.
5487          *
5488          * However, we have a problem.  We can't atomically update
5489          * the frequency of a given CPU from this function; it is
5490          * merely a notifier, which can be called from any CPU.
5491          * Changing the TSC frequency at arbitrary points in time
5492          * requires a recomputation of local variables related to
5493          * the TSC for each VCPU.  We must flag these local variables
5494          * to be updated and be sure the update takes place with the
5495          * new frequency before any guests proceed.
5496          *
5497          * Unfortunately, the combination of hotplug CPU and frequency
5498          * change creates an intractable locking scenario; the order
5499          * of when these callouts happen is undefined with respect to
5500          * CPU hotplug, and they can race with each other.  As such,
5501          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
5502          * undefined; you can actually have a CPU frequency change take
5503          * place in between the computation of X and the setting of the
5504          * variable.  To protect against this problem, all updates of
5505          * the per_cpu tsc_khz variable are done in an interrupt
5506          * protected IPI, and all callers wishing to update the value
5507          * must wait for a synchronous IPI to complete (which is trivial
5508          * if the caller is on the CPU already).  This establishes the
5509          * necessary total order on variable updates.
5510          *
5511          * Note that because a guest time update may take place
5512          * anytime after the setting of the VCPU's request bit, the
5513          * correct TSC value must be set before the request.  However,
5514          * to ensure the update actually makes it to any guest which
5515          * starts running in hardware virtualization between the set
5516          * and the acquisition of the spinlock, we must also ping the
5517          * CPU after setting the request bit.
5518          *
5519          */
5520
5521         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
5522                 return 0;
5523         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
5524                 return 0;
5525
5526         smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5527
5528         spin_lock(&kvm_lock);
5529         list_for_each_entry(kvm, &vm_list, vm_list) {
5530                 kvm_for_each_vcpu(i, vcpu, kvm) {
5531                         if (vcpu->cpu != freq->cpu)
5532                                 continue;
5533                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
5534                         if (vcpu->cpu != smp_processor_id())
5535                                 send_ipi = 1;
5536                 }
5537         }
5538         spin_unlock(&kvm_lock);
5539
5540         if (freq->old < freq->new && send_ipi) {
5541                 /*
5542                  * We upscale the frequency.  Must make the guest
5543                  * doesn't see old kvmclock values while running with
5544                  * the new frequency, otherwise we risk the guest sees
5545                  * time go backwards.
5546                  *
5547                  * In case we update the frequency for another cpu
5548                  * (which might be in guest context) send an interrupt
5549                  * to kick the cpu out of guest context.  Next time
5550                  * guest context is entered kvmclock will be updated,
5551                  * so the guest will not see stale values.
5552                  */
5553                 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5554         }
5555         return 0;
5556 }
5557
5558 static struct notifier_block kvmclock_cpufreq_notifier_block = {
5559         .notifier_call  = kvmclock_cpufreq_notifier
5560 };
5561
5562 static int kvmclock_cpu_notifier(struct notifier_block *nfb,
5563                                         unsigned long action, void *hcpu)
5564 {
5565         unsigned int cpu = (unsigned long)hcpu;
5566
5567         switch (action) {
5568                 case CPU_ONLINE:
5569                 case CPU_DOWN_FAILED:
5570                         smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
5571                         break;
5572                 case CPU_DOWN_PREPARE:
5573                         smp_call_function_single(cpu, tsc_bad, NULL, 1);
5574                         break;
5575         }
5576         return NOTIFY_OK;
5577 }
5578
5579 static struct notifier_block kvmclock_cpu_notifier_block = {
5580         .notifier_call  = kvmclock_cpu_notifier,
5581         .priority = -INT_MAX
5582 };
5583
5584 static void kvm_timer_init(void)
5585 {
5586         int cpu;
5587
5588         max_tsc_khz = tsc_khz;
5589
5590         cpu_notifier_register_begin();
5591         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
5592 #ifdef CONFIG_CPU_FREQ
5593                 struct cpufreq_policy policy;
5594                 memset(&policy, 0, sizeof(policy));
5595                 cpu = get_cpu();
5596                 cpufreq_get_policy(&policy, cpu);
5597                 if (policy.cpuinfo.max_freq)
5598                         max_tsc_khz = policy.cpuinfo.max_freq;
5599                 put_cpu();
5600 #endif
5601                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
5602                                           CPUFREQ_TRANSITION_NOTIFIER);
5603         }
5604         pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz);
5605         for_each_online_cpu(cpu)
5606                 smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
5607
5608         __register_hotcpu_notifier(&kvmclock_cpu_notifier_block);
5609         cpu_notifier_register_done();
5610
5611 }
5612
5613 static DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
5614
5615 int kvm_is_in_guest(void)
5616 {
5617         return __this_cpu_read(current_vcpu) != NULL;
5618 }
5619
5620 static int kvm_is_user_mode(void)
5621 {
5622         int user_mode = 3;
5623
5624         if (__this_cpu_read(current_vcpu))
5625                 user_mode = kvm_x86_ops->get_cpl(__this_cpu_read(current_vcpu));
5626
5627         return user_mode != 0;
5628 }
5629
5630 static unsigned long kvm_get_guest_ip(void)
5631 {
5632         unsigned long ip = 0;
5633
5634         if (__this_cpu_read(current_vcpu))
5635                 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
5636
5637         return ip;
5638 }
5639
5640 static struct perf_guest_info_callbacks kvm_guest_cbs = {
5641         .is_in_guest            = kvm_is_in_guest,
5642         .is_user_mode           = kvm_is_user_mode,
5643         .get_guest_ip           = kvm_get_guest_ip,
5644 };
5645
5646 void kvm_before_handle_nmi(struct kvm_vcpu *vcpu)
5647 {
5648         __this_cpu_write(current_vcpu, vcpu);
5649 }
5650 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi);
5651
5652 void kvm_after_handle_nmi(struct kvm_vcpu *vcpu)
5653 {
5654         __this_cpu_write(current_vcpu, NULL);
5655 }
5656 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi);
5657
5658 static void kvm_set_mmio_spte_mask(void)
5659 {
5660         u64 mask;
5661         int maxphyaddr = boot_cpu_data.x86_phys_bits;
5662
5663         /*
5664          * Set the reserved bits and the present bit of an paging-structure
5665          * entry to generate page fault with PFER.RSV = 1.
5666          */
5667          /* Mask the reserved physical address bits. */
5668         mask = rsvd_bits(maxphyaddr, 51);
5669
5670         /* Bit 62 is always reserved for 32bit host. */
5671         mask |= 0x3ull << 62;
5672
5673         /* Set the present bit. */
5674         mask |= 1ull;
5675
5676 #ifdef CONFIG_X86_64
5677         /*
5678          * If reserved bit is not supported, clear the present bit to disable
5679          * mmio page fault.
5680          */
5681         if (maxphyaddr == 52)
5682                 mask &= ~1ull;
5683 #endif
5684
5685         kvm_mmu_set_mmio_spte_mask(mask);
5686 }
5687
5688 #ifdef CONFIG_X86_64
5689 static void pvclock_gtod_update_fn(struct work_struct *work)
5690 {
5691         struct kvm *kvm;
5692
5693         struct kvm_vcpu *vcpu;
5694         int i;
5695
5696         spin_lock(&kvm_lock);
5697         list_for_each_entry(kvm, &vm_list, vm_list)
5698                 kvm_for_each_vcpu(i, vcpu, kvm)
5699                         kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
5700         atomic_set(&kvm_guest_has_master_clock, 0);
5701         spin_unlock(&kvm_lock);
5702 }
5703
5704 static DECLARE_WORK(pvclock_gtod_work, pvclock_gtod_update_fn);
5705
5706 /*
5707  * Notification about pvclock gtod data update.
5708  */
5709 static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused,
5710                                void *priv)
5711 {
5712         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
5713         struct timekeeper *tk = priv;
5714
5715         update_pvclock_gtod(tk);
5716
5717         /* disable master clock if host does not trust, or does not
5718          * use, TSC clocksource
5719          */
5720         if (gtod->clock.vclock_mode != VCLOCK_TSC &&
5721             atomic_read(&kvm_guest_has_master_clock) != 0)
5722                 queue_work(system_long_wq, &pvclock_gtod_work);
5723
5724         return 0;
5725 }
5726
5727 static struct notifier_block pvclock_gtod_notifier = {
5728         .notifier_call = pvclock_gtod_notify,
5729 };
5730 #endif
5731
5732 int kvm_arch_init(void *opaque)
5733 {
5734         int r;
5735         struct kvm_x86_ops *ops = opaque;
5736
5737         if (kvm_x86_ops) {
5738                 printk(KERN_ERR "kvm: already loaded the other module\n");
5739                 r = -EEXIST;
5740                 goto out;
5741         }
5742
5743         if (!ops->cpu_has_kvm_support()) {
5744                 printk(KERN_ERR "kvm: no hardware support\n");
5745                 r = -EOPNOTSUPP;
5746                 goto out;
5747         }
5748         if (ops->disabled_by_bios()) {
5749                 printk(KERN_ERR "kvm: disabled by bios\n");
5750                 r = -EOPNOTSUPP;
5751                 goto out;
5752         }
5753
5754         r = -ENOMEM;
5755         shared_msrs = alloc_percpu(struct kvm_shared_msrs);
5756         if (!shared_msrs) {
5757                 printk(KERN_ERR "kvm: failed to allocate percpu kvm_shared_msrs\n");
5758                 goto out;
5759         }
5760
5761         r = kvm_mmu_module_init();
5762         if (r)
5763                 goto out_free_percpu;
5764
5765         kvm_set_mmio_spte_mask();
5766
5767         kvm_x86_ops = ops;
5768
5769         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
5770                         PT_DIRTY_MASK, PT64_NX_MASK, 0);
5771
5772         kvm_timer_init();
5773
5774         perf_register_guest_info_callbacks(&kvm_guest_cbs);
5775
5776         if (cpu_has_xsave)
5777                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
5778
5779         kvm_lapic_init();
5780 #ifdef CONFIG_X86_64
5781         pvclock_gtod_register_notifier(&pvclock_gtod_notifier);
5782 #endif
5783
5784         return 0;
5785
5786 out_free_percpu:
5787         free_percpu(shared_msrs);
5788 out:
5789         return r;
5790 }
5791
5792 void kvm_arch_exit(void)
5793 {
5794         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
5795
5796         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
5797                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
5798                                             CPUFREQ_TRANSITION_NOTIFIER);
5799         unregister_hotcpu_notifier(&kvmclock_cpu_notifier_block);
5800 #ifdef CONFIG_X86_64
5801         pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier);
5802 #endif
5803         kvm_x86_ops = NULL;
5804         kvm_mmu_module_exit();
5805         free_percpu(shared_msrs);
5806 }
5807
5808 int kvm_vcpu_halt(struct kvm_vcpu *vcpu)
5809 {
5810         ++vcpu->stat.halt_exits;
5811         if (lapic_in_kernel(vcpu)) {
5812                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
5813                 return 1;
5814         } else {
5815                 vcpu->run->exit_reason = KVM_EXIT_HLT;
5816                 return 0;
5817         }
5818 }
5819 EXPORT_SYMBOL_GPL(kvm_vcpu_halt);
5820
5821 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
5822 {
5823         kvm_x86_ops->skip_emulated_instruction(vcpu);
5824         return kvm_vcpu_halt(vcpu);
5825 }
5826 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
5827
5828 /*
5829  * kvm_pv_kick_cpu_op:  Kick a vcpu.
5830  *
5831  * @apicid - apicid of vcpu to be kicked.
5832  */
5833 static void kvm_pv_kick_cpu_op(struct kvm *kvm, unsigned long flags, int apicid)
5834 {
5835         struct kvm_lapic_irq lapic_irq;
5836
5837         lapic_irq.shorthand = 0;
5838         lapic_irq.dest_mode = 0;
5839         lapic_irq.dest_id = apicid;
5840         lapic_irq.msi_redir_hint = false;
5841
5842         lapic_irq.delivery_mode = APIC_DM_REMRD;
5843         kvm_irq_delivery_to_apic(kvm, NULL, &lapic_irq, NULL);
5844 }
5845
5846 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
5847 {
5848         unsigned long nr, a0, a1, a2, a3, ret;
5849         int op_64_bit, r = 1;
5850
5851         kvm_x86_ops->skip_emulated_instruction(vcpu);
5852
5853         if (kvm_hv_hypercall_enabled(vcpu->kvm))
5854                 return kvm_hv_hypercall(vcpu);
5855
5856         nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
5857         a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
5858         a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
5859         a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
5860         a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
5861
5862         trace_kvm_hypercall(nr, a0, a1, a2, a3);
5863
5864         op_64_bit = is_64_bit_mode(vcpu);
5865         if (!op_64_bit) {
5866                 nr &= 0xFFFFFFFF;
5867                 a0 &= 0xFFFFFFFF;
5868                 a1 &= 0xFFFFFFFF;
5869                 a2 &= 0xFFFFFFFF;
5870                 a3 &= 0xFFFFFFFF;
5871         }
5872
5873         if (kvm_x86_ops->get_cpl(vcpu) != 0) {
5874                 ret = -KVM_EPERM;
5875                 goto out;
5876         }
5877
5878         switch (nr) {
5879         case KVM_HC_VAPIC_POLL_IRQ:
5880                 ret = 0;
5881                 break;
5882         case KVM_HC_KICK_CPU:
5883                 kvm_pv_kick_cpu_op(vcpu->kvm, a0, a1);
5884                 ret = 0;
5885                 break;
5886         default:
5887                 ret = -KVM_ENOSYS;
5888                 break;
5889         }
5890 out:
5891         if (!op_64_bit)
5892                 ret = (u32)ret;
5893         kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
5894         ++vcpu->stat.hypercalls;
5895         return r;
5896 }
5897 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
5898
5899 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
5900 {
5901         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5902         char instruction[3];
5903         unsigned long rip = kvm_rip_read(vcpu);
5904
5905         kvm_x86_ops->patch_hypercall(vcpu, instruction);
5906
5907         return emulator_write_emulated(ctxt, rip, instruction, 3, NULL);
5908 }
5909
5910 /*
5911  * Check if userspace requested an interrupt window, and that the
5912  * interrupt window is open.
5913  *
5914  * No need to exit to userspace if we already have an interrupt queued.
5915  */
5916 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
5917 {
5918         if (!vcpu->run->request_interrupt_window || pic_in_kernel(vcpu->kvm))
5919                 return false;
5920
5921         if (kvm_cpu_has_interrupt(vcpu))
5922                 return false;
5923
5924         return (irqchip_split(vcpu->kvm)
5925                 ? kvm_apic_accept_pic_intr(vcpu)
5926                 : kvm_arch_interrupt_allowed(vcpu));
5927 }
5928
5929 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
5930 {
5931         struct kvm_run *kvm_run = vcpu->run;
5932
5933         kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
5934         kvm_run->flags = is_smm(vcpu) ? KVM_RUN_X86_SMM : 0;
5935         kvm_run->cr8 = kvm_get_cr8(vcpu);
5936         kvm_run->apic_base = kvm_get_apic_base(vcpu);
5937         if (!irqchip_in_kernel(vcpu->kvm))
5938                 kvm_run->ready_for_interrupt_injection =
5939                         kvm_arch_interrupt_allowed(vcpu) &&
5940                         !kvm_cpu_has_interrupt(vcpu) &&
5941                         !kvm_event_needs_reinjection(vcpu);
5942         else if (!pic_in_kernel(vcpu->kvm))
5943                 kvm_run->ready_for_interrupt_injection =
5944                         kvm_apic_accept_pic_intr(vcpu) &&
5945                         !kvm_cpu_has_interrupt(vcpu);
5946         else
5947                 kvm_run->ready_for_interrupt_injection = 1;
5948 }
5949
5950 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
5951 {
5952         int max_irr, tpr;
5953
5954         if (!kvm_x86_ops->update_cr8_intercept)
5955                 return;
5956
5957         if (!vcpu->arch.apic)
5958                 return;
5959
5960         if (!vcpu->arch.apic->vapic_addr)
5961                 max_irr = kvm_lapic_find_highest_irr(vcpu);
5962         else
5963                 max_irr = -1;
5964
5965         if (max_irr != -1)
5966                 max_irr >>= 4;
5967
5968         tpr = kvm_lapic_get_cr8(vcpu);
5969
5970         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
5971 }
5972
5973 static int inject_pending_event(struct kvm_vcpu *vcpu, bool req_int_win)
5974 {
5975         int r;
5976
5977         /* try to reinject previous events if any */
5978         if (vcpu->arch.exception.pending) {
5979                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
5980                                         vcpu->arch.exception.has_error_code,
5981                                         vcpu->arch.exception.error_code);
5982
5983                 if (exception_type(vcpu->arch.exception.nr) == EXCPT_FAULT)
5984                         __kvm_set_rflags(vcpu, kvm_get_rflags(vcpu) |
5985                                              X86_EFLAGS_RF);
5986
5987                 if (vcpu->arch.exception.nr == DB_VECTOR &&
5988                     (vcpu->arch.dr7 & DR7_GD)) {
5989                         vcpu->arch.dr7 &= ~DR7_GD;
5990                         kvm_update_dr7(vcpu);
5991                 }
5992
5993                 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
5994                                           vcpu->arch.exception.has_error_code,
5995                                           vcpu->arch.exception.error_code,
5996                                           vcpu->arch.exception.reinject);
5997                 return 0;
5998         }
5999
6000         if (vcpu->arch.nmi_injected) {
6001                 kvm_x86_ops->set_nmi(vcpu);
6002                 return 0;
6003         }
6004
6005         if (vcpu->arch.interrupt.pending) {
6006                 kvm_x86_ops->set_irq(vcpu);
6007                 return 0;
6008         }
6009
6010         if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
6011                 r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
6012                 if (r != 0)
6013                         return r;
6014         }
6015
6016         /* try to inject new event if pending */
6017         if (vcpu->arch.nmi_pending) {
6018                 if (kvm_x86_ops->nmi_allowed(vcpu)) {
6019                         --vcpu->arch.nmi_pending;
6020                         vcpu->arch.nmi_injected = true;
6021                         kvm_x86_ops->set_nmi(vcpu);
6022                 }
6023         } else if (kvm_cpu_has_injectable_intr(vcpu)) {
6024                 /*
6025                  * Because interrupts can be injected asynchronously, we are
6026                  * calling check_nested_events again here to avoid a race condition.
6027                  * See https://lkml.org/lkml/2014/7/2/60 for discussion about this
6028                  * proposal and current concerns.  Perhaps we should be setting
6029                  * KVM_REQ_EVENT only on certain events and not unconditionally?
6030                  */
6031                 if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
6032                         r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
6033                         if (r != 0)
6034                                 return r;
6035                 }
6036                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
6037                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
6038                                             false);
6039                         kvm_x86_ops->set_irq(vcpu);
6040                 }
6041         }
6042         return 0;
6043 }
6044
6045 static void process_nmi(struct kvm_vcpu *vcpu)
6046 {
6047         unsigned limit = 2;
6048
6049         /*
6050          * x86 is limited to one NMI running, and one NMI pending after it.
6051          * If an NMI is already in progress, limit further NMIs to just one.
6052          * Otherwise, allow two (and we'll inject the first one immediately).
6053          */
6054         if (kvm_x86_ops->get_nmi_mask(vcpu) || vcpu->arch.nmi_injected)
6055                 limit = 1;
6056
6057         vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
6058         vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
6059         kvm_make_request(KVM_REQ_EVENT, vcpu);
6060 }
6061
6062 #define put_smstate(type, buf, offset, val)                       \
6063         *(type *)((buf) + (offset) - 0x7e00) = val
6064
6065 static u32 process_smi_get_segment_flags(struct kvm_segment *seg)
6066 {
6067         u32 flags = 0;
6068         flags |= seg->g       << 23;
6069         flags |= seg->db      << 22;
6070         flags |= seg->l       << 21;
6071         flags |= seg->avl     << 20;
6072         flags |= seg->present << 15;
6073         flags |= seg->dpl     << 13;
6074         flags |= seg->s       << 12;
6075         flags |= seg->type    << 8;
6076         return flags;
6077 }
6078
6079 static void process_smi_save_seg_32(struct kvm_vcpu *vcpu, char *buf, int n)
6080 {
6081         struct kvm_segment seg;
6082         int offset;
6083
6084         kvm_get_segment(vcpu, &seg, n);
6085         put_smstate(u32, buf, 0x7fa8 + n * 4, seg.selector);
6086
6087         if (n < 3)
6088                 offset = 0x7f84 + n * 12;
6089         else
6090                 offset = 0x7f2c + (n - 3) * 12;
6091
6092         put_smstate(u32, buf, offset + 8, seg.base);
6093         put_smstate(u32, buf, offset + 4, seg.limit);
6094         put_smstate(u32, buf, offset, process_smi_get_segment_flags(&seg));
6095 }
6096
6097 #ifdef CONFIG_X86_64
6098 static void process_smi_save_seg_64(struct kvm_vcpu *vcpu, char *buf, int n)
6099 {
6100         struct kvm_segment seg;
6101         int offset;
6102         u16 flags;
6103
6104         kvm_get_segment(vcpu, &seg, n);
6105         offset = 0x7e00 + n * 16;
6106
6107         flags = process_smi_get_segment_flags(&seg) >> 8;
6108         put_smstate(u16, buf, offset, seg.selector);
6109         put_smstate(u16, buf, offset + 2, flags);
6110         put_smstate(u32, buf, offset + 4, seg.limit);
6111         put_smstate(u64, buf, offset + 8, seg.base);
6112 }
6113 #endif
6114
6115 static void process_smi_save_state_32(struct kvm_vcpu *vcpu, char *buf)
6116 {
6117         struct desc_ptr dt;
6118         struct kvm_segment seg;
6119         unsigned long val;
6120         int i;
6121
6122         put_smstate(u32, buf, 0x7ffc, kvm_read_cr0(vcpu));
6123         put_smstate(u32, buf, 0x7ff8, kvm_read_cr3(vcpu));
6124         put_smstate(u32, buf, 0x7ff4, kvm_get_rflags(vcpu));
6125         put_smstate(u32, buf, 0x7ff0, kvm_rip_read(vcpu));
6126
6127         for (i = 0; i < 8; i++)
6128                 put_smstate(u32, buf, 0x7fd0 + i * 4, kvm_register_read(vcpu, i));
6129
6130         kvm_get_dr(vcpu, 6, &val);
6131         put_smstate(u32, buf, 0x7fcc, (u32)val);
6132         kvm_get_dr(vcpu, 7, &val);
6133         put_smstate(u32, buf, 0x7fc8, (u32)val);
6134
6135         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
6136         put_smstate(u32, buf, 0x7fc4, seg.selector);
6137         put_smstate(u32, buf, 0x7f64, seg.base);
6138         put_smstate(u32, buf, 0x7f60, seg.limit);
6139         put_smstate(u32, buf, 0x7f5c, process_smi_get_segment_flags(&seg));
6140
6141         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
6142         put_smstate(u32, buf, 0x7fc0, seg.selector);
6143         put_smstate(u32, buf, 0x7f80, seg.base);
6144         put_smstate(u32, buf, 0x7f7c, seg.limit);
6145         put_smstate(u32, buf, 0x7f78, process_smi_get_segment_flags(&seg));
6146
6147         kvm_x86_ops->get_gdt(vcpu, &dt);
6148         put_smstate(u32, buf, 0x7f74, dt.address);
6149         put_smstate(u32, buf, 0x7f70, dt.size);
6150
6151         kvm_x86_ops->get_idt(vcpu, &dt);
6152         put_smstate(u32, buf, 0x7f58, dt.address);
6153         put_smstate(u32, buf, 0x7f54, dt.size);
6154
6155         for (i = 0; i < 6; i++)
6156                 process_smi_save_seg_32(vcpu, buf, i);
6157
6158         put_smstate(u32, buf, 0x7f14, kvm_read_cr4(vcpu));
6159
6160         /* revision id */
6161         put_smstate(u32, buf, 0x7efc, 0x00020000);
6162         put_smstate(u32, buf, 0x7ef8, vcpu->arch.smbase);
6163 }
6164
6165 static void process_smi_save_state_64(struct kvm_vcpu *vcpu, char *buf)
6166 {
6167 #ifdef CONFIG_X86_64
6168         struct desc_ptr dt;
6169         struct kvm_segment seg;
6170         unsigned long val;
6171         int i;
6172
6173         for (i = 0; i < 16; i++)
6174                 put_smstate(u64, buf, 0x7ff8 - i * 8, kvm_register_read(vcpu, i));
6175
6176         put_smstate(u64, buf, 0x7f78, kvm_rip_read(vcpu));
6177         put_smstate(u32, buf, 0x7f70, kvm_get_rflags(vcpu));
6178
6179         kvm_get_dr(vcpu, 6, &val);
6180         put_smstate(u64, buf, 0x7f68, val);
6181         kvm_get_dr(vcpu, 7, &val);
6182         put_smstate(u64, buf, 0x7f60, val);
6183
6184         put_smstate(u64, buf, 0x7f58, kvm_read_cr0(vcpu));
6185         put_smstate(u64, buf, 0x7f50, kvm_read_cr3(vcpu));
6186         put_smstate(u64, buf, 0x7f48, kvm_read_cr4(vcpu));
6187
6188         put_smstate(u32, buf, 0x7f00, vcpu->arch.smbase);
6189
6190         /* revision id */
6191         put_smstate(u32, buf, 0x7efc, 0x00020064);
6192
6193         put_smstate(u64, buf, 0x7ed0, vcpu->arch.efer);
6194
6195         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
6196         put_smstate(u16, buf, 0x7e90, seg.selector);
6197         put_smstate(u16, buf, 0x7e92, process_smi_get_segment_flags(&seg) >> 8);
6198         put_smstate(u32, buf, 0x7e94, seg.limit);
6199         put_smstate(u64, buf, 0x7e98, seg.base);
6200
6201         kvm_x86_ops->get_idt(vcpu, &dt);
6202         put_smstate(u32, buf, 0x7e84, dt.size);
6203         put_smstate(u64, buf, 0x7e88, dt.address);
6204
6205         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
6206         put_smstate(u16, buf, 0x7e70, seg.selector);
6207         put_smstate(u16, buf, 0x7e72, process_smi_get_segment_flags(&seg) >> 8);
6208         put_smstate(u32, buf, 0x7e74, seg.limit);
6209         put_smstate(u64, buf, 0x7e78, seg.base);
6210
6211         kvm_x86_ops->get_gdt(vcpu, &dt);
6212         put_smstate(u32, buf, 0x7e64, dt.size);
6213         put_smstate(u64, buf, 0x7e68, dt.address);
6214
6215         for (i = 0; i < 6; i++)
6216                 process_smi_save_seg_64(vcpu, buf, i);
6217 #else
6218         WARN_ON_ONCE(1);
6219 #endif
6220 }
6221
6222 static void process_smi(struct kvm_vcpu *vcpu)
6223 {
6224         struct kvm_segment cs, ds;
6225         struct desc_ptr dt;
6226         char buf[512];
6227         u32 cr0;
6228
6229         if (is_smm(vcpu)) {
6230                 vcpu->arch.smi_pending = true;
6231                 return;
6232         }
6233
6234         trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, true);
6235         vcpu->arch.hflags |= HF_SMM_MASK;
6236         memset(buf, 0, 512);
6237         if (guest_cpuid_has_longmode(vcpu))
6238                 process_smi_save_state_64(vcpu, buf);
6239         else
6240                 process_smi_save_state_32(vcpu, buf);
6241
6242         kvm_vcpu_write_guest(vcpu, vcpu->arch.smbase + 0xfe00, buf, sizeof(buf));
6243
6244         if (kvm_x86_ops->get_nmi_mask(vcpu))
6245                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
6246         else
6247                 kvm_x86_ops->set_nmi_mask(vcpu, true);
6248
6249         kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
6250         kvm_rip_write(vcpu, 0x8000);
6251
6252         cr0 = vcpu->arch.cr0 & ~(X86_CR0_PE | X86_CR0_EM | X86_CR0_TS | X86_CR0_PG);
6253         kvm_x86_ops->set_cr0(vcpu, cr0);
6254         vcpu->arch.cr0 = cr0;
6255
6256         kvm_x86_ops->set_cr4(vcpu, 0);
6257
6258         /* Undocumented: IDT limit is set to zero on entry to SMM.  */
6259         dt.address = dt.size = 0;
6260         kvm_x86_ops->set_idt(vcpu, &dt);
6261
6262         __kvm_set_dr(vcpu, 7, DR7_FIXED_1);
6263
6264         cs.selector = (vcpu->arch.smbase >> 4) & 0xffff;
6265         cs.base = vcpu->arch.smbase;
6266
6267         ds.selector = 0;
6268         ds.base = 0;
6269
6270         cs.limit    = ds.limit = 0xffffffff;
6271         cs.type     = ds.type = 0x3;
6272         cs.dpl      = ds.dpl = 0;
6273         cs.db       = ds.db = 0;
6274         cs.s        = ds.s = 1;
6275         cs.l        = ds.l = 0;
6276         cs.g        = ds.g = 1;
6277         cs.avl      = ds.avl = 0;
6278         cs.present  = ds.present = 1;
6279         cs.unusable = ds.unusable = 0;
6280         cs.padding  = ds.padding = 0;
6281
6282         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
6283         kvm_set_segment(vcpu, &ds, VCPU_SREG_DS);
6284         kvm_set_segment(vcpu, &ds, VCPU_SREG_ES);
6285         kvm_set_segment(vcpu, &ds, VCPU_SREG_FS);
6286         kvm_set_segment(vcpu, &ds, VCPU_SREG_GS);
6287         kvm_set_segment(vcpu, &ds, VCPU_SREG_SS);
6288
6289         if (guest_cpuid_has_longmode(vcpu))
6290                 kvm_x86_ops->set_efer(vcpu, 0);
6291
6292         kvm_update_cpuid(vcpu);
6293         kvm_mmu_reset_context(vcpu);
6294 }
6295
6296 static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu)
6297 {
6298         if (!kvm_apic_hw_enabled(vcpu->arch.apic))
6299                 return;
6300
6301         memset(vcpu->arch.eoi_exit_bitmap, 0, 256 / 8);
6302
6303         if (irqchip_split(vcpu->kvm))
6304                 kvm_scan_ioapic_routes(vcpu, vcpu->arch.eoi_exit_bitmap);
6305         else {
6306                 kvm_x86_ops->sync_pir_to_irr(vcpu);
6307                 kvm_ioapic_scan_entry(vcpu, vcpu->arch.eoi_exit_bitmap);
6308         }
6309         kvm_x86_ops->load_eoi_exitmap(vcpu);
6310 }
6311
6312 static void kvm_vcpu_flush_tlb(struct kvm_vcpu *vcpu)
6313 {
6314         ++vcpu->stat.tlb_flush;
6315         kvm_x86_ops->tlb_flush(vcpu);
6316 }
6317
6318 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu)
6319 {
6320         struct page *page = NULL;
6321
6322         if (!lapic_in_kernel(vcpu))
6323                 return;
6324
6325         if (!kvm_x86_ops->set_apic_access_page_addr)
6326                 return;
6327
6328         page = gfn_to_page(vcpu->kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
6329         if (is_error_page(page))
6330                 return;
6331         kvm_x86_ops->set_apic_access_page_addr(vcpu, page_to_phys(page));
6332
6333         /*
6334          * Do not pin apic access page in memory, the MMU notifier
6335          * will call us again if it is migrated or swapped out.
6336          */
6337         put_page(page);
6338 }
6339 EXPORT_SYMBOL_GPL(kvm_vcpu_reload_apic_access_page);
6340
6341 void kvm_arch_mmu_notifier_invalidate_page(struct kvm *kvm,
6342                                            unsigned long address)
6343 {
6344         /*
6345          * The physical address of apic access page is stored in the VMCS.
6346          * Update it when it becomes invalid.
6347          */
6348         if (address == gfn_to_hva(kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT))
6349                 kvm_make_all_cpus_request(kvm, KVM_REQ_APIC_PAGE_RELOAD);
6350 }
6351
6352 /*
6353  * Returns 1 to let vcpu_run() continue the guest execution loop without
6354  * exiting to the userspace.  Otherwise, the value will be returned to the
6355  * userspace.
6356  */
6357 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
6358 {
6359         int r;
6360         bool req_int_win = !lapic_in_kernel(vcpu) &&
6361                 vcpu->run->request_interrupt_window;
6362         bool req_immediate_exit = false;
6363
6364         if (vcpu->requests) {
6365                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
6366                         kvm_mmu_unload(vcpu);
6367                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
6368                         __kvm_migrate_timers(vcpu);
6369                 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu))
6370                         kvm_gen_update_masterclock(vcpu->kvm);
6371                 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu))
6372                         kvm_gen_kvmclock_update(vcpu);
6373                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
6374                         r = kvm_guest_time_update(vcpu);
6375                         if (unlikely(r))
6376                                 goto out;
6377                 }
6378                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
6379                         kvm_mmu_sync_roots(vcpu);
6380                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
6381                         kvm_vcpu_flush_tlb(vcpu);
6382                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
6383                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
6384                         r = 0;
6385                         goto out;
6386                 }
6387                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
6388                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
6389                         r = 0;
6390                         goto out;
6391                 }
6392                 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU, vcpu)) {
6393                         vcpu->fpu_active = 0;
6394                         kvm_x86_ops->fpu_deactivate(vcpu);
6395                 }
6396                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
6397                         /* Page is swapped out. Do synthetic halt */
6398                         vcpu->arch.apf.halted = true;
6399                         r = 1;
6400                         goto out;
6401                 }
6402                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
6403                         record_steal_time(vcpu);
6404                 if (kvm_check_request(KVM_REQ_SMI, vcpu))
6405                         process_smi(vcpu);
6406                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
6407                         process_nmi(vcpu);
6408                 if (kvm_check_request(KVM_REQ_PMU, vcpu))
6409                         kvm_pmu_handle_event(vcpu);
6410                 if (kvm_check_request(KVM_REQ_PMI, vcpu))
6411                         kvm_pmu_deliver_pmi(vcpu);
6412                 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT, vcpu)) {
6413                         BUG_ON(vcpu->arch.pending_ioapic_eoi > 255);
6414                         if (test_bit(vcpu->arch.pending_ioapic_eoi,
6415                                      (void *) vcpu->arch.eoi_exit_bitmap)) {
6416                                 vcpu->run->exit_reason = KVM_EXIT_IOAPIC_EOI;
6417                                 vcpu->run->eoi.vector =
6418                                                 vcpu->arch.pending_ioapic_eoi;
6419                                 r = 0;
6420                                 goto out;
6421                         }
6422                 }
6423                 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC, vcpu))
6424                         vcpu_scan_ioapic(vcpu);
6425                 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD, vcpu))
6426                         kvm_vcpu_reload_apic_access_page(vcpu);
6427                 if (kvm_check_request(KVM_REQ_HV_CRASH, vcpu)) {
6428                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
6429                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_CRASH;
6430                         r = 0;
6431                         goto out;
6432                 }
6433                 if (kvm_check_request(KVM_REQ_HV_RESET, vcpu)) {
6434                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
6435                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_RESET;
6436                         r = 0;
6437                         goto out;
6438                 }
6439         }
6440
6441         /*
6442          * KVM_REQ_EVENT is not set when posted interrupts are set by
6443          * VT-d hardware, so we have to update RVI unconditionally.
6444          */
6445         if (kvm_lapic_enabled(vcpu)) {
6446                 /*
6447                  * Update architecture specific hints for APIC
6448                  * virtual interrupt delivery.
6449                  */
6450                 if (kvm_x86_ops->hwapic_irr_update)
6451                         kvm_x86_ops->hwapic_irr_update(vcpu,
6452                                 kvm_lapic_find_highest_irr(vcpu));
6453         }
6454
6455         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
6456                 kvm_apic_accept_events(vcpu);
6457                 if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
6458                         r = 1;
6459                         goto out;
6460                 }
6461
6462                 if (inject_pending_event(vcpu, req_int_win) != 0)
6463                         req_immediate_exit = true;
6464                 /* enable NMI/IRQ window open exits if needed */
6465                 else if (vcpu->arch.nmi_pending)
6466                         kvm_x86_ops->enable_nmi_window(vcpu);
6467                 else if (kvm_cpu_has_injectable_intr(vcpu) || req_int_win)
6468                         kvm_x86_ops->enable_irq_window(vcpu);
6469
6470                 if (kvm_lapic_enabled(vcpu)) {
6471                         update_cr8_intercept(vcpu);
6472                         kvm_lapic_sync_to_vapic(vcpu);
6473                 }
6474         }
6475
6476         r = kvm_mmu_reload(vcpu);
6477         if (unlikely(r)) {
6478                 goto cancel_injection;
6479         }
6480
6481         preempt_disable();
6482
6483         kvm_x86_ops->prepare_guest_switch(vcpu);
6484         if (vcpu->fpu_active)
6485                 kvm_load_guest_fpu(vcpu);
6486         kvm_load_guest_xcr0(vcpu);
6487
6488         vcpu->mode = IN_GUEST_MODE;
6489
6490         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
6491
6492         /* We should set ->mode before check ->requests,
6493          * see the comment in make_all_cpus_request.
6494          */
6495         smp_mb__after_srcu_read_unlock();
6496
6497         local_irq_disable();
6498
6499         if (vcpu->mode == EXITING_GUEST_MODE || vcpu->requests
6500             || need_resched() || signal_pending(current)) {
6501                 vcpu->mode = OUTSIDE_GUEST_MODE;
6502                 smp_wmb();
6503                 local_irq_enable();
6504                 preempt_enable();
6505                 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
6506                 r = 1;
6507                 goto cancel_injection;
6508         }
6509
6510         if (req_immediate_exit)
6511                 smp_send_reschedule(vcpu->cpu);
6512
6513         __kvm_guest_enter();
6514
6515         if (unlikely(vcpu->arch.switch_db_regs)) {
6516                 set_debugreg(0, 7);
6517                 set_debugreg(vcpu->arch.eff_db[0], 0);
6518                 set_debugreg(vcpu->arch.eff_db[1], 1);
6519                 set_debugreg(vcpu->arch.eff_db[2], 2);
6520                 set_debugreg(vcpu->arch.eff_db[3], 3);
6521                 set_debugreg(vcpu->arch.dr6, 6);
6522                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
6523         }
6524
6525         trace_kvm_entry(vcpu->vcpu_id);
6526         wait_lapic_expire(vcpu);
6527         kvm_x86_ops->run(vcpu);
6528
6529         /*
6530          * Do this here before restoring debug registers on the host.  And
6531          * since we do this before handling the vmexit, a DR access vmexit
6532          * can (a) read the correct value of the debug registers, (b) set
6533          * KVM_DEBUGREG_WONT_EXIT again.
6534          */
6535         if (unlikely(vcpu->arch.switch_db_regs & KVM_DEBUGREG_WONT_EXIT)) {
6536                 int i;
6537
6538                 WARN_ON(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP);
6539                 kvm_x86_ops->sync_dirty_debug_regs(vcpu);
6540                 for (i = 0; i < KVM_NR_DB_REGS; i++)
6541                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
6542         }
6543
6544         /*
6545          * If the guest has used debug registers, at least dr7
6546          * will be disabled while returning to the host.
6547          * If we don't have active breakpoints in the host, we don't
6548          * care about the messed up debug address registers. But if
6549          * we have some of them active, restore the old state.
6550          */
6551         if (hw_breakpoint_active())
6552                 hw_breakpoint_restore();
6553
6554         vcpu->arch.last_guest_tsc = kvm_read_l1_tsc(vcpu, rdtsc());
6555
6556         vcpu->mode = OUTSIDE_GUEST_MODE;
6557         smp_wmb();
6558
6559         /* Interrupt is enabled by handle_external_intr() */
6560         kvm_x86_ops->handle_external_intr(vcpu);
6561
6562         ++vcpu->stat.exits;
6563
6564         /*
6565          * We must have an instruction between local_irq_enable() and
6566          * kvm_guest_exit(), so the timer interrupt isn't delayed by
6567          * the interrupt shadow.  The stat.exits increment will do nicely.
6568          * But we need to prevent reordering, hence this barrier():
6569          */
6570         barrier();
6571
6572         kvm_guest_exit();
6573
6574         preempt_enable();
6575
6576         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
6577
6578         /*
6579          * Profile KVM exit RIPs:
6580          */
6581         if (unlikely(prof_on == KVM_PROFILING)) {
6582                 unsigned long rip = kvm_rip_read(vcpu);
6583                 profile_hit(KVM_PROFILING, (void *)rip);
6584         }
6585
6586         if (unlikely(vcpu->arch.tsc_always_catchup))
6587                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
6588
6589         if (vcpu->arch.apic_attention)
6590                 kvm_lapic_sync_from_vapic(vcpu);
6591
6592         r = kvm_x86_ops->handle_exit(vcpu);
6593         return r;
6594
6595 cancel_injection:
6596         kvm_x86_ops->cancel_injection(vcpu);
6597         if (unlikely(vcpu->arch.apic_attention))
6598                 kvm_lapic_sync_from_vapic(vcpu);
6599 out:
6600         return r;
6601 }
6602
6603 static inline int vcpu_block(struct kvm *kvm, struct kvm_vcpu *vcpu)
6604 {
6605         if (!kvm_arch_vcpu_runnable(vcpu) &&
6606             (!kvm_x86_ops->pre_block || kvm_x86_ops->pre_block(vcpu) == 0)) {
6607                 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
6608                 kvm_vcpu_block(vcpu);
6609                 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
6610
6611                 if (kvm_x86_ops->post_block)
6612                         kvm_x86_ops->post_block(vcpu);
6613
6614                 if (!kvm_check_request(KVM_REQ_UNHALT, vcpu))
6615                         return 1;
6616         }
6617
6618         kvm_apic_accept_events(vcpu);
6619         switch(vcpu->arch.mp_state) {
6620         case KVM_MP_STATE_HALTED:
6621                 vcpu->arch.pv.pv_unhalted = false;
6622                 vcpu->arch.mp_state =
6623                         KVM_MP_STATE_RUNNABLE;
6624         case KVM_MP_STATE_RUNNABLE:
6625                 vcpu->arch.apf.halted = false;
6626                 break;
6627         case KVM_MP_STATE_INIT_RECEIVED:
6628                 break;
6629         default:
6630                 return -EINTR;
6631                 break;
6632         }
6633         return 1;
6634 }
6635
6636 static inline bool kvm_vcpu_running(struct kvm_vcpu *vcpu)
6637 {
6638         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
6639                 !vcpu->arch.apf.halted);
6640 }
6641
6642 static int vcpu_run(struct kvm_vcpu *vcpu)
6643 {
6644         int r;
6645         struct kvm *kvm = vcpu->kvm;
6646
6647         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
6648
6649         for (;;) {
6650                 if (kvm_vcpu_running(vcpu)) {
6651                         r = vcpu_enter_guest(vcpu);
6652                 } else {
6653                         r = vcpu_block(kvm, vcpu);
6654                 }
6655
6656                 if (r <= 0)
6657                         break;
6658
6659                 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
6660                 if (kvm_cpu_has_pending_timer(vcpu))
6661                         kvm_inject_pending_timer_irqs(vcpu);
6662
6663                 if (dm_request_for_irq_injection(vcpu)) {
6664                         r = 0;
6665                         vcpu->run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
6666                         ++vcpu->stat.request_irq_exits;
6667                         break;
6668                 }
6669
6670                 kvm_check_async_pf_completion(vcpu);
6671
6672                 if (signal_pending(current)) {
6673                         r = -EINTR;
6674                         vcpu->run->exit_reason = KVM_EXIT_INTR;
6675                         ++vcpu->stat.signal_exits;
6676                         break;
6677                 }
6678                 if (need_resched()) {
6679                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
6680                         cond_resched();
6681                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
6682                 }
6683         }
6684
6685         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
6686
6687         return r;
6688 }
6689
6690 static inline int complete_emulated_io(struct kvm_vcpu *vcpu)
6691 {
6692         int r;
6693         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
6694         r = emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
6695         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
6696         if (r != EMULATE_DONE)
6697                 return 0;
6698         return 1;
6699 }
6700
6701 static int complete_emulated_pio(struct kvm_vcpu *vcpu)
6702 {
6703         BUG_ON(!vcpu->arch.pio.count);
6704
6705         return complete_emulated_io(vcpu);
6706 }
6707
6708 /*
6709  * Implements the following, as a state machine:
6710  *
6711  * read:
6712  *   for each fragment
6713  *     for each mmio piece in the fragment
6714  *       write gpa, len
6715  *       exit
6716  *       copy data
6717  *   execute insn
6718  *
6719  * write:
6720  *   for each fragment
6721  *     for each mmio piece in the fragment
6722  *       write gpa, len
6723  *       copy data
6724  *       exit
6725  */
6726 static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
6727 {
6728         struct kvm_run *run = vcpu->run;
6729         struct kvm_mmio_fragment *frag;
6730         unsigned len;
6731
6732         BUG_ON(!vcpu->mmio_needed);
6733
6734         /* Complete previous fragment */
6735         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
6736         len = min(8u, frag->len);
6737         if (!vcpu->mmio_is_write)
6738                 memcpy(frag->data, run->mmio.data, len);
6739
6740         if (frag->len <= 8) {
6741                 /* Switch to the next fragment. */
6742                 frag++;
6743                 vcpu->mmio_cur_fragment++;
6744         } else {
6745                 /* Go forward to the next mmio piece. */
6746                 frag->data += len;
6747                 frag->gpa += len;
6748                 frag->len -= len;
6749         }
6750
6751         if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
6752                 vcpu->mmio_needed = 0;
6753
6754                 /* FIXME: return into emulator if single-stepping.  */
6755                 if (vcpu->mmio_is_write)
6756                         return 1;
6757                 vcpu->mmio_read_completed = 1;
6758                 return complete_emulated_io(vcpu);
6759         }
6760
6761         run->exit_reason = KVM_EXIT_MMIO;
6762         run->mmio.phys_addr = frag->gpa;
6763         if (vcpu->mmio_is_write)
6764                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
6765         run->mmio.len = min(8u, frag->len);
6766         run->mmio.is_write = vcpu->mmio_is_write;
6767         vcpu->arch.complete_userspace_io = complete_emulated_mmio;
6768         return 0;
6769 }
6770
6771
6772 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
6773 {
6774         struct fpu *fpu = &current->thread.fpu;
6775         int r;
6776         sigset_t sigsaved;
6777
6778         fpu__activate_curr(fpu);
6779
6780         if (vcpu->sigset_active)
6781                 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
6782
6783         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
6784                 kvm_vcpu_block(vcpu);
6785                 kvm_apic_accept_events(vcpu);
6786                 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
6787                 r = -EAGAIN;
6788                 goto out;
6789         }
6790
6791         /* re-sync apic's tpr */
6792         if (!lapic_in_kernel(vcpu)) {
6793                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
6794                         r = -EINVAL;
6795                         goto out;
6796                 }
6797         }
6798
6799         if (unlikely(vcpu->arch.complete_userspace_io)) {
6800                 int (*cui)(struct kvm_vcpu *) = vcpu->arch.complete_userspace_io;
6801                 vcpu->arch.complete_userspace_io = NULL;
6802                 r = cui(vcpu);
6803                 if (r <= 0)
6804                         goto out;
6805         } else
6806                 WARN_ON(vcpu->arch.pio.count || vcpu->mmio_needed);
6807
6808         r = vcpu_run(vcpu);
6809
6810 out:
6811         post_kvm_run_save(vcpu);
6812         if (vcpu->sigset_active)
6813                 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
6814
6815         return r;
6816 }
6817
6818 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
6819 {
6820         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
6821                 /*
6822                  * We are here if userspace calls get_regs() in the middle of
6823                  * instruction emulation. Registers state needs to be copied
6824                  * back from emulation context to vcpu. Userspace shouldn't do
6825                  * that usually, but some bad designed PV devices (vmware
6826                  * backdoor interface) need this to work
6827                  */
6828                 emulator_writeback_register_cache(&vcpu->arch.emulate_ctxt);
6829                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
6830         }
6831         regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
6832         regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
6833         regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
6834         regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
6835         regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
6836         regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
6837         regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
6838         regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
6839 #ifdef CONFIG_X86_64
6840         regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
6841         regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
6842         regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
6843         regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
6844         regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
6845         regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
6846         regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
6847         regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
6848 #endif
6849
6850         regs->rip = kvm_rip_read(vcpu);
6851         regs->rflags = kvm_get_rflags(vcpu);
6852
6853         return 0;
6854 }
6855
6856 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
6857 {
6858         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
6859         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
6860
6861         kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
6862         kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
6863         kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
6864         kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
6865         kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
6866         kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
6867         kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
6868         kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
6869 #ifdef CONFIG_X86_64
6870         kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
6871         kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
6872         kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
6873         kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
6874         kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
6875         kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
6876         kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
6877         kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
6878 #endif
6879
6880         kvm_rip_write(vcpu, regs->rip);
6881         kvm_set_rflags(vcpu, regs->rflags);
6882
6883         vcpu->arch.exception.pending = false;
6884
6885         kvm_make_request(KVM_REQ_EVENT, vcpu);
6886
6887         return 0;
6888 }
6889
6890 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
6891 {
6892         struct kvm_segment cs;
6893
6894         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
6895         *db = cs.db;
6896         *l = cs.l;
6897 }
6898 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
6899
6900 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
6901                                   struct kvm_sregs *sregs)
6902 {
6903         struct desc_ptr dt;
6904
6905         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
6906         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
6907         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
6908         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
6909         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
6910         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
6911
6912         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
6913         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
6914
6915         kvm_x86_ops->get_idt(vcpu, &dt);
6916         sregs->idt.limit = dt.size;
6917         sregs->idt.base = dt.address;
6918         kvm_x86_ops->get_gdt(vcpu, &dt);
6919         sregs->gdt.limit = dt.size;
6920         sregs->gdt.base = dt.address;
6921
6922         sregs->cr0 = kvm_read_cr0(vcpu);
6923         sregs->cr2 = vcpu->arch.cr2;
6924         sregs->cr3 = kvm_read_cr3(vcpu);
6925         sregs->cr4 = kvm_read_cr4(vcpu);
6926         sregs->cr8 = kvm_get_cr8(vcpu);
6927         sregs->efer = vcpu->arch.efer;
6928         sregs->apic_base = kvm_get_apic_base(vcpu);
6929
6930         memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
6931
6932         if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
6933                 set_bit(vcpu->arch.interrupt.nr,
6934                         (unsigned long *)sregs->interrupt_bitmap);
6935
6936         return 0;
6937 }
6938
6939 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
6940                                     struct kvm_mp_state *mp_state)
6941 {
6942         kvm_apic_accept_events(vcpu);
6943         if (vcpu->arch.mp_state == KVM_MP_STATE_HALTED &&
6944                                         vcpu->arch.pv.pv_unhalted)
6945                 mp_state->mp_state = KVM_MP_STATE_RUNNABLE;
6946         else
6947                 mp_state->mp_state = vcpu->arch.mp_state;
6948
6949         return 0;
6950 }
6951
6952 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
6953                                     struct kvm_mp_state *mp_state)
6954 {
6955         if (!kvm_vcpu_has_lapic(vcpu) &&
6956             mp_state->mp_state != KVM_MP_STATE_RUNNABLE)
6957                 return -EINVAL;
6958
6959         if (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED) {
6960                 vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
6961                 set_bit(KVM_APIC_SIPI, &vcpu->arch.apic->pending_events);
6962         } else
6963                 vcpu->arch.mp_state = mp_state->mp_state;
6964         kvm_make_request(KVM_REQ_EVENT, vcpu);
6965         return 0;
6966 }
6967
6968 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
6969                     int reason, bool has_error_code, u32 error_code)
6970 {
6971         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
6972         int ret;
6973
6974         init_emulate_ctxt(vcpu);
6975
6976         ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
6977                                    has_error_code, error_code);
6978
6979         if (ret)
6980                 return EMULATE_FAIL;
6981
6982         kvm_rip_write(vcpu, ctxt->eip);
6983         kvm_set_rflags(vcpu, ctxt->eflags);
6984         kvm_make_request(KVM_REQ_EVENT, vcpu);
6985         return EMULATE_DONE;
6986 }
6987 EXPORT_SYMBOL_GPL(kvm_task_switch);
6988
6989 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
6990                                   struct kvm_sregs *sregs)
6991 {
6992         struct msr_data apic_base_msr;
6993         int mmu_reset_needed = 0;
6994         int pending_vec, max_bits, idx;
6995         struct desc_ptr dt;
6996
6997         if (!guest_cpuid_has_xsave(vcpu) && (sregs->cr4 & X86_CR4_OSXSAVE))
6998                 return -EINVAL;
6999
7000         dt.size = sregs->idt.limit;
7001         dt.address = sregs->idt.base;
7002         kvm_x86_ops->set_idt(vcpu, &dt);
7003         dt.size = sregs->gdt.limit;
7004         dt.address = sregs->gdt.base;
7005         kvm_x86_ops->set_gdt(vcpu, &dt);
7006
7007         vcpu->arch.cr2 = sregs->cr2;
7008         mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
7009         vcpu->arch.cr3 = sregs->cr3;
7010         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
7011
7012         kvm_set_cr8(vcpu, sregs->cr8);
7013
7014         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
7015         kvm_x86_ops->set_efer(vcpu, sregs->efer);
7016         apic_base_msr.data = sregs->apic_base;
7017         apic_base_msr.host_initiated = true;
7018         kvm_set_apic_base(vcpu, &apic_base_msr);
7019
7020         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
7021         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
7022         vcpu->arch.cr0 = sregs->cr0;
7023
7024         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
7025         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
7026         if (sregs->cr4 & X86_CR4_OSXSAVE)
7027                 kvm_update_cpuid(vcpu);
7028
7029         idx = srcu_read_lock(&vcpu->kvm->srcu);
7030         if (!is_long_mode(vcpu) && is_pae(vcpu)) {
7031                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
7032                 mmu_reset_needed = 1;
7033         }
7034         srcu_read_unlock(&vcpu->kvm->srcu, idx);
7035
7036         if (mmu_reset_needed)
7037                 kvm_mmu_reset_context(vcpu);
7038
7039         max_bits = KVM_NR_INTERRUPTS;
7040         pending_vec = find_first_bit(
7041                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
7042         if (pending_vec < max_bits) {
7043                 kvm_queue_interrupt(vcpu, pending_vec, false);
7044                 pr_debug("Set back pending irq %d\n", pending_vec);
7045         }
7046
7047         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
7048         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
7049         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
7050         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
7051         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
7052         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
7053
7054         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
7055         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
7056
7057         update_cr8_intercept(vcpu);
7058
7059         /* Older userspace won't unhalt the vcpu on reset. */
7060         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
7061             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
7062             !is_protmode(vcpu))
7063                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
7064
7065         kvm_make_request(KVM_REQ_EVENT, vcpu);
7066
7067         return 0;
7068 }
7069
7070 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
7071                                         struct kvm_guest_debug *dbg)
7072 {
7073         unsigned long rflags;
7074         int i, r;
7075
7076         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
7077                 r = -EBUSY;
7078                 if (vcpu->arch.exception.pending)
7079                         goto out;
7080                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
7081                         kvm_queue_exception(vcpu, DB_VECTOR);
7082                 else
7083                         kvm_queue_exception(vcpu, BP_VECTOR);
7084         }
7085
7086         /*
7087          * Read rflags as long as potentially injected trace flags are still
7088          * filtered out.
7089          */
7090         rflags = kvm_get_rflags(vcpu);
7091
7092         vcpu->guest_debug = dbg->control;
7093         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
7094                 vcpu->guest_debug = 0;
7095
7096         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
7097                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
7098                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
7099                 vcpu->arch.guest_debug_dr7 = dbg->arch.debugreg[7];
7100         } else {
7101                 for (i = 0; i < KVM_NR_DB_REGS; i++)
7102                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
7103         }
7104         kvm_update_dr7(vcpu);
7105
7106         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
7107                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
7108                         get_segment_base(vcpu, VCPU_SREG_CS);
7109
7110         /*
7111          * Trigger an rflags update that will inject or remove the trace
7112          * flags.
7113          */
7114         kvm_set_rflags(vcpu, rflags);
7115
7116         kvm_x86_ops->update_db_bp_intercept(vcpu);
7117
7118         r = 0;
7119
7120 out:
7121
7122         return r;
7123 }
7124
7125 /*
7126  * Translate a guest virtual address to a guest physical address.
7127  */
7128 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
7129                                     struct kvm_translation *tr)
7130 {
7131         unsigned long vaddr = tr->linear_address;
7132         gpa_t gpa;
7133         int idx;
7134
7135         idx = srcu_read_lock(&vcpu->kvm->srcu);
7136         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
7137         srcu_read_unlock(&vcpu->kvm->srcu, idx);
7138         tr->physical_address = gpa;
7139         tr->valid = gpa != UNMAPPED_GVA;
7140         tr->writeable = 1;
7141         tr->usermode = 0;
7142
7143         return 0;
7144 }
7145
7146 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
7147 {
7148         struct fxregs_state *fxsave =
7149                         &vcpu->arch.guest_fpu.state.fxsave;
7150
7151         memcpy(fpu->fpr, fxsave->st_space, 128);
7152         fpu->fcw = fxsave->cwd;
7153         fpu->fsw = fxsave->swd;
7154         fpu->ftwx = fxsave->twd;
7155         fpu->last_opcode = fxsave->fop;
7156         fpu->last_ip = fxsave->rip;
7157         fpu->last_dp = fxsave->rdp;
7158         memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
7159
7160         return 0;
7161 }
7162
7163 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
7164 {
7165         struct fxregs_state *fxsave =
7166                         &vcpu->arch.guest_fpu.state.fxsave;
7167
7168         memcpy(fxsave->st_space, fpu->fpr, 128);
7169         fxsave->cwd = fpu->fcw;
7170         fxsave->swd = fpu->fsw;
7171         fxsave->twd = fpu->ftwx;
7172         fxsave->fop = fpu->last_opcode;
7173         fxsave->rip = fpu->last_ip;
7174         fxsave->rdp = fpu->last_dp;
7175         memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
7176
7177         return 0;
7178 }
7179
7180 static void fx_init(struct kvm_vcpu *vcpu)
7181 {
7182         fpstate_init(&vcpu->arch.guest_fpu.state);
7183         if (cpu_has_xsaves)
7184                 vcpu->arch.guest_fpu.state.xsave.header.xcomp_bv =
7185                         host_xcr0 | XSTATE_COMPACTION_ENABLED;
7186
7187         /*
7188          * Ensure guest xcr0 is valid for loading
7189          */
7190         vcpu->arch.xcr0 = XSTATE_FP;
7191
7192         vcpu->arch.cr0 |= X86_CR0_ET;
7193 }
7194
7195 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
7196 {
7197         if (vcpu->guest_fpu_loaded)
7198                 return;
7199
7200         /*
7201          * Restore all possible states in the guest,
7202          * and assume host would use all available bits.
7203          * Guest xcr0 would be loaded later.
7204          */
7205         kvm_put_guest_xcr0(vcpu);
7206         vcpu->guest_fpu_loaded = 1;
7207         __kernel_fpu_begin();
7208         __copy_kernel_to_fpregs(&vcpu->arch.guest_fpu.state);
7209         trace_kvm_fpu(1);
7210 }
7211
7212 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
7213 {
7214         kvm_put_guest_xcr0(vcpu);
7215
7216         if (!vcpu->guest_fpu_loaded) {
7217                 vcpu->fpu_counter = 0;
7218                 return;
7219         }
7220
7221         vcpu->guest_fpu_loaded = 0;
7222         copy_fpregs_to_fpstate(&vcpu->arch.guest_fpu);
7223         __kernel_fpu_end();
7224         ++vcpu->stat.fpu_reload;
7225         /*
7226          * If using eager FPU mode, or if the guest is a frequent user
7227          * of the FPU, just leave the FPU active for next time.
7228          * Every 255 times fpu_counter rolls over to 0; a guest that uses
7229          * the FPU in bursts will revert to loading it on demand.
7230          */
7231         if (!vcpu->arch.eager_fpu) {
7232                 if (++vcpu->fpu_counter < 5)
7233                         kvm_make_request(KVM_REQ_DEACTIVATE_FPU, vcpu);
7234         }
7235         trace_kvm_fpu(0);
7236 }
7237
7238 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
7239 {
7240         kvmclock_reset(vcpu);
7241
7242         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
7243         kvm_x86_ops->vcpu_free(vcpu);
7244 }
7245
7246 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
7247                                                 unsigned int id)
7248 {
7249         struct kvm_vcpu *vcpu;
7250
7251         if (check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
7252                 printk_once(KERN_WARNING
7253                 "kvm: SMP vm created on host with unstable TSC; "
7254                 "guest TSC will not be reliable\n");
7255
7256         vcpu = kvm_x86_ops->vcpu_create(kvm, id);
7257
7258         return vcpu;
7259 }
7260
7261 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
7262 {
7263         int r;
7264
7265         kvm_vcpu_mtrr_init(vcpu);
7266         r = vcpu_load(vcpu);
7267         if (r)
7268                 return r;
7269         kvm_vcpu_reset(vcpu, false);
7270         kvm_mmu_setup(vcpu);
7271         vcpu_put(vcpu);
7272         return r;
7273 }
7274
7275 void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
7276 {
7277         struct msr_data msr;
7278         struct kvm *kvm = vcpu->kvm;
7279
7280         if (vcpu_load(vcpu))
7281                 return;
7282         msr.data = 0x0;
7283         msr.index = MSR_IA32_TSC;
7284         msr.host_initiated = true;
7285         kvm_write_tsc(vcpu, &msr);
7286         vcpu_put(vcpu);
7287
7288         if (!kvmclock_periodic_sync)
7289                 return;
7290
7291         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
7292                                         KVMCLOCK_SYNC_PERIOD);
7293 }
7294
7295 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
7296 {
7297         int r;
7298         vcpu->arch.apf.msr_val = 0;
7299
7300         r = vcpu_load(vcpu);
7301         BUG_ON(r);
7302         kvm_mmu_unload(vcpu);
7303         vcpu_put(vcpu);
7304
7305         kvm_x86_ops->vcpu_free(vcpu);
7306 }
7307
7308 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)
7309 {
7310         vcpu->arch.hflags = 0;
7311
7312         atomic_set(&vcpu->arch.nmi_queued, 0);
7313         vcpu->arch.nmi_pending = 0;
7314         vcpu->arch.nmi_injected = false;
7315         kvm_clear_interrupt_queue(vcpu);
7316         kvm_clear_exception_queue(vcpu);
7317
7318         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
7319         kvm_update_dr0123(vcpu);
7320         vcpu->arch.dr6 = DR6_INIT;
7321         kvm_update_dr6(vcpu);
7322         vcpu->arch.dr7 = DR7_FIXED_1;
7323         kvm_update_dr7(vcpu);
7324
7325         vcpu->arch.cr2 = 0;
7326
7327         kvm_make_request(KVM_REQ_EVENT, vcpu);
7328         vcpu->arch.apf.msr_val = 0;
7329         vcpu->arch.st.msr_val = 0;
7330
7331         kvmclock_reset(vcpu);
7332
7333         kvm_clear_async_pf_completion_queue(vcpu);
7334         kvm_async_pf_hash_reset(vcpu);
7335         vcpu->arch.apf.halted = false;
7336
7337         if (!init_event) {
7338                 kvm_pmu_reset(vcpu);
7339                 vcpu->arch.smbase = 0x30000;
7340         }
7341
7342         memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
7343         vcpu->arch.regs_avail = ~0;
7344         vcpu->arch.regs_dirty = ~0;
7345
7346         kvm_x86_ops->vcpu_reset(vcpu, init_event);
7347 }
7348
7349 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector)
7350 {
7351         struct kvm_segment cs;
7352
7353         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
7354         cs.selector = vector << 8;
7355         cs.base = vector << 12;
7356         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
7357         kvm_rip_write(vcpu, 0);
7358 }
7359
7360 int kvm_arch_hardware_enable(void)
7361 {
7362         struct kvm *kvm;
7363         struct kvm_vcpu *vcpu;
7364         int i;
7365         int ret;
7366         u64 local_tsc;
7367         u64 max_tsc = 0;
7368         bool stable, backwards_tsc = false;
7369
7370         kvm_shared_msr_cpu_online();
7371         ret = kvm_x86_ops->hardware_enable();
7372         if (ret != 0)
7373                 return ret;
7374
7375         local_tsc = rdtsc();
7376         stable = !check_tsc_unstable();
7377         list_for_each_entry(kvm, &vm_list, vm_list) {
7378                 kvm_for_each_vcpu(i, vcpu, kvm) {
7379                         if (!stable && vcpu->cpu == smp_processor_id())
7380                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
7381                         if (stable && vcpu->arch.last_host_tsc > local_tsc) {
7382                                 backwards_tsc = true;
7383                                 if (vcpu->arch.last_host_tsc > max_tsc)
7384                                         max_tsc = vcpu->arch.last_host_tsc;
7385                         }
7386                 }
7387         }
7388
7389         /*
7390          * Sometimes, even reliable TSCs go backwards.  This happens on
7391          * platforms that reset TSC during suspend or hibernate actions, but
7392          * maintain synchronization.  We must compensate.  Fortunately, we can
7393          * detect that condition here, which happens early in CPU bringup,
7394          * before any KVM threads can be running.  Unfortunately, we can't
7395          * bring the TSCs fully up to date with real time, as we aren't yet far
7396          * enough into CPU bringup that we know how much real time has actually
7397          * elapsed; our helper function, get_kernel_ns() will be using boot
7398          * variables that haven't been updated yet.
7399          *
7400          * So we simply find the maximum observed TSC above, then record the
7401          * adjustment to TSC in each VCPU.  When the VCPU later gets loaded,
7402          * the adjustment will be applied.  Note that we accumulate
7403          * adjustments, in case multiple suspend cycles happen before some VCPU
7404          * gets a chance to run again.  In the event that no KVM threads get a
7405          * chance to run, we will miss the entire elapsed period, as we'll have
7406          * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
7407          * loose cycle time.  This isn't too big a deal, since the loss will be
7408          * uniform across all VCPUs (not to mention the scenario is extremely
7409          * unlikely). It is possible that a second hibernate recovery happens
7410          * much faster than a first, causing the observed TSC here to be
7411          * smaller; this would require additional padding adjustment, which is
7412          * why we set last_host_tsc to the local tsc observed here.
7413          *
7414          * N.B. - this code below runs only on platforms with reliable TSC,
7415          * as that is the only way backwards_tsc is set above.  Also note
7416          * that this runs for ALL vcpus, which is not a bug; all VCPUs should
7417          * have the same delta_cyc adjustment applied if backwards_tsc
7418          * is detected.  Note further, this adjustment is only done once,
7419          * as we reset last_host_tsc on all VCPUs to stop this from being
7420          * called multiple times (one for each physical CPU bringup).
7421          *
7422          * Platforms with unreliable TSCs don't have to deal with this, they
7423          * will be compensated by the logic in vcpu_load, which sets the TSC to
7424          * catchup mode.  This will catchup all VCPUs to real time, but cannot
7425          * guarantee that they stay in perfect synchronization.
7426          */
7427         if (backwards_tsc) {
7428                 u64 delta_cyc = max_tsc - local_tsc;
7429                 backwards_tsc_observed = true;
7430                 list_for_each_entry(kvm, &vm_list, vm_list) {
7431                         kvm_for_each_vcpu(i, vcpu, kvm) {
7432                                 vcpu->arch.tsc_offset_adjustment += delta_cyc;
7433                                 vcpu->arch.last_host_tsc = local_tsc;
7434                                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
7435                         }
7436
7437                         /*
7438                          * We have to disable TSC offset matching.. if you were
7439                          * booting a VM while issuing an S4 host suspend....
7440                          * you may have some problem.  Solving this issue is
7441                          * left as an exercise to the reader.
7442                          */
7443                         kvm->arch.last_tsc_nsec = 0;
7444                         kvm->arch.last_tsc_write = 0;
7445                 }
7446
7447         }
7448         return 0;
7449 }
7450
7451 void kvm_arch_hardware_disable(void)
7452 {
7453         kvm_x86_ops->hardware_disable();
7454         drop_user_return_notifiers();
7455 }
7456
7457 int kvm_arch_hardware_setup(void)
7458 {
7459         int r;
7460
7461         r = kvm_x86_ops->hardware_setup();
7462         if (r != 0)
7463                 return r;
7464
7465         if (kvm_has_tsc_control) {
7466                 /*
7467                  * Make sure the user can only configure tsc_khz values that
7468                  * fit into a signed integer.
7469                  * A min value is not calculated needed because it will always
7470                  * be 1 on all machines.
7471                  */
7472                 u64 max = min(0x7fffffffULL,
7473                               __scale_tsc(kvm_max_tsc_scaling_ratio, tsc_khz));
7474                 kvm_max_guest_tsc_khz = max;
7475
7476                 kvm_default_tsc_scaling_ratio = 1ULL << kvm_tsc_scaling_ratio_frac_bits;
7477         }
7478
7479         kvm_init_msr_list();
7480         return 0;
7481 }
7482
7483 void kvm_arch_hardware_unsetup(void)
7484 {
7485         kvm_x86_ops->hardware_unsetup();
7486 }
7487
7488 void kvm_arch_check_processor_compat(void *rtn)
7489 {
7490         kvm_x86_ops->check_processor_compatibility(rtn);
7491 }
7492
7493 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu)
7494 {
7495         return vcpu->kvm->arch.bsp_vcpu_id == vcpu->vcpu_id;
7496 }
7497 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp);
7498
7499 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu)
7500 {
7501         return (vcpu->arch.apic_base & MSR_IA32_APICBASE_BSP) != 0;
7502 }
7503
7504 bool kvm_vcpu_compatible(struct kvm_vcpu *vcpu)
7505 {
7506         return irqchip_in_kernel(vcpu->kvm) == lapic_in_kernel(vcpu);
7507 }
7508
7509 struct static_key kvm_no_apic_vcpu __read_mostly;
7510
7511 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
7512 {
7513         struct page *page;
7514         struct kvm *kvm;
7515         int r;
7516
7517         BUG_ON(vcpu->kvm == NULL);
7518         kvm = vcpu->kvm;
7519
7520         vcpu->arch.pv.pv_unhalted = false;
7521         vcpu->arch.emulate_ctxt.ops = &emulate_ops;
7522         if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_reset_bsp(vcpu))
7523                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
7524         else
7525                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
7526
7527         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
7528         if (!page) {
7529                 r = -ENOMEM;
7530                 goto fail;
7531         }
7532         vcpu->arch.pio_data = page_address(page);
7533
7534         kvm_set_tsc_khz(vcpu, max_tsc_khz);
7535
7536         r = kvm_mmu_create(vcpu);
7537         if (r < 0)
7538                 goto fail_free_pio_data;
7539
7540         if (irqchip_in_kernel(kvm)) {
7541                 r = kvm_create_lapic(vcpu);
7542                 if (r < 0)
7543                         goto fail_mmu_destroy;
7544         } else
7545                 static_key_slow_inc(&kvm_no_apic_vcpu);
7546
7547         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
7548                                        GFP_KERNEL);
7549         if (!vcpu->arch.mce_banks) {
7550                 r = -ENOMEM;
7551                 goto fail_free_lapic;
7552         }
7553         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
7554
7555         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask, GFP_KERNEL)) {
7556                 r = -ENOMEM;
7557                 goto fail_free_mce_banks;
7558         }
7559
7560         fx_init(vcpu);
7561
7562         vcpu->arch.ia32_tsc_adjust_msr = 0x0;
7563         vcpu->arch.pv_time_enabled = false;
7564
7565         vcpu->arch.guest_supported_xcr0 = 0;
7566         vcpu->arch.guest_xstate_size = XSAVE_HDR_SIZE + XSAVE_HDR_OFFSET;
7567
7568         vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu);
7569
7570         vcpu->arch.pat = MSR_IA32_CR_PAT_DEFAULT;
7571
7572         kvm_async_pf_hash_reset(vcpu);
7573         kvm_pmu_init(vcpu);
7574
7575         vcpu->arch.pending_external_vector = -1;
7576
7577         return 0;
7578
7579 fail_free_mce_banks:
7580         kfree(vcpu->arch.mce_banks);
7581 fail_free_lapic:
7582         kvm_free_lapic(vcpu);
7583 fail_mmu_destroy:
7584         kvm_mmu_destroy(vcpu);
7585 fail_free_pio_data:
7586         free_page((unsigned long)vcpu->arch.pio_data);
7587 fail:
7588         return r;
7589 }
7590
7591 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
7592 {
7593         int idx;
7594
7595         kvm_pmu_destroy(vcpu);
7596         kfree(vcpu->arch.mce_banks);
7597         kvm_free_lapic(vcpu);
7598         idx = srcu_read_lock(&vcpu->kvm->srcu);
7599         kvm_mmu_destroy(vcpu);
7600         srcu_read_unlock(&vcpu->kvm->srcu, idx);
7601         free_page((unsigned long)vcpu->arch.pio_data);
7602         if (!lapic_in_kernel(vcpu))
7603                 static_key_slow_dec(&kvm_no_apic_vcpu);
7604 }
7605
7606 void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu)
7607 {
7608         kvm_x86_ops->sched_in(vcpu, cpu);
7609 }
7610
7611 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
7612 {
7613         if (type)
7614                 return -EINVAL;
7615
7616         INIT_HLIST_HEAD(&kvm->arch.mask_notifier_list);
7617         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
7618         INIT_LIST_HEAD(&kvm->arch.zapped_obsolete_pages);
7619         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
7620         atomic_set(&kvm->arch.noncoherent_dma_count, 0);
7621
7622         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
7623         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
7624         /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
7625         set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID,
7626                 &kvm->arch.irq_sources_bitmap);
7627
7628         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
7629         mutex_init(&kvm->arch.apic_map_lock);
7630         spin_lock_init(&kvm->arch.pvclock_gtod_sync_lock);
7631
7632         pvclock_update_vm_gtod_copy(kvm);
7633
7634         INIT_DELAYED_WORK(&kvm->arch.kvmclock_update_work, kvmclock_update_fn);
7635         INIT_DELAYED_WORK(&kvm->arch.kvmclock_sync_work, kvmclock_sync_fn);
7636
7637         return 0;
7638 }
7639
7640 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
7641 {
7642         int r;
7643         r = vcpu_load(vcpu);
7644         BUG_ON(r);
7645         kvm_mmu_unload(vcpu);
7646         vcpu_put(vcpu);
7647 }
7648
7649 static void kvm_free_vcpus(struct kvm *kvm)
7650 {
7651         unsigned int i;
7652         struct kvm_vcpu *vcpu;
7653
7654         /*
7655          * Unpin any mmu pages first.
7656          */
7657         kvm_for_each_vcpu(i, vcpu, kvm) {
7658                 kvm_clear_async_pf_completion_queue(vcpu);
7659                 kvm_unload_vcpu_mmu(vcpu);
7660         }
7661         kvm_for_each_vcpu(i, vcpu, kvm)
7662                 kvm_arch_vcpu_free(vcpu);
7663
7664         mutex_lock(&kvm->lock);
7665         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
7666                 kvm->vcpus[i] = NULL;
7667
7668         atomic_set(&kvm->online_vcpus, 0);
7669         mutex_unlock(&kvm->lock);
7670 }
7671
7672 void kvm_arch_sync_events(struct kvm *kvm)
7673 {
7674         cancel_delayed_work_sync(&kvm->arch.kvmclock_sync_work);
7675         cancel_delayed_work_sync(&kvm->arch.kvmclock_update_work);
7676         kvm_free_all_assigned_devices(kvm);
7677         kvm_free_pit(kvm);
7678 }
7679
7680 int __x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size)
7681 {
7682         int i, r;
7683         unsigned long hva;
7684         struct kvm_memslots *slots = kvm_memslots(kvm);
7685         struct kvm_memory_slot *slot, old;
7686
7687         /* Called with kvm->slots_lock held.  */
7688         if (WARN_ON(id >= KVM_MEM_SLOTS_NUM))
7689                 return -EINVAL;
7690
7691         slot = id_to_memslot(slots, id);
7692         if (size) {
7693                 if (WARN_ON(slot->npages))
7694                         return -EEXIST;
7695
7696                 /*
7697                  * MAP_SHARED to prevent internal slot pages from being moved
7698                  * by fork()/COW.
7699                  */
7700                 hva = vm_mmap(NULL, 0, size, PROT_READ | PROT_WRITE,
7701                               MAP_SHARED | MAP_ANONYMOUS, 0);
7702                 if (IS_ERR((void *)hva))
7703                         return PTR_ERR((void *)hva);
7704         } else {
7705                 if (!slot->npages)
7706                         return 0;
7707
7708                 hva = 0;
7709         }
7710
7711         old = *slot;
7712         for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
7713                 struct kvm_userspace_memory_region m;
7714
7715                 m.slot = id | (i << 16);
7716                 m.flags = 0;
7717                 m.guest_phys_addr = gpa;
7718                 m.userspace_addr = hva;
7719                 m.memory_size = size;
7720                 r = __kvm_set_memory_region(kvm, &m);
7721                 if (r < 0)
7722                         return r;
7723         }
7724
7725         if (!size) {
7726                 r = vm_munmap(old.userspace_addr, old.npages * PAGE_SIZE);
7727                 WARN_ON(r < 0);
7728         }
7729
7730         return 0;
7731 }
7732 EXPORT_SYMBOL_GPL(__x86_set_memory_region);
7733
7734 int x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size)
7735 {
7736         int r;
7737
7738         mutex_lock(&kvm->slots_lock);
7739         r = __x86_set_memory_region(kvm, id, gpa, size);
7740         mutex_unlock(&kvm->slots_lock);
7741
7742         return r;
7743 }
7744 EXPORT_SYMBOL_GPL(x86_set_memory_region);
7745
7746 void kvm_arch_destroy_vm(struct kvm *kvm)
7747 {
7748         if (current->mm == kvm->mm) {
7749                 /*
7750                  * Free memory regions allocated on behalf of userspace,
7751                  * unless the the memory map has changed due to process exit
7752                  * or fd copying.
7753                  */
7754                 x86_set_memory_region(kvm, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT, 0, 0);
7755                 x86_set_memory_region(kvm, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT, 0, 0);
7756                 x86_set_memory_region(kvm, TSS_PRIVATE_MEMSLOT, 0, 0);
7757         }
7758         kvm_iommu_unmap_guest(kvm);
7759         kfree(kvm->arch.vpic);
7760         kfree(kvm->arch.vioapic);
7761         kvm_free_vcpus(kvm);
7762         kfree(rcu_dereference_check(kvm->arch.apic_map, 1));
7763 }
7764
7765 void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *free,
7766                            struct kvm_memory_slot *dont)
7767 {
7768         int i;
7769
7770         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
7771                 if (!dont || free->arch.rmap[i] != dont->arch.rmap[i]) {
7772                         kvfree(free->arch.rmap[i]);
7773                         free->arch.rmap[i] = NULL;
7774                 }
7775                 if (i == 0)
7776                         continue;
7777
7778                 if (!dont || free->arch.lpage_info[i - 1] !=
7779                              dont->arch.lpage_info[i - 1]) {
7780                         kvfree(free->arch.lpage_info[i - 1]);
7781                         free->arch.lpage_info[i - 1] = NULL;
7782                 }
7783         }
7784 }
7785
7786 int kvm_arch_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot,
7787                             unsigned long npages)
7788 {
7789         int i;
7790
7791         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
7792                 unsigned long ugfn;
7793                 int lpages;
7794                 int level = i + 1;
7795
7796                 lpages = gfn_to_index(slot->base_gfn + npages - 1,
7797                                       slot->base_gfn, level) + 1;
7798
7799                 slot->arch.rmap[i] =
7800                         kvm_kvzalloc(lpages * sizeof(*slot->arch.rmap[i]));
7801                 if (!slot->arch.rmap[i])
7802                         goto out_free;
7803                 if (i == 0)
7804                         continue;
7805
7806                 slot->arch.lpage_info[i - 1] = kvm_kvzalloc(lpages *
7807                                         sizeof(*slot->arch.lpage_info[i - 1]));
7808                 if (!slot->arch.lpage_info[i - 1])
7809                         goto out_free;
7810
7811                 if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
7812                         slot->arch.lpage_info[i - 1][0].write_count = 1;
7813                 if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
7814                         slot->arch.lpage_info[i - 1][lpages - 1].write_count = 1;
7815                 ugfn = slot->userspace_addr >> PAGE_SHIFT;
7816                 /*
7817                  * If the gfn and userspace address are not aligned wrt each
7818                  * other, or if explicitly asked to, disable large page
7819                  * support for this slot
7820                  */
7821                 if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1) ||
7822                     !kvm_largepages_enabled()) {
7823                         unsigned long j;
7824
7825                         for (j = 0; j < lpages; ++j)
7826                                 slot->arch.lpage_info[i - 1][j].write_count = 1;
7827                 }
7828         }
7829
7830         return 0;
7831
7832 out_free:
7833         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
7834                 kvfree(slot->arch.rmap[i]);
7835                 slot->arch.rmap[i] = NULL;
7836                 if (i == 0)
7837                         continue;
7838
7839                 kvfree(slot->arch.lpage_info[i - 1]);
7840                 slot->arch.lpage_info[i - 1] = NULL;
7841         }
7842         return -ENOMEM;
7843 }
7844
7845 void kvm_arch_memslots_updated(struct kvm *kvm, struct kvm_memslots *slots)
7846 {
7847         /*
7848          * memslots->generation has been incremented.
7849          * mmio generation may have reached its maximum value.
7850          */
7851         kvm_mmu_invalidate_mmio_sptes(kvm, slots);
7852 }
7853
7854 int kvm_arch_prepare_memory_region(struct kvm *kvm,
7855                                 struct kvm_memory_slot *memslot,
7856                                 const struct kvm_userspace_memory_region *mem,
7857                                 enum kvm_mr_change change)
7858 {
7859         return 0;
7860 }
7861
7862 static void kvm_mmu_slot_apply_flags(struct kvm *kvm,
7863                                      struct kvm_memory_slot *new)
7864 {
7865         /* Still write protect RO slot */
7866         if (new->flags & KVM_MEM_READONLY) {
7867                 kvm_mmu_slot_remove_write_access(kvm, new);
7868                 return;
7869         }
7870
7871         /*
7872          * Call kvm_x86_ops dirty logging hooks when they are valid.
7873          *
7874          * kvm_x86_ops->slot_disable_log_dirty is called when:
7875          *
7876          *  - KVM_MR_CREATE with dirty logging is disabled
7877          *  - KVM_MR_FLAGS_ONLY with dirty logging is disabled in new flag
7878          *
7879          * The reason is, in case of PML, we need to set D-bit for any slots
7880          * with dirty logging disabled in order to eliminate unnecessary GPA
7881          * logging in PML buffer (and potential PML buffer full VMEXT). This
7882          * guarantees leaving PML enabled during guest's lifetime won't have
7883          * any additonal overhead from PML when guest is running with dirty
7884          * logging disabled for memory slots.
7885          *
7886          * kvm_x86_ops->slot_enable_log_dirty is called when switching new slot
7887          * to dirty logging mode.
7888          *
7889          * If kvm_x86_ops dirty logging hooks are invalid, use write protect.
7890          *
7891          * In case of write protect:
7892          *
7893          * Write protect all pages for dirty logging.
7894          *
7895          * All the sptes including the large sptes which point to this
7896          * slot are set to readonly. We can not create any new large
7897          * spte on this slot until the end of the logging.
7898          *
7899          * See the comments in fast_page_fault().
7900          */
7901         if (new->flags & KVM_MEM_LOG_DIRTY_PAGES) {
7902                 if (kvm_x86_ops->slot_enable_log_dirty)
7903                         kvm_x86_ops->slot_enable_log_dirty(kvm, new);
7904                 else
7905                         kvm_mmu_slot_remove_write_access(kvm, new);
7906         } else {
7907                 if (kvm_x86_ops->slot_disable_log_dirty)
7908                         kvm_x86_ops->slot_disable_log_dirty(kvm, new);
7909         }
7910 }
7911
7912 void kvm_arch_commit_memory_region(struct kvm *kvm,
7913                                 const struct kvm_userspace_memory_region *mem,
7914                                 const struct kvm_memory_slot *old,
7915                                 const struct kvm_memory_slot *new,
7916                                 enum kvm_mr_change change)
7917 {
7918         int nr_mmu_pages = 0;
7919
7920         if (!kvm->arch.n_requested_mmu_pages)
7921                 nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
7922
7923         if (nr_mmu_pages)
7924                 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
7925
7926         /*
7927          * Dirty logging tracks sptes in 4k granularity, meaning that large
7928          * sptes have to be split.  If live migration is successful, the guest
7929          * in the source machine will be destroyed and large sptes will be
7930          * created in the destination. However, if the guest continues to run
7931          * in the source machine (for example if live migration fails), small
7932          * sptes will remain around and cause bad performance.
7933          *
7934          * Scan sptes if dirty logging has been stopped, dropping those
7935          * which can be collapsed into a single large-page spte.  Later
7936          * page faults will create the large-page sptes.
7937          */
7938         if ((change != KVM_MR_DELETE) &&
7939                 (old->flags & KVM_MEM_LOG_DIRTY_PAGES) &&
7940                 !(new->flags & KVM_MEM_LOG_DIRTY_PAGES))
7941                 kvm_mmu_zap_collapsible_sptes(kvm, new);
7942
7943         /*
7944          * Set up write protection and/or dirty logging for the new slot.
7945          *
7946          * For KVM_MR_DELETE and KVM_MR_MOVE, the shadow pages of old slot have
7947          * been zapped so no dirty logging staff is needed for old slot. For
7948          * KVM_MR_FLAGS_ONLY, the old slot is essentially the same one as the
7949          * new and it's also covered when dealing with the new slot.
7950          *
7951          * FIXME: const-ify all uses of struct kvm_memory_slot.
7952          */
7953         if (change != KVM_MR_DELETE)
7954                 kvm_mmu_slot_apply_flags(kvm, (struct kvm_memory_slot *) new);
7955 }
7956
7957 void kvm_arch_flush_shadow_all(struct kvm *kvm)
7958 {
7959         kvm_mmu_invalidate_zap_all_pages(kvm);
7960 }
7961
7962 void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
7963                                    struct kvm_memory_slot *slot)
7964 {
7965         kvm_mmu_invalidate_zap_all_pages(kvm);
7966 }
7967
7968 static inline bool kvm_vcpu_has_events(struct kvm_vcpu *vcpu)
7969 {
7970         if (!list_empty_careful(&vcpu->async_pf.done))
7971                 return true;
7972
7973         if (kvm_apic_has_events(vcpu))
7974                 return true;
7975
7976         if (vcpu->arch.pv.pv_unhalted)
7977                 return true;
7978
7979         if (atomic_read(&vcpu->arch.nmi_queued))
7980                 return true;
7981
7982         if (test_bit(KVM_REQ_SMI, &vcpu->requests))
7983                 return true;
7984
7985         if (kvm_arch_interrupt_allowed(vcpu) &&
7986             kvm_cpu_has_interrupt(vcpu))
7987                 return true;
7988
7989         return false;
7990 }
7991
7992 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
7993 {
7994         if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events)
7995                 kvm_x86_ops->check_nested_events(vcpu, false);
7996
7997         return kvm_vcpu_running(vcpu) || kvm_vcpu_has_events(vcpu);
7998 }
7999
8000 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
8001 {
8002         return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
8003 }
8004
8005 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
8006 {
8007         return kvm_x86_ops->interrupt_allowed(vcpu);
8008 }
8009
8010 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu)
8011 {
8012         if (is_64_bit_mode(vcpu))
8013                 return kvm_rip_read(vcpu);
8014         return (u32)(get_segment_base(vcpu, VCPU_SREG_CS) +
8015                      kvm_rip_read(vcpu));
8016 }
8017 EXPORT_SYMBOL_GPL(kvm_get_linear_rip);
8018
8019 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
8020 {
8021         return kvm_get_linear_rip(vcpu) == linear_rip;
8022 }
8023 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
8024
8025 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
8026 {
8027         unsigned long rflags;
8028
8029         rflags = kvm_x86_ops->get_rflags(vcpu);
8030         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
8031                 rflags &= ~X86_EFLAGS_TF;
8032         return rflags;
8033 }
8034 EXPORT_SYMBOL_GPL(kvm_get_rflags);
8035
8036 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
8037 {
8038         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
8039             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
8040                 rflags |= X86_EFLAGS_TF;
8041         kvm_x86_ops->set_rflags(vcpu, rflags);
8042 }
8043
8044 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
8045 {
8046         __kvm_set_rflags(vcpu, rflags);
8047         kvm_make_request(KVM_REQ_EVENT, vcpu);
8048 }
8049 EXPORT_SYMBOL_GPL(kvm_set_rflags);
8050
8051 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
8052 {
8053         int r;
8054
8055         if ((vcpu->arch.mmu.direct_map != work->arch.direct_map) ||
8056               work->wakeup_all)
8057                 return;
8058
8059         r = kvm_mmu_reload(vcpu);
8060         if (unlikely(r))
8061                 return;
8062
8063         if (!vcpu->arch.mmu.direct_map &&
8064               work->arch.cr3 != vcpu->arch.mmu.get_cr3(vcpu))
8065                 return;
8066
8067         vcpu->arch.mmu.page_fault(vcpu, work->gva, 0, true);
8068 }
8069
8070 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
8071 {
8072         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
8073 }
8074
8075 static inline u32 kvm_async_pf_next_probe(u32 key)
8076 {
8077         return (key + 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU) - 1);
8078 }
8079
8080 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
8081 {
8082         u32 key = kvm_async_pf_hash_fn(gfn);
8083
8084         while (vcpu->arch.apf.gfns[key] != ~0)
8085                 key = kvm_async_pf_next_probe(key);
8086
8087         vcpu->arch.apf.gfns[key] = gfn;
8088 }
8089
8090 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
8091 {
8092         int i;
8093         u32 key = kvm_async_pf_hash_fn(gfn);
8094
8095         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU) &&
8096                      (vcpu->arch.apf.gfns[key] != gfn &&
8097                       vcpu->arch.apf.gfns[key] != ~0); i++)
8098                 key = kvm_async_pf_next_probe(key);
8099
8100         return key;
8101 }
8102
8103 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
8104 {
8105         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
8106 }
8107
8108 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
8109 {
8110         u32 i, j, k;
8111
8112         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
8113         while (true) {
8114                 vcpu->arch.apf.gfns[i] = ~0;
8115                 do {
8116                         j = kvm_async_pf_next_probe(j);
8117                         if (vcpu->arch.apf.gfns[j] == ~0)
8118                                 return;
8119                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
8120                         /*
8121                          * k lies cyclically in ]i,j]
8122                          * |    i.k.j |
8123                          * |....j i.k.| or  |.k..j i...|
8124                          */
8125                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
8126                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
8127                 i = j;
8128         }
8129 }
8130
8131 static int apf_put_user(struct kvm_vcpu *vcpu, u32 val)
8132 {
8133
8134         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &val,
8135                                       sizeof(val));
8136 }
8137
8138 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
8139                                      struct kvm_async_pf *work)
8140 {
8141         struct x86_exception fault;
8142
8143         trace_kvm_async_pf_not_present(work->arch.token, work->gva);
8144         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
8145
8146         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) ||
8147             (vcpu->arch.apf.send_user_only &&
8148              kvm_x86_ops->get_cpl(vcpu) == 0))
8149                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
8150         else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_NOT_PRESENT)) {
8151                 fault.vector = PF_VECTOR;
8152                 fault.error_code_valid = true;
8153                 fault.error_code = 0;
8154                 fault.nested_page_fault = false;
8155                 fault.address = work->arch.token;
8156                 kvm_inject_page_fault(vcpu, &fault);
8157         }
8158 }
8159
8160 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
8161                                  struct kvm_async_pf *work)
8162 {
8163         struct x86_exception fault;
8164
8165         trace_kvm_async_pf_ready(work->arch.token, work->gva);
8166         if (work->wakeup_all)
8167                 work->arch.token = ~0; /* broadcast wakeup */
8168         else
8169                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
8170
8171         if ((vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) &&
8172             !apf_put_user(vcpu, KVM_PV_REASON_PAGE_READY)) {
8173                 fault.vector = PF_VECTOR;
8174                 fault.error_code_valid = true;
8175                 fault.error_code = 0;
8176                 fault.nested_page_fault = false;
8177                 fault.address = work->arch.token;
8178                 kvm_inject_page_fault(vcpu, &fault);
8179         }
8180         vcpu->arch.apf.halted = false;
8181         vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
8182 }
8183
8184 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu)
8185 {
8186         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED))
8187                 return true;
8188         else
8189                 return !kvm_event_needs_reinjection(vcpu) &&
8190                         kvm_x86_ops->interrupt_allowed(vcpu);
8191 }
8192
8193 void kvm_arch_start_assignment(struct kvm *kvm)
8194 {
8195         atomic_inc(&kvm->arch.assigned_device_count);
8196 }
8197 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment);
8198
8199 void kvm_arch_end_assignment(struct kvm *kvm)
8200 {
8201         atomic_dec(&kvm->arch.assigned_device_count);
8202 }
8203 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment);
8204
8205 bool kvm_arch_has_assigned_device(struct kvm *kvm)
8206 {
8207         return atomic_read(&kvm->arch.assigned_device_count);
8208 }
8209 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device);
8210
8211 void kvm_arch_register_noncoherent_dma(struct kvm *kvm)
8212 {
8213         atomic_inc(&kvm->arch.noncoherent_dma_count);
8214 }
8215 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma);
8216
8217 void kvm_arch_unregister_noncoherent_dma(struct kvm *kvm)
8218 {
8219         atomic_dec(&kvm->arch.noncoherent_dma_count);
8220 }
8221 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma);
8222
8223 bool kvm_arch_has_noncoherent_dma(struct kvm *kvm)
8224 {
8225         return atomic_read(&kvm->arch.noncoherent_dma_count);
8226 }
8227 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma);
8228
8229 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer *cons,
8230                                       struct irq_bypass_producer *prod)
8231 {
8232         struct kvm_kernel_irqfd *irqfd =
8233                 container_of(cons, struct kvm_kernel_irqfd, consumer);
8234
8235         if (kvm_x86_ops->update_pi_irte) {
8236                 irqfd->producer = prod;
8237                 return kvm_x86_ops->update_pi_irte(irqfd->kvm,
8238                                 prod->irq, irqfd->gsi, 1);
8239         }
8240
8241         return -EINVAL;
8242 }
8243
8244 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer *cons,
8245                                       struct irq_bypass_producer *prod)
8246 {
8247         int ret;
8248         struct kvm_kernel_irqfd *irqfd =
8249                 container_of(cons, struct kvm_kernel_irqfd, consumer);
8250
8251         if (!kvm_x86_ops->update_pi_irte) {
8252                 WARN_ON(irqfd->producer != NULL);
8253                 return;
8254         }
8255
8256         WARN_ON(irqfd->producer != prod);
8257         irqfd->producer = NULL;
8258
8259         /*
8260          * When producer of consumer is unregistered, we change back to
8261          * remapped mode, so we can re-use the current implementation
8262          * when the irq is masked/disabed or the consumer side (KVM
8263          * int this case doesn't want to receive the interrupts.
8264         */
8265         ret = kvm_x86_ops->update_pi_irte(irqfd->kvm, prod->irq, irqfd->gsi, 0);
8266         if (ret)
8267                 printk(KERN_INFO "irq bypass consumer (token %p) unregistration"
8268                        " fails: %d\n", irqfd->consumer.token, ret);
8269 }
8270
8271 int kvm_arch_update_irqfd_routing(struct kvm *kvm, unsigned int host_irq,
8272                                    uint32_t guest_irq, bool set)
8273 {
8274         if (!kvm_x86_ops->update_pi_irte)
8275                 return -EINVAL;
8276
8277         return kvm_x86_ops->update_pi_irte(kvm, host_irq, guest_irq, set);
8278 }
8279
8280 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
8281 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio);
8282 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
8283 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
8284 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
8285 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
8286 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
8287 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
8288 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
8289 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
8290 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
8291 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
8292 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);
8293 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset);
8294 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window);
8295 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full);
8296 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update);