arch/x86/kvm/mmu.c

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * This module enables machines with Intel VT-x extensions to run virtual
   5  * machines without emulation or binary translation.
   6  *
   7  * MMU support
   8  *
   9  * Copyright (C) 2006 Qumranet, Inc.
  10  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  11  *
  12  * Authors:
  13  *   Yaniv Kamay  <yaniv@qumranet.com>
  14  *   Avi Kivity   <avi@qumranet.com>
  15  *
  16  * This work is licensed under the terms of the GNU GPL, version 2.  See
  17  * the COPYING file in the top-level directory.
  18  *
  19  */
  20
  21 #include "irq.h"
  22 #include "mmu.h"
  23 #include "x86.h"
  24 #include "kvm_cache_regs.h"
  25 #include "x86.h"
  26
  27 #include <linux/kvm_host.h>
  28 #include <linux/types.h>
  29 #include <linux/string.h>
  30 #include <linux/mm.h>
  31 #include <linux/highmem.h>
  32 #include <linux/module.h>
  33 #include <linux/swap.h>
  34 #include <linux/hugetlb.h>
  35 #include <linux/compiler.h>
  36 #include <linux/srcu.h>
  37 #include <linux/slab.h>
  38 #include <linux/uaccess.h>
  39
  40 #include <asm/page.h>
  41 #include <asm/cmpxchg.h>
  42 #include <asm/io.h>
  43 #include <asm/vmx.h>
  44
  45 /*
  46  * When setting this variable to true it enables Two-Dimensional-Paging
  47  * where the hardware walks 2 page tables:
  48  * 1. the guest-virtual to guest-physical
  49  * 2. while doing 1. it walks guest-physical to host-physical
  50  * If the hardware supports that we don't need to do shadow paging.
  51  */
  52 bool tdp_enabled = false;
  53
  54 enum {
  55         AUDIT_PRE_PAGE_FAULT,
  56         AUDIT_POST_PAGE_FAULT,
  57         AUDIT_PRE_PTE_WRITE,
  58         AUDIT_POST_PTE_WRITE,
  59         AUDIT_PRE_SYNC,
  60         AUDIT_POST_SYNC
  61 };
  62
  63 char *audit_point_name[] = {
  64         "pre page fault",
  65         "post page fault",
  66         "pre pte write",
  67         "post pte write",
  68         "pre sync",
  69         "post sync"
  70 };
  71
  72 #undef MMU_DEBUG
  73
  74 #ifdef MMU_DEBUG
  75
  76 #define pgprintk(x...) do { if (dbg) printk(x); } while (0)
  77 #define rmap_printk(x...) do { if (dbg) printk(x); } while (0)
  78
  79 #else
  80
  81 #define pgprintk(x...) do { } while (0)
  82 #define rmap_printk(x...) do { } while (0)
  83
  84 #endif
  85
  86 #ifdef MMU_DEBUG
  87 static int dbg = 0;
  88 module_param(dbg, bool, 0644);
  89 #endif
  90
  91 static int oos_shadow = 1;
  92 module_param(oos_shadow, bool, 0644);
  93
  94 #ifndef MMU_DEBUG
  95 #define ASSERT(x) do { } while (0)
  96 #else
  97 #define ASSERT(x)                                                       \
  98         if (!(x)) {                                                     \
  99                 printk(KERN_WARNING "assertion failed %s:%d: %s\n",     \
 100                        __FILE__, __LINE__, #x);                         \
 101         }
 102 #endif
 103
 104 #define PTE_PREFETCH_NUM                8
 105
 106 #define PT_FIRST_AVAIL_BITS_SHIFT 9
 107 #define PT64_SECOND_AVAIL_BITS_SHIFT 52
 108
 109 #define PT64_LEVEL_BITS 9
 110
 111 #define PT64_LEVEL_SHIFT(level) \
 112                 (PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS)
 113
 114 #define PT64_INDEX(address, level)\
 115         (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
 116
 117
 118 #define PT32_LEVEL_BITS 10
 119
 120 #define PT32_LEVEL_SHIFT(level) \
 121                 (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS)
 122
 123 #define PT32_LVL_OFFSET_MASK(level) \
 124         (PT32_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \
 125                                                 * PT32_LEVEL_BITS))) - 1))
 126
 127 #define PT32_INDEX(address, level)\
 128         (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
 129
 130
 131 #define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1))
 132 #define PT64_DIR_BASE_ADDR_MASK \
 133         (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
 134 #define PT64_LVL_ADDR_MASK(level) \
 135         (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \
 136                                                 * PT64_LEVEL_BITS))) - 1))
 137 #define PT64_LVL_OFFSET_MASK(level) \
 138         (PT64_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \
 139                                                 * PT64_LEVEL_BITS))) - 1))
 140
 141 #define PT32_BASE_ADDR_MASK PAGE_MASK
 142 #define PT32_DIR_BASE_ADDR_MASK \
 143         (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
 144 #define PT32_LVL_ADDR_MASK(level) \
 145         (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \
 146                                             * PT32_LEVEL_BITS))) - 1))
 147
 148 #define PT64_PERM_MASK (PT_PRESENT_MASK | PT_WRITABLE_MASK | PT_USER_MASK \
 149                         | PT64_NX_MASK)
 150
 151 #define PTE_LIST_EXT 4
 152
 153 #define ACC_EXEC_MASK    1
 154 #define ACC_WRITE_MASK   PT_WRITABLE_MASK
 155 #define ACC_USER_MASK    PT_USER_MASK
 156 #define ACC_ALL          (ACC_EXEC_MASK | ACC_WRITE_MASK | ACC_USER_MASK)
 157
 158 #include <trace/events/kvm.h>
 159
 160 #define CREATE_TRACE_POINTS
 161 #include "mmutrace.h"
 162
 163 #define SPTE_HOST_WRITEABLE (1ULL << PT_FIRST_AVAIL_BITS_SHIFT)
 164
 165 #define SHADOW_PT_INDEX(addr, level) PT64_INDEX(addr, level)
 166
 167 struct pte_list_desc {
 168         u64 *sptes[PTE_LIST_EXT];
 169         struct pte_list_desc *more;
 170 };
 171
 172 struct kvm_shadow_walk_iterator {
 173         u64 addr;
 174         hpa_t shadow_addr;
 175         int level;
 176         u64 *sptep;
 177         unsigned index;
 178 };
 179
 180 #define for_each_shadow_entry(_vcpu, _addr, _walker)    \
 181         for (shadow_walk_init(&(_walker), _vcpu, _addr);        \
 182              shadow_walk_okay(&(_walker));                      \
 183              shadow_walk_next(&(_walker)))
 184
 185 static struct kmem_cache *pte_list_desc_cache;
 186 static struct kmem_cache *mmu_page_header_cache;
 187 static struct percpu_counter kvm_total_used_mmu_pages;
 188
 189 static u64 __read_mostly shadow_trap_nonpresent_pte;
 190 static u64 __read_mostly shadow_notrap_nonpresent_pte;
 191 static u64 __read_mostly shadow_nx_mask;
 192 static u64 __read_mostly shadow_x_mask; /* mutual exclusive with nx_mask */
 193 static u64 __read_mostly shadow_user_mask;
 194 static u64 __read_mostly shadow_accessed_mask;
 195 static u64 __read_mostly shadow_dirty_mask;
 196
 197 static inline u64 rsvd_bits(int s, int e)
 198 {
 199         return ((1ULL << (e - s + 1)) - 1) << s;
 200 }
 201
 202 void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte)
 203 {
 204         shadow_trap_nonpresent_pte = trap_pte;
 205         shadow_notrap_nonpresent_pte = notrap_pte;
 206 }
 207 EXPORT_SYMBOL_GPL(kvm_mmu_set_nonpresent_ptes);
 208
 209 void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,
 210                 u64 dirty_mask, u64 nx_mask, u64 x_mask)
 211 {
 212         shadow_user_mask = user_mask;
 213         shadow_accessed_mask = accessed_mask;
 214         shadow_dirty_mask = dirty_mask;
 215         shadow_nx_mask = nx_mask;
 216         shadow_x_mask = x_mask;
 217 }
 218 EXPORT_SYMBOL_GPL(kvm_mmu_set_mask_ptes);
 219
 220 static bool is_write_protection(struct kvm_vcpu *vcpu)
 221 {
 222         return kvm_read_cr0_bits(vcpu, X86_CR0_WP);
 223 }
 224
 225 static int is_cpuid_PSE36(void)
 226 {
 227         return 1;
 228 }
 229
 230 static int is_nx(struct kvm_vcpu *vcpu)
 231 {
 232         return vcpu->arch.efer & EFER_NX;
 233 }
 234
 235 static int is_shadow_present_pte(u64 pte)
 236 {
 237         return pte != shadow_trap_nonpresent_pte
 238                 && pte != shadow_notrap_nonpresent_pte;
 239 }
 240
 241 static int is_large_pte(u64 pte)
 242 {
 243         return pte & PT_PAGE_SIZE_MASK;
 244 }
 245
 246 static int is_writable_pte(unsigned long pte)
 247 {
 248         return pte & PT_WRITABLE_MASK;
 249 }
 250
 251 static int is_dirty_gpte(unsigned long pte)
 252 {
 253         return pte & PT_DIRTY_MASK;
 254 }
 255
 256 static int is_rmap_spte(u64 pte)
 257 {
 258         return is_shadow_present_pte(pte);
 259 }
 260
 261 static int is_last_spte(u64 pte, int level)
 262 {
 263         if (level == PT_PAGE_TABLE_LEVEL)
 264                 return 1;
 265         if (is_large_pte(pte))
 266                 return 1;
 267         return 0;
 268 }
 269
 270 static pfn_t spte_to_pfn(u64 pte)
 271 {
 272         return (pte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
 273 }
 274
 275 static gfn_t pse36_gfn_delta(u32 gpte)
 276 {
 277         int shift = 32 - PT32_DIR_PSE36_SHIFT - PAGE_SHIFT;
 278
 279         return (gpte & PT32_DIR_PSE36_MASK) << shift;
 280 }
 281
 282 static void __set_spte(u64 *sptep, u64 spte)
 283 {
 284         set_64bit(sptep, spte);
 285 }
 286
 287 static u64 __xchg_spte(u64 *sptep, u64 new_spte)
 288 {
 289 #ifdef CONFIG_X86_64
 290         return xchg(sptep, new_spte);
 291 #else
 292         u64 old_spte;
 293
 294         do {
 295                 old_spte = *sptep;
 296         } while (cmpxchg64(sptep, old_spte, new_spte) != old_spte);
 297
 298         return old_spte;
 299 #endif
 300 }
 301
 302 static bool spte_has_volatile_bits(u64 spte)
 303 {
 304         if (!shadow_accessed_mask)
 305                 return false;
 306
 307         if (!is_shadow_present_pte(spte))
 308                 return false;
 309
 310         if ((spte & shadow_accessed_mask) &&
 311               (!is_writable_pte(spte) || (spte & shadow_dirty_mask)))
 312                 return false;
 313
 314         return true;
 315 }
 316
 317 static bool spte_is_bit_cleared(u64 old_spte, u64 new_spte, u64 bit_mask)
 318 {
 319         return (old_spte & bit_mask) && !(new_spte & bit_mask);
 320 }
 321
 322 static void update_spte(u64 *sptep, u64 new_spte)
 323 {
 324         u64 mask, old_spte = *sptep;
 325
 326         WARN_ON(!is_rmap_spte(new_spte));
 327
 328         new_spte |= old_spte & shadow_dirty_mask;
 329
 330         mask = shadow_accessed_mask;
 331         if (is_writable_pte(old_spte))
 332                 mask |= shadow_dirty_mask;
 333
 334         if (!spte_has_volatile_bits(old_spte) || (new_spte & mask) == mask)
 335                 __set_spte(sptep, new_spte);
 336         else
 337                 old_spte = __xchg_spte(sptep, new_spte);
 338
 339         if (!shadow_accessed_mask)
 340                 return;
 341
 342         if (spte_is_bit_cleared(old_spte, new_spte, shadow_accessed_mask))
 343                 kvm_set_pfn_accessed(spte_to_pfn(old_spte));
 344         if (spte_is_bit_cleared(old_spte, new_spte, shadow_dirty_mask))
 345                 kvm_set_pfn_dirty(spte_to_pfn(old_spte));
 346 }
 347
 348 static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
 349                                   struct kmem_cache *base_cache, int min)
 350 {
 351         void *obj;
 352
 353         if (cache->nobjs >= min)
 354                 return 0;
 355         while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
 356                 obj = kmem_cache_zalloc(base_cache, GFP_KERNEL);
 357                 if (!obj)
 358                         return -ENOMEM;
 359                 cache->objects[cache->nobjs++] = obj;
 360         }
 361         return 0;
 362 }
 363
 364 static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc,
 365                                   struct kmem_cache *cache)
 366 {
 367         while (mc->nobjs)
 368                 kmem_cache_free(cache, mc->objects[--mc->nobjs]);
 369 }
 370
 371 static int mmu_topup_memory_cache_page(struct kvm_mmu_memory_cache *cache,
 372                                        int min)
 373 {
 374         void *page;
 375
 376         if (cache->nobjs >= min)
 377                 return 0;
 378         while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
 379                 page = (void *)__get_free_page(GFP_KERNEL);
 380                 if (!page)
 381                         return -ENOMEM;
 382                 cache->objects[cache->nobjs++] = page;
 383         }
 384         return 0;
 385 }
 386
 387 static void mmu_free_memory_cache_page(struct kvm_mmu_memory_cache *mc)
 388 {
 389         while (mc->nobjs)
 390                 free_page((unsigned long)mc->objects[--mc->nobjs]);
 391 }
 392
 393 static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu)
 394 {
 395         int r;
 396
 397         r = mmu_topup_memory_cache(&vcpu->arch.mmu_pte_list_desc_cache,
 398                                    pte_list_desc_cache, 8 + PTE_PREFETCH_NUM);
 399         if (r)
 400                 goto out;
 401         r = mmu_topup_memory_cache_page(&vcpu->arch.mmu_page_cache, 8);
 402         if (r)
 403                 goto out;
 404         r = mmu_topup_memory_cache(&vcpu->arch.mmu_page_header_cache,
 405                                    mmu_page_header_cache, 4);
 406 out:
 407         return r;
 408 }
 409
 410 static void mmu_free_memory_caches(struct kvm_vcpu *vcpu)
 411 {
 412         mmu_free_memory_cache(&vcpu->arch.mmu_pte_list_desc_cache,
 413                                 pte_list_desc_cache);
 414         mmu_free_memory_cache_page(&vcpu->arch.mmu_page_cache);
 415         mmu_free_memory_cache(&vcpu->arch.mmu_page_header_cache,
 416                                 mmu_page_header_cache);
 417 }
 418
 419 static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc,
 420                                     size_t size)
 421 {
 422         void *p;
 423
 424         BUG_ON(!mc->nobjs);
 425         p = mc->objects[--mc->nobjs];
 426         return p;
 427 }
 428
 429 static struct pte_list_desc *mmu_alloc_pte_list_desc(struct kvm_vcpu *vcpu)
 430 {
 431         return mmu_memory_cache_alloc(&vcpu->arch.mmu_pte_list_desc_cache,
 432                                       sizeof(struct pte_list_desc));
 433 }
 434
 435 static void mmu_free_pte_list_desc(struct pte_list_desc *pte_list_desc)
 436 {
 437         kmem_cache_free(pte_list_desc_cache, pte_list_desc);
 438 }
 439
 440 static gfn_t kvm_mmu_page_get_gfn(struct kvm_mmu_page *sp, int index)
 441 {
 442         if (!sp->role.direct)
 443                 return sp->gfns[index];
 444
 445         return sp->gfn + (index << ((sp->role.level - 1) * PT64_LEVEL_BITS));
 446 }
 447
 448 static void kvm_mmu_page_set_gfn(struct kvm_mmu_page *sp, int index, gfn_t gfn)
 449 {
 450         if (sp->role.direct)
 451                 BUG_ON(gfn != kvm_mmu_page_get_gfn(sp, index));
 452         else
 453                 sp->gfns[index] = gfn;
 454 }
 455
 456 /*
 457  * Return the pointer to the large page information for a given gfn,
 458  * handling slots that are not large page aligned.
 459  */
 460 static struct kvm_lpage_info *lpage_info_slot(gfn_t gfn,
 461                                               struct kvm_memory_slot *slot,
 462                                               int level)
 463 {
 464         unsigned long idx;
 465
 466         idx = (gfn >> KVM_HPAGE_GFN_SHIFT(level)) -
 467               (slot->base_gfn >> KVM_HPAGE_GFN_SHIFT(level));
 468         return &slot->lpage_info[level - 2][idx];
 469 }
 470
 471 static void account_shadowed(struct kvm *kvm, gfn_t gfn)
 472 {
 473         struct kvm_memory_slot *slot;
 474         struct kvm_lpage_info *linfo;
 475         int i;
 476
 477         slot = gfn_to_memslot(kvm, gfn);
 478         for (i = PT_DIRECTORY_LEVEL;
 479              i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
 480                 linfo = lpage_info_slot(gfn, slot, i);
 481                 linfo->write_count += 1;
 482         }
 483         kvm->arch.indirect_shadow_pages++;
 484 }
 485
 486 static void unaccount_shadowed(struct kvm *kvm, gfn_t gfn)
 487 {
 488         struct kvm_memory_slot *slot;
 489         struct kvm_lpage_info *linfo;
 490         int i;
 491
 492         slot = gfn_to_memslot(kvm, gfn);
 493         for (i = PT_DIRECTORY_LEVEL;
 494              i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
 495                 linfo = lpage_info_slot(gfn, slot, i);
 496                 linfo->write_count -= 1;
 497                 WARN_ON(linfo->write_count < 0);
 498         }
 499         kvm->arch.indirect_shadow_pages--;
 500 }
 501
 502 static int has_wrprotected_page(struct kvm *kvm,
 503                                 gfn_t gfn,
 504                                 int level)
 505 {
 506         struct kvm_memory_slot *slot;
 507         struct kvm_lpage_info *linfo;
 508
 509         slot = gfn_to_memslot(kvm, gfn);
 510         if (slot) {
 511                 linfo = lpage_info_slot(gfn, slot, level);
 512                 return linfo->write_count;
 513         }
 514
 515         return 1;
 516 }
 517
 518 static int host_mapping_level(struct kvm *kvm, gfn_t gfn)
 519 {
 520         unsigned long page_size;
 521         int i, ret = 0;
 522
 523         page_size = kvm_host_page_size(kvm, gfn);
 524
 525         for (i = PT_PAGE_TABLE_LEVEL;
 526              i < (PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES); ++i) {
 527                 if (page_size >= KVM_HPAGE_SIZE(i))
 528                         ret = i;
 529                 else
 530                         break;
 531         }
 532
 533         return ret;
 534 }
 535
 536 static struct kvm_memory_slot *
 537 gfn_to_memslot_dirty_bitmap(struct kvm_vcpu *vcpu, gfn_t gfn,
 538                             bool no_dirty_log)
 539 {
 540         struct kvm_memory_slot *slot;
 541
 542         slot = gfn_to_memslot(vcpu->kvm, gfn);
 543         if (!slot || slot->flags & KVM_MEMSLOT_INVALID ||
 544               (no_dirty_log && slot->dirty_bitmap))
 545                 slot = NULL;
 546
 547         return slot;
 548 }
 549
 550 static bool mapping_level_dirty_bitmap(struct kvm_vcpu *vcpu, gfn_t large_gfn)
 551 {
 552         return !gfn_to_memslot_dirty_bitmap(vcpu, large_gfn, true);
 553 }
 554
 555 static int mapping_level(struct kvm_vcpu *vcpu, gfn_t large_gfn)
 556 {
 557         int host_level, level, max_level;
 558
 559         host_level = host_mapping_level(vcpu->kvm, large_gfn);
 560
 561         if (host_level == PT_PAGE_TABLE_LEVEL)
 562                 return host_level;
 563
 564         max_level = kvm_x86_ops->get_lpage_level() < host_level ?
 565                 kvm_x86_ops->get_lpage_level() : host_level;
 566
 567         for (level = PT_DIRECTORY_LEVEL; level <= max_level; ++level)
 568                 if (has_wrprotected_page(vcpu->kvm, large_gfn, level))
 569                         break;
 570
 571         return level - 1;
 572 }
 573
 574 /*
 575  * Pte mapping structures:
 576  *
 577  * If pte_list bit zero is zero, then pte_list point to the spte.
 578  *
 579  * If pte_list bit zero is one, (then pte_list & ~1) points to a struct
 580  * pte_list_desc containing more mappings.
 581  *
 582  * Returns the number of pte entries before the spte was added or zero if
 583  * the spte was not added.
 584  *
 585  */
 586 static int pte_list_add(struct kvm_vcpu *vcpu, u64 *spte,
 587                         unsigned long *pte_list)
 588 {
 589         struct pte_list_desc *desc;
 590         int i, count = 0;
 591
 592         if (!*pte_list) {
 593                 rmap_printk("pte_list_add: %p %llx 0->1\n", spte, *spte);
 594                 *pte_list = (unsigned long)spte;
 595         } else if (!(*pte_list & 1)) {
 596                 rmap_printk("pte_list_add: %p %llx 1->many\n", spte, *spte);
 597                 desc = mmu_alloc_pte_list_desc(vcpu);
 598                 desc->sptes[0] = (u64 *)*pte_list;
 599                 desc->sptes[1] = spte;
 600                 *pte_list = (unsigned long)desc | 1;
 601                 ++count;
 602         } else {
 603                 rmap_printk("pte_list_add: %p %llx many->many\n", spte, *spte);
 604                 desc = (struct pte_list_desc *)(*pte_list & ~1ul);
 605                 while (desc->sptes[PTE_LIST_EXT-1] && desc->more) {
 606                         desc = desc->more;
 607                         count += PTE_LIST_EXT;
 608                 }
 609                 if (desc->sptes[PTE_LIST_EXT-1]) {
 610                         desc->more = mmu_alloc_pte_list_desc(vcpu);
 611                         desc = desc->more;
 612                 }
 613                 for (i = 0; desc->sptes[i]; ++i)
 614                         ++count;
 615                 desc->sptes[i] = spte;
 616         }
 617         return count;
 618 }
 619
 620 static u64 *pte_list_next(unsigned long *pte_list, u64 *spte)
 621 {
 622         struct pte_list_desc *desc;
 623         u64 *prev_spte;
 624         int i;
 625
 626         if (!*pte_list)
 627                 return NULL;
 628         else if (!(*pte_list & 1)) {
 629                 if (!spte)
 630                         return (u64 *)*pte_list;
 631                 return NULL;
 632         }
 633         desc = (struct pte_list_desc *)(*pte_list & ~1ul);
 634         prev_spte = NULL;
 635         while (desc) {
 636                 for (i = 0; i < PTE_LIST_EXT && desc->sptes[i]; ++i) {
 637                         if (prev_spte == spte)
 638                                 return desc->sptes[i];
 639                         prev_spte = desc->sptes[i];
 640                 }
 641                 desc = desc->more;
 642         }
 643         return NULL;
 644 }
 645
 646 static void
 647 pte_list_desc_remove_entry(unsigned long *pte_list, struct pte_list_desc *desc,
 648                            int i, struct pte_list_desc *prev_desc)
 649 {
 650         int j;
 651
 652         for (j = PTE_LIST_EXT - 1; !desc->sptes[j] && j > i; --j)
 653                 ;
 654         desc->sptes[i] = desc->sptes[j];
 655         desc->sptes[j] = NULL;
 656         if (j != 0)
 657                 return;
 658         if (!prev_desc && !desc->more)
 659                 *pte_list = (unsigned long)desc->sptes[0];
 660         else
 661                 if (prev_desc)
 662                         prev_desc->more = desc->more;
 663                 else
 664                         *pte_list = (unsigned long)desc->more | 1;
 665         mmu_free_pte_list_desc(desc);
 666 }
 667
 668 static void pte_list_remove(u64 *spte, unsigned long *pte_list)
 669 {
 670         struct pte_list_desc *desc;
 671         struct pte_list_desc *prev_desc;
 672         int i;
 673
 674         if (!*pte_list) {
 675                 printk(KERN_ERR "pte_list_remove: %p 0->BUG\n", spte);
 676                 BUG();
 677         } else if (!(*pte_list & 1)) {
 678                 rmap_printk("pte_list_remove:  %p 1->0\n", spte);
 679                 if ((u64 *)*pte_list != spte) {
 680                         printk(KERN_ERR "pte_list_remove:  %p 1->BUG\n", spte);
 681                         BUG();
 682                 }
 683                 *pte_list = 0;
 684         } else {
 685                 rmap_printk("pte_list_remove:  %p many->many\n", spte);
 686                 desc = (struct pte_list_desc *)(*pte_list & ~1ul);
 687                 prev_desc = NULL;
 688                 while (desc) {
 689                         for (i = 0; i < PTE_LIST_EXT && desc->sptes[i]; ++i)
 690                                 if (desc->sptes[i] == spte) {
 691                                         pte_list_desc_remove_entry(pte_list,
 692                                                                desc, i,
 693                                                                prev_desc);
 694                                         return;
 695                                 }
 696                         prev_desc = desc;
 697                         desc = desc->more;
 698                 }
 699                 pr_err("pte_list_remove: %p many->many\n", spte);
 700                 BUG();
 701         }
 702 }
 703
 704 typedef void (*pte_list_walk_fn) (u64 *spte);
 705 static void pte_list_walk(unsigned long *pte_list, pte_list_walk_fn fn)
 706 {
 707         struct pte_list_desc *desc;
 708         int i;
 709
 710         if (!*pte_list)
 711                 return;
 712
 713         if (!(*pte_list & 1))
 714                 return fn((u64 *)*pte_list);
 715
 716         desc = (struct pte_list_desc *)(*pte_list & ~1ul);
 717         while (desc) {
 718                 for (i = 0; i < PTE_LIST_EXT && desc->sptes[i]; ++i)
 719                         fn(desc->sptes[i]);
 720                 desc = desc->more;
 721         }
 722 }
 723
 724 /*
 725  * Take gfn and return the reverse mapping to it.
 726  */
 727 static unsigned long *gfn_to_rmap(struct kvm *kvm, gfn_t gfn, int level)
 728 {
 729         struct kvm_memory_slot *slot;
 730         struct kvm_lpage_info *linfo;
 731
 732         slot = gfn_to_memslot(kvm, gfn);
 733         if (likely(level == PT_PAGE_TABLE_LEVEL))
 734                 return &slot->rmap[gfn - slot->base_gfn];
 735
 736         linfo = lpage_info_slot(gfn, slot, level);
 737
 738         return &linfo->rmap_pde;
 739 }
 740
 741 static int rmap_add(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn)
 742 {
 743         struct kvm_mmu_page *sp;
 744         unsigned long *rmapp;
 745
 746         if (!is_rmap_spte(*spte))
 747                 return 0;
 748
 749         sp = page_header(__pa(spte));
 750         kvm_mmu_page_set_gfn(sp, spte - sp->spt, gfn);
 751         rmapp = gfn_to_rmap(vcpu->kvm, gfn, sp->role.level);
 752         return pte_list_add(vcpu, spte, rmapp);
 753 }
 754
 755 static u64 *rmap_next(struct kvm *kvm, unsigned long *rmapp, u64 *spte)
 756 {
 757         return pte_list_next(rmapp, spte);
 758 }
 759
 760 static void rmap_remove(struct kvm *kvm, u64 *spte)
 761 {
 762         struct kvm_mmu_page *sp;
 763         gfn_t gfn;
 764         unsigned long *rmapp;
 765
 766         sp = page_header(__pa(spte));
 767         gfn = kvm_mmu_page_get_gfn(sp, spte - sp->spt);
 768         rmapp = gfn_to_rmap(kvm, gfn, sp->role.level);
 769         pte_list_remove(spte, rmapp);
 770 }
 771
 772 static int set_spte_track_bits(u64 *sptep, u64 new_spte)
 773 {
 774         pfn_t pfn;
 775         u64 old_spte = *sptep;
 776
 777         if (!spte_has_volatile_bits(old_spte))
 778                 __set_spte(sptep, new_spte);
 779         else
 780                 old_spte = __xchg_spte(sptep, new_spte);
 781
 782         if (!is_rmap_spte(old_spte))
 783                 return 0;
 784
 785         pfn = spte_to_pfn(old_spte);
 786         if (!shadow_accessed_mask || old_spte & shadow_accessed_mask)
 787                 kvm_set_pfn_accessed(pfn);
 788         if (!shadow_dirty_mask || (old_spte & shadow_dirty_mask))
 789                 kvm_set_pfn_dirty(pfn);
 790         return 1;
 791 }
 792
 793 static void drop_spte(struct kvm *kvm, u64 *sptep, u64 new_spte)
 794 {
 795         if (set_spte_track_bits(sptep, new_spte))
 796                 rmap_remove(kvm, sptep);
 797 }
 798
 799 static int rmap_write_protect(struct kvm *kvm, u64 gfn)
 800 {
 801         unsigned long *rmapp;
 802         u64 *spte;
 803         int i, write_protected = 0;
 804
 805         rmapp = gfn_to_rmap(kvm, gfn, PT_PAGE_TABLE_LEVEL);
 806
 807         spte = rmap_next(kvm, rmapp, NULL);
 808         while (spte) {
 809                 BUG_ON(!spte);
 810                 BUG_ON(!(*spte & PT_PRESENT_MASK));
 811                 rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte);
 812                 if (is_writable_pte(*spte)) {
 813                         update_spte(spte, *spte & ~PT_WRITABLE_MASK);
 814                         write_protected = 1;
 815                 }
 816                 spte = rmap_next(kvm, rmapp, spte);
 817         }
 818
 819         /* check for huge page mappings */
 820         for (i = PT_DIRECTORY_LEVEL;
 821              i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
 822                 rmapp = gfn_to_rmap(kvm, gfn, i);
 823                 spte = rmap_next(kvm, rmapp, NULL);
 824                 while (spte) {
 825                         BUG_ON(!spte);
 826                         BUG_ON(!(*spte & PT_PRESENT_MASK));
 827                         BUG_ON((*spte & (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK)) != (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK));
 828                         pgprintk("rmap_write_protect(large): spte %p %llx %lld\n", spte, *spte, gfn);
 829                         if (is_writable_pte(*spte)) {
 830                                 drop_spte(kvm, spte,
 831                                           shadow_trap_nonpresent_pte);
 832                                 --kvm->stat.lpages;
 833                                 spte = NULL;
 834                                 write_protected = 1;
 835                         }
 836                         spte = rmap_next(kvm, rmapp, spte);
 837                 }
 838         }
 839
 840         return write_protected;
 841 }
 842
 843 static int kvm_unmap_rmapp(struct kvm *kvm, unsigned long *rmapp,
 844                            unsigned long data)
 845 {
 846         u64 *spte;
 847         int need_tlb_flush = 0;
 848
 849         while ((spte = rmap_next(kvm, rmapp, NULL))) {
 850                 BUG_ON(!(*spte & PT_PRESENT_MASK));
 851                 rmap_printk("kvm_rmap_unmap_hva: spte %p %llx\n", spte, *spte);
 852                 drop_spte(kvm, spte, shadow_trap_nonpresent_pte);
 853                 need_tlb_flush = 1;
 854         }
 855         return need_tlb_flush;
 856 }
 857
 858 static int kvm_set_pte_rmapp(struct kvm *kvm, unsigned long *rmapp,
 859                              unsigned long data)
 860 {
 861         int need_flush = 0;
 862         u64 *spte, new_spte;
 863         pte_t *ptep = (pte_t *)data;
 864         pfn_t new_pfn;
 865
 866         WARN_ON(pte_huge(*ptep));
 867         new_pfn = pte_pfn(*ptep);
 868         spte = rmap_next(kvm, rmapp, NULL);
 869         while (spte) {
 870                 BUG_ON(!is_shadow_present_pte(*spte));
 871                 rmap_printk("kvm_set_pte_rmapp: spte %p %llx\n", spte, *spte);
 872                 need_flush = 1;
 873                 if (pte_write(*ptep)) {
 874                         drop_spte(kvm, spte, shadow_trap_nonpresent_pte);
 875                         spte = rmap_next(kvm, rmapp, NULL);
 876                 } else {
 877                         new_spte = *spte &~ (PT64_BASE_ADDR_MASK);
 878                         new_spte |= (u64)new_pfn << PAGE_SHIFT;
 879
 880                         new_spte &= ~PT_WRITABLE_MASK;
 881                         new_spte &= ~SPTE_HOST_WRITEABLE;
 882                         new_spte &= ~shadow_accessed_mask;
 883                         set_spte_track_bits(spte, new_spte);
 884                         spte = rmap_next(kvm, rmapp, spte);
 885                 }
 886         }
 887         if (need_flush)
 888                 kvm_flush_remote_tlbs(kvm);
 889
 890         return 0;
 891 }
 892
 893 static int kvm_handle_hva(struct kvm *kvm, unsigned long hva,
 894                           unsigned long data,
 895                           int (*handler)(struct kvm *kvm, unsigned long *rmapp,
 896                                          unsigned long data))
 897 {
 898         int i, j;
 899         int ret;
 900         int retval = 0;
 901         struct kvm_memslots *slots;
 902
 903         slots = kvm_memslots(kvm);
 904
 905         for (i = 0; i < slots->nmemslots; i++) {
 906                 struct kvm_memory_slot *memslot = &slots->memslots[i];
 907                 unsigned long start = memslot->userspace_addr;
 908                 unsigned long end;
 909
 910                 end = start + (memslot->npages << PAGE_SHIFT);
 911                 if (hva >= start && hva < end) {
 912                         gfn_t gfn_offset = (hva - start) >> PAGE_SHIFT;
 913                         gfn_t gfn = memslot->base_gfn + gfn_offset;
 914
 915                         ret = handler(kvm, &memslot->rmap[gfn_offset], data);
 916
 917                         for (j = 0; j < KVM_NR_PAGE_SIZES - 1; ++j) {
 918                                 struct kvm_lpage_info *linfo;
 919
 920                                 linfo = lpage_info_slot(gfn, memslot,
 921                                                         PT_DIRECTORY_LEVEL + j);
 922                                 ret |= handler(kvm, &linfo->rmap_pde, data);
 923                         }
 924                         trace_kvm_age_page(hva, memslot, ret);
 925                         retval |= ret;
 926                 }
 927         }
 928
 929         return retval;
 930 }
 931
 932 int kvm_unmap_hva(struct kvm *kvm, unsigned long hva)
 933 {
 934         return kvm_handle_hva(kvm, hva, 0, kvm_unmap_rmapp);
 935 }
 936
 937 void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte)
 938 {
 939         kvm_handle_hva(kvm, hva, (unsigned long)&pte, kvm_set_pte_rmapp);
 940 }
 941
 942 static int kvm_age_rmapp(struct kvm *kvm, unsigned long *rmapp,
 943                          unsigned long data)
 944 {
 945         u64 *spte;
 946         int young = 0;
 947
 948         /*
 949          * Emulate the accessed bit for EPT, by checking if this page has
 950          * an EPT mapping, and clearing it if it does. On the next access,
 951          * a new EPT mapping will be established.
 952          * This has some overhead, but not as much as the cost of swapping
 953          * out actively used pages or breaking up actively used hugepages.
 954          */
 955         if (!shadow_accessed_mask)
 956                 return kvm_unmap_rmapp(kvm, rmapp, data);
 957
 958         spte = rmap_next(kvm, rmapp, NULL);
 959         while (spte) {
 960                 int _young;
 961                 u64 _spte = *spte;
 962                 BUG_ON(!(_spte & PT_PRESENT_MASK));
 963                 _young = _spte & PT_ACCESSED_MASK;
 964                 if (_young) {
 965                         young = 1;
 966                         clear_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
 967                 }
 968                 spte = rmap_next(kvm, rmapp, spte);
 969         }
 970         return young;
 971 }
 972
 973 static int kvm_test_age_rmapp(struct kvm *kvm, unsigned long *rmapp,
 974                               unsigned long data)
 975 {
 976         u64 *spte;
 977         int young = 0;
 978
 979         /*
 980          * If there's no access bit in the secondary pte set by the
 981          * hardware it's up to gup-fast/gup to set the access bit in
 982          * the primary pte or in the page structure.
 983          */
 984         if (!shadow_accessed_mask)
 985                 goto out;
 986
 987         spte = rmap_next(kvm, rmapp, NULL);
 988         while (spte) {
 989                 u64 _spte = *spte;
 990                 BUG_ON(!(_spte & PT_PRESENT_MASK));
 991                 young = _spte & PT_ACCESSED_MASK;
 992                 if (young) {
 993                         young = 1;
 994                         break;
 995                 }
 996                 spte = rmap_next(kvm, rmapp, spte);
 997         }
 998 out:
 999         return young;
1000 }
1001
1002 #define RMAP_RECYCLE_THRESHOLD 1000
1003
1004 static void rmap_recycle(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn)
1005 {
1006         unsigned long *rmapp;
1007         struct kvm_mmu_page *sp;
1008
1009         sp = page_header(__pa(spte));
1010
1011         rmapp = gfn_to_rmap(vcpu->kvm, gfn, sp->role.level);
1012
1013         kvm_unmap_rmapp(vcpu->kvm, rmapp, 0);
1014         kvm_flush_remote_tlbs(vcpu->kvm);
1015 }
1016
1017 int kvm_age_hva(struct kvm *kvm, unsigned long hva)
1018 {
1019         return kvm_handle_hva(kvm, hva, 0, kvm_age_rmapp);
1020 }
1021
1022 int kvm_test_age_hva(struct kvm *kvm, unsigned long hva)
1023 {
1024         return kvm_handle_hva(kvm, hva, 0, kvm_test_age_rmapp);
1025 }
1026
1027 #ifdef MMU_DEBUG
1028 static int is_empty_shadow_page(u64 *spt)
1029 {
1030         u64 *pos;
1031         u64 *end;
1032
1033         for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++)
1034                 if (is_shadow_present_pte(*pos)) {
1035                         printk(KERN_ERR "%s: %p %llx\n", __func__,
1036                                pos, *pos);
1037                         return 0;
1038                 }
1039         return 1;
1040 }
1041 #endif
1042
1043 /*
1044  * This value is the sum of all of the kvm instances's
1045  * kvm->arch.n_used_mmu_pages values.  We need a global,
1046  * aggregate version in order to make the slab shrinker
1047  * faster
1048  */
1049 static inline void kvm_mod_used_mmu_pages(struct kvm *kvm, int nr)
1050 {
1051         kvm->arch.n_used_mmu_pages += nr;
1052         percpu_counter_add(&kvm_total_used_mmu_pages, nr);
1053 }
1054
1055 static void kvm_mmu_free_page(struct kvm *kvm, struct kvm_mmu_page *sp)
1056 {
1057         ASSERT(is_empty_shadow_page(sp->spt));
1058         hlist_del(&sp->hash_link);
1059         list_del(&sp->link);
1060         free_page((unsigned long)sp->spt);
1061         if (!sp->role.direct)
1062                 free_page((unsigned long)sp->gfns);
1063         kmem_cache_free(mmu_page_header_cache, sp);
1064         kvm_mod_used_mmu_pages(kvm, -1);
1065 }
1066
1067 static unsigned kvm_page_table_hashfn(gfn_t gfn)
1068 {
1069         return gfn & ((1 << KVM_MMU_HASH_SHIFT) - 1);
1070 }
1071
1072 static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu,
1073                                     struct kvm_mmu_page *sp, u64 *parent_pte)
1074 {
1075         if (!parent_pte)
1076                 return;
1077
1078         pte_list_add(vcpu, parent_pte, &sp->parent_ptes);
1079 }
1080
1081 static void mmu_page_remove_parent_pte(struct kvm_mmu_page *sp,
1082                                        u64 *parent_pte)
1083 {
1084         pte_list_remove(parent_pte, &sp->parent_ptes);
1085 }
1086
1087 static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu,
1088                                                u64 *parent_pte, int direct)
1089 {
1090         struct kvm_mmu_page *sp;
1091         sp = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_header_cache,
1092                                         sizeof *sp);
1093         sp->spt = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
1094         if (!direct)
1095                 sp->gfns = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache,
1096                                                   PAGE_SIZE);
1097         set_page_private(virt_to_page(sp->spt), (unsigned long)sp);
1098         list_add(&sp->link, &vcpu->kvm->arch.active_mmu_pages);
1099         bitmap_zero(sp->slot_bitmap, KVM_MEMORY_SLOTS + KVM_PRIVATE_MEM_SLOTS);
1100         sp->parent_ptes = 0;
1101         mmu_page_add_parent_pte(vcpu, sp, parent_pte);
1102         kvm_mod_used_mmu_pages(vcpu->kvm, +1);
1103         return sp;
1104 }
1105
1106 static void mark_unsync(u64 *spte);
1107 static void kvm_mmu_mark_parents_unsync(struct kvm_mmu_page *sp)
1108 {
1109         pte_list_walk(&sp->parent_ptes, mark_unsync);
1110 }
1111
1112 static void mark_unsync(u64 *spte)
1113 {
1114         struct kvm_mmu_page *sp;
1115         unsigned int index;
1116
1117         sp = page_header(__pa(spte));
1118         index = spte - sp->spt;
1119         if (__test_and_set_bit(index, sp->unsync_child_bitmap))
1120                 return;
1121         if (sp->unsync_children++)
1122                 return;
1123         kvm_mmu_mark_parents_unsync(sp);
1124 }
1125
1126 static void nonpaging_prefetch_page(struct kvm_vcpu *vcpu,
1127                                     struct kvm_mmu_page *sp)
1128 {
1129         int i;
1130
1131         for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
1132                 sp->spt[i] = shadow_trap_nonpresent_pte;
1133 }
1134
1135 static int nonpaging_sync_page(struct kvm_vcpu *vcpu,
1136                                struct kvm_mmu_page *sp)
1137 {
1138         return 1;
1139 }
1140
1141 static void nonpaging_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
1142 {
1143 }
1144
1145 static void nonpaging_update_pte(struct kvm_vcpu *vcpu,
1146                                  struct kvm_mmu_page *sp, u64 *spte,
1147                                  const void *pte)
1148 {
1149         WARN_ON(1);
1150 }
1151
1152 #define KVM_PAGE_ARRAY_NR 16
1153
1154 struct kvm_mmu_pages {
1155         struct mmu_page_and_offset {
1156                 struct kvm_mmu_page *sp;
1157                 unsigned int idx;
1158         } page[KVM_PAGE_ARRAY_NR];
1159         unsigned int nr;
1160 };
1161
1162 #define for_each_unsync_children(bitmap, idx)           \
1163         for (idx = find_first_bit(bitmap, 512);         \
1164              idx < 512;                                 \
1165              idx = find_next_bit(bitmap, 512, idx+1))
1166
1167 static int mmu_pages_add(struct kvm_mmu_pages *pvec, struct kvm_mmu_page *sp,
1168                          int idx)
1169 {
1170         int i;
1171
1172         if (sp->unsync)
1173                 for (i=0; i < pvec->nr; i++)
1174                         if (pvec->page[i].sp == sp)
1175                                 return 0;
1176
1177         pvec->page[pvec->nr].sp = sp;
1178         pvec->page[pvec->nr].idx = idx;
1179         pvec->nr++;
1180         return (pvec->nr == KVM_PAGE_ARRAY_NR);
1181 }
1182
1183 static int __mmu_unsync_walk(struct kvm_mmu_page *sp,
1184                            struct kvm_mmu_pages *pvec)
1185 {
1186         int i, ret, nr_unsync_leaf = 0;
1187
1188         for_each_unsync_children(sp->unsync_child_bitmap, i) {
1189                 struct kvm_mmu_page *child;
1190                 u64 ent = sp->spt[i];
1191
1192                 if (!is_shadow_present_pte(ent) || is_large_pte(ent))
1193                         goto clear_child_bitmap;
1194
1195                 child = page_header(ent & PT64_BASE_ADDR_MASK);
1196
1197                 if (child->unsync_children) {
1198                         if (mmu_pages_add(pvec, child, i))
1199                                 return -ENOSPC;
1200
1201                         ret = __mmu_unsync_walk(child, pvec);
1202                         if (!ret)
1203                                 goto clear_child_bitmap;
1204                         else if (ret > 0)
1205                                 nr_unsync_leaf += ret;
1206                         else
1207                                 return ret;
1208                 } else if (child->unsync) {
1209                         nr_unsync_leaf++;
1210                         if (mmu_pages_add(pvec, child, i))
1211                                 return -ENOSPC;
1212                 } else
1213                          goto clear_child_bitmap;
1214
1215                 continue;
1216
1217 clear_child_bitmap:
1218                 __clear_bit(i, sp->unsync_child_bitmap);
1219                 sp->unsync_children--;
1220                 WARN_ON((int)sp->unsync_children < 0);
1221         }
1222
1223
1224         return nr_unsync_leaf;
1225 }
1226
1227 static int mmu_unsync_walk(struct kvm_mmu_page *sp,
1228                            struct kvm_mmu_pages *pvec)
1229 {
1230         if (!sp->unsync_children)
1231                 return 0;
1232
1233         mmu_pages_add(pvec, sp, 0);
1234         return __mmu_unsync_walk(sp, pvec);
1235 }
1236
1237 static void kvm_unlink_unsync_page(struct kvm *kvm, struct kvm_mmu_page *sp)
1238 {
1239         WARN_ON(!sp->unsync);
1240         trace_kvm_mmu_sync_page(sp);
1241         sp->unsync = 0;
1242         --kvm->stat.mmu_unsync;
1243 }
1244
1245 static int kvm_mmu_prepare_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp,
1246                                     struct list_head *invalid_list);
1247 static void kvm_mmu_commit_zap_page(struct kvm *kvm,
1248                                     struct list_head *invalid_list);
1249
1250 #define for_each_gfn_sp(kvm, sp, gfn, pos)                              \
1251   hlist_for_each_entry(sp, pos,                                         \
1252    &(kvm)->arch.mmu_page_hash[kvm_page_table_hashfn(gfn)], hash_link)   \
1253         if ((sp)->gfn != (gfn)) {} else
1254
1255 #define for_each_gfn_indirect_valid_sp(kvm, sp, gfn, pos)               \
1256   hlist_for_each_entry(sp, pos,                                         \
1257    &(kvm)->arch.mmu_page_hash[kvm_page_table_hashfn(gfn)], hash_link)   \
1258                 if ((sp)->gfn != (gfn) || (sp)->role.direct ||          \
1259                         (sp)->role.invalid) {} else
1260
1261 /* @sp->gfn should be write-protected at the call site */
1262 static int __kvm_sync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,
1263                            struct list_head *invalid_list, bool clear_unsync)
1264 {
1265         if (sp->role.cr4_pae != !!is_pae(vcpu)) {
1266                 kvm_mmu_prepare_zap_page(vcpu->kvm, sp, invalid_list);
1267                 return 1;
1268         }
1269
1270         if (clear_unsync)
1271                 kvm_unlink_unsync_page(vcpu->kvm, sp);
1272
1273         if (vcpu->arch.mmu.sync_page(vcpu, sp)) {
1274                 kvm_mmu_prepare_zap_page(vcpu->kvm, sp, invalid_list);
1275                 return 1;
1276         }
1277
1278         kvm_mmu_flush_tlb(vcpu);
1279         return 0;
1280 }
1281
1282 static int kvm_sync_page_transient(struct kvm_vcpu *vcpu,
1283                                    struct kvm_mmu_page *sp)
1284 {
1285         LIST_HEAD(invalid_list);
1286         int ret;
1287
1288         ret = __kvm_sync_page(vcpu, sp, &invalid_list, false);
1289         if (ret)
1290                 kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
1291
1292         return ret;
1293 }
1294
1295 static int kvm_sync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,
1296                          struct list_head *invalid_list)
1297 {
1298         return __kvm_sync_page(vcpu, sp, invalid_list, true);
1299 }
1300
1301 /* @gfn should be write-protected at the call site */
1302 static void kvm_sync_pages(struct kvm_vcpu *vcpu,  gfn_t gfn)
1303 {
1304         struct kvm_mmu_page *s;
1305         struct hlist_node *node;
1306         LIST_HEAD(invalid_list);
1307         bool flush = false;
1308
1309         for_each_gfn_indirect_valid_sp(vcpu->kvm, s, gfn, node) {
1310                 if (!s->unsync)
1311                         continue;
1312
1313                 WARN_ON(s->role.level != PT_PAGE_TABLE_LEVEL);
1314                 kvm_unlink_unsync_page(vcpu->kvm, s);
1315                 if ((s->role.cr4_pae != !!is_pae(vcpu)) ||
1316                         (vcpu->arch.mmu.sync_page(vcpu, s))) {
1317                         kvm_mmu_prepare_zap_page(vcpu->kvm, s, &invalid_list);
1318                         continue;
1319                 }
1320                 flush = true;
1321         }
1322
1323         kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
1324         if (flush)
1325                 kvm_mmu_flush_tlb(vcpu);
1326 }
1327
1328 struct mmu_page_path {
1329         struct kvm_mmu_page *parent[PT64_ROOT_LEVEL-1];
1330         unsigned int idx[PT64_ROOT_LEVEL-1];
1331 };
1332
1333 #define for_each_sp(pvec, sp, parents, i)                       \
1334                 for (i = mmu_pages_next(&pvec, &parents, -1),   \
1335                         sp = pvec.page[i].sp;                   \
1336                         i < pvec.nr && ({ sp = pvec.page[i].sp; 1;});   \
1337                         i = mmu_pages_next(&pvec, &parents, i))
1338
1339 static int mmu_pages_next(struct kvm_mmu_pages *pvec,
1340                           struct mmu_page_path *parents,
1341                           int i)
1342 {
1343         int n;
1344
1345         for (n = i+1; n < pvec->nr; n++) {
1346                 struct kvm_mmu_page *sp = pvec->page[n].sp;
1347
1348                 if (sp->role.level == PT_PAGE_TABLE_LEVEL) {
1349                         parents->idx[0] = pvec->page[n].idx;
1350                         return n;
1351                 }
1352
1353                 parents->parent[sp->role.level-2] = sp;
1354                 parents->idx[sp->role.level-1] = pvec->page[n].idx;
1355         }
1356
1357         return n;
1358 }
1359
1360 static void mmu_pages_clear_parents(struct mmu_page_path *parents)
1361 {
1362         struct kvm_mmu_page *sp;
1363         unsigned int level = 0;
1364
1365         do {
1366                 unsigned int idx = parents->idx[level];
1367
1368                 sp = parents->parent[level];
1369                 if (!sp)
1370                         return;
1371
1372                 --sp->unsync_children;
1373                 WARN_ON((int)sp->unsync_children < 0);
1374                 __clear_bit(idx, sp->unsync_child_bitmap);
1375                 level++;
1376         } while (level < PT64_ROOT_LEVEL-1 && !sp->unsync_children);
1377 }
1378
1379 static void kvm_mmu_pages_init(struct kvm_mmu_page *parent,
1380                                struct mmu_page_path *parents,
1381                                struct kvm_mmu_pages *pvec)
1382 {
1383         parents->parent[parent->role.level-1] = NULL;
1384         pvec->nr = 0;
1385 }
1386
1387 static void mmu_sync_children(struct kvm_vcpu *vcpu,
1388                               struct kvm_mmu_page *parent)
1389 {
1390         int i;
1391         struct kvm_mmu_page *sp;
1392         struct mmu_page_path parents;
1393         struct kvm_mmu_pages pages;
1394         LIST_HEAD(invalid_list);
1395
1396         kvm_mmu_pages_init(parent, &parents, &pages);
1397         while (mmu_unsync_walk(parent, &pages)) {
1398                 int protected = 0;
1399
1400                 for_each_sp(pages, sp, parents, i)
1401                         protected |= rmap_write_protect(vcpu->kvm, sp->gfn);
1402
1403                 if (protected)
1404                         kvm_flush_remote_tlbs(vcpu->kvm);
1405
1406                 for_each_sp(pages, sp, parents, i) {
1407                         kvm_sync_page(vcpu, sp, &invalid_list);
1408                         mmu_pages_clear_parents(&parents);
1409                 }
1410                 kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
1411                 cond_resched_lock(&vcpu->kvm->mmu_lock);
1412                 kvm_mmu_pages_init(parent, &parents, &pages);
1413         }
1414 }
1415
1416 static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
1417                                              gfn_t gfn,
1418                                              gva_t gaddr,
1419                                              unsigned level,
1420                                              int direct,
1421                                              unsigned access,
1422                                              u64 *parent_pte)
1423 {
1424         union kvm_mmu_page_role role;
1425         unsigned quadrant;
1426         struct kvm_mmu_page *sp;
1427         struct hlist_node *node;
1428         bool need_sync = false;
1429
1430         role = vcpu->arch.mmu.base_role;
1431         role.level = level;
1432         role.direct = direct;
1433         if (role.direct)
1434                 role.cr4_pae = 0;
1435         role.access = access;
1436         if (!vcpu->arch.mmu.direct_map
1437             && vcpu->arch.mmu.root_level <= PT32_ROOT_LEVEL) {
1438                 quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level));
1439                 quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1;
1440                 role.quadrant = quadrant;
1441         }
1442         for_each_gfn_sp(vcpu->kvm, sp, gfn, node) {
1443                 if (!need_sync && sp->unsync)
1444                         need_sync = true;
1445
1446                 if (sp->role.word != role.word)
1447                         continue;
1448
1449                 if (sp->unsync && kvm_sync_page_transient(vcpu, sp))
1450                         break;
1451
1452                 mmu_page_add_parent_pte(vcpu, sp, parent_pte);
1453                 if (sp->unsync_children) {
1454                         kvm_make_request(KVM_REQ_MMU_SYNC, vcpu);
1455                         kvm_mmu_mark_parents_unsync(sp);
1456                 } else if (sp->unsync)
1457                         kvm_mmu_mark_parents_unsync(sp);
1458
1459                 trace_kvm_mmu_get_page(sp, false);
1460                 return sp;
1461         }
1462         ++vcpu->kvm->stat.mmu_cache_miss;
1463         sp = kvm_mmu_alloc_page(vcpu, parent_pte, direct);
1464         if (!sp)
1465                 return sp;
1466         sp->gfn = gfn;
1467         sp->role = role;
1468         hlist_add_head(&sp->hash_link,
1469                 &vcpu->kvm->arch.mmu_page_hash[kvm_page_table_hashfn(gfn)]);
1470         if (!direct) {
1471                 if (rmap_write_protect(vcpu->kvm, gfn))
1472                         kvm_flush_remote_tlbs(vcpu->kvm);
1473                 if (level > PT_PAGE_TABLE_LEVEL && need_sync)
1474                         kvm_sync_pages(vcpu, gfn);
1475
1476                 account_shadowed(vcpu->kvm, gfn);
1477         }
1478         if (shadow_trap_nonpresent_pte != shadow_notrap_nonpresent_pte)
1479                 vcpu->arch.mmu.prefetch_page(vcpu, sp);
1480         else
1481                 nonpaging_prefetch_page(vcpu, sp);
1482         trace_kvm_mmu_get_page(sp, true);
1483         return sp;
1484 }
1485
1486 static void shadow_walk_init(struct kvm_shadow_walk_iterator *iterator,
1487                              struct kvm_vcpu *vcpu, u64 addr)
1488 {
1489         iterator->addr = addr;
1490         iterator->shadow_addr = vcpu->arch.mmu.root_hpa;
1491         iterator->level = vcpu->arch.mmu.shadow_root_level;
1492
1493         if (iterator->level == PT64_ROOT_LEVEL &&
1494             vcpu->arch.mmu.root_level < PT64_ROOT_LEVEL &&
1495             !vcpu->arch.mmu.direct_map)
1496                 --iterator->level;
1497
1498         if (iterator->level == PT32E_ROOT_LEVEL) {
1499                 iterator->shadow_addr
1500                         = vcpu->arch.mmu.pae_root[(addr >> 30) & 3];
1501                 iterator->shadow_addr &= PT64_BASE_ADDR_MASK;
1502                 --iterator->level;
1503                 if (!iterator->shadow_addr)
1504                         iterator->level = 0;
1505         }
1506 }
1507
1508 static bool shadow_walk_okay(struct kvm_shadow_walk_iterator *iterator)
1509 {
1510         if (iterator->level < PT_PAGE_TABLE_LEVEL)
1511                 return false;
1512
1513         if (iterator->level == PT_PAGE_TABLE_LEVEL)
1514                 if (is_large_pte(*iterator->sptep))
1515                         return false;
1516
1517         iterator->index = SHADOW_PT_INDEX(iterator->addr, iterator->level);
1518         iterator->sptep = ((u64 *)__va(iterator->shadow_addr)) + iterator->index;
1519         return true;
1520 }
1521
1522 static void shadow_walk_next(struct kvm_shadow_walk_iterator *iterator)
1523 {
1524         iterator->shadow_addr = *iterator->sptep & PT64_BASE_ADDR_MASK;
1525         --iterator->level;
1526 }
1527
1528 static void link_shadow_page(u64 *sptep, struct kvm_mmu_page *sp)
1529 {
1530         u64 spte;
1531
1532         spte = __pa(sp->spt)
1533                 | PT_PRESENT_MASK | PT_ACCESSED_MASK
1534                 | PT_WRITABLE_MASK | PT_USER_MASK;
1535         __set_spte(sptep, spte);
1536 }
1537
1538 static void drop_large_spte(struct kvm_vcpu *vcpu, u64 *sptep)
1539 {
1540         if (is_large_pte(*sptep)) {
1541                 drop_spte(vcpu->kvm, sptep, shadow_trap_nonpresent_pte);
1542                 kvm_flush_remote_tlbs(vcpu->kvm);
1543         }
1544 }
1545
1546 static void validate_direct_spte(struct kvm_vcpu *vcpu, u64 *sptep,
1547                                    unsigned direct_access)
1548 {
1549         if (is_shadow_present_pte(*sptep) && !is_large_pte(*sptep)) {
1550                 struct kvm_mmu_page *child;
1551
1552                 /*
1553                  * For the direct sp, if the guest pte's dirty bit
1554                  * changed form clean to dirty, it will corrupt the
1555                  * sp's access: allow writable in the read-only sp,
1556                  * so we should update the spte at this point to get
1557                  * a new sp with the correct access.
1558                  */
1559                 child = page_header(*sptep & PT64_BASE_ADDR_MASK);
1560                 if (child->role.access == direct_access)
1561                         return;
1562
1563                 mmu_page_remove_parent_pte(child, sptep);
1564                 __set_spte(sptep, shadow_trap_nonpresent_pte);
1565                 kvm_flush_remote_tlbs(vcpu->kvm);
1566         }
1567 }
1568
1569 static void kvm_mmu_page_unlink_children(struct kvm *kvm,
1570                                          struct kvm_mmu_page *sp)
1571 {
1572         unsigned i;
1573         u64 *pt;
1574         u64 ent;
1575
1576         pt = sp->spt;
1577
1578         for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1579                 ent = pt[i];
1580
1581                 if (is_shadow_present_pte(ent)) {
1582                         if (!is_last_spte(ent, sp->role.level)) {
1583                                 ent &= PT64_BASE_ADDR_MASK;
1584                                 mmu_page_remove_parent_pte(page_header(ent),
1585                                                            &pt[i]);
1586                         } else {
1587                                 if (is_large_pte(ent))
1588                                         --kvm->stat.lpages;
1589                                 drop_spte(kvm, &pt[i],
1590                                           shadow_trap_nonpresent_pte);
1591                         }
1592                 }
1593                 pt[i] = shadow_trap_nonpresent_pte;
1594         }
1595 }
1596
1597 static void kvm_mmu_put_page(struct kvm_mmu_page *sp, u64 *parent_pte)
1598 {
1599         mmu_page_remove_parent_pte(sp, parent_pte);
1600 }
1601
1602 static void kvm_mmu_reset_last_pte_updated(struct kvm *kvm)
1603 {
1604         int i;
1605         struct kvm_vcpu *vcpu;
1606
1607         kvm_for_each_vcpu(i, vcpu, kvm)
1608                 vcpu->arch.last_pte_updated = NULL;
1609 }
1610
1611 static void kvm_mmu_unlink_parents(struct kvm *kvm, struct kvm_mmu_page *sp)
1612 {
1613         u64 *parent_pte;
1614
1615         while ((parent_pte = pte_list_next(&sp->parent_ptes, NULL))) {
1616                 kvm_mmu_put_page(sp, parent_pte);
1617                 __set_spte(parent_pte, shadow_trap_nonpresent_pte);
1618         }
1619 }
1620
1621 static int mmu_zap_unsync_children(struct kvm *kvm,
1622                                    struct kvm_mmu_page *parent,
1623                                    struct list_head *invalid_list)
1624 {
1625         int i, zapped = 0;
1626         struct mmu_page_path parents;
1627         struct kvm_mmu_pages pages;
1628
1629         if (parent->role.level == PT_PAGE_TABLE_LEVEL)
1630                 return 0;
1631
1632         kvm_mmu_pages_init(parent, &parents, &pages);
1633         while (mmu_unsync_walk(parent, &pages)) {
1634                 struct kvm_mmu_page *sp;
1635
1636                 for_each_sp(pages, sp, parents, i) {
1637                         kvm_mmu_prepare_zap_page(kvm, sp, invalid_list);
1638                         mmu_pages_clear_parents(&parents);
1639                         zapped++;
1640                 }
1641                 kvm_mmu_pages_init(parent, &parents, &pages);
1642         }
1643
1644         return zapped;
1645 }
1646
1647 static int kvm_mmu_prepare_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp,
1648                                     struct list_head *invalid_list)
1649 {
1650         int ret;
1651
1652         trace_kvm_mmu_prepare_zap_page(sp);
1653         ++kvm->stat.mmu_shadow_zapped;
1654         ret = mmu_zap_unsync_children(kvm, sp, invalid_list);
1655         kvm_mmu_page_unlink_children(kvm, sp);
1656         kvm_mmu_unlink_parents(kvm, sp);
1657         if (!sp->role.invalid && !sp->role.direct)
1658                 unaccount_shadowed(kvm, sp->gfn);
1659         if (sp->unsync)
1660                 kvm_unlink_unsync_page(kvm, sp);
1661         if (!sp->root_count) {
1662                 /* Count self */
1663                 ret++;
1664                 list_move(&sp->link, invalid_list);
1665         } else {
1666                 list_move(&sp->link, &kvm->arch.active_mmu_pages);
1667                 kvm_reload_remote_mmus(kvm);
1668         }
1669
1670         sp->role.invalid = 1;
1671         kvm_mmu_reset_last_pte_updated(kvm);
1672         return ret;
1673 }
1674
1675 static void kvm_mmu_commit_zap_page(struct kvm *kvm,
1676                                     struct list_head *invalid_list)
1677 {
1678         struct kvm_mmu_page *sp;
1679
1680         if (list_empty(invalid_list))
1681                 return;
1682
1683         kvm_flush_remote_tlbs(kvm);
1684
1685         do {
1686                 sp = list_first_entry(invalid_list, struct kvm_mmu_page, link);
1687                 WARN_ON(!sp->role.invalid || sp->root_count);
1688                 kvm_mmu_free_page(kvm, sp);
1689         } while (!list_empty(invalid_list));
1690
1691 }
1692
1693 /*
1694  * Changing the number of mmu pages allocated to the vm
1695  * Note: if goal_nr_mmu_pages is too small, you will get dead lock
1696  */
1697 void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int goal_nr_mmu_pages)
1698 {
1699         LIST_HEAD(invalid_list);
1700         /*
1701          * If we set the number of mmu pages to be smaller be than the
1702          * number of actived pages , we must to free some mmu pages before we
1703          * change the value
1704          */
1705
1706         if (kvm->arch.n_used_mmu_pages > goal_nr_mmu_pages) {
1707                 while (kvm->arch.n_used_mmu_pages > goal_nr_mmu_pages &&
1708                         !list_empty(&kvm->arch.active_mmu_pages)) {
1709                         struct kvm_mmu_page *page;
1710
1711                         page = container_of(kvm->arch.active_mmu_pages.prev,
1712                                             struct kvm_mmu_page, link);
1713                         kvm_mmu_prepare_zap_page(kvm, page, &invalid_list);
1714                         kvm_mmu_commit_zap_page(kvm, &invalid_list);
1715                 }
1716                 goal_nr_mmu_pages = kvm->arch.n_used_mmu_pages;
1717         }
1718
1719         kvm->arch.n_max_mmu_pages = goal_nr_mmu_pages;
1720 }
1721
1722 static int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn)
1723 {
1724         struct kvm_mmu_page *sp;
1725         struct hlist_node *node;
1726         LIST_HEAD(invalid_list);
1727         int r;
1728
1729         pgprintk("%s: looking for gfn %llx\n", __func__, gfn);
1730         r = 0;
1731
1732         for_each_gfn_indirect_valid_sp(kvm, sp, gfn, node) {
1733                 pgprintk("%s: gfn %llx role %x\n", __func__, gfn,
1734                          sp->role.word);
1735                 r = 1;
1736                 kvm_mmu_prepare_zap_page(kvm, sp, &invalid_list);
1737         }
1738         kvm_mmu_commit_zap_page(kvm, &invalid_list);
1739         return r;
1740 }
1741
1742 static void mmu_unshadow(struct kvm *kvm, gfn_t gfn)
1743 {
1744         struct kvm_mmu_page *sp;
1745         struct hlist_node *node;
1746         LIST_HEAD(invalid_list);
1747
1748         for_each_gfn_indirect_valid_sp(kvm, sp, gfn, node) {
1749                 pgprintk("%s: zap %llx %x\n",
1750                          __func__, gfn, sp->role.word);
1751                 kvm_mmu_prepare_zap_page(kvm, sp, &invalid_list);
1752         }
1753         kvm_mmu_commit_zap_page(kvm, &invalid_list);
1754 }
1755
1756 static void page_header_update_slot(struct kvm *kvm, void *pte, gfn_t gfn)
1757 {
1758         int slot = memslot_id(kvm, gfn);
1759         struct kvm_mmu_page *sp = page_header(__pa(pte));
1760
1761         __set_bit(slot, sp->slot_bitmap);
1762 }
1763
1764 static void mmu_convert_notrap(struct kvm_mmu_page *sp)
1765 {
1766         int i;
1767         u64 *pt = sp->spt;
1768
1769         if (shadow_trap_nonpresent_pte == shadow_notrap_nonpresent_pte)
1770                 return;
1771
1772         for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1773                 if (pt[i] == shadow_notrap_nonpresent_pte)
1774                         __set_spte(&pt[i], shadow_trap_nonpresent_pte);
1775         }
1776 }
1777
1778 /*
1779  * The function is based on mtrr_type_lookup() in
1780  * arch/x86/kernel/cpu/mtrr/generic.c
1781  */
1782 static int get_mtrr_type(struct mtrr_state_type *mtrr_state,
1783                          u64 start, u64 end)
1784 {
1785         int i;
1786         u64 base, mask;
1787         u8 prev_match, curr_match;
1788         int num_var_ranges = KVM_NR_VAR_MTRR;
1789
1790         if (!mtrr_state->enabled)
1791                 return 0xFF;
1792
1793         /* Make end inclusive end, instead of exclusive */
1794         end--;
1795
1796         /* Look in fixed ranges. Just return the type as per start */
1797         if (mtrr_state->have_fixed && (start < 0x100000)) {
1798                 int idx;
1799
1800                 if (start < 0x80000) {
1801                         idx = 0;
1802                         idx += (start >> 16);
1803                         return mtrr_state->fixed_ranges[idx];
1804                 } else if (start < 0xC0000) {
1805                         idx = 1 * 8;
1806                         idx += ((start - 0x80000) >> 14);
1807                         return mtrr_state->fixed_ranges[idx];
1808                 } else if (start < 0x1000000) {
1809                         idx = 3 * 8;
1810                         idx += ((start - 0xC0000) >> 12);
1811                         return mtrr_state->fixed_ranges[idx];
1812                 }
1813         }
1814
1815         /*
1816          * Look in variable ranges
1817          * Look of multiple ranges matching this address and pick type
1818          * as per MTRR precedence
1819          */
1820         if (!(mtrr_state->enabled & 2))
1821                 return mtrr_state->def_type;
1822
1823         prev_match = 0xFF;
1824         for (i = 0; i < num_var_ranges; ++i) {
1825                 unsigned short start_state, end_state;
1826
1827                 if (!(mtrr_state->var_ranges[i].mask_lo & (1 << 11)))
1828                         continue;
1829
1830                 base = (((u64)mtrr_state->var_ranges[i].base_hi) << 32) +
1831                        (mtrr_state->var_ranges[i].base_lo & PAGE_MASK);
1832                 mask = (((u64)mtrr_state->var_ranges[i].mask_hi) << 32) +
1833                        (mtrr_state->var_ranges[i].mask_lo & PAGE_MASK);
1834
1835                 start_state = ((start & mask) == (base & mask));
1836                 end_state = ((end & mask) == (base & mask));
1837                 if (start_state != end_state)
1838                         return 0xFE;
1839
1840                 if ((start & mask) != (base & mask))
1841                         continue;
1842
1843                 curr_match = mtrr_state->var_ranges[i].base_lo & 0xff;
1844                 if (prev_match == 0xFF) {
1845                         prev_match = curr_match;
1846                         continue;
1847                 }
1848
1849                 if (prev_match == MTRR_TYPE_UNCACHABLE ||
1850                     curr_match == MTRR_TYPE_UNCACHABLE)
1851                         return MTRR_TYPE_UNCACHABLE;
1852
1853                 if ((prev_match == MTRR_TYPE_WRBACK &&
1854                      curr_match == MTRR_TYPE_WRTHROUGH) ||
1855                     (prev_match == MTRR_TYPE_WRTHROUGH &&
1856                      curr_match == MTRR_TYPE_WRBACK)) {
1857                         prev_match = MTRR_TYPE_WRTHROUGH;
1858                         curr_match = MTRR_TYPE_WRTHROUGH;
1859                 }
1860
1861                 if (prev_match != curr_match)
1862                         return MTRR_TYPE_UNCACHABLE;
1863         }
1864
1865         if (prev_match != 0xFF)
1866                 return prev_match;
1867
1868         return mtrr_state->def_type;
1869 }
1870
1871 u8 kvm_get_guest_memory_type(struct kvm_vcpu *vcpu, gfn_t gfn)
1872 {
1873         u8 mtrr;
1874
1875         mtrr = get_mtrr_type(&vcpu->arch.mtrr_state, gfn << PAGE_SHIFT,
1876                              (gfn << PAGE_SHIFT) + PAGE_SIZE);
1877         if (mtrr == 0xfe || mtrr == 0xff)
1878                 mtrr = MTRR_TYPE_WRBACK;
1879         return mtrr;
1880 }
1881 EXPORT_SYMBOL_GPL(kvm_get_guest_memory_type);
1882
1883 static void __kvm_unsync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
1884 {
1885         trace_kvm_mmu_unsync_page(sp);
1886         ++vcpu->kvm->stat.mmu_unsync;
1887         sp->unsync = 1;
1888
1889         kvm_mmu_mark_parents_unsync(sp);
1890         mmu_convert_notrap(sp);
1891 }
1892
1893 static void kvm_unsync_pages(struct kvm_vcpu *vcpu,  gfn_t gfn)
1894 {
1895         struct kvm_mmu_page *s;
1896         struct hlist_node *node;
1897
1898         for_each_gfn_indirect_valid_sp(vcpu->kvm, s, gfn, node) {
1899                 if (s->unsync)
1900                         continue;
1901                 WARN_ON(s->role.level != PT_PAGE_TABLE_LEVEL);
1902                 __kvm_unsync_page(vcpu, s);
1903         }
1904 }
1905
1906 static int mmu_need_write_protect(struct kvm_vcpu *vcpu, gfn_t gfn,
1907                                   bool can_unsync)
1908 {
1909         struct kvm_mmu_page *s;
1910         struct hlist_node *node;
1911         bool need_unsync = false;
1912
1913         for_each_gfn_indirect_valid_sp(vcpu->kvm, s, gfn, node) {
1914                 if (!can_unsync)
1915                         return 1;
1916
1917                 if (s->role.level != PT_PAGE_TABLE_LEVEL)
1918                         return 1;
1919
1920                 if (!need_unsync && !s->unsync) {
1921                         if (!oos_shadow)
1922                                 return 1;
1923                         need_unsync = true;
1924                 }
1925         }
1926         if (need_unsync)
1927                 kvm_unsync_pages(vcpu, gfn);
1928         return 0;
1929 }
1930
1931 static int set_spte(struct kvm_vcpu *vcpu, u64 *sptep,
1932                     unsigned pte_access, int user_fault,
1933                     int write_fault, int dirty, int level,
1934                     gfn_t gfn, pfn_t pfn, bool speculative,
1935                     bool can_unsync, bool host_writable)
1936 {
1937         u64 spte, entry = *sptep;
1938         int ret = 0;
1939
1940         /*
1941          * We don't set the accessed bit, since we sometimes want to see
1942          * whether the guest actually used the pte (in order to detect
1943          * demand paging).
1944          */
1945         spte = PT_PRESENT_MASK;
1946         if (!speculative)
1947                 spte |= shadow_accessed_mask;
1948         if (!dirty)
1949                 pte_access &= ~ACC_WRITE_MASK;
1950         if (pte_access & ACC_EXEC_MASK)
1951                 spte |= shadow_x_mask;
1952         else
1953                 spte |= shadow_nx_mask;
1954         if (pte_access & ACC_USER_MASK)
1955                 spte |= shadow_user_mask;
1956         if (level > PT_PAGE_TABLE_LEVEL)
1957                 spte |= PT_PAGE_SIZE_MASK;
1958         if (tdp_enabled)
1959                 spte |= kvm_x86_ops->get_mt_mask(vcpu, gfn,
1960                         kvm_is_mmio_pfn(pfn));
1961
1962         if (host_writable)
1963                 spte |= SPTE_HOST_WRITEABLE;
1964         else
1965                 pte_access &= ~ACC_WRITE_MASK;
1966
1967         spte |= (u64)pfn << PAGE_SHIFT;
1968
1969         if ((pte_access & ACC_WRITE_MASK)
1970             || (!vcpu->arch.mmu.direct_map && write_fault
1971                 && !is_write_protection(vcpu) && !user_fault)) {
1972
1973                 if (level > PT_PAGE_TABLE_LEVEL &&
1974                     has_wrprotected_page(vcpu->kvm, gfn, level)) {
1975                         ret = 1;
1976                         drop_spte(vcpu->kvm, sptep, shadow_trap_nonpresent_pte);
1977                         goto done;
1978                 }
1979
1980                 spte |= PT_WRITABLE_MASK;
1981
1982                 if (!vcpu->arch.mmu.direct_map
1983                     && !(pte_access & ACC_WRITE_MASK))
1984                         spte &= ~PT_USER_MASK;
1985
1986                 /*
1987                  * Optimization: for pte sync, if spte was writable the hash
1988                  * lookup is unnecessary (and expensive). Write protection
1989                  * is responsibility of mmu_get_page / kvm_sync_page.
1990                  * Same reasoning can be applied to dirty page accounting.
1991                  */
1992                 if (!can_unsync && is_writable_pte(*sptep))
1993                         goto set_pte;
1994
1995                 if (mmu_need_write_protect(vcpu, gfn, can_unsync)) {
1996                         pgprintk("%s: found shadow page for %llx, marking ro\n",
1997                                  __func__, gfn);
1998                         ret = 1;
1999                         pte_access &= ~ACC_WRITE_MASK;
2000                         if (is_writable_pte(spte))
2001                                 spte &= ~PT_WRITABLE_MASK;
2002                 }
2003         }
2004
2005         if (pte_access & ACC_WRITE_MASK)
2006                 mark_page_dirty(vcpu->kvm, gfn);
2007
2008 set_pte:
2009         update_spte(sptep, spte);
2010         /*
2011          * If we overwrite a writable spte with a read-only one we
2012          * should flush remote TLBs. Otherwise rmap_write_protect
2013          * will find a read-only spte, even though the writable spte
2014          * might be cached on a CPU's TLB.
2015          */
2016         if (is_writable_pte(entry) && !is_writable_pte(*sptep))
2017                 kvm_flush_remote_tlbs(vcpu->kvm);
2018 done:
2019         return ret;
2020 }
2021
2022 static void mmu_set_spte(struct kvm_vcpu *vcpu, u64 *sptep,
2023                          unsigned pt_access, unsigned pte_access,
2024                          int user_fault, int write_fault, int dirty,
2025                          int *ptwrite, int level, gfn_t gfn,
2026                          pfn_t pfn, bool speculative,
2027                          bool host_writable)
2028 {
2029         int was_rmapped = 0;
2030         int rmap_count;
2031
2032         pgprintk("%s: spte %llx access %x write_fault %d"
2033                  " user_fault %d gfn %llx\n",
2034                  __func__, *sptep, pt_access,
2035                  write_fault, user_fault, gfn);
2036
2037         if (is_rmap_spte(*sptep)) {
2038                 /*
2039                  * If we overwrite a PTE page pointer with a 2MB PMD, unlink
2040                  * the parent of the now unreachable PTE.
2041                  */
2042                 if (level > PT_PAGE_TABLE_LEVEL &&
2043                     !is_large_pte(*sptep)) {
2044                         struct kvm_mmu_page *child;
2045                         u64 pte = *sptep;
2046
2047                         child = page_header(pte & PT64_BASE_ADDR_MASK);
2048                         mmu_page_remove_parent_pte(child, sptep);
2049                         __set_spte(sptep, shadow_trap_nonpresent_pte);
2050                         kvm_flush_remote_tlbs(vcpu->kvm);
2051                 } else if (pfn != spte_to_pfn(*sptep)) {
2052                         pgprintk("hfn old %llx new %llx\n",
2053                                  spte_to_pfn(*sptep), pfn);
2054                         drop_spte(vcpu->kvm, sptep, shadow_trap_nonpresent_pte);
2055                         kvm_flush_remote_tlbs(vcpu->kvm);
2056                 } else
2057                         was_rmapped = 1;
2058         }
2059
2060         if (set_spte(vcpu, sptep, pte_access, user_fault, write_fault,
2061                       dirty, level, gfn, pfn, speculative, true,
2062                       host_writable)) {
2063                 if (write_fault)
2064                         *ptwrite = 1;
2065                 kvm_mmu_flush_tlb(vcpu);
2066         }
2067
2068         pgprintk("%s: setting spte %llx\n", __func__, *sptep);
2069         pgprintk("instantiating %s PTE (%s) at %llx (%llx) addr %p\n",
2070                  is_large_pte(*sptep)? "2MB" : "4kB",
2071                  *sptep & PT_PRESENT_MASK ?"RW":"R", gfn,
2072                  *sptep, sptep);
2073         if (!was_rmapped && is_large_pte(*sptep))
2074                 ++vcpu->kvm->stat.lpages;
2075
2076         page_header_update_slot(vcpu->kvm, sptep, gfn);
2077         if (!was_rmapped) {
2078                 rmap_count = rmap_add(vcpu, sptep, gfn);
2079                 if (rmap_count > RMAP_RECYCLE_THRESHOLD)
2080                         rmap_recycle(vcpu, sptep, gfn);
2081         }
2082         kvm_release_pfn_clean(pfn);
2083         if (speculative) {
2084                 vcpu->arch.last_pte_updated = sptep;
2085                 vcpu->arch.last_pte_gfn = gfn;
2086         }
2087 }
2088
2089 static void nonpaging_new_cr3(struct kvm_vcpu *vcpu)
2090 {
2091 }
2092
2093 static pfn_t pte_prefetch_gfn_to_pfn(struct kvm_vcpu *vcpu, gfn_t gfn,
2094                                      bool no_dirty_log)
2095 {
2096         struct kvm_memory_slot *slot;
2097         unsigned long hva;
2098
2099         slot = gfn_to_memslot_dirty_bitmap(vcpu, gfn, no_dirty_log);
2100         if (!slot) {
2101                 get_page(bad_page);
2102                 return page_to_pfn(bad_page);
2103         }
2104
2105         hva = gfn_to_hva_memslot(slot, gfn);
2106
2107         return hva_to_pfn_atomic(vcpu->kvm, hva);
2108 }
2109
2110 static int direct_pte_prefetch_many(struct kvm_vcpu *vcpu,
2111                                     struct kvm_mmu_page *sp,
2112                                     u64 *start, u64 *end)
2113 {
2114         struct page *pages[PTE_PREFETCH_NUM];
2115         unsigned access = sp->role.access;
2116         int i, ret;
2117         gfn_t gfn;
2118
2119         gfn = kvm_mmu_page_get_gfn(sp, start - sp->spt);
2120         if (!gfn_to_memslot_dirty_bitmap(vcpu, gfn, access & ACC_WRITE_MASK))
2121                 return -1;
2122
2123         ret = gfn_to_page_many_atomic(vcpu->kvm, gfn, pages, end - start);
2124         if (ret <= 0)
2125                 return -1;
2126
2127         for (i = 0; i < ret; i++, gfn++, start++)
2128                 mmu_set_spte(vcpu, start, ACC_ALL,
2129                              access, 0, 0, 1, NULL,
2130                              sp->role.level, gfn,
2131                              page_to_pfn(pages[i]), true, true);
2132
2133         return 0;
2134 }
2135
2136 static void __direct_pte_prefetch(struct kvm_vcpu *vcpu,
2137                                   struct kvm_mmu_page *sp, u64 *sptep)
2138 {
2139         u64 *spte, *start = NULL;
2140         int i;
2141
2142         WARN_ON(!sp->role.direct);
2143
2144         i = (sptep - sp->spt) & ~(PTE_PREFETCH_NUM - 1);
2145         spte = sp->spt + i;
2146
2147         for (i = 0; i < PTE_PREFETCH_NUM; i++, spte++) {
2148                 if (*spte != shadow_trap_nonpresent_pte || spte == sptep) {
2149                         if (!start)
2150                                 continue;
2151                         if (direct_pte_prefetch_many(vcpu, sp, start, spte) < 0)
2152                                 break;
2153                         start = NULL;
2154                 } else if (!start)
2155                         start = spte;
2156         }
2157 }
2158
2159 static void direct_pte_prefetch(struct kvm_vcpu *vcpu, u64 *sptep)
2160 {
2161         struct kvm_mmu_page *sp;
2162
2163         /*
2164          * Since it's no accessed bit on EPT, it's no way to
2165          * distinguish between actually accessed translations
2166          * and prefetched, so disable pte prefetch if EPT is
2167          * enabled.
2168          */
2169         if (!shadow_accessed_mask)
2170                 return;
2171
2172         sp = page_header(__pa(sptep));
2173         if (sp->role.level > PT_PAGE_TABLE_LEVEL)
2174                 return;
2175
2176         __direct_pte_prefetch(vcpu, sp, sptep);
2177 }
2178
2179 static int __direct_map(struct kvm_vcpu *vcpu, gpa_t v, int write,
2180                         int map_writable, int level, gfn_t gfn, pfn_t pfn,
2181                         bool prefault)
2182 {
2183         struct kvm_shadow_walk_iterator iterator;
2184         struct kvm_mmu_page *sp;
2185         int pt_write = 0;
2186         gfn_t pseudo_gfn;
2187
2188         for_each_shadow_entry(vcpu, (u64)gfn << PAGE_SHIFT, iterator) {
2189                 if (iterator.level == level) {
2190                         unsigned pte_access = ACC_ALL;
2191
2192                         mmu_set_spte(vcpu, iterator.sptep, ACC_ALL, pte_access,
2193                                      0, write, 1, &pt_write,
2194                                      level, gfn, pfn, prefault, map_writable);
2195                         direct_pte_prefetch(vcpu, iterator.sptep);
2196                         ++vcpu->stat.pf_fixed;
2197                         break;
2198                 }
2199
2200                 if (*iterator.sptep == shadow_trap_nonpresent_pte) {
2201                         u64 base_addr = iterator.addr;
2202
2203                         base_addr &= PT64_LVL_ADDR_MASK(iterator.level);
2204                         pseudo_gfn = base_addr >> PAGE_SHIFT;
2205                         sp = kvm_mmu_get_page(vcpu, pseudo_gfn, iterator.addr,
2206                                               iterator.level - 1,
2207                                               1, ACC_ALL, iterator.sptep);
2208                         if (!sp) {
2209                                 pgprintk("nonpaging_map: ENOMEM\n");
2210                                 kvm_release_pfn_clean(pfn);
2211                                 return -ENOMEM;
2212                         }
2213
2214                         __set_spte(iterator.sptep,
2215                                    __pa(sp->spt)
2216                                    | PT_PRESENT_MASK | PT_WRITABLE_MASK
2217                                    | shadow_user_mask | shadow_x_mask
2218                                    | shadow_accessed_mask);
2219                 }
2220         }
2221         return pt_write;
2222 }
2223
2224 static void kvm_send_hwpoison_signal(unsigned long address, struct task_struct *tsk)
2225 {
2226         siginfo_t info;
2227
2228         info.si_signo   = SIGBUS;
2229         info.si_errno   = 0;
2230         info.si_code    = BUS_MCEERR_AR;
2231         info.si_addr    = (void __user *)address;
2232         info.si_addr_lsb = PAGE_SHIFT;
2233
2234         send_sig_info(SIGBUS, &info, tsk);
2235 }
2236
2237 static int kvm_handle_bad_page(struct kvm *kvm, gfn_t gfn, pfn_t pfn)
2238 {
2239         kvm_release_pfn_clean(pfn);
2240         if (is_hwpoison_pfn(pfn)) {
2241                 kvm_send_hwpoison_signal(gfn_to_hva(kvm, gfn), current);
2242                 return 0;
2243         } else if (is_fault_pfn(pfn))
2244                 return -EFAULT;
2245
2246         return 1;
2247 }
2248
2249 static void transparent_hugepage_adjust(struct kvm_vcpu *vcpu,
2250                                         gfn_t *gfnp, pfn_t *pfnp, int *levelp)
2251 {
2252         pfn_t pfn = *pfnp;
2253         gfn_t gfn = *gfnp;
2254         int level = *levelp;
2255
2256         /*
2257          * Check if it's a transparent hugepage. If this would be an
2258          * hugetlbfs page, level wouldn't be set to
2259          * PT_PAGE_TABLE_LEVEL and there would be no adjustment done
2260          * here.
2261          */
2262         if (!is_error_pfn(pfn) && !kvm_is_mmio_pfn(pfn) &&
2263             level == PT_PAGE_TABLE_LEVEL &&
2264             PageTransCompound(pfn_to_page(pfn)) &&
2265             !has_wrprotected_page(vcpu->kvm, gfn, PT_DIRECTORY_LEVEL)) {
2266                 unsigned long mask;
2267                 /*
2268                  * mmu_notifier_retry was successful and we hold the
2269                  * mmu_lock here, so the pmd can't become splitting
2270                  * from under us, and in turn
2271                  * __split_huge_page_refcount() can't run from under
2272                  * us and we can safely transfer the refcount from
2273                  * PG_tail to PG_head as we switch the pfn to tail to
2274                  * head.
2275                  */
2276                 *levelp = level = PT_DIRECTORY_LEVEL;
2277                 mask = KVM_PAGES_PER_HPAGE(level) - 1;
2278                 VM_BUG_ON((gfn & mask) != (pfn & mask));
2279                 if (pfn & mask) {
2280                         gfn &= ~mask;
2281                         *gfnp = gfn;
2282                         kvm_release_pfn_clean(pfn);
2283                         pfn &= ~mask;
2284                         if (!get_page_unless_zero(pfn_to_page(pfn)))
2285                                 BUG();
2286                         *pfnp = pfn;
2287                 }
2288         }
2289 }
2290
2291 static bool try_async_pf(struct kvm_vcpu *vcpu, bool prefault, gfn_t gfn,
2292                          gva_t gva, pfn_t *pfn, bool write, bool *writable);
2293
2294 static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, int write, gfn_t gfn,
2295                          bool prefault)
2296 {
2297         int r;
2298         int level;
2299         int force_pt_level;
2300         pfn_t pfn;
2301         unsigned long mmu_seq;
2302         bool map_writable;
2303
2304         force_pt_level = mapping_level_dirty_bitmap(vcpu, gfn);
2305         if (likely(!force_pt_level)) {
2306                 level = mapping_level(vcpu, gfn);
2307                 /*
2308                  * This path builds a PAE pagetable - so we can map
2309                  * 2mb pages at maximum. Therefore check if the level
2310                  * is larger than that.
2311                  */
2312                 if (level > PT_DIRECTORY_LEVEL)
2313                         level = PT_DIRECTORY_LEVEL;
2314
2315                 gfn &= ~(KVM_PAGES_PER_HPAGE(level) - 1);
2316         } else
2317                 level = PT_PAGE_TABLE_LEVEL;
2318
2319         mmu_seq = vcpu->kvm->mmu_notifier_seq;
2320         smp_rmb();
2321
2322         if (try_async_pf(vcpu, prefault, gfn, v, &pfn, write, &map_writable))
2323                 return 0;
2324
2325         /* mmio */
2326         if (is_error_pfn(pfn))
2327                 return kvm_handle_bad_page(vcpu->kvm, gfn, pfn);
2328
2329         spin_lock(&vcpu->kvm->mmu_lock);
2330         if (mmu_notifier_retry(vcpu, mmu_seq))
2331                 goto out_unlock;
2332         kvm_mmu_free_some_pages(vcpu);
2333         if (likely(!force_pt_level))
2334                 transparent_hugepage_adjust(vcpu, &gfn, &pfn, &level);
2335         r = __direct_map(vcpu, v, write, map_writable, level, gfn, pfn,
2336                          prefault);
2337         spin_unlock(&vcpu->kvm->mmu_lock);
2338
2339
2340         return r;
2341
2342 out_unlock:
2343         spin_unlock(&vcpu->kvm->mmu_lock);
2344         kvm_release_pfn_clean(pfn);
2345         return 0;
2346 }
2347
2348
2349 static void mmu_free_roots(struct kvm_vcpu *vcpu)
2350 {
2351         int i;
2352         struct kvm_mmu_page *sp;
2353         LIST_HEAD(invalid_list);
2354
2355         if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
2356                 return;
2357         spin_lock(&vcpu->kvm->mmu_lock);
2358         if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL &&
2359             (vcpu->arch.mmu.root_level == PT64_ROOT_LEVEL ||
2360              vcpu->arch.mmu.direct_map)) {
2361                 hpa_t root = vcpu->arch.mmu.root_hpa;
2362
2363                 sp = page_header(root);
2364                 --sp->root_count;
2365                 if (!sp->root_count && sp->role.invalid) {
2366                         kvm_mmu_prepare_zap_page(vcpu->kvm, sp, &invalid_list);
2367                         kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
2368                 }
2369                 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
2370                 spin_unlock(&vcpu->kvm->mmu_lock);
2371                 return;
2372         }
2373         for (i = 0; i < 4; ++i) {
2374                 hpa_t root = vcpu->arch.mmu.pae_root[i];
2375
2376                 if (root) {
2377                         root &= PT64_BASE_ADDR_MASK;
2378                         sp = page_header(root);
2379                         --sp->root_count;
2380                         if (!sp->root_count && sp->role.invalid)
2381                                 kvm_mmu_prepare_zap_page(vcpu->kvm, sp,
2382                                                          &invalid_list);
2383                 }
2384                 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
2385         }
2386         kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
2387         spin_unlock(&vcpu->kvm->mmu_lock);
2388         vcpu->arch.mmu.root_hpa = INVALID_PAGE;
2389 }
2390
2391 static int mmu_check_root(struct kvm_vcpu *vcpu, gfn_t root_gfn)
2392 {
2393         int ret = 0;
2394
2395         if (!kvm_is_visible_gfn(vcpu->kvm, root_gfn)) {
2396                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
2397                 ret = 1;
2398         }
2399
2400         return ret;
2401 }
2402
2403 static int mmu_alloc_direct_roots(struct kvm_vcpu *vcpu)
2404 {
2405         struct kvm_mmu_page *sp;
2406         unsigned i;
2407
2408         if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2409                 spin_lock(&vcpu->kvm->mmu_lock);
2410                 kvm_mmu_free_some_pages(vcpu);
2411                 sp = kvm_mmu_get_page(vcpu, 0, 0, PT64_ROOT_LEVEL,
2412                                       1, ACC_ALL, NULL);
2413                 ++sp->root_count;
2414                 spin_unlock(&vcpu->kvm->mmu_lock);
2415                 vcpu->arch.mmu.root_hpa = __pa(sp->spt);
2416         } else if (vcpu->arch.mmu.shadow_root_level == PT32E_ROOT_LEVEL) {
2417                 for (i = 0; i < 4; ++i) {
2418                         hpa_t root = vcpu->arch.mmu.pae_root[i];
2419
2420                         ASSERT(!VALID_PAGE(root));
2421                         spin_lock(&vcpu->kvm->mmu_lock);
2422                         kvm_mmu_free_some_pages(vcpu);
2423                         sp = kvm_mmu_get_page(vcpu, i << (30 - PAGE_SHIFT),
2424                                               i << 30,
2425                                               PT32_ROOT_LEVEL, 1, ACC_ALL,
2426                                               NULL);
2427                         root = __pa(sp->spt);
2428                         ++sp->root_count;
2429                         spin_unlock(&vcpu->kvm->mmu_lock);
2430                         vcpu->arch.mmu.pae_root[i] = root | PT_PRESENT_MASK;
2431                 }
2432                 vcpu->arch.mmu.root_hpa = __pa(vcpu->arch.mmu.pae_root);
2433         } else
2434                 BUG();
2435
2436         return 0;
2437 }
2438
2439 static int mmu_alloc_shadow_roots(struct kvm_vcpu *vcpu)
2440 {
2441         struct kvm_mmu_page *sp;
2442         u64 pdptr, pm_mask;
2443         gfn_t root_gfn;
2444         int i;
2445
2446         root_gfn = vcpu->arch.mmu.get_cr3(vcpu) >> PAGE_SHIFT;
2447
2448         if (mmu_check_root(vcpu, root_gfn))
2449                 return 1;
2450
2451         /*
2452          * Do we shadow a long mode page table? If so we need to
2453          * write-protect the guests page table root.
2454          */
2455         if (vcpu->arch.mmu.root_level == PT64_ROOT_LEVEL) {
2456                 hpa_t root = vcpu->arch.mmu.root_hpa;
2457
2458                 ASSERT(!VALID_PAGE(root));
2459
2460                 spin_lock(&vcpu->kvm->mmu_lock);
2461                 kvm_mmu_free_some_pages(vcpu);
2462                 sp = kvm_mmu_get_page(vcpu, root_gfn, 0, PT64_ROOT_LEVEL,
2463                                       0, ACC_ALL, NULL);
2464                 root = __pa(sp->spt);
2465                 ++sp->root_count;
2466                 spin_unlock(&vcpu->kvm->mmu_lock);
2467                 vcpu->arch.mmu.root_hpa = root;
2468                 return 0;
2469         }
2470
2471         /*
2472          * We shadow a 32 bit page table. This may be a legacy 2-level
2473          * or a PAE 3-level page table. In either case we need to be aware that
2474          * the shadow page table may be a PAE or a long mode page table.
2475          */
2476         pm_mask = PT_PRESENT_MASK;
2477         if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL)
2478                 pm_mask |= PT_ACCESSED_MASK | PT_WRITABLE_MASK | PT_USER_MASK;
2479
2480         for (i = 0; i < 4; ++i) {
2481                 hpa_t root = vcpu->arch.mmu.pae_root[i];
2482
2483                 ASSERT(!VALID_PAGE(root));
2484                 if (vcpu->arch.mmu.root_level == PT32E_ROOT_LEVEL) {
2485                         pdptr = kvm_pdptr_read_mmu(vcpu, &vcpu->arch.mmu, i);
2486                         if (!is_present_gpte(pdptr)) {
2487                                 vcpu->arch.mmu.pae_root[i] = 0;
2488                                 continue;
2489                         }
2490                         root_gfn = pdptr >> PAGE_SHIFT;
2491                         if (mmu_check_root(vcpu, root_gfn))
2492                                 return 1;
2493                 }
2494                 spin_lock(&vcpu->kvm->mmu_lock);
2495                 kvm_mmu_free_some_pages(vcpu);
2496                 sp = kvm_mmu_get_page(vcpu, root_gfn, i << 30,
2497                                       PT32_ROOT_LEVEL, 0,
2498                                       ACC_ALL, NULL);
2499                 root = __pa(sp->spt);
2500                 ++sp->root_count;
2501                 spin_unlock(&vcpu->kvm->mmu_lock);
2502
2503                 vcpu->arch.mmu.pae_root[i] = root | pm_mask;
2504         }
2505         vcpu->arch.mmu.root_hpa = __pa(vcpu->arch.mmu.pae_root);
2506
2507         /*
2508          * If we shadow a 32 bit page table with a long mode page
2509          * table we enter this path.
2510          */
2511         if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2512                 if (vcpu->arch.mmu.lm_root == NULL) {
2513                         /*
2514                          * The additional page necessary for this is only
2515                          * allocated on demand.
2516                          */
2517
2518                         u64 *lm_root;
2519
2520                         lm_root = (void*)get_zeroed_page(GFP_KERNEL);
2521                         if (lm_root == NULL)
2522                                 return 1;
2523
2524                         lm_root[0] = __pa(vcpu->arch.mmu.pae_root) | pm_mask;
2525
2526                         vcpu->arch.mmu.lm_root = lm_root;
2527                 }
2528
2529                 vcpu->arch.mmu.root_hpa = __pa(vcpu->arch.mmu.lm_root);
2530         }
2531
2532         return 0;
2533 }
2534
2535 static int mmu_alloc_roots(struct kvm_vcpu *vcpu)
2536 {
2537         if (vcpu->arch.mmu.direct_map)
2538                 return mmu_alloc_direct_roots(vcpu);
2539         else
2540                 return mmu_alloc_shadow_roots(vcpu);
2541 }
2542
2543 static void mmu_sync_roots(struct kvm_vcpu *vcpu)
2544 {
2545         int i;
2546         struct kvm_mmu_page *sp;
2547
2548         if (vcpu->arch.mmu.direct_map)
2549                 return;
2550
2551         if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
2552                 return;
2553
2554         trace_kvm_mmu_audit(vcpu, AUDIT_PRE_SYNC);
2555         if (vcpu->arch.mmu.root_level == PT64_ROOT_LEVEL) {
2556                 hpa_t root = vcpu->arch.mmu.root_hpa;
2557                 sp = page_header(root);
2558                 mmu_sync_children(vcpu, sp);
2559                 trace_kvm_mmu_audit(vcpu, AUDIT_POST_SYNC);
2560                 return;
2561         }
2562         for (i = 0; i < 4; ++i) {
2563                 hpa_t root = vcpu->arch.mmu.pae_root[i];
2564
2565                 if (root && VALID_PAGE(root)) {
2566                         root &= PT64_BASE_ADDR_MASK;
2567                         sp = page_header(root);
2568                         mmu_sync_children(vcpu, sp);
2569                 }
2570         }
2571         trace_kvm_mmu_audit(vcpu, AUDIT_POST_SYNC);
2572 }
2573
2574 void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu)
2575 {
2576         spin_lock(&vcpu->kvm->mmu_lock);
2577         mmu_sync_roots(vcpu);
2578         spin_unlock(&vcpu->kvm->mmu_lock);
2579 }
2580
2581 static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr,
2582                                   u32 access, struct x86_exception *exception)
2583 {
2584         if (exception)
2585                 exception->error_code = 0;
2586         return vaddr;
2587 }
2588
2589 static gpa_t nonpaging_gva_to_gpa_nested(struct kvm_vcpu *vcpu, gva_t vaddr,
2590                                          u32 access,
2591                                          struct x86_exception *exception)
2592 {
2593         if (exception)
2594                 exception->error_code = 0;
2595         return vcpu->arch.nested_mmu.translate_gpa(vcpu, vaddr, access);
2596 }
2597
2598 static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
2599                                 u32 error_code, bool prefault)
2600 {
2601         gfn_t gfn;
2602         int r;
2603
2604         pgprintk("%s: gva %lx error %x\n", __func__, gva, error_code);
2605         r = mmu_topup_memory_caches(vcpu);
2606         if (r)
2607                 return r;
2608
2609         ASSERT(vcpu);
2610         ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
2611
2612         gfn = gva >> PAGE_SHIFT;
2613
2614         return nonpaging_map(vcpu, gva & PAGE_MASK,
2615                              error_code & PFERR_WRITE_MASK, gfn, prefault);
2616 }
2617
2618 static int kvm_arch_setup_async_pf(struct kvm_vcpu *vcpu, gva_t gva, gfn_t gfn)
2619 {
2620         struct kvm_arch_async_pf arch;
2621
2622         arch.token = (vcpu->arch.apf.id++ << 12) | vcpu->vcpu_id;
2623         arch.gfn = gfn;
2624         arch.direct_map = vcpu->arch.mmu.direct_map;
2625         arch.cr3 = vcpu->arch.mmu.get_cr3(vcpu);
2626
2627         return kvm_setup_async_pf(vcpu, gva, gfn, &arch);
2628 }
2629
2630 static bool can_do_async_pf(struct kvm_vcpu *vcpu)
2631 {
2632         if (unlikely(!irqchip_in_kernel(vcpu->kvm) ||
2633                      kvm_event_needs_reinjection(vcpu)))
2634                 return false;
2635
2636         return kvm_x86_ops->interrupt_allowed(vcpu);
2637 }
2638
2639 static bool try_async_pf(struct kvm_vcpu *vcpu, bool prefault, gfn_t gfn,
2640                          gva_t gva, pfn_t *pfn, bool write, bool *writable)
2641 {
2642         bool async;
2643
2644         *pfn = gfn_to_pfn_async(vcpu->kvm, gfn, &async, write, writable);
2645
2646         if (!async)
2647                 return false; /* *pfn has correct page already */
2648
2649         put_page(pfn_to_page(*pfn));
2650
2651         if (!prefault && can_do_async_pf(vcpu)) {
2652                 trace_kvm_try_async_get_page(gva, gfn);
2653                 if (kvm_find_async_pf_gfn(vcpu, gfn)) {
2654                         trace_kvm_async_pf_doublefault(gva, gfn);
2655                         kvm_make_request(KVM_REQ_APF_HALT, vcpu);
2656                         return true;
2657                 } else if (kvm_arch_setup_async_pf(vcpu, gva, gfn))
2658                         return true;
2659         }
2660
2661         *pfn = gfn_to_pfn_prot(vcpu->kvm, gfn, write, writable);
2662
2663         return false;
2664 }
2665
2666 static int tdp_page_fault(struct kvm_vcpu *vcpu, gva_t gpa, u32 error_code,
2667                           bool prefault)
2668 {
2669         pfn_t pfn;
2670         int r;
2671         int level;
2672         int force_pt_level;
2673         gfn_t gfn = gpa >> PAGE_SHIFT;
2674         unsigned long mmu_seq;
2675         int write = error_code & PFERR_WRITE_MASK;
2676         bool map_writable;
2677
2678         ASSERT(vcpu);
2679         ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
2680
2681         r = mmu_topup_memory_caches(vcpu);
2682         if (r)
2683                 return r;
2684
2685         force_pt_level = mapping_level_dirty_bitmap(vcpu, gfn);
2686         if (likely(!force_pt_level)) {
2687                 level = mapping_level(vcpu, gfn);
2688                 gfn &= ~(KVM_PAGES_PER_HPAGE(level) - 1);
2689         } else
2690                 level = PT_PAGE_TABLE_LEVEL;
2691
2692         mmu_seq = vcpu->kvm->mmu_notifier_seq;
2693         smp_rmb();
2694
2695         if (try_async_pf(vcpu, prefault, gfn, gpa, &pfn, write, &map_writable))
2696                 return 0;
2697
2698         /* mmio */
2699         if (is_error_pfn(pfn))
2700                 return kvm_handle_bad_page(vcpu->kvm, gfn, pfn);
2701         spin_lock(&vcpu->kvm->mmu_lock);
2702         if (mmu_notifier_retry(vcpu, mmu_seq))
2703                 goto out_unlock;
2704         kvm_mmu_free_some_pages(vcpu);
2705         if (likely(!force_pt_level))
2706                 transparent_hugepage_adjust(vcpu, &gfn, &pfn, &level);
2707         r = __direct_map(vcpu, gpa, write, map_writable,
2708                          level, gfn, pfn, prefault);
2709         spin_unlock(&vcpu->kvm->mmu_lock);
2710
2711         return r;
2712
2713 out_unlock:
2714         spin_unlock(&vcpu->kvm->mmu_lock);
2715         kvm_release_pfn_clean(pfn);
2716         return 0;
2717 }
2718
2719 static void nonpaging_free(struct kvm_vcpu *vcpu)
2720 {
2721         mmu_free_roots(vcpu);
2722 }
2723
2724 static int nonpaging_init_context(struct kvm_vcpu *vcpu,
2725                                   struct kvm_mmu *context)
2726 {
2727         context->new_cr3 = nonpaging_new_cr3;
2728         context->page_fault = nonpaging_page_fault;
2729         context->gva_to_gpa = nonpaging_gva_to_gpa;
2730         context->free = nonpaging_free;
2731         context->prefetch_page = nonpaging_prefetch_page;
2732         context->sync_page = nonpaging_sync_page;
2733         context->invlpg = nonpaging_invlpg;
2734         context->update_pte = nonpaging_update_pte;
2735         context->root_level = 0;
2736         context->shadow_root_level = PT32E_ROOT_LEVEL;
2737         context->root_hpa = INVALID_PAGE;
2738         context->direct_map = true;
2739         context->nx = false;
2740         return 0;
2741 }
2742
2743 void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu)
2744 {
2745         ++vcpu->stat.tlb_flush;
2746         kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu);
2747 }
2748
2749 static void paging_new_cr3(struct kvm_vcpu *vcpu)
2750 {
2751         pgprintk("%s: cr3 %lx\n", __func__, kvm_read_cr3(vcpu));
2752         mmu_free_roots(vcpu);
2753 }
2754
2755 static unsigned long get_cr3(struct kvm_vcpu *vcpu)
2756 {
2757         return kvm_read_cr3(vcpu);
2758 }
2759
2760 static void inject_page_fault(struct kvm_vcpu *vcpu,
2761                               struct x86_exception *fault)
2762 {
2763         vcpu->arch.mmu.inject_page_fault(vcpu, fault);
2764 }
2765
2766 static void paging_free(struct kvm_vcpu *vcpu)
2767 {
2768         nonpaging_free(vcpu);
2769 }
2770
2771 static bool is_rsvd_bits_set(struct kvm_mmu *mmu, u64 gpte, int level)
2772 {
2773         int bit7;
2774
2775         bit7 = (gpte >> 7) & 1;
2776         return (gpte & mmu->rsvd_bits_mask[bit7][level-1]) != 0;
2777 }
2778
2779 #define PTTYPE 64
2780 #include "paging_tmpl.h"
2781 #undef PTTYPE
2782
2783 #define PTTYPE 32
2784 #include "paging_tmpl.h"
2785 #undef PTTYPE
2786
2787 static void reset_rsvds_bits_mask(struct kvm_vcpu *vcpu,
2788                                   struct kvm_mmu *context,
2789                                   int level)
2790 {
2791         int maxphyaddr = cpuid_maxphyaddr(vcpu);
2792         u64 exb_bit_rsvd = 0;
2793
2794         if (!context->nx)
2795                 exb_bit_rsvd = rsvd_bits(63, 63);
2796         switch (level) {
2797         case PT32_ROOT_LEVEL:
2798                 /* no rsvd bits for 2 level 4K page table entries */
2799                 context->rsvd_bits_mask[0][1] = 0;
2800                 context->rsvd_bits_mask[0][0] = 0;
2801                 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[0][0];
2802
2803                 if (!is_pse(vcpu)) {
2804                         context->rsvd_bits_mask[1][1] = 0;
2805                         break;
2806                 }
2807
2808                 if (is_cpuid_PSE36())
2809                         /* 36bits PSE 4MB page */
2810                         context->rsvd_bits_mask[1][1] = rsvd_bits(17, 21);
2811                 else
2812                         /* 32 bits PSE 4MB page */
2813                         context->rsvd_bits_mask[1][1] = rsvd_bits(13, 21);
2814                 break;
2815         case PT32E_ROOT_LEVEL:
2816                 context->rsvd_bits_mask[0][2] =
2817                         rsvd_bits(maxphyaddr, 63) |
2818                         rsvd_bits(7, 8) | rsvd_bits(1, 2);      /* PDPTE */
2819                 context->rsvd_bits_mask[0][1] = exb_bit_rsvd |
2820                         rsvd_bits(maxphyaddr, 62);      /* PDE */
2821                 context->rsvd_bits_mask[0][0] = exb_bit_rsvd |
2822                         rsvd_bits(maxphyaddr, 62);      /* PTE */
2823                 context->rsvd_bits_mask[1][1] = exb_bit_rsvd |
2824                         rsvd_bits(maxphyaddr, 62) |
2825                         rsvd_bits(13, 20);              /* large page */
2826                 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[0][0];
2827                 break;
2828         case PT64_ROOT_LEVEL:
2829                 context->rsvd_bits_mask[0][3] = exb_bit_rsvd |
2830                         rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 8);
2831                 context->rsvd_bits_mask[0][2] = exb_bit_rsvd |
2832                         rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 8);
2833                 context->rsvd_bits_mask[0][1] = exb_bit_rsvd |
2834                         rsvd_bits(maxphyaddr, 51);
2835                 context->rsvd_bits_mask[0][0] = exb_bit_rsvd |
2836                         rsvd_bits(maxphyaddr, 51);
2837                 context->rsvd_bits_mask[1][3] = context->rsvd_bits_mask[0][3];
2838                 context->rsvd_bits_mask[1][2] = exb_bit_rsvd |
2839                         rsvd_bits(maxphyaddr, 51) |
2840                         rsvd_bits(13, 29);
2841                 context->rsvd_bits_mask[1][1] = exb_bit_rsvd |
2842                         rsvd_bits(maxphyaddr, 51) |
2843                         rsvd_bits(13, 20);              /* large page */
2844                 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[0][0];
2845                 break;
2846         }
2847 }
2848
2849 static int paging64_init_context_common(struct kvm_vcpu *vcpu,
2850                                         struct kvm_mmu *context,
2851                                         int level)
2852 {
2853         context->nx = is_nx(vcpu);
2854
2855         reset_rsvds_bits_mask(vcpu, context, level);
2856
2857         ASSERT(is_pae(vcpu));
2858         context->new_cr3 = paging_new_cr3;
2859         context->page_fault = paging64_page_fault;
2860         context->gva_to_gpa = paging64_gva_to_gpa;
2861         context->prefetch_page = paging64_prefetch_page;
2862         context->sync_page = paging64_sync_page;
2863         context->invlpg = paging64_invlpg;
2864         context->update_pte = paging64_update_pte;
2865         context->free = paging_free;
2866         context->root_level = level;
2867         context->shadow_root_level = level;
2868         context->root_hpa = INVALID_PAGE;
2869         context->direct_map = false;
2870         return 0;
2871 }
2872
2873 static int paging64_init_context(struct kvm_vcpu *vcpu,
2874                                  struct kvm_mmu *context)
2875 {
2876         return paging64_init_context_common(vcpu, context, PT64_ROOT_LEVEL);
2877 }
2878
2879 static int paging32_init_context(struct kvm_vcpu *vcpu,
2880                                  struct kvm_mmu *context)
2881 {
2882         context->nx = false;
2883
2884         reset_rsvds_bits_mask(vcpu, context, PT32_ROOT_LEVEL);
2885
2886         context->new_cr3 = paging_new_cr3;
2887         context->page_fault = paging32_page_fault;
2888         context->gva_to_gpa = paging32_gva_to_gpa;
2889         context->free = paging_free;
2890         context->prefetch_page = paging32_prefetch_page;
2891         context->sync_page = paging32_sync_page;
2892         context->invlpg = paging32_invlpg;
2893         context->update_pte = paging32_update_pte;
2894         context->root_level = PT32_ROOT_LEVEL;
2895         context->shadow_root_level = PT32E_ROOT_LEVEL;
2896         context->root_hpa = INVALID_PAGE;
2897         context->direct_map = false;
2898         return 0;
2899 }
2900
2901 static int paging32E_init_context(struct kvm_vcpu *vcpu,
2902                                   struct kvm_mmu *context)
2903 {
2904         return paging64_init_context_common(vcpu, context, PT32E_ROOT_LEVEL);
2905 }
2906
2907 static int init_kvm_tdp_mmu(struct kvm_vcpu *vcpu)
2908 {
2909         struct kvm_mmu *context = vcpu->arch.walk_mmu;
2910
2911         context->base_role.word = 0;
2912         context->new_cr3 = nonpaging_new_cr3;
2913         context->page_fault = tdp_page_fault;
2914         context->free = nonpaging_free;
2915         context->prefetch_page = nonpaging_prefetch_page;
2916         context->sync_page = nonpaging_sync_page;
2917         context->invlpg = nonpaging_invlpg;
2918         context->update_pte = nonpaging_update_pte;
2919         context->shadow_root_level = kvm_x86_ops->get_tdp_level();
2920         context->root_hpa = INVALID_PAGE;
2921         context->direct_map = true;
2922         context->set_cr3 = kvm_x86_ops->set_tdp_cr3;
2923         context->get_cr3 = get_cr3;
2924         context->inject_page_fault = kvm_inject_page_fault;
2925         context->nx = is_nx(vcpu);
2926
2927         if (!is_paging(vcpu)) {
2928                 context->nx = false;
2929                 context->gva_to_gpa = nonpaging_gva_to_gpa;
2930                 context->root_level = 0;
2931         } else if (is_long_mode(vcpu)) {
2932                 context->nx = is_nx(vcpu);
2933                 reset_rsvds_bits_mask(vcpu, context, PT64_ROOT_LEVEL);
2934                 context->gva_to_gpa = paging64_gva_to_gpa;
2935                 context->root_level = PT64_ROOT_LEVEL;
2936         } else if (is_pae(vcpu)) {
2937                 context->nx = is_nx(vcpu);
2938                 reset_rsvds_bits_mask(vcpu, context, PT32E_ROOT_LEVEL);
2939                 context->gva_to_gpa = paging64_gva_to_gpa;
2940                 context->root_level = PT32E_ROOT_LEVEL;
2941         } else {
2942                 context->nx = false;
2943                 reset_rsvds_bits_mask(vcpu, context, PT32_ROOT_LEVEL);
2944                 context->gva_to_gpa = paging32_gva_to_gpa;
2945                 context->root_level = PT32_ROOT_LEVEL;
2946         }
2947
2948         return 0;
2949 }
2950
2951 int kvm_init_shadow_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *context)
2952 {
2953         int r;
2954         ASSERT(vcpu);
2955         ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2956
2957         if (!is_paging(vcpu))
2958                 r = nonpaging_init_context(vcpu, context);
2959         else if (is_long_mode(vcpu))
2960                 r = paging64_init_context(vcpu, context);
2961         else if (is_pae(vcpu))
2962                 r = paging32E_init_context(vcpu, context);
2963         else
2964                 r = paging32_init_context(vcpu, context);
2965
2966         vcpu->arch.mmu.base_role.cr4_pae = !!is_pae(vcpu);
2967         vcpu->arch.mmu.base_role.cr0_wp  = is_write_protection(vcpu);
2968
2969         return r;
2970 }
2971 EXPORT_SYMBOL_GPL(kvm_init_shadow_mmu);
2972
2973 static int init_kvm_softmmu(struct kvm_vcpu *vcpu)
2974 {
2975         int r = kvm_init_shadow_mmu(vcpu, vcpu->arch.walk_mmu);
2976
2977         vcpu->arch.walk_mmu->set_cr3           = kvm_x86_ops->set_cr3;
2978         vcpu->arch.walk_mmu->get_cr3           = get_cr3;
2979         vcpu->arch.walk_mmu->inject_page_fault = kvm_inject_page_fault;
2980
2981         return r;
2982 }
2983
2984 static int init_kvm_nested_mmu(struct kvm_vcpu *vcpu)
2985 {
2986         struct kvm_mmu *g_context = &vcpu->arch.nested_mmu;
2987
2988         g_context->get_cr3           = get_cr3;
2989         g_context->inject_page_fault = kvm_inject_page_fault;
2990
2991         /*
2992          * Note that arch.mmu.gva_to_gpa translates l2_gva to l1_gpa. The
2993          * translation of l2_gpa to l1_gpa addresses is done using the
2994          * arch.nested_mmu.gva_to_gpa function. Basically the gva_to_gpa
2995          * functions between mmu and nested_mmu are swapped.
2996          */
2997         if (!is_paging(vcpu)) {
2998                 g_context->nx = false;
2999                 g_context->root_level = 0;
3000                 g_context->gva_to_gpa = nonpaging_gva_to_gpa_nested;
3001         } else if (is_long_mode(vcpu)) {
3002                 g_context->nx = is_nx(vcpu);
3003                 reset_rsvds_bits_mask(vcpu, g_context, PT64_ROOT_LEVEL);
3004                 g_context->root_level = PT64_ROOT_LEVEL;
3005                 g_context->gva_to_gpa = paging64_gva_to_gpa_nested;
3006         } else if (is_pae(vcpu)) {
3007                 g_context->nx = is_nx(vcpu);
3008                 reset_rsvds_bits_mask(vcpu, g_context, PT32E_ROOT_LEVEL);
3009                 g_context->root_level = PT32E_ROOT_LEVEL;
3010                 g_context->gva_to_gpa = paging64_gva_to_gpa_nested;
3011         } else {
3012                 g_context->nx = false;
3013                 reset_rsvds_bits_mask(vcpu, g_context, PT32_ROOT_LEVEL);
3014                 g_context->root_level = PT32_ROOT_LEVEL;
3015                 g_context->gva_to_gpa = paging32_gva_to_gpa_nested;
3016         }
3017
3018         return 0;
3019 }
3020
3021 static int init_kvm_mmu(struct kvm_vcpu *vcpu)
3022 {
3023         if (mmu_is_nested(vcpu))
3024                 return init_kvm_nested_mmu(vcpu);
3025         else if (tdp_enabled)
3026                 return init_kvm_tdp_mmu(vcpu);
3027         else
3028                 return init_kvm_softmmu(vcpu);
3029 }
3030
3031 static void destroy_kvm_mmu(struct kvm_vcpu *vcpu)
3032 {
3033         ASSERT(vcpu);
3034         if (VALID_PAGE(vcpu->arch.mmu.root_hpa))
3035                 /* mmu.free() should set root_hpa = INVALID_PAGE */
3036                 vcpu->arch.mmu.free(vcpu);
3037 }
3038
3039 int kvm_mmu_reset_context(struct kvm_vcpu *vcpu)
3040 {
3041         destroy_kvm_mmu(vcpu);
3042         return init_kvm_mmu(vcpu);
3043 }
3044 EXPORT_SYMBOL_GPL(kvm_mmu_reset_context);
3045
3046 int kvm_mmu_load(struct kvm_vcpu *vcpu)
3047 {
3048         int r;
3049
3050         r = mmu_topup_memory_caches(vcpu);
3051         if (r)
3052                 goto out;
3053         r = mmu_alloc_roots(vcpu);
3054         spin_lock(&vcpu->kvm->mmu_lock);
3055         mmu_sync_roots(vcpu);
3056         spin_unlock(&vcpu->kvm->mmu_lock);
3057         if (r)
3058                 goto out;
3059         /* set_cr3() should ensure TLB has been flushed */
3060         vcpu->arch.mmu.set_cr3(vcpu, vcpu->arch.mmu.root_hpa);
3061 out:
3062         return r;
3063 }
3064 EXPORT_SYMBOL_GPL(kvm_mmu_load);
3065
3066 void kvm_mmu_unload(struct kvm_vcpu *vcpu)
3067 {
3068         mmu_free_roots(vcpu);
3069 }
3070 EXPORT_SYMBOL_GPL(kvm_mmu_unload);
3071
3072 static void mmu_pte_write_zap_pte(struct kvm_vcpu *vcpu,
3073                                   struct kvm_mmu_page *sp,
3074                                   u64 *spte)
3075 {
3076         u64 pte;
3077         struct kvm_mmu_page *child;
3078
3079         pte = *spte;
3080         if (is_shadow_present_pte(pte)) {
3081                 if (is_last_spte(pte, sp->role.level))
3082                         drop_spte(vcpu->kvm, spte, shadow_trap_nonpresent_pte);
3083                 else {
3084                         child = page_header(pte & PT64_BASE_ADDR_MASK);
3085                         mmu_page_remove_parent_pte(child, spte);
3086                 }
3087         }
3088         __set_spte(spte, shadow_trap_nonpresent_pte);
3089         if (is_large_pte(pte))
3090                 --vcpu->kvm->stat.lpages;
3091 }
3092
3093 static void mmu_pte_write_new_pte(struct kvm_vcpu *vcpu,
3094                                   struct kvm_mmu_page *sp, u64 *spte,
3095                                   const void *new)
3096 {
3097         if (sp->role.level != PT_PAGE_TABLE_LEVEL) {
3098                 ++vcpu->kvm->stat.mmu_pde_zapped;
3099                 return;
3100         }
3101
3102         ++vcpu->kvm->stat.mmu_pte_updated;
3103         vcpu->arch.mmu.update_pte(vcpu, sp, spte, new);
3104 }
3105
3106 static bool need_remote_flush(u64 old, u64 new)
3107 {
3108         if (!is_shadow_present_pte(old))
3109                 return false;
3110         if (!is_shadow_present_pte(new))
3111                 return true;
3112         if ((old ^ new) & PT64_BASE_ADDR_MASK)
3113                 return true;
3114         old ^= PT64_NX_MASK;
3115         new ^= PT64_NX_MASK;
3116         return (old & ~new & PT64_PERM_MASK) != 0;
3117 }
3118
3119 static void mmu_pte_write_flush_tlb(struct kvm_vcpu *vcpu, bool zap_page,
3120                                     bool remote_flush, bool local_flush)
3121 {
3122         if (zap_page)
3123                 return;
3124
3125         if (remote_flush)
3126                 kvm_flush_remote_tlbs(vcpu->kvm);
3127         else if (local_flush)
3128                 kvm_mmu_flush_tlb(vcpu);
3129 }
3130
3131 static bool last_updated_pte_accessed(struct kvm_vcpu *vcpu)
3132 {
3133         u64 *spte = vcpu->arch.last_pte_updated;
3134
3135         return !!(spte && (*spte & shadow_accessed_mask));
3136 }
3137
3138 static void kvm_mmu_access_page(struct kvm_vcpu *vcpu, gfn_t gfn)
3139 {
3140         u64 *spte = vcpu->arch.last_pte_updated;
3141
3142         if (spte
3143             && vcpu->arch.last_pte_gfn == gfn
3144             && shadow_accessed_mask
3145             && !(*spte & shadow_accessed_mask)
3146             && is_shadow_present_pte(*spte))
3147                 set_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
3148 }
3149
3150 void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
3151                        const u8 *new, int bytes,
3152                        bool guest_initiated)
3153 {
3154         gfn_t gfn = gpa >> PAGE_SHIFT;
3155         union kvm_mmu_page_role mask = { .word = 0 };
3156         struct kvm_mmu_page *sp;
3157         struct hlist_node *node;
3158         LIST_HEAD(invalid_list);
3159         u64 entry, gentry, *spte;
3160         unsigned pte_size, page_offset, misaligned, quadrant, offset;
3161         int level, npte, invlpg_counter, r, flooded = 0;
3162         bool remote_flush, local_flush, zap_page;
3163
3164         /*
3165          * If we don't have indirect shadow pages, it means no page is
3166          * write-protected, so we can exit simply.
3167          */
3168         if (!ACCESS_ONCE(vcpu->kvm->arch.indirect_shadow_pages))
3169                 return;
3170
3171         zap_page = remote_flush = local_flush = false;
3172         offset = offset_in_page(gpa);
3173
3174         pgprintk("%s: gpa %llx bytes %d\n", __func__, gpa, bytes);
3175
3176         invlpg_counter = atomic_read(&vcpu->kvm->arch.invlpg_counter);
3177
3178         /*
3179          * Assume that the pte write on a page table of the same type
3180          * as the current vcpu paging mode since we update the sptes only
3181          * when they have the same mode.
3182          */
3183         if ((is_pae(vcpu) && bytes == 4) || !new) {
3184                 /* Handle a 32-bit guest writing two halves of a 64-bit gpte */
3185                 if (is_pae(vcpu)) {
3186                         gpa &= ~(gpa_t)7;
3187                         bytes = 8;
3188                 }
3189                 r = kvm_read_guest(vcpu->kvm, gpa, &gentry, min(bytes, 8));
3190                 if (r)
3191                         gentry = 0;
3192                 new = (const u8 *)&gentry;
3193         }
3194
3195         switch (bytes) {
3196         case 4:
3197                 gentry = *(const u32 *)new;
3198                 break;
3199         case 8:
3200                 gentry = *(const u64 *)new;
3201                 break;
3202         default:
3203                 gentry = 0;
3204                 break;
3205         }
3206
3207         spin_lock(&vcpu->kvm->mmu_lock);
3208         if (atomic_read(&vcpu->kvm->arch.invlpg_counter) != invlpg_counter)
3209                 gentry = 0;
3210         kvm_mmu_free_some_pages(vcpu);
3211         ++vcpu->kvm->stat.mmu_pte_write;
3212         trace_kvm_mmu_audit(vcpu, AUDIT_PRE_PTE_WRITE);
3213         if (guest_initiated) {
3214                 kvm_mmu_access_page(vcpu, gfn);
3215                 if (gfn == vcpu->arch.last_pt_write_gfn
3216                     && !last_updated_pte_accessed(vcpu)) {
3217                         ++vcpu->arch.last_pt_write_count;
3218                         if (vcpu->arch.last_pt_write_count >= 3)
3219                                 flooded = 1;
3220                 } else {
3221                         vcpu->arch.last_pt_write_gfn = gfn;
3222                         vcpu->arch.last_pt_write_count = 1;
3223                         vcpu->arch.last_pte_updated = NULL;
3224                 }
3225         }
3226
3227         mask.cr0_wp = mask.cr4_pae = mask.nxe = 1;
3228         for_each_gfn_indirect_valid_sp(vcpu->kvm, sp, gfn, node) {
3229                 pte_size = sp->role.cr4_pae ? 8 : 4;
3230                 misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1);
3231                 misaligned |= bytes < 4;
3232                 if (misaligned || flooded) {
3233                         /*
3234                          * Misaligned accesses are too much trouble to fix
3235                          * up; also, they usually indicate a page is not used
3236                          * as a page table.
3237                          *
3238                          * If we're seeing too many writes to a page,
3239                          * it may no longer be a page table, or we may be
3240                          * forking, in which case it is better to unmap the
3241                          * page.
3242                          */
3243                         pgprintk("misaligned: gpa %llx bytes %d role %x\n",
3244                                  gpa, bytes, sp->role.word);
3245                         zap_page |= !!kvm_mmu_prepare_zap_page(vcpu->kvm, sp,
3246                                                      &invalid_list);
3247                         ++vcpu->kvm->stat.mmu_flooded;
3248                         continue;
3249                 }
3250                 page_offset = offset;
3251                 level = sp->role.level;
3252                 npte = 1;
3253                 if (!sp->role.cr4_pae) {
3254                         page_offset <<= 1;      /* 32->64 */
3255                         /*
3256                          * A 32-bit pde maps 4MB while the shadow pdes map
3257                          * only 2MB.  So we need to double the offset again
3258                          * and zap two pdes instead of one.
3259                          */
3260                         if (level == PT32_ROOT_LEVEL) {
3261                                 page_offset &= ~7; /* kill rounding error */
3262                                 page_offset <<= 1;
3263                                 npte = 2;
3264                         }
3265                         quadrant = page_offset >> PAGE_SHIFT;
3266                         page_offset &= ~PAGE_MASK;
3267                         if (quadrant != sp->role.quadrant)
3268                                 continue;
3269                 }
3270                 local_flush = true;
3271                 spte = &sp->spt[page_offset / sizeof(*spte)];
3272                 while (npte--) {
3273                         entry = *spte;
3274                         mmu_pte_write_zap_pte(vcpu, sp, spte);
3275                         if (gentry &&
3276                               !((sp->role.word ^ vcpu->arch.mmu.base_role.word)
3277                               & mask.word))
3278                                 mmu_pte_write_new_pte(vcpu, sp, spte, &gentry);
3279                         if (!remote_flush && need_remote_flush(entry, *spte))
3280                                 remote_flush = true;
3281                         ++spte;
3282                 }
3283         }
3284         mmu_pte_write_flush_tlb(vcpu, zap_page, remote_flush, local_flush);
3285         kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
3286         trace_kvm_mmu_audit(vcpu, AUDIT_POST_PTE_WRITE);
3287         spin_unlock(&vcpu->kvm->mmu_lock);
3288 }
3289
3290 int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva)
3291 {
3292         gpa_t gpa;
3293         int r;
3294
3295         if (vcpu->arch.mmu.direct_map)
3296                 return 0;
3297
3298         gpa = kvm_mmu_gva_to_gpa_read(vcpu, gva, NULL);
3299
3300         spin_lock(&vcpu->kvm->mmu_lock);
3301         r = kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT);
3302         spin_unlock(&vcpu->kvm->mmu_lock);
3303         return r;
3304 }
3305 EXPORT_SYMBOL_GPL(kvm_mmu_unprotect_page_virt);
3306
3307 void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu)
3308 {
3309         LIST_HEAD(invalid_list);
3310
3311         while (kvm_mmu_available_pages(vcpu->kvm) < KVM_REFILL_PAGES &&
3312                !list_empty(&vcpu->kvm->arch.active_mmu_pages)) {
3313                 struct kvm_mmu_page *sp;
3314
3315                 sp = container_of(vcpu->kvm->arch.active_mmu_pages.prev,
3316                                   struct kvm_mmu_page, link);
3317                 kvm_mmu_prepare_zap_page(vcpu->kvm, sp, &invalid_list);
3318                 kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
3319                 ++vcpu->kvm->stat.mmu_recycled;
3320         }
3321 }
3322
3323 int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t cr2, u32 error_code,
3324                        void *insn, int insn_len)
3325 {
3326         int r;
3327         enum emulation_result er;
3328
3329         r = vcpu->arch.mmu.page_fault(vcpu, cr2, error_code, false);
3330         if (r < 0)
3331                 goto out;
3332
3333         if (!r) {
3334                 r = 1;
3335                 goto out;
3336         }
3337
3338         r = mmu_topup_memory_caches(vcpu);
3339         if (r)
3340                 goto out;
3341
3342         er = x86_emulate_instruction(vcpu, cr2, 0, insn, insn_len);
3343
3344         switch (er) {
3345         case EMULATE_DONE:
3346                 return 1;
3347         case EMULATE_DO_MMIO:
3348                 ++vcpu->stat.mmio_exits;
3349                 /* fall through */
3350         case EMULATE_FAIL:
3351                 return 0;
3352         default:
3353                 BUG();
3354         }
3355 out:
3356         return r;
3357 }
3358 EXPORT_SYMBOL_GPL(kvm_mmu_page_fault);
3359
3360 void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
3361 {
3362         vcpu->arch.mmu.invlpg(vcpu, gva);
3363         kvm_mmu_flush_tlb(vcpu);
3364         ++vcpu->stat.invlpg;
3365 }
3366 EXPORT_SYMBOL_GPL(kvm_mmu_invlpg);
3367
3368 void kvm_enable_tdp(void)
3369 {
3370         tdp_enabled = true;
3371 }
3372 EXPORT_SYMBOL_GPL(kvm_enable_tdp);
3373
3374 void kvm_disable_tdp(void)
3375 {
3376         tdp_enabled = false;
3377 }
3378 EXPORT_SYMBOL_GPL(kvm_disable_tdp);
3379
3380 static void free_mmu_pages(struct kvm_vcpu *vcpu)
3381 {
3382         free_page((unsigned long)vcpu->arch.mmu.pae_root);
3383         if (vcpu->arch.mmu.lm_root != NULL)
3384                 free_page((unsigned long)vcpu->arch.mmu.lm_root);
3385 }
3386
3387 static int alloc_mmu_pages(struct kvm_vcpu *vcpu)
3388 {
3389         struct page *page;
3390         int i;
3391
3392         ASSERT(vcpu);
3393
3394         /*
3395          * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
3396          * Therefore we need to allocate shadow page tables in the first
3397          * 4GB of memory, which happens to fit the DMA32 zone.
3398          */
3399         page = alloc_page(GFP_KERNEL | __GFP_DMA32);
3400         if (!page)
3401                 return -ENOMEM;
3402
3403         vcpu->arch.mmu.pae_root = page_address(page);
3404         for (i = 0; i < 4; ++i)
3405                 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
3406
3407         return 0;
3408 }
3409
3410 int kvm_mmu_create(struct kvm_vcpu *vcpu)
3411 {
3412         ASSERT(vcpu);
3413         ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
3414
3415         return alloc_mmu_pages(vcpu);
3416 }
3417
3418 int kvm_mmu_setup(struct kvm_vcpu *vcpu)
3419 {
3420         ASSERT(vcpu);
3421         ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
3422
3423         return init_kvm_mmu(vcpu);
3424 }
3425
3426 void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot)
3427 {
3428         struct kvm_mmu_page *sp;
3429
3430         list_for_each_entry(sp, &kvm->arch.active_mmu_pages, link) {
3431                 int i;
3432                 u64 *pt;
3433
3434                 if (!test_bit(slot, sp->slot_bitmap))
3435                         continue;
3436
3437                 pt = sp->spt;
3438                 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
3439                         if (!is_shadow_present_pte(pt[i]) ||
3440                               !is_last_spte(pt[i], sp->role.level))
3441                                 continue;
3442
3443                         if (is_large_pte(pt[i])) {
3444                                 drop_spte(kvm, &pt[i],
3445                                           shadow_trap_nonpresent_pte);
3446                                 --kvm->stat.lpages;
3447                                 continue;
3448                         }
3449
3450                         /* avoid RMW */
3451                         if (is_writable_pte(pt[i]))
3452                                 update_spte(&pt[i], pt[i] & ~PT_WRITABLE_MASK);
3453                 }
3454         }
3455         kvm_flush_remote_tlbs(kvm);
3456 }
3457
3458 void kvm_mmu_zap_all(struct kvm *kvm)
3459 {
3460         struct kvm_mmu_page *sp, *node;
3461         LIST_HEAD(invalid_list);
3462
3463         spin_lock(&kvm->mmu_lock);
3464 restart:
3465         list_for_each_entry_safe(sp, node, &kvm->arch.active_mmu_pages, link)
3466                 if (kvm_mmu_prepare_zap_page(kvm, sp, &invalid_list))
3467                         goto restart;
3468
3469         kvm_mmu_commit_zap_page(kvm, &invalid_list);
3470         spin_unlock(&kvm->mmu_lock);
3471 }
3472
3473 static int kvm_mmu_remove_some_alloc_mmu_pages(struct kvm *kvm,
3474                                                struct list_head *invalid_list)
3475 {
3476         struct kvm_mmu_page *page;
3477
3478         page = container_of(kvm->arch.active_mmu_pages.prev,
3479                             struct kvm_mmu_page, link);
3480         return kvm_mmu_prepare_zap_page(kvm, page, invalid_list);
3481 }
3482
3483 static int mmu_shrink(struct shrinker *shrink, struct shrink_control *sc)
3484 {
3485         struct kvm *kvm;
3486         struct kvm *kvm_freed = NULL;
3487         int nr_to_scan = sc->nr_to_scan;
3488
3489         if (nr_to_scan == 0)
3490                 goto out;
3491
3492         raw_spin_lock(&kvm_lock);
3493
3494         list_for_each_entry(kvm, &vm_list, vm_list) {
3495                 int idx, freed_pages;
3496                 LIST_HEAD(invalid_list);
3497
3498                 idx = srcu_read_lock(&kvm->srcu);
3499                 spin_lock(&kvm->mmu_lock);
3500                 if (!kvm_freed && nr_to_scan > 0 &&
3501                     kvm->arch.n_used_mmu_pages > 0) {
3502                         freed_pages = kvm_mmu_remove_some_alloc_mmu_pages(kvm,
3503                                                           &invalid_list);
3504                         kvm_freed = kvm;
3505                 }
3506                 nr_to_scan--;
3507
3508                 kvm_mmu_commit_zap_page(kvm, &invalid_list);
3509                 spin_unlock(&kvm->mmu_lock);
3510                 srcu_read_unlock(&kvm->srcu, idx);
3511         }
3512         if (kvm_freed)
3513                 list_move_tail(&kvm_freed->vm_list, &vm_list);
3514
3515         raw_spin_unlock(&kvm_lock);
3516
3517 out:
3518         return percpu_counter_read_positive(&kvm_total_used_mmu_pages);
3519 }
3520
3521 static struct shrinker mmu_shrinker = {
3522         .shrink = mmu_shrink,
3523         .seeks = DEFAULT_SEEKS * 10,
3524 };
3525
3526 static void mmu_destroy_caches(void)
3527 {
3528         if (pte_list_desc_cache)
3529                 kmem_cache_destroy(pte_list_desc_cache);
3530         if (mmu_page_header_cache)
3531                 kmem_cache_destroy(mmu_page_header_cache);
3532 }
3533
3534 int kvm_mmu_module_init(void)
3535 {
3536         pte_list_desc_cache = kmem_cache_create("pte_list_desc",
3537                                             sizeof(struct pte_list_desc),
3538                                             0, 0, NULL);
3539         if (!pte_list_desc_cache)
3540                 goto nomem;
3541
3542         mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header",
3543                                                   sizeof(struct kvm_mmu_page),
3544                                                   0, 0, NULL);
3545         if (!mmu_page_header_cache)
3546                 goto nomem;
3547
3548         if (percpu_counter_init(&kvm_total_used_mmu_pages, 0))
3549                 goto nomem;
3550
3551         register_shrinker(&mmu_shrinker);
3552
3553         return 0;
3554
3555 nomem:
3556         mmu_destroy_caches();
3557         return -ENOMEM;
3558 }
3559
3560 /*
3561  * Caculate mmu pages needed for kvm.
3562  */
3563 unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm)
3564 {
3565         int i;
3566         unsigned int nr_mmu_pages;
3567         unsigned int  nr_pages = 0;
3568         struct kvm_memslots *slots;
3569
3570         slots = kvm_memslots(kvm);
3571
3572         for (i = 0; i < slots->nmemslots; i++)
3573                 nr_pages += slots->memslots[i].npages;
3574
3575         nr_mmu_pages = nr_pages * KVM_PERMILLE_MMU_PAGES / 1000;
3576         nr_mmu_pages = max(nr_mmu_pages,
3577                         (unsigned int) KVM_MIN_ALLOC_MMU_PAGES);
3578
3579         return nr_mmu_pages;
3580 }
3581
3582 static void *pv_mmu_peek_buffer(struct kvm_pv_mmu_op_buffer *buffer,
3583                                 unsigned len)
3584 {
3585         if (len > buffer->len)
3586                 return NULL;
3587         return buffer->ptr;
3588 }
3589
3590 static void *pv_mmu_read_buffer(struct kvm_pv_mmu_op_buffer *buffer,
3591                                 unsigned len)
3592 {
3593         void *ret;
3594
3595         ret = pv_mmu_peek_buffer(buffer, len);
3596         if (!ret)
3597                 return ret;
3598         buffer->ptr += len;
3599         buffer->len -= len;
3600         buffer->processed += len;
3601         return ret;
3602 }
3603
3604 static int kvm_pv_mmu_write(struct kvm_vcpu *vcpu,
3605                              gpa_t addr, gpa_t value)
3606 {
3607         int bytes = 8;
3608         int r;
3609
3610         if (!is_long_mode(vcpu) && !is_pae(vcpu))
3611                 bytes = 4;
3612
3613         r = mmu_topup_memory_caches(vcpu);
3614         if (r)
3615                 return r;
3616
3617         if (!emulator_write_phys(vcpu, addr, &value, bytes))
3618                 return -EFAULT;
3619
3620         return 1;
3621 }
3622
3623 static int kvm_pv_mmu_flush_tlb(struct kvm_vcpu *vcpu)
3624 {
3625         (void)kvm_set_cr3(vcpu, kvm_read_cr3(vcpu));
3626         return 1;
3627 }
3628
3629 static int kvm_pv_mmu_release_pt(struct kvm_vcpu *vcpu, gpa_t addr)
3630 {
3631         spin_lock(&vcpu->kvm->mmu_lock);
3632         mmu_unshadow(vcpu->kvm, addr >> PAGE_SHIFT);
3633         spin_unlock(&vcpu->kvm->mmu_lock);
3634         return 1;
3635 }
3636
3637 static int kvm_pv_mmu_op_one(struct kvm_vcpu *vcpu,
3638                              struct kvm_pv_mmu_op_buffer *buffer)
3639 {
3640         struct kvm_mmu_op_header *header;
3641
3642         header = pv_mmu_peek_buffer(buffer, sizeof *header);
3643         if (!header)
3644                 return 0;
3645         switch (header->op) {
3646         case KVM_MMU_OP_WRITE_PTE: {
3647                 struct kvm_mmu_op_write_pte *wpte;
3648
3649                 wpte = pv_mmu_read_buffer(buffer, sizeof *wpte);
3650                 if (!wpte)
3651                         return 0;
3652                 return kvm_pv_mmu_write(vcpu, wpte->pte_phys,
3653                                         wpte->pte_val);
3654         }
3655         case KVM_MMU_OP_FLUSH_TLB: {
3656                 struct kvm_mmu_op_flush_tlb *ftlb;
3657
3658                 ftlb = pv_mmu_read_buffer(buffer, sizeof *ftlb);
3659                 if (!ftlb)
3660                         return 0;
3661                 return kvm_pv_mmu_flush_tlb(vcpu);
3662         }
3663         case KVM_MMU_OP_RELEASE_PT: {
3664                 struct kvm_mmu_op_release_pt *rpt;
3665
3666                 rpt = pv_mmu_read_buffer(buffer, sizeof *rpt);
3667                 if (!rpt)
3668                         return 0;
3669                 return kvm_pv_mmu_release_pt(vcpu, rpt->pt_phys);
3670         }
3671         default: return 0;
3672         }
3673 }
3674
3675 int kvm_pv_mmu_op(struct kvm_vcpu *vcpu, unsigned long bytes,
3676                   gpa_t addr, unsigned long *ret)
3677 {
3678         int r;
3679         struct kvm_pv_mmu_op_buffer *buffer = &vcpu->arch.mmu_op_buffer;
3680
3681         buffer->ptr = buffer->buf;
3682         buffer->len = min_t(unsigned long, bytes, sizeof buffer->buf);
3683         buffer->processed = 0;
3684
3685         r = kvm_read_guest(vcpu->kvm, addr, buffer->buf, buffer->len);
3686         if (r)
3687                 goto out;
3688
3689         while (buffer->len) {
3690                 r = kvm_pv_mmu_op_one(vcpu, buffer);
3691                 if (r < 0)
3692                         goto out;
3693                 if (r == 0)
3694                         break;
3695         }
3696
3697         r = 1;
3698 out:
3699         *ret = buffer->processed;
3700         return r;
3701 }
3702
3703 int kvm_mmu_get_spte_hierarchy(struct kvm_vcpu *vcpu, u64 addr, u64 sptes[4])
3704 {
3705         struct kvm_shadow_walk_iterator iterator;
3706         int nr_sptes = 0;
3707
3708         spin_lock(&vcpu->kvm->mmu_lock);
3709         for_each_shadow_entry(vcpu, addr, iterator) {
3710                 sptes[iterator.level-1] = *iterator.sptep;
3711                 nr_sptes++;
3712                 if (!is_shadow_present_pte(*iterator.sptep))
3713                         break;
3714         }
3715         spin_unlock(&vcpu->kvm->mmu_lock);
3716
3717         return nr_sptes;
3718 }
3719 EXPORT_SYMBOL_GPL(kvm_mmu_get_spte_hierarchy);
3720
3721 void kvm_mmu_destroy(struct kvm_vcpu *vcpu)
3722 {
3723         ASSERT(vcpu);
3724
3725         destroy_kvm_mmu(vcpu);
3726         free_mmu_pages(vcpu);
3727         mmu_free_memory_caches(vcpu);
3728 }
3729
3730 #ifdef CONFIG_KVM_MMU_AUDIT
3731 #include "mmu_audit.c"
3732 #else
3733 static void mmu_audit_disable(void) { }
3734 #endif
3735
3736 void kvm_mmu_module_exit(void)
3737 {
3738         mmu_destroy_caches();
3739         percpu_counter_destroy(&kvm_total_used_mmu_pages);
3740         unregister_shrinker(&mmu_shrinker);
3741         mmu_audit_disable();
3742 }