2 * irq_comm.c: Common API for in kernel interrupt controller
3 * Copyright (c) 2007, Intel Corporation.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc., 59 Temple
16 * Place - Suite 330, Boston, MA 02111-1307 USA.
18 * Yaozu (Eddie) Dong <Eddie.dong@intel.com>
20 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
23 #include <linux/kvm_host.h>
24 #include <linux/slab.h>
25 #include <linux/export.h>
26 #include <trace/events/kvm.h>
28 #include <asm/msidef.h>
36 static int kvm_set_pic_irq(struct kvm_kernel_irq_routing_entry *e,
37 struct kvm *kvm, int irq_source_id, int level,
40 struct kvm_pic *pic = pic_irqchip(kvm);
43 * XXX: rejecting pic routes when pic isn't in use would be better,
44 * but the default routing table is installed while kvm->arch.vpic is
45 * NULL and KVM_CREATE_IRQCHIP can race with KVM_IRQ_LINE.
50 return kvm_pic_set_irq(pic, e->irqchip.pin, irq_source_id, level);
53 static int kvm_set_ioapic_irq(struct kvm_kernel_irq_routing_entry *e,
54 struct kvm *kvm, int irq_source_id, int level,
57 struct kvm_ioapic *ioapic = kvm->arch.vioapic;
62 return kvm_ioapic_set_irq(ioapic, e->irqchip.pin, irq_source_id, level,
66 int kvm_irq_delivery_to_apic(struct kvm *kvm, struct kvm_lapic *src,
67 struct kvm_lapic_irq *irq, unsigned long *dest_map)
70 struct kvm_vcpu *vcpu, *lowest = NULL;
72 if (irq->dest_mode == 0 && irq->dest_id == 0xff &&
73 kvm_lowest_prio_delivery(irq)) {
74 printk(KERN_INFO "kvm: apic: phys broadcast and lowest prio\n");
75 irq->delivery_mode = APIC_DM_FIXED;
78 if (kvm_irq_delivery_to_apic_fast(kvm, src, irq, &r, dest_map))
81 kvm_for_each_vcpu(i, vcpu, kvm) {
82 if (!kvm_apic_present(vcpu))
85 if (!kvm_apic_match_dest(vcpu, src, irq->shorthand,
86 irq->dest_id, irq->dest_mode))
89 if (!kvm_lowest_prio_delivery(irq)) {
92 r += kvm_apic_set_irq(vcpu, irq, dest_map);
93 } else if (kvm_lapic_enabled(vcpu)) {
96 else if (kvm_apic_compare_prio(vcpu, lowest) < 0)
102 r = kvm_apic_set_irq(lowest, irq, dest_map);
107 void kvm_set_msi_irq(struct kvm_kernel_irq_routing_entry *e,
108 struct kvm_lapic_irq *irq)
110 trace_kvm_msi_set_irq(e->msi.address_lo, e->msi.data);
112 irq->dest_id = (e->msi.address_lo &
113 MSI_ADDR_DEST_ID_MASK) >> MSI_ADDR_DEST_ID_SHIFT;
114 irq->vector = (e->msi.data &
115 MSI_DATA_VECTOR_MASK) >> MSI_DATA_VECTOR_SHIFT;
116 irq->dest_mode = (1 << MSI_ADDR_DEST_MODE_SHIFT) & e->msi.address_lo;
117 irq->trig_mode = (1 << MSI_DATA_TRIGGER_SHIFT) & e->msi.data;
118 irq->delivery_mode = e->msi.data & 0x700;
119 irq->msi_redir_hint = ((e->msi.address_lo
120 & MSI_ADDR_REDIRECTION_LOWPRI) > 0);
124 EXPORT_SYMBOL_GPL(kvm_set_msi_irq);
126 int kvm_set_msi(struct kvm_kernel_irq_routing_entry *e,
127 struct kvm *kvm, int irq_source_id, int level, bool line_status)
129 struct kvm_lapic_irq irq;
134 kvm_set_msi_irq(e, &irq);
136 return kvm_irq_delivery_to_apic(kvm, NULL, &irq, NULL);
140 int kvm_arch_set_irq_inatomic(struct kvm_kernel_irq_routing_entry *e,
141 struct kvm *kvm, int irq_source_id, int level,
144 struct kvm_lapic_irq irq;
147 if (unlikely(e->type != KVM_IRQ_ROUTING_MSI))
150 kvm_set_msi_irq(e, &irq);
152 if (kvm_irq_delivery_to_apic_fast(kvm, NULL, &irq, &r, NULL))
158 int kvm_request_irq_source_id(struct kvm *kvm)
160 unsigned long *bitmap = &kvm->arch.irq_sources_bitmap;
163 mutex_lock(&kvm->irq_lock);
164 irq_source_id = find_first_zero_bit(bitmap, BITS_PER_LONG);
166 if (irq_source_id >= BITS_PER_LONG) {
167 printk(KERN_WARNING "kvm: exhaust allocatable IRQ sources!\n");
168 irq_source_id = -EFAULT;
172 ASSERT(irq_source_id != KVM_USERSPACE_IRQ_SOURCE_ID);
173 ASSERT(irq_source_id != KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID);
174 set_bit(irq_source_id, bitmap);
176 mutex_unlock(&kvm->irq_lock);
178 return irq_source_id;
181 void kvm_free_irq_source_id(struct kvm *kvm, int irq_source_id)
183 ASSERT(irq_source_id != KVM_USERSPACE_IRQ_SOURCE_ID);
184 ASSERT(irq_source_id != KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID);
186 mutex_lock(&kvm->irq_lock);
187 if (irq_source_id < 0 ||
188 irq_source_id >= BITS_PER_LONG) {
189 printk(KERN_ERR "kvm: IRQ source ID out of range!\n");
192 clear_bit(irq_source_id, &kvm->arch.irq_sources_bitmap);
193 if (!ioapic_in_kernel(kvm))
196 kvm_ioapic_clear_all(kvm->arch.vioapic, irq_source_id);
197 kvm_pic_clear_all(pic_irqchip(kvm), irq_source_id);
199 mutex_unlock(&kvm->irq_lock);
202 void kvm_register_irq_mask_notifier(struct kvm *kvm, int irq,
203 struct kvm_irq_mask_notifier *kimn)
205 mutex_lock(&kvm->irq_lock);
207 hlist_add_head_rcu(&kimn->link, &kvm->arch.mask_notifier_list);
208 mutex_unlock(&kvm->irq_lock);
211 void kvm_unregister_irq_mask_notifier(struct kvm *kvm, int irq,
212 struct kvm_irq_mask_notifier *kimn)
214 mutex_lock(&kvm->irq_lock);
215 hlist_del_rcu(&kimn->link);
216 mutex_unlock(&kvm->irq_lock);
217 synchronize_srcu(&kvm->irq_srcu);
220 void kvm_fire_mask_notifiers(struct kvm *kvm, unsigned irqchip, unsigned pin,
223 struct kvm_irq_mask_notifier *kimn;
226 idx = srcu_read_lock(&kvm->irq_srcu);
227 gsi = kvm_irq_map_chip_pin(kvm, irqchip, pin);
229 hlist_for_each_entry_rcu(kimn, &kvm->arch.mask_notifier_list, link)
230 if (kimn->irq == gsi)
231 kimn->func(kimn, mask);
232 srcu_read_unlock(&kvm->irq_srcu, idx);
235 int kvm_set_routing_entry(struct kvm_kernel_irq_routing_entry *e,
236 const struct kvm_irq_routing_entry *ue)
243 case KVM_IRQ_ROUTING_IRQCHIP:
245 switch (ue->u.irqchip.irqchip) {
246 case KVM_IRQCHIP_PIC_MASTER:
247 e->set = kvm_set_pic_irq;
248 max_pin = PIC_NUM_PINS;
250 case KVM_IRQCHIP_PIC_SLAVE:
251 e->set = kvm_set_pic_irq;
252 max_pin = PIC_NUM_PINS;
255 case KVM_IRQCHIP_IOAPIC:
256 max_pin = KVM_IOAPIC_NUM_PINS;
257 e->set = kvm_set_ioapic_irq;
262 e->irqchip.irqchip = ue->u.irqchip.irqchip;
263 e->irqchip.pin = ue->u.irqchip.pin + delta;
264 if (e->irqchip.pin >= max_pin)
267 case KVM_IRQ_ROUTING_MSI:
268 e->set = kvm_set_msi;
269 e->msi.address_lo = ue->u.msi.address_lo;
270 e->msi.address_hi = ue->u.msi.address_hi;
271 e->msi.data = ue->u.msi.data;
282 bool kvm_intr_is_single_vcpu(struct kvm *kvm, struct kvm_lapic_irq *irq,
283 struct kvm_vcpu **dest_vcpu)
286 struct kvm_vcpu *vcpu;
288 if (kvm_intr_is_single_vcpu_fast(kvm, irq, dest_vcpu))
291 kvm_for_each_vcpu(i, vcpu, kvm) {
292 if (!kvm_apic_present(vcpu))
295 if (!kvm_apic_match_dest(vcpu, NULL, irq->shorthand,
296 irq->dest_id, irq->dest_mode))
307 EXPORT_SYMBOL_GPL(kvm_intr_is_single_vcpu);
309 #define IOAPIC_ROUTING_ENTRY(irq) \
310 { .gsi = irq, .type = KVM_IRQ_ROUTING_IRQCHIP, \
311 .u.irqchip = { .irqchip = KVM_IRQCHIP_IOAPIC, .pin = (irq) } }
312 #define ROUTING_ENTRY1(irq) IOAPIC_ROUTING_ENTRY(irq)
314 #define PIC_ROUTING_ENTRY(irq) \
315 { .gsi = irq, .type = KVM_IRQ_ROUTING_IRQCHIP, \
316 .u.irqchip = { .irqchip = SELECT_PIC(irq), .pin = (irq) % 8 } }
317 #define ROUTING_ENTRY2(irq) \
318 IOAPIC_ROUTING_ENTRY(irq), PIC_ROUTING_ENTRY(irq)
320 static const struct kvm_irq_routing_entry default_routing[] = {
321 ROUTING_ENTRY2(0), ROUTING_ENTRY2(1),
322 ROUTING_ENTRY2(2), ROUTING_ENTRY2(3),
323 ROUTING_ENTRY2(4), ROUTING_ENTRY2(5),
324 ROUTING_ENTRY2(6), ROUTING_ENTRY2(7),
325 ROUTING_ENTRY2(8), ROUTING_ENTRY2(9),
326 ROUTING_ENTRY2(10), ROUTING_ENTRY2(11),
327 ROUTING_ENTRY2(12), ROUTING_ENTRY2(13),
328 ROUTING_ENTRY2(14), ROUTING_ENTRY2(15),
329 ROUTING_ENTRY1(16), ROUTING_ENTRY1(17),
330 ROUTING_ENTRY1(18), ROUTING_ENTRY1(19),
331 ROUTING_ENTRY1(20), ROUTING_ENTRY1(21),
332 ROUTING_ENTRY1(22), ROUTING_ENTRY1(23),
335 int kvm_setup_default_irq_routing(struct kvm *kvm)
337 return kvm_set_irq_routing(kvm, default_routing,
338 ARRAY_SIZE(default_routing), 0);
341 static const struct kvm_irq_routing_entry empty_routing[] = {};
343 int kvm_setup_empty_irq_routing(struct kvm *kvm)
345 return kvm_set_irq_routing(kvm, empty_routing, 0, 0);
348 void kvm_arch_irq_routing_update(struct kvm *kvm)
350 if (ioapic_in_kernel(kvm) || !irqchip_in_kernel(kvm))
352 kvm_make_scan_ioapic_request(kvm);
355 void kvm_scan_ioapic_routes(struct kvm_vcpu *vcpu, u64 *eoi_exit_bitmap)
357 struct kvm *kvm = vcpu->kvm;
358 struct kvm_kernel_irq_routing_entry *entry;
359 struct kvm_irq_routing_table *table;
360 u32 i, nr_ioapic_pins;
363 /* kvm->irq_routing must be read after clearing
364 * KVM_SCAN_IOAPIC. */
366 idx = srcu_read_lock(&kvm->irq_srcu);
367 table = srcu_dereference(kvm->irq_routing, &kvm->irq_srcu);
368 nr_ioapic_pins = min_t(u32, table->nr_rt_entries,
369 kvm->arch.nr_reserved_ioapic_pins);
370 for (i = 0; i < nr_ioapic_pins; ++i) {
371 hlist_for_each_entry(entry, &table->map[i], link) {
372 u32 dest_id, dest_mode;
375 if (entry->type != KVM_IRQ_ROUTING_MSI)
377 dest_id = (entry->msi.address_lo >> 12) & 0xff;
378 dest_mode = (entry->msi.address_lo >> 2) & 0x1;
379 level = entry->msi.data & MSI_DATA_TRIGGER_LEVEL;
380 if (level && kvm_apic_match_dest(vcpu, NULL, 0,
381 dest_id, dest_mode)) {
382 u32 vector = entry->msi.data & 0xff;
385 (unsigned long *) eoi_exit_bitmap);
389 srcu_read_unlock(&kvm->irq_srcu, idx);