2 * 8259 interrupt controller emulation
4 * Copyright (c) 2003-2004 Fabrice Bellard
5 * Copyright (c) 2007 Intel Corporation
6 * Copyright 2009 Red Hat, Inc. and/or its affilates.
8 * Permission is hereby granted, free of charge, to any person obtaining a copy
9 * of this software and associated documentation files (the "Software"), to deal
10 * in the Software without restriction, including without limitation the rights
11 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
12 * copies of the Software, and to permit persons to whom the Software is
13 * furnished to do so, subject to the following conditions:
15 * The above copyright notice and this permission notice shall be included in
16 * all copies or substantial portions of the Software.
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
21 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
22 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
23 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
26 * Yaozu (Eddie) Dong <Eddie.dong@intel.com>
30 #include <linux/slab.h>
31 #include <linux/bitops.h>
34 #include <linux/kvm_host.h>
37 static void pic_irq_request(struct kvm *kvm, int level);
39 static void pic_lock(struct kvm_pic *s)
42 raw_spin_lock(&s->lock);
45 static void pic_unlock(struct kvm_pic *s)
48 bool wakeup = s->wakeup_needed;
49 struct kvm_vcpu *vcpu, *found = NULL;
52 s->wakeup_needed = false;
54 raw_spin_unlock(&s->lock);
57 kvm_for_each_vcpu(i, vcpu, s->kvm) {
58 if (kvm_apic_accept_pic_intr(vcpu)) {
65 found = s->kvm->bsp_vcpu;
74 static void pic_clear_isr(struct kvm_kpic_state *s, int irq)
76 s->isr &= ~(1 << irq);
77 s->isr_ack |= (1 << irq);
78 if (s != &s->pics_state->pics[0])
81 * We are dropping lock while calling ack notifiers since ack
82 * notifier callbacks for assigned devices call into PIC recursively.
83 * Other interrupt may be delivered to PIC while lock is dropped but
84 * it should be safe since PIC state is already updated at this stage.
86 pic_unlock(s->pics_state);
87 kvm_notify_acked_irq(s->pics_state->kvm, SELECT_PIC(irq), irq);
88 pic_lock(s->pics_state);
91 void kvm_pic_clear_isr_ack(struct kvm *kvm)
93 struct kvm_pic *s = pic_irqchip(kvm);
96 s->pics[0].isr_ack = 0xff;
97 s->pics[1].isr_ack = 0xff;
102 * set irq level. If an edge is detected, then the IRR is set to 1
104 static inline int pic_set_irq1(struct kvm_kpic_state *s, int irq, int level)
108 if (s->elcr & mask) /* level triggered */
110 ret = !(s->irr & mask);
115 s->last_irr &= ~mask;
117 else /* edge triggered */
119 if ((s->last_irr & mask) == 0) {
120 ret = !(s->irr & mask);
125 s->last_irr &= ~mask;
127 return (s->imr & mask) ? -1 : ret;
131 * return the highest priority found in mask (highest = smallest
132 * number). Return 8 if no irq
134 static inline int get_priority(struct kvm_kpic_state *s, int mask)
140 while ((mask & (1 << ((priority + s->priority_add) & 7))) == 0)
146 * return the pic wanted interrupt. return -1 if none
148 static int pic_get_irq(struct kvm_kpic_state *s)
150 int mask, cur_priority, priority;
152 mask = s->irr & ~s->imr;
153 priority = get_priority(s, mask);
157 * compute current priority. If special fully nested mode on the
158 * master, the IRQ coming from the slave is not taken into account
159 * for the priority computation.
162 if (s->special_fully_nested_mode && s == &s->pics_state->pics[0])
164 cur_priority = get_priority(s, mask);
165 if (priority < cur_priority)
167 * higher priority found: an irq should be generated
169 return (priority + s->priority_add) & 7;
175 * raise irq to CPU if necessary. must be called every time the active
178 static void pic_update_irq(struct kvm_pic *s)
182 irq2 = pic_get_irq(&s->pics[1]);
185 * if irq request by slave pic, signal master PIC
187 pic_set_irq1(&s->pics[0], 2, 1);
188 pic_set_irq1(&s->pics[0], 2, 0);
190 irq = pic_get_irq(&s->pics[0]);
191 pic_irq_request(s->kvm, irq >= 0);
194 void kvm_pic_update_irq(struct kvm_pic *s)
201 int kvm_pic_set_irq(void *opaque, int irq, int level)
203 struct kvm_pic *s = opaque;
207 if (irq >= 0 && irq < PIC_NUM_PINS) {
208 ret = pic_set_irq1(&s->pics[irq >> 3], irq & 7, level);
210 trace_kvm_pic_set_irq(irq >> 3, irq & 7, s->pics[irq >> 3].elcr,
211 s->pics[irq >> 3].imr, ret == 0);
219 * acknowledge interrupt 'irq'
221 static inline void pic_intack(struct kvm_kpic_state *s, int irq)
225 * We don't clear a level sensitive interrupt here
227 if (!(s->elcr & (1 << irq)))
228 s->irr &= ~(1 << irq);
231 if (s->rotate_on_auto_eoi)
232 s->priority_add = (irq + 1) & 7;
233 pic_clear_isr(s, irq);
238 int kvm_pic_read_irq(struct kvm *kvm)
240 int irq, irq2, intno;
241 struct kvm_pic *s = pic_irqchip(kvm);
244 irq = pic_get_irq(&s->pics[0]);
246 pic_intack(&s->pics[0], irq);
248 irq2 = pic_get_irq(&s->pics[1]);
250 pic_intack(&s->pics[1], irq2);
253 * spurious IRQ on slave controller
256 intno = s->pics[1].irq_base + irq2;
259 intno = s->pics[0].irq_base + irq;
262 * spurious IRQ on host controller
265 intno = s->pics[0].irq_base + irq;
273 void kvm_pic_reset(struct kvm_kpic_state *s)
276 struct kvm_vcpu *vcpu0 = s->pics_state->kvm->bsp_vcpu;
277 u8 irr = s->irr, isr = s->imr;
286 s->read_reg_select = 0;
291 s->rotate_on_auto_eoi = 0;
292 s->special_fully_nested_mode = 0;
295 for (irq = 0; irq < PIC_NUM_PINS/2; irq++) {
296 if (vcpu0 && kvm_apic_accept_pic_intr(vcpu0))
297 if (irr & (1 << irq) || isr & (1 << irq)) {
298 pic_clear_isr(s, irq);
303 static void pic_ioport_write(void *opaque, u32 addr, u32 val)
305 struct kvm_kpic_state *s = opaque;
306 int priority, cmd, irq;
311 kvm_pic_reset(s); /* init */
313 * deassert a pending interrupt
315 pic_irq_request(s->pics_state->kvm, 0);
319 printk(KERN_ERR "single mode not supported");
322 "level sensitive irq not supported");
323 } else if (val & 0x08) {
327 s->read_reg_select = val & 1;
329 s->special_mask = (val >> 5) & 1;
335 s->rotate_on_auto_eoi = cmd >> 2;
337 case 1: /* end of interrupt */
339 priority = get_priority(s, s->isr);
341 irq = (priority + s->priority_add) & 7;
343 s->priority_add = (irq + 1) & 7;
344 pic_clear_isr(s, irq);
345 pic_update_irq(s->pics_state);
350 pic_clear_isr(s, irq);
351 pic_update_irq(s->pics_state);
354 s->priority_add = (val + 1) & 7;
355 pic_update_irq(s->pics_state);
359 s->priority_add = (irq + 1) & 7;
360 pic_clear_isr(s, irq);
361 pic_update_irq(s->pics_state);
364 break; /* no operation */
368 switch (s->init_state) {
369 case 0: { /* normal mode */
370 u8 imr_diff = s->imr ^ val,
371 off = (s == &s->pics_state->pics[0]) ? 0 : 8;
373 for (irq = 0; irq < PIC_NUM_PINS/2; irq++)
374 if (imr_diff & (1 << irq))
375 kvm_fire_mask_notifiers(
377 SELECT_PIC(irq + off),
379 !!(s->imr & (1 << irq)));
380 pic_update_irq(s->pics_state);
384 s->irq_base = val & 0xf8;
394 s->special_fully_nested_mode = (val >> 4) & 1;
395 s->auto_eoi = (val >> 1) & 1;
401 static u32 pic_poll_read(struct kvm_kpic_state *s, u32 addr1)
405 ret = pic_get_irq(s);
408 s->pics_state->pics[0].isr &= ~(1 << 2);
409 s->pics_state->pics[0].irr &= ~(1 << 2);
411 s->irr &= ~(1 << ret);
412 pic_clear_isr(s, ret);
413 if (addr1 >> 7 || ret != 2)
414 pic_update_irq(s->pics_state);
417 pic_update_irq(s->pics_state);
423 static u32 pic_ioport_read(void *opaque, u32 addr1)
425 struct kvm_kpic_state *s = opaque;
432 ret = pic_poll_read(s, addr1);
436 if (s->read_reg_select)
445 static void elcr_ioport_write(void *opaque, u32 addr, u32 val)
447 struct kvm_kpic_state *s = opaque;
448 s->elcr = val & s->elcr_mask;
451 static u32 elcr_ioport_read(void *opaque, u32 addr1)
453 struct kvm_kpic_state *s = opaque;
457 static int picdev_in_range(gpa_t addr)
472 static inline struct kvm_pic *to_pic(struct kvm_io_device *dev)
474 return container_of(dev, struct kvm_pic, dev);
477 static int picdev_write(struct kvm_io_device *this,
478 gpa_t addr, int len, const void *val)
480 struct kvm_pic *s = to_pic(this);
481 unsigned char data = *(unsigned char *)val;
482 if (!picdev_in_range(addr))
486 if (printk_ratelimit())
487 printk(KERN_ERR "PIC: non byte write\n");
496 pic_ioport_write(&s->pics[addr >> 7], addr, data);
500 elcr_ioport_write(&s->pics[addr & 1], addr, data);
507 static int picdev_read(struct kvm_io_device *this,
508 gpa_t addr, int len, void *val)
510 struct kvm_pic *s = to_pic(this);
511 unsigned char data = 0;
512 if (!picdev_in_range(addr))
516 if (printk_ratelimit())
517 printk(KERN_ERR "PIC: non byte read\n");
526 data = pic_ioport_read(&s->pics[addr >> 7], addr);
530 data = elcr_ioport_read(&s->pics[addr & 1], addr);
533 *(unsigned char *)val = data;
539 * callback when PIC0 irq status changed
541 static void pic_irq_request(struct kvm *kvm, int level)
543 struct kvm_vcpu *vcpu = kvm->bsp_vcpu;
544 struct kvm_pic *s = pic_irqchip(kvm);
545 int irq = pic_get_irq(&s->pics[0]);
548 if (vcpu && level && (s->pics[0].isr_ack & (1 << irq))) {
549 s->pics[0].isr_ack &= ~(1 << irq);
550 s->wakeup_needed = true;
554 static const struct kvm_io_device_ops picdev_ops = {
556 .write = picdev_write,
559 struct kvm_pic *kvm_create_pic(struct kvm *kvm)
564 s = kzalloc(sizeof(struct kvm_pic), GFP_KERNEL);
567 raw_spin_lock_init(&s->lock);
569 s->pics[0].elcr_mask = 0xf8;
570 s->pics[1].elcr_mask = 0xde;
571 s->pics[0].pics_state = s;
572 s->pics[1].pics_state = s;
575 * Initialize PIO device
577 kvm_iodevice_init(&s->dev, &picdev_ops);
578 mutex_lock(&kvm->slots_lock);
579 ret = kvm_io_bus_register_dev(kvm, KVM_PIO_BUS, &s->dev);
580 mutex_unlock(&kvm->slots_lock);
589 void kvm_destroy_pic(struct kvm *kvm)
591 struct kvm_pic *vpic = kvm->arch.vpic;
594 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS, &vpic->dev);
595 kvm->arch.vpic = NULL;