2 * 8259 interrupt controller emulation
4 * Copyright (c) 2003-2004 Fabrice Bellard
5 * Copyright (c) 2007 Intel Corporation
6 * Copyright 2009 Red Hat, Inc. and/or its affilates.
8 * Permission is hereby granted, free of charge, to any person obtaining a copy
9 * of this software and associated documentation files (the "Software"), to deal
10 * in the Software without restriction, including without limitation the rights
11 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
12 * copies of the Software, and to permit persons to whom the Software is
13 * furnished to do so, subject to the following conditions:
15 * The above copyright notice and this permission notice shall be included in
16 * all copies or substantial portions of the Software.
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
21 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
22 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
23 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
26 * Yaozu (Eddie) Dong <Eddie.dong@intel.com>
30 #include <linux/slab.h>
31 #include <linux/bitops.h>
34 #include <linux/kvm_host.h>
37 static void pic_irq_request(struct kvm *kvm, int level);
39 static void pic_lock(struct kvm_pic *s)
42 raw_spin_lock(&s->lock);
45 static void pic_unlock(struct kvm_pic *s)
48 bool wakeup = s->wakeup_needed;
49 struct kvm_vcpu *vcpu, *found = NULL;
52 s->wakeup_needed = false;
54 raw_spin_unlock(&s->lock);
57 kvm_for_each_vcpu(i, vcpu, s->kvm) {
58 if (kvm_apic_accept_pic_intr(vcpu)) {
65 found = s->kvm->bsp_vcpu;
71 static void pic_clear_isr(struct kvm_kpic_state *s, int irq)
73 s->isr &= ~(1 << irq);
74 s->isr_ack |= (1 << irq);
75 if (s != &s->pics_state->pics[0])
78 * We are dropping lock while calling ack notifiers since ack
79 * notifier callbacks for assigned devices call into PIC recursively.
80 * Other interrupt may be delivered to PIC while lock is dropped but
81 * it should be safe since PIC state is already updated at this stage.
83 pic_unlock(s->pics_state);
84 kvm_notify_acked_irq(s->pics_state->kvm, SELECT_PIC(irq), irq);
85 pic_lock(s->pics_state);
88 void kvm_pic_clear_isr_ack(struct kvm *kvm)
90 struct kvm_pic *s = pic_irqchip(kvm);
93 s->pics[0].isr_ack = 0xff;
94 s->pics[1].isr_ack = 0xff;
99 * set irq level. If an edge is detected, then the IRR is set to 1
101 static inline int pic_set_irq1(struct kvm_kpic_state *s, int irq, int level)
105 if (s->elcr & mask) /* level triggered */
107 ret = !(s->irr & mask);
112 s->last_irr &= ~mask;
114 else /* edge triggered */
116 if ((s->last_irr & mask) == 0) {
117 ret = !(s->irr & mask);
122 s->last_irr &= ~mask;
124 return (s->imr & mask) ? -1 : ret;
128 * return the highest priority found in mask (highest = smallest
129 * number). Return 8 if no irq
131 static inline int get_priority(struct kvm_kpic_state *s, int mask)
137 while ((mask & (1 << ((priority + s->priority_add) & 7))) == 0)
143 * return the pic wanted interrupt. return -1 if none
145 static int pic_get_irq(struct kvm_kpic_state *s)
147 int mask, cur_priority, priority;
149 mask = s->irr & ~s->imr;
150 priority = get_priority(s, mask);
154 * compute current priority. If special fully nested mode on the
155 * master, the IRQ coming from the slave is not taken into account
156 * for the priority computation.
159 if (s->special_fully_nested_mode && s == &s->pics_state->pics[0])
161 cur_priority = get_priority(s, mask);
162 if (priority < cur_priority)
164 * higher priority found: an irq should be generated
166 return (priority + s->priority_add) & 7;
172 * raise irq to CPU if necessary. must be called every time the active
175 static void pic_update_irq(struct kvm_pic *s)
179 irq2 = pic_get_irq(&s->pics[1]);
182 * if irq request by slave pic, signal master PIC
184 pic_set_irq1(&s->pics[0], 2, 1);
185 pic_set_irq1(&s->pics[0], 2, 0);
187 irq = pic_get_irq(&s->pics[0]);
188 pic_irq_request(s->kvm, irq >= 0);
191 void kvm_pic_update_irq(struct kvm_pic *s)
198 int kvm_pic_set_irq(void *opaque, int irq, int level)
200 struct kvm_pic *s = opaque;
204 if (irq >= 0 && irq < PIC_NUM_PINS) {
205 ret = pic_set_irq1(&s->pics[irq >> 3], irq & 7, level);
207 trace_kvm_pic_set_irq(irq >> 3, irq & 7, s->pics[irq >> 3].elcr,
208 s->pics[irq >> 3].imr, ret == 0);
216 * acknowledge interrupt 'irq'
218 static inline void pic_intack(struct kvm_kpic_state *s, int irq)
222 * We don't clear a level sensitive interrupt here
224 if (!(s->elcr & (1 << irq)))
225 s->irr &= ~(1 << irq);
228 if (s->rotate_on_auto_eoi)
229 s->priority_add = (irq + 1) & 7;
230 pic_clear_isr(s, irq);
235 int kvm_pic_read_irq(struct kvm *kvm)
237 int irq, irq2, intno;
238 struct kvm_pic *s = pic_irqchip(kvm);
241 irq = pic_get_irq(&s->pics[0]);
243 pic_intack(&s->pics[0], irq);
245 irq2 = pic_get_irq(&s->pics[1]);
247 pic_intack(&s->pics[1], irq2);
250 * spurious IRQ on slave controller
253 intno = s->pics[1].irq_base + irq2;
256 intno = s->pics[0].irq_base + irq;
259 * spurious IRQ on host controller
262 intno = s->pics[0].irq_base + irq;
270 void kvm_pic_reset(struct kvm_kpic_state *s)
273 struct kvm_vcpu *vcpu0 = s->pics_state->kvm->bsp_vcpu;
274 u8 irr = s->irr, isr = s->imr;
283 s->read_reg_select = 0;
288 s->rotate_on_auto_eoi = 0;
289 s->special_fully_nested_mode = 0;
292 for (irq = 0; irq < PIC_NUM_PINS/2; irq++) {
293 if (vcpu0 && kvm_apic_accept_pic_intr(vcpu0))
294 if (irr & (1 << irq) || isr & (1 << irq)) {
295 pic_clear_isr(s, irq);
300 static void pic_ioport_write(void *opaque, u32 addr, u32 val)
302 struct kvm_kpic_state *s = opaque;
303 int priority, cmd, irq;
308 kvm_pic_reset(s); /* init */
310 * deassert a pending interrupt
312 pic_irq_request(s->pics_state->kvm, 0);
316 printk(KERN_ERR "single mode not supported");
319 "level sensitive irq not supported");
320 } else if (val & 0x08) {
324 s->read_reg_select = val & 1;
326 s->special_mask = (val >> 5) & 1;
332 s->rotate_on_auto_eoi = cmd >> 2;
334 case 1: /* end of interrupt */
336 priority = get_priority(s, s->isr);
338 irq = (priority + s->priority_add) & 7;
340 s->priority_add = (irq + 1) & 7;
341 pic_clear_isr(s, irq);
342 pic_update_irq(s->pics_state);
347 pic_clear_isr(s, irq);
348 pic_update_irq(s->pics_state);
351 s->priority_add = (val + 1) & 7;
352 pic_update_irq(s->pics_state);
356 s->priority_add = (irq + 1) & 7;
357 pic_clear_isr(s, irq);
358 pic_update_irq(s->pics_state);
361 break; /* no operation */
365 switch (s->init_state) {
366 case 0: { /* normal mode */
367 u8 imr_diff = s->imr ^ val,
368 off = (s == &s->pics_state->pics[0]) ? 0 : 8;
370 for (irq = 0; irq < PIC_NUM_PINS/2; irq++)
371 if (imr_diff & (1 << irq))
372 kvm_fire_mask_notifiers(
374 SELECT_PIC(irq + off),
376 !!(s->imr & (1 << irq)));
377 pic_update_irq(s->pics_state);
381 s->irq_base = val & 0xf8;
391 s->special_fully_nested_mode = (val >> 4) & 1;
392 s->auto_eoi = (val >> 1) & 1;
398 static u32 pic_poll_read(struct kvm_kpic_state *s, u32 addr1)
402 ret = pic_get_irq(s);
405 s->pics_state->pics[0].isr &= ~(1 << 2);
406 s->pics_state->pics[0].irr &= ~(1 << 2);
408 s->irr &= ~(1 << ret);
409 pic_clear_isr(s, ret);
410 if (addr1 >> 7 || ret != 2)
411 pic_update_irq(s->pics_state);
414 pic_update_irq(s->pics_state);
420 static u32 pic_ioport_read(void *opaque, u32 addr1)
422 struct kvm_kpic_state *s = opaque;
429 ret = pic_poll_read(s, addr1);
433 if (s->read_reg_select)
442 static void elcr_ioport_write(void *opaque, u32 addr, u32 val)
444 struct kvm_kpic_state *s = opaque;
445 s->elcr = val & s->elcr_mask;
448 static u32 elcr_ioport_read(void *opaque, u32 addr1)
450 struct kvm_kpic_state *s = opaque;
454 static int picdev_in_range(gpa_t addr)
469 static inline struct kvm_pic *to_pic(struct kvm_io_device *dev)
471 return container_of(dev, struct kvm_pic, dev);
474 static int picdev_write(struct kvm_io_device *this,
475 gpa_t addr, int len, const void *val)
477 struct kvm_pic *s = to_pic(this);
478 unsigned char data = *(unsigned char *)val;
479 if (!picdev_in_range(addr))
483 if (printk_ratelimit())
484 printk(KERN_ERR "PIC: non byte write\n");
493 pic_ioport_write(&s->pics[addr >> 7], addr, data);
497 elcr_ioport_write(&s->pics[addr & 1], addr, data);
504 static int picdev_read(struct kvm_io_device *this,
505 gpa_t addr, int len, void *val)
507 struct kvm_pic *s = to_pic(this);
508 unsigned char data = 0;
509 if (!picdev_in_range(addr))
513 if (printk_ratelimit())
514 printk(KERN_ERR "PIC: non byte read\n");
523 data = pic_ioport_read(&s->pics[addr >> 7], addr);
527 data = elcr_ioport_read(&s->pics[addr & 1], addr);
530 *(unsigned char *)val = data;
536 * callback when PIC0 irq status changed
538 static void pic_irq_request(struct kvm *kvm, int level)
540 struct kvm_vcpu *vcpu = kvm->bsp_vcpu;
541 struct kvm_pic *s = pic_irqchip(kvm);
542 int irq = pic_get_irq(&s->pics[0]);
545 if (vcpu && level && (s->pics[0].isr_ack & (1 << irq))) {
546 s->pics[0].isr_ack &= ~(1 << irq);
547 s->wakeup_needed = true;
551 static const struct kvm_io_device_ops picdev_ops = {
553 .write = picdev_write,
556 struct kvm_pic *kvm_create_pic(struct kvm *kvm)
561 s = kzalloc(sizeof(struct kvm_pic), GFP_KERNEL);
564 raw_spin_lock_init(&s->lock);
566 s->pics[0].elcr_mask = 0xf8;
567 s->pics[1].elcr_mask = 0xde;
568 s->pics[0].pics_state = s;
569 s->pics[1].pics_state = s;
572 * Initialize PIO device
574 kvm_iodevice_init(&s->dev, &picdev_ops);
575 mutex_lock(&kvm->slots_lock);
576 ret = kvm_io_bus_register_dev(kvm, KVM_PIO_BUS, &s->dev);
577 mutex_unlock(&kvm->slots_lock);
586 void kvm_destroy_pic(struct kvm *kvm)
588 struct kvm_pic *vpic = kvm->arch.vpic;
591 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS, &vpic->dev);
592 kvm->arch.vpic = NULL;