2 * x86 SMP booting functions
4 * (c) 1995 Alan Cox, Building #3 <alan@lxorguk.ukuu.org.uk>
5 * (c) 1998, 1999, 2000, 2009 Ingo Molnar <mingo@redhat.com>
6 * Copyright 2001 Andi Kleen, SuSE Labs.
8 * Much of the core SMP work is based on previous work by Thomas Radke, to
9 * whom a great many thanks are extended.
11 * Thanks to Intel for making available several different Pentium,
12 * Pentium Pro and Pentium-II/Xeon MP machines.
13 * Original development of Linux SMP code supported by Caldera.
15 * This code is released under the GNU General Public License version 2 or
19 * Felix Koop : NR_CPUS used properly
20 * Jose Renau : Handle single CPU case.
21 * Alan Cox : By repeated request 8) - Total BogoMIPS report.
22 * Greg Wright : Fix for kernel stacks panic.
23 * Erich Boleyn : MP v1.4 and additional changes.
24 * Matthias Sattler : Changes for 2.1 kernel map.
25 * Michel Lespinasse : Changes for 2.1 kernel map.
26 * Michael Chastain : Change trampoline.S to gnu as.
27 * Alan Cox : Dumb bug: 'B' step PPro's are fine
28 * Ingo Molnar : Added APIC timers, based on code
30 * Ingo Molnar : various cleanups and rewrites
31 * Tigran Aivazian : fixed "0.00 in /proc/uptime on SMP" bug.
32 * Maciej W. Rozycki : Bits for genuine 82489DX APICs
33 * Andi Kleen : Changed for SMP boot into long mode.
34 * Martin J. Bligh : Added support for multi-quad systems
35 * Dave Jones : Report invalid combinations of Athlon CPUs.
36 * Rusty Russell : Hacked into shape for new "hotplug" boot process.
37 * Andi Kleen : Converted to new state machine.
38 * Ashok Raj : CPU hotplug support
39 * Glauber Costa : i386 and x86_64 integration
42 #include <linux/init.h>
43 #include <linux/smp.h>
44 #include <linux/module.h>
45 #include <linux/sched.h>
46 #include <linux/percpu.h>
47 #include <linux/bootmem.h>
48 #include <linux/err.h>
49 #include <linux/nmi.h>
50 #include <linux/tboot.h>
57 #include <asm/trampoline.h>
60 #include <asm/pgtable.h>
61 #include <asm/tlbflush.h>
65 #include <asm/setup.h>
66 #include <asm/uv/uv.h>
67 #include <linux/mc146818rtc.h>
69 #include <asm/smpboot_hooks.h>
72 u8 apicid_2_node[MAX_APICID];
73 static int low_mappings;
76 /* State of each CPU */
77 DEFINE_PER_CPU(int, cpu_state) = { 0 };
79 /* Store all idle threads, this can be reused instead of creating
80 * a new thread. Also avoids complicated thread destroy functionality
83 #ifdef CONFIG_HOTPLUG_CPU
85 * Needed only for CONFIG_HOTPLUG_CPU because __cpuinitdata is
86 * removed after init for !CONFIG_HOTPLUG_CPU.
88 static DEFINE_PER_CPU(struct task_struct *, idle_thread_array);
89 #define get_idle_for_cpu(x) (per_cpu(idle_thread_array, x))
90 #define set_idle_for_cpu(x, p) (per_cpu(idle_thread_array, x) = (p))
92 static struct task_struct *idle_thread_array[NR_CPUS] __cpuinitdata ;
93 #define get_idle_for_cpu(x) (idle_thread_array[(x)])
94 #define set_idle_for_cpu(x, p) (idle_thread_array[(x)] = (p))
97 /* Number of siblings per CPU package */
98 int smp_num_siblings = 1;
99 EXPORT_SYMBOL(smp_num_siblings);
101 /* Last level cache ID of each logical CPU */
102 DEFINE_PER_CPU(u16, cpu_llc_id) = BAD_APICID;
104 /* representing HT siblings of each logical CPU */
105 DEFINE_PER_CPU(cpumask_var_t, cpu_sibling_map);
106 EXPORT_PER_CPU_SYMBOL(cpu_sibling_map);
108 /* representing HT and core siblings of each logical CPU */
109 DEFINE_PER_CPU(cpumask_var_t, cpu_core_map);
110 EXPORT_PER_CPU_SYMBOL(cpu_core_map);
112 /* Per CPU bogomips and other parameters */
113 DEFINE_PER_CPU_SHARED_ALIGNED(struct cpuinfo_x86, cpu_info);
114 EXPORT_PER_CPU_SYMBOL(cpu_info);
116 atomic_t init_deasserted;
118 #if defined(CONFIG_NUMA) && defined(CONFIG_X86_32)
119 /* which node each logical CPU is on */
120 int cpu_to_node_map[NR_CPUS] __read_mostly = { [0 ... NR_CPUS-1] = 0 };
121 EXPORT_SYMBOL(cpu_to_node_map);
123 /* set up a mapping between cpu and node. */
124 static void map_cpu_to_node(int cpu, int node)
126 printk(KERN_INFO "Mapping cpu %d to node %d\n", cpu, node);
127 cpumask_set_cpu(cpu, node_to_cpumask_map[node]);
128 cpu_to_node_map[cpu] = node;
131 /* undo a mapping between cpu and node. */
132 static void unmap_cpu_to_node(int cpu)
136 printk(KERN_INFO "Unmapping cpu %d from all nodes\n", cpu);
137 for (node = 0; node < MAX_NUMNODES; node++)
138 cpumask_clear_cpu(cpu, node_to_cpumask_map[node]);
139 cpu_to_node_map[cpu] = 0;
141 #else /* !(CONFIG_NUMA && CONFIG_X86_32) */
142 #define map_cpu_to_node(cpu, node) ({})
143 #define unmap_cpu_to_node(cpu) ({})
147 static int boot_cpu_logical_apicid;
149 u8 cpu_2_logical_apicid[NR_CPUS] __read_mostly =
150 { [0 ... NR_CPUS-1] = BAD_APICID };
152 static void map_cpu_to_logical_apicid(void)
154 int cpu = smp_processor_id();
155 int apicid = logical_smp_processor_id();
156 int node = apic->apicid_to_node(apicid);
158 if (!node_online(node))
159 node = first_online_node;
161 cpu_2_logical_apicid[cpu] = apicid;
162 map_cpu_to_node(cpu, node);
165 void numa_remove_cpu(int cpu)
167 cpu_2_logical_apicid[cpu] = BAD_APICID;
168 unmap_cpu_to_node(cpu);
171 #define map_cpu_to_logical_apicid() do {} while (0)
175 * Report back to the Boot Processor.
178 static void __cpuinit smp_callin(void)
181 unsigned long timeout;
184 * If waken up by an INIT in an 82489DX configuration
185 * we may get here before an INIT-deassert IPI reaches
186 * our local APIC. We have to wait for the IPI or we'll
187 * lock up on an APIC access.
189 if (apic->wait_for_init_deassert)
190 apic->wait_for_init_deassert(&init_deasserted);
193 * (This works even if the APIC is not enabled.)
195 phys_id = read_apic_id();
196 cpuid = smp_processor_id();
197 if (cpumask_test_cpu(cpuid, cpu_callin_mask)) {
198 panic("%s: phys CPU#%d, CPU#%d already present??\n", __func__,
201 pr_debug("CPU#%d (phys ID: %d) waiting for CALLOUT\n", cpuid, phys_id);
204 * STARTUP IPIs are fragile beasts as they might sometimes
205 * trigger some glue motherboard logic. Complete APIC bus
206 * silence for 1 second, this overestimates the time the
207 * boot CPU is spending to send the up to 2 STARTUP IPIs
208 * by a factor of two. This should be enough.
212 * Waiting 2s total for startup (udelay is not yet working)
214 timeout = jiffies + 2*HZ;
215 while (time_before(jiffies, timeout)) {
217 * Has the boot CPU finished it's STARTUP sequence?
219 if (cpumask_test_cpu(cpuid, cpu_callout_mask))
224 if (!time_before(jiffies, timeout)) {
225 panic("%s: CPU%d started up but did not get a callout!\n",
230 * the boot CPU has finished the init stage and is spinning
231 * on callin_map until we finish. We are free to set up this
232 * CPU, first the APIC. (this is probably redundant on most
236 pr_debug("CALLIN, before setup_local_APIC().\n");
237 if (apic->smp_callin_clear_local_apic)
238 apic->smp_callin_clear_local_apic();
240 end_local_APIC_setup();
241 map_cpu_to_logical_apicid();
243 notify_cpu_starting(cpuid);
246 * Need to setup vector mappings before we enable interrupts.
248 __setup_vector_irq(smp_processor_id());
252 * Need to enable IRQs because it can take longer and then
253 * the NMI watchdog might kill us.
258 pr_debug("Stack at about %p\n", &cpuid);
261 * Save our processor parameters
263 smp_store_cpu_info(cpuid);
266 * Allow the master to continue.
268 cpumask_set_cpu(cpuid, cpu_callin_mask);
272 * Activate a secondary processor.
274 notrace static void __cpuinit start_secondary(void *unused)
277 * Don't put *anything* before cpu_init(), SMP booting is too
278 * fragile that we want to limit the things done here to the
279 * most necessary things.
286 /* otherwise gcc will move up smp_processor_id before the cpu_init */
289 * Check TSC synchronization with the BP:
291 check_tsc_sync_target();
293 if (nmi_watchdog == NMI_IO_APIC) {
294 disable_8259A_irq(0);
295 enable_NMI_through_LVT0();
305 /* This must be done before setting cpu_online_mask */
306 set_cpu_sibling_map(raw_smp_processor_id());
310 * We need to hold call_lock, so there is no inconsistency
311 * between the time smp_call_function() determines number of
312 * IPI recipients, and the time when the determination is made
313 * for which cpus receive the IPI. Holding this
314 * lock helps us to not include this cpu in a currently in progress
315 * smp_call_function().
317 * We need to hold vector_lock so there the set of online cpus
318 * does not change while we are assigning vectors to cpus. Holding
319 * this lock ensures we don't half assign or remove an irq from a cpu.
323 set_cpu_online(smp_processor_id(), true);
324 unlock_vector_lock();
326 per_cpu(cpu_state, smp_processor_id()) = CPU_ONLINE;
327 x86_platform.nmi_init();
329 /* enable local interrupts */
332 x86_cpuinit.setup_percpu_clockev();
338 #ifdef CONFIG_CPUMASK_OFFSTACK
339 /* In this case, llc_shared_map is a pointer to a cpumask. */
340 static inline void copy_cpuinfo_x86(struct cpuinfo_x86 *dst,
341 const struct cpuinfo_x86 *src)
343 struct cpumask *llc = dst->llc_shared_map;
345 dst->llc_shared_map = llc;
348 static inline void copy_cpuinfo_x86(struct cpuinfo_x86 *dst,
349 const struct cpuinfo_x86 *src)
353 #endif /* CONFIG_CPUMASK_OFFSTACK */
356 * The bootstrap kernel entry code has set these up. Save them for
360 void __cpuinit smp_store_cpu_info(int id)
362 struct cpuinfo_x86 *c = &cpu_data(id);
364 copy_cpuinfo_x86(c, &boot_cpu_data);
367 identify_secondary_cpu(c);
371 void __cpuinit set_cpu_sibling_map(int cpu)
374 struct cpuinfo_x86 *c = &cpu_data(cpu);
376 cpumask_set_cpu(cpu, cpu_sibling_setup_mask);
378 if (smp_num_siblings > 1) {
379 for_each_cpu(i, cpu_sibling_setup_mask) {
380 struct cpuinfo_x86 *o = &cpu_data(i);
382 if (c->phys_proc_id == o->phys_proc_id &&
383 c->cpu_core_id == o->cpu_core_id) {
384 cpumask_set_cpu(i, cpu_sibling_mask(cpu));
385 cpumask_set_cpu(cpu, cpu_sibling_mask(i));
386 cpumask_set_cpu(i, cpu_core_mask(cpu));
387 cpumask_set_cpu(cpu, cpu_core_mask(i));
388 cpumask_set_cpu(i, c->llc_shared_map);
389 cpumask_set_cpu(cpu, o->llc_shared_map);
393 cpumask_set_cpu(cpu, cpu_sibling_mask(cpu));
396 cpumask_set_cpu(cpu, c->llc_shared_map);
398 if (current_cpu_data.x86_max_cores == 1) {
399 cpumask_copy(cpu_core_mask(cpu), cpu_sibling_mask(cpu));
404 for_each_cpu(i, cpu_sibling_setup_mask) {
405 if (per_cpu(cpu_llc_id, cpu) != BAD_APICID &&
406 per_cpu(cpu_llc_id, cpu) == per_cpu(cpu_llc_id, i)) {
407 cpumask_set_cpu(i, c->llc_shared_map);
408 cpumask_set_cpu(cpu, cpu_data(i).llc_shared_map);
410 if (c->phys_proc_id == cpu_data(i).phys_proc_id) {
411 cpumask_set_cpu(i, cpu_core_mask(cpu));
412 cpumask_set_cpu(cpu, cpu_core_mask(i));
414 * Does this new cpu bringup a new core?
416 if (cpumask_weight(cpu_sibling_mask(cpu)) == 1) {
418 * for each core in package, increment
419 * the booted_cores for this new cpu
421 if (cpumask_first(cpu_sibling_mask(i)) == i)
424 * increment the core count for all
425 * the other cpus in this package
428 cpu_data(i).booted_cores++;
429 } else if (i != cpu && !c->booted_cores)
430 c->booted_cores = cpu_data(i).booted_cores;
435 /* maps the cpu to the sched domain representing multi-core */
436 const struct cpumask *cpu_coregroup_mask(int cpu)
438 struct cpuinfo_x86 *c = &cpu_data(cpu);
440 * For perf, we return last level cache shared map.
441 * And for power savings, we return cpu_core_map
443 if ((sched_mc_power_savings || sched_smt_power_savings) &&
444 !(cpu_has(c, X86_FEATURE_AMD_DCM)))
445 return cpu_core_mask(cpu);
447 return c->llc_shared_map;
450 static void impress_friends(void)
453 unsigned long bogosum = 0;
455 * Allow the user to impress friends.
457 pr_debug("Before bogomips.\n");
458 for_each_possible_cpu(cpu)
459 if (cpumask_test_cpu(cpu, cpu_callout_mask))
460 bogosum += cpu_data(cpu).loops_per_jiffy;
462 "Total of %d processors activated (%lu.%02lu BogoMIPS).\n",
465 (bogosum/(5000/HZ))%100);
467 pr_debug("Before bogocount - setting activated=1.\n");
470 void __inquire_remote_apic(int apicid)
472 unsigned i, regs[] = { APIC_ID >> 4, APIC_LVR >> 4, APIC_SPIV >> 4 };
473 char *names[] = { "ID", "VERSION", "SPIV" };
477 printk(KERN_INFO "Inquiring remote APIC 0x%x...\n", apicid);
479 for (i = 0; i < ARRAY_SIZE(regs); i++) {
480 printk(KERN_INFO "... APIC 0x%x %s: ", apicid, names[i]);
485 status = safe_apic_wait_icr_idle();
488 "a previous APIC delivery may have failed\n");
490 apic_icr_write(APIC_DM_REMRD | regs[i], apicid);
495 status = apic_read(APIC_ICR) & APIC_ICR_RR_MASK;
496 } while (status == APIC_ICR_RR_INPROG && timeout++ < 1000);
499 case APIC_ICR_RR_VALID:
500 status = apic_read(APIC_RRR);
501 printk(KERN_CONT "%08x\n", status);
504 printk(KERN_CONT "failed\n");
510 * Poke the other CPU in the eye via NMI to wake it up. Remember that the normal
511 * INIT, INIT, STARTUP sequence will reset the chip hard for us, and this
512 * won't ... remember to clear down the APIC, etc later.
515 wakeup_secondary_cpu_via_nmi(int logical_apicid, unsigned long start_eip)
517 unsigned long send_status, accept_status = 0;
521 /* Boot on the stack */
522 /* Kick the second */
523 apic_icr_write(APIC_DM_NMI | apic->dest_logical, logical_apicid);
525 pr_debug("Waiting for send to finish...\n");
526 send_status = safe_apic_wait_icr_idle();
529 * Give the other CPU some time to accept the IPI.
532 if (APIC_INTEGRATED(apic_version[boot_cpu_physical_apicid])) {
533 maxlvt = lapic_get_maxlvt();
534 if (maxlvt > 3) /* Due to the Pentium erratum 3AP. */
535 apic_write(APIC_ESR, 0);
536 accept_status = (apic_read(APIC_ESR) & 0xEF);
538 pr_debug("NMI sent.\n");
541 printk(KERN_ERR "APIC never delivered???\n");
543 printk(KERN_ERR "APIC delivery error (%lx).\n", accept_status);
545 return (send_status | accept_status);
549 wakeup_secondary_cpu_via_init(int phys_apicid, unsigned long start_eip)
551 unsigned long send_status, accept_status = 0;
552 int maxlvt, num_starts, j;
554 maxlvt = lapic_get_maxlvt();
557 * Be paranoid about clearing APIC errors.
559 if (APIC_INTEGRATED(apic_version[phys_apicid])) {
560 if (maxlvt > 3) /* Due to the Pentium erratum 3AP. */
561 apic_write(APIC_ESR, 0);
565 pr_debug("Asserting INIT.\n");
568 * Turn INIT on target chip
573 apic_icr_write(APIC_INT_LEVELTRIG | APIC_INT_ASSERT | APIC_DM_INIT,
576 pr_debug("Waiting for send to finish...\n");
577 send_status = safe_apic_wait_icr_idle();
581 pr_debug("Deasserting INIT.\n");
585 apic_icr_write(APIC_INT_LEVELTRIG | APIC_DM_INIT, phys_apicid);
587 pr_debug("Waiting for send to finish...\n");
588 send_status = safe_apic_wait_icr_idle();
591 atomic_set(&init_deasserted, 1);
594 * Should we send STARTUP IPIs ?
596 * Determine this based on the APIC version.
597 * If we don't have an integrated APIC, don't send the STARTUP IPIs.
599 if (APIC_INTEGRATED(apic_version[phys_apicid]))
605 * Paravirt / VMI wants a startup IPI hook here to set up the
606 * target processor state.
608 startup_ipi_hook(phys_apicid, (unsigned long) start_secondary,
609 (unsigned long)stack_start.sp);
612 * Run STARTUP IPI loop.
614 pr_debug("#startup loops: %d.\n", num_starts);
616 for (j = 1; j <= num_starts; j++) {
617 pr_debug("Sending STARTUP #%d.\n", j);
618 if (maxlvt > 3) /* Due to the Pentium erratum 3AP. */
619 apic_write(APIC_ESR, 0);
621 pr_debug("After apic_write.\n");
628 /* Boot on the stack */
629 /* Kick the second */
630 apic_icr_write(APIC_DM_STARTUP | (start_eip >> 12),
634 * Give the other CPU some time to accept the IPI.
638 pr_debug("Startup point 1.\n");
640 pr_debug("Waiting for send to finish...\n");
641 send_status = safe_apic_wait_icr_idle();
644 * Give the other CPU some time to accept the IPI.
647 if (maxlvt > 3) /* Due to the Pentium erratum 3AP. */
648 apic_write(APIC_ESR, 0);
649 accept_status = (apic_read(APIC_ESR) & 0xEF);
650 if (send_status || accept_status)
653 pr_debug("After Startup.\n");
656 printk(KERN_ERR "APIC never delivered???\n");
658 printk(KERN_ERR "APIC delivery error (%lx).\n", accept_status);
660 return (send_status | accept_status);
664 struct work_struct work;
665 struct task_struct *idle;
666 struct completion done;
670 static void __cpuinit do_fork_idle(struct work_struct *work)
672 struct create_idle *c_idle =
673 container_of(work, struct create_idle, work);
675 c_idle->idle = fork_idle(c_idle->cpu);
676 complete(&c_idle->done);
679 /* reduce the number of lines printed when booting a large cpu count system */
680 static void __cpuinit announce_cpu(int cpu, int apicid)
682 static int current_node = -1;
683 int node = cpu_to_node(cpu);
685 if (system_state == SYSTEM_BOOTING) {
686 if (node != current_node) {
687 if (current_node > (-1))
690 pr_info("Booting Node %3d, Processors ", node);
692 pr_cont(" #%d%s", cpu, cpu == (nr_cpu_ids - 1) ? " Ok.\n" : "");
695 pr_info("Booting Node %d Processor %d APIC 0x%x\n",
700 * NOTE - on most systems this is a PHYSICAL apic ID, but on multiquad
701 * (ie clustered apic addressing mode), this is a LOGICAL apic ID.
702 * Returns zero if CPU booted OK, else error code from
703 * ->wakeup_secondary_cpu.
705 static int __cpuinit do_boot_cpu(int apicid, int cpu)
707 unsigned long boot_error = 0;
708 unsigned long start_ip;
710 struct create_idle c_idle = {
712 .done = COMPLETION_INITIALIZER_ONSTACK(c_idle.done),
715 INIT_WORK_ON_STACK(&c_idle.work, do_fork_idle);
717 alternatives_smp_switch(1);
719 c_idle.idle = get_idle_for_cpu(cpu);
722 * We can't use kernel_thread since we must avoid to
723 * reschedule the child.
726 c_idle.idle->thread.sp = (unsigned long) (((struct pt_regs *)
727 (THREAD_SIZE + task_stack_page(c_idle.idle))) - 1);
728 init_idle(c_idle.idle, cpu);
732 if (!keventd_up() || current_is_keventd())
733 c_idle.work.func(&c_idle.work);
735 schedule_work(&c_idle.work);
736 wait_for_completion(&c_idle.done);
739 if (IS_ERR(c_idle.idle)) {
740 printk("failed fork for CPU %d\n", cpu);
741 destroy_work_on_stack(&c_idle.work);
742 return PTR_ERR(c_idle.idle);
745 set_idle_for_cpu(cpu, c_idle.idle);
747 per_cpu(current_task, cpu) = c_idle.idle;
749 /* Stack for startup_32 can be just as for start_secondary onwards */
752 clear_tsk_thread_flag(c_idle.idle, TIF_FORK);
753 initial_gs = per_cpu_offset(cpu);
754 per_cpu(kernel_stack, cpu) =
755 (unsigned long)task_stack_page(c_idle.idle) -
756 KERNEL_STACK_OFFSET + THREAD_SIZE;
758 early_gdt_descr.address = (unsigned long)get_cpu_gdt_table(cpu);
759 initial_code = (unsigned long)start_secondary;
760 stack_start.sp = (void *) c_idle.idle->thread.sp;
762 /* start_ip had better be page-aligned! */
763 start_ip = setup_trampoline();
765 /* So we see what's up */
766 announce_cpu(cpu, apicid);
769 * This grunge runs the startup process for
770 * the targeted processor.
773 atomic_set(&init_deasserted, 0);
775 if (get_uv_system_type() != UV_NON_UNIQUE_APIC) {
777 pr_debug("Setting warm reset code and vector.\n");
779 smpboot_setup_warm_reset_vector(start_ip);
781 * Be paranoid about clearing APIC errors.
783 if (APIC_INTEGRATED(apic_version[boot_cpu_physical_apicid])) {
784 apic_write(APIC_ESR, 0);
790 * Kick the secondary CPU. Use the method in the APIC driver
791 * if it's defined - or use an INIT boot APIC message otherwise:
793 if (apic->wakeup_secondary_cpu)
794 boot_error = apic->wakeup_secondary_cpu(apicid, start_ip);
796 boot_error = wakeup_secondary_cpu_via_init(apicid, start_ip);
800 * allow APs to start initializing.
802 pr_debug("Before Callout %d.\n", cpu);
803 cpumask_set_cpu(cpu, cpu_callout_mask);
804 pr_debug("After Callout %d.\n", cpu);
807 * Wait 5s total for a response
809 for (timeout = 0; timeout < 50000; timeout++) {
810 if (cpumask_test_cpu(cpu, cpu_callin_mask))
811 break; /* It has booted */
815 if (cpumask_test_cpu(cpu, cpu_callin_mask))
816 pr_debug("CPU%d: has booted.\n", cpu);
819 if (*((volatile unsigned char *)trampoline_base)
821 /* trampoline started but...? */
822 pr_err("CPU%d: Stuck ??\n", cpu);
824 /* trampoline code not run */
825 pr_err("CPU%d: Not responding.\n", cpu);
826 if (apic->inquire_remote_apic)
827 apic->inquire_remote_apic(apicid);
832 /* Try to put things back the way they were before ... */
833 numa_remove_cpu(cpu); /* was set by numa_add_cpu */
835 /* was set by do_boot_cpu() */
836 cpumask_clear_cpu(cpu, cpu_callout_mask);
838 /* was set by cpu_init() */
839 cpumask_clear_cpu(cpu, cpu_initialized_mask);
841 set_cpu_present(cpu, false);
842 per_cpu(x86_cpu_to_apicid, cpu) = BAD_APICID;
845 /* mark "stuck" area as not stuck */
846 *((volatile unsigned long *)trampoline_base) = 0;
848 if (get_uv_system_type() != UV_NON_UNIQUE_APIC) {
850 * Cleanup possible dangling ends...
852 smpboot_restore_warm_reset_vector();
855 destroy_work_on_stack(&c_idle.work);
859 int __cpuinit native_cpu_up(unsigned int cpu)
861 int apicid = apic->cpu_present_to_apicid(cpu);
865 WARN_ON(irqs_disabled());
867 pr_debug("++++++++++++++++++++=_---CPU UP %u\n", cpu);
869 if (apicid == BAD_APICID || apicid == boot_cpu_physical_apicid ||
870 !physid_isset(apicid, phys_cpu_present_map)) {
871 printk(KERN_ERR "%s: bad cpu %d\n", __func__, cpu);
876 * Already booted CPU?
878 if (cpumask_test_cpu(cpu, cpu_callin_mask)) {
879 pr_debug("do_boot_cpu %d Already started\n", cpu);
884 * Save current MTRR state in case it was changed since early boot
885 * (e.g. by the ACPI SMI) to initialize new CPUs with MTRRs in sync:
889 per_cpu(cpu_state, cpu) = CPU_UP_PREPARE;
892 /* init low mem mapping */
893 clone_pgd_range(swapper_pg_dir, swapper_pg_dir + KERNEL_PGD_BOUNDARY,
894 min_t(unsigned long, KERNEL_PGD_PTRS, KERNEL_PGD_BOUNDARY));
898 err = do_boot_cpu(apicid, cpu);
900 zap_low_mappings(false);
903 err = do_boot_cpu(apicid, cpu);
906 pr_debug("do_boot_cpu failed %d\n", err);
911 * Check TSC synchronization with the AP (keep irqs disabled
914 local_irq_save(flags);
915 check_tsc_sync_source(cpu);
916 local_irq_restore(flags);
918 while (!cpu_online(cpu)) {
920 touch_nmi_watchdog();
927 * Fall back to non SMP mode after errors.
929 * RED-PEN audit/test this more. I bet there is more state messed up here.
931 static __init void disable_smp(void)
933 init_cpu_present(cpumask_of(0));
934 init_cpu_possible(cpumask_of(0));
935 smpboot_clear_io_apic_irqs();
937 if (smp_found_config)
938 physid_set_mask_of_physid(boot_cpu_physical_apicid, &phys_cpu_present_map);
940 physid_set_mask_of_physid(0, &phys_cpu_present_map);
941 map_cpu_to_logical_apicid();
942 cpumask_set_cpu(0, cpu_sibling_mask(0));
943 cpumask_set_cpu(0, cpu_core_mask(0));
947 * Various sanity checks.
949 static int __init smp_sanity_check(unsigned max_cpus)
953 #if !defined(CONFIG_X86_BIGSMP) && defined(CONFIG_X86_32)
954 if (def_to_bigsmp && nr_cpu_ids > 8) {
959 "More than 8 CPUs detected - skipping them.\n"
960 "Use CONFIG_X86_BIGSMP.\n");
963 for_each_present_cpu(cpu) {
965 set_cpu_present(cpu, false);
970 for_each_possible_cpu(cpu) {
972 set_cpu_possible(cpu, false);
980 if (!physid_isset(hard_smp_processor_id(), phys_cpu_present_map)) {
982 "weird, boot CPU (#%d) not listed by the BIOS.\n",
983 hard_smp_processor_id());
985 physid_set(hard_smp_processor_id(), phys_cpu_present_map);
989 * If we couldn't find an SMP configuration at boot time,
990 * get out of here now!
992 if (!smp_found_config && !acpi_lapic) {
994 printk(KERN_NOTICE "SMP motherboard not detected.\n");
996 if (APIC_init_uniprocessor())
997 printk(KERN_NOTICE "Local APIC not detected."
998 " Using dummy APIC emulation.\n");
1003 * Should not be necessary because the MP table should list the boot
1004 * CPU too, but we do it for the sake of robustness anyway.
1006 if (!apic->check_phys_apicid_present(boot_cpu_physical_apicid)) {
1008 "weird, boot CPU (#%d) not listed by the BIOS.\n",
1009 boot_cpu_physical_apicid);
1010 physid_set(hard_smp_processor_id(), phys_cpu_present_map);
1015 * If we couldn't find a local APIC, then get out of here now!
1017 if (APIC_INTEGRATED(apic_version[boot_cpu_physical_apicid]) &&
1019 if (!disable_apic) {
1020 pr_err("BIOS bug, local APIC #%d not detected!...\n",
1021 boot_cpu_physical_apicid);
1022 pr_err("... forcing use of dummy APIC emulation."
1023 "(tell your hw vendor)\n");
1025 smpboot_clear_io_apic();
1026 arch_disable_smp_support();
1030 verify_local_APIC();
1033 * If SMP should be disabled, then really disable it!
1036 printk(KERN_INFO "SMP mode deactivated.\n");
1037 smpboot_clear_io_apic();
1039 localise_nmi_watchdog();
1043 end_local_APIC_setup();
1050 static void __init smp_cpu_index_default(void)
1053 struct cpuinfo_x86 *c;
1055 for_each_possible_cpu(i) {
1057 /* mark all to hotplug */
1058 c->cpu_index = nr_cpu_ids;
1063 * Prepare for SMP bootup. The MP table or ACPI has been read
1064 * earlier. Just do some sanity checking here and enable APIC mode.
1066 void __init native_smp_prepare_cpus(unsigned int max_cpus)
1071 smp_cpu_index_default();
1072 current_cpu_data = boot_cpu_data;
1073 cpumask_copy(cpu_callin_mask, cpumask_of(0));
1076 * Setup boot CPU information
1078 smp_store_cpu_info(0); /* Final full version of the data */
1079 #ifdef CONFIG_X86_32
1080 boot_cpu_logical_apicid = logical_smp_processor_id();
1082 current_thread_info()->cpu = 0; /* needed? */
1083 for_each_possible_cpu(i) {
1084 zalloc_cpumask_var(&per_cpu(cpu_sibling_map, i), GFP_KERNEL);
1085 zalloc_cpumask_var(&per_cpu(cpu_core_map, i), GFP_KERNEL);
1086 zalloc_cpumask_var(&cpu_data(i).llc_shared_map, GFP_KERNEL);
1088 set_cpu_sibling_map(0);
1091 default_setup_apic_routing();
1093 if (smp_sanity_check(max_cpus) < 0) {
1094 printk(KERN_INFO "SMP disabled\n");
1100 if (read_apic_id() != boot_cpu_physical_apicid) {
1101 panic("Boot APIC ID in local APIC unexpected (%d vs %d)",
1102 read_apic_id(), boot_cpu_physical_apicid);
1103 /* Or can we switch back to PIC here? */
1110 * Switch from PIC to APIC mode.
1115 * Enable IO APIC before setting up error vector
1117 if (!skip_ioapic_setup && nr_ioapics)
1120 end_local_APIC_setup();
1122 map_cpu_to_logical_apicid();
1124 if (apic->setup_portio_remap)
1125 apic->setup_portio_remap();
1127 smpboot_setup_io_apic();
1129 * Set up local APIC timer on boot CPU.
1132 printk(KERN_INFO "CPU%d: ", 0);
1133 print_cpu_info(&cpu_data(0));
1134 x86_init.timers.setup_percpu_clockev();
1139 set_mtrr_aps_delayed_init();
1144 void arch_enable_nonboot_cpus_begin(void)
1146 set_mtrr_aps_delayed_init();
1149 void arch_enable_nonboot_cpus_end(void)
1155 * Early setup to make printk work.
1157 void __init native_smp_prepare_boot_cpu(void)
1159 int me = smp_processor_id();
1160 switch_to_new_gdt(me);
1161 /* already set me in cpu_online_mask in boot_cpu_init() */
1162 cpumask_set_cpu(me, cpu_callout_mask);
1163 per_cpu(cpu_state, me) = CPU_ONLINE;
1166 void __init native_smp_cpus_done(unsigned int max_cpus)
1168 pr_debug("Boot done.\n");
1171 #ifdef CONFIG_X86_IO_APIC
1172 setup_ioapic_dest();
1174 check_nmi_watchdog();
1178 static int __initdata setup_possible_cpus = -1;
1179 static int __init _setup_possible_cpus(char *str)
1181 get_option(&str, &setup_possible_cpus);
1184 early_param("possible_cpus", _setup_possible_cpus);
1188 * cpu_possible_mask should be static, it cannot change as cpu's
1189 * are onlined, or offlined. The reason is per-cpu data-structures
1190 * are allocated by some modules at init time, and dont expect to
1191 * do this dynamically on cpu arrival/departure.
1192 * cpu_present_mask on the other hand can change dynamically.
1193 * In case when cpu_hotplug is not compiled, then we resort to current
1194 * behaviour, which is cpu_possible == cpu_present.
1197 * Three ways to find out the number of additional hotplug CPUs:
1198 * - If the BIOS specified disabled CPUs in ACPI/mptables use that.
1199 * - The user can overwrite it with possible_cpus=NUM
1200 * - Otherwise don't reserve additional CPUs.
1201 * We do this because additional CPUs waste a lot of memory.
1204 __init void prefill_possible_map(void)
1208 /* no processor from mptable or madt */
1209 if (!num_processors)
1212 if (setup_possible_cpus == -1)
1213 possible = num_processors + disabled_cpus;
1215 possible = setup_possible_cpus;
1217 total_cpus = max_t(int, possible, num_processors + disabled_cpus);
1219 /* nr_cpu_ids could be reduced via nr_cpus= */
1220 if (possible > nr_cpu_ids) {
1222 "%d Processors exceeds NR_CPUS limit of %d\n",
1223 possible, nr_cpu_ids);
1224 possible = nr_cpu_ids;
1227 printk(KERN_INFO "SMP: Allowing %d CPUs, %d hotplug CPUs\n",
1228 possible, max_t(int, possible - num_processors, 0));
1230 for (i = 0; i < possible; i++)
1231 set_cpu_possible(i, true);
1233 nr_cpu_ids = possible;
1236 #ifdef CONFIG_HOTPLUG_CPU
1238 static void remove_siblinginfo(int cpu)
1241 struct cpuinfo_x86 *c = &cpu_data(cpu);
1243 for_each_cpu(sibling, cpu_core_mask(cpu)) {
1244 cpumask_clear_cpu(cpu, cpu_core_mask(sibling));
1246 * last thread sibling in this cpu core going down
1248 if (cpumask_weight(cpu_sibling_mask(cpu)) == 1)
1249 cpu_data(sibling).booted_cores--;
1252 for_each_cpu(sibling, cpu_sibling_mask(cpu))
1253 cpumask_clear_cpu(cpu, cpu_sibling_mask(sibling));
1254 cpumask_clear(cpu_sibling_mask(cpu));
1255 cpumask_clear(cpu_core_mask(cpu));
1256 c->phys_proc_id = 0;
1258 cpumask_clear_cpu(cpu, cpu_sibling_setup_mask);
1261 static void __ref remove_cpu_from_maps(int cpu)
1263 set_cpu_online(cpu, false);
1264 cpumask_clear_cpu(cpu, cpu_callout_mask);
1265 cpumask_clear_cpu(cpu, cpu_callin_mask);
1266 /* was set by cpu_init() */
1267 cpumask_clear_cpu(cpu, cpu_initialized_mask);
1268 numa_remove_cpu(cpu);
1271 void cpu_disable_common(void)
1273 int cpu = smp_processor_id();
1275 remove_siblinginfo(cpu);
1277 /* It's now safe to remove this processor from the online map */
1279 remove_cpu_from_maps(cpu);
1280 unlock_vector_lock();
1284 int native_cpu_disable(void)
1286 int cpu = smp_processor_id();
1289 * Perhaps use cpufreq to drop frequency, but that could go
1290 * into generic code.
1292 * We won't take down the boot processor on i386 due to some
1293 * interrupts only being able to be serviced by the BSP.
1294 * Especially so if we're not using an IOAPIC -zwane
1299 if (nmi_watchdog == NMI_LOCAL_APIC)
1300 stop_apic_nmi_watchdog(NULL);
1303 cpu_disable_common();
1307 void native_cpu_die(unsigned int cpu)
1309 /* We don't do anything here: idle task is faking death itself. */
1312 for (i = 0; i < 10; i++) {
1313 /* They ack this in play_dead by setting CPU_DEAD */
1314 if (per_cpu(cpu_state, cpu) == CPU_DEAD) {
1315 if (system_state == SYSTEM_RUNNING)
1316 pr_info("CPU %u is now offline\n", cpu);
1318 if (1 == num_online_cpus())
1319 alternatives_smp_switch(0);
1324 pr_err("CPU %u didn't die...\n", cpu);
1327 void play_dead_common(void)
1330 reset_lazy_tlbstate();
1331 irq_ctx_exit(raw_smp_processor_id());
1332 c1e_remove_cpu(raw_smp_processor_id());
1336 __get_cpu_var(cpu_state) = CPU_DEAD;
1339 * With physical CPU hotplug, we should halt the cpu
1341 local_irq_disable();
1344 void native_play_dead(void)
1347 tboot_shutdown(TB_SHUTDOWN_WFS);
1351 #else /* ... !CONFIG_HOTPLUG_CPU */
1352 int native_cpu_disable(void)
1357 void native_cpu_die(unsigned int cpu)
1359 /* We said "no" in __cpu_disable */
1363 void native_play_dead(void)