2 * x86 SMP booting functions
4 * (c) 1995 Alan Cox, Building #3 <alan@lxorguk.ukuu.org.uk>
5 * (c) 1998, 1999, 2000, 2009 Ingo Molnar <mingo@redhat.com>
6 * Copyright 2001 Andi Kleen, SuSE Labs.
8 * Much of the core SMP work is based on previous work by Thomas Radke, to
9 * whom a great many thanks are extended.
11 * Thanks to Intel for making available several different Pentium,
12 * Pentium Pro and Pentium-II/Xeon MP machines.
13 * Original development of Linux SMP code supported by Caldera.
15 * This code is released under the GNU General Public License version 2 or
19 * Felix Koop : NR_CPUS used properly
20 * Jose Renau : Handle single CPU case.
21 * Alan Cox : By repeated request 8) - Total BogoMIPS report.
22 * Greg Wright : Fix for kernel stacks panic.
23 * Erich Boleyn : MP v1.4 and additional changes.
24 * Matthias Sattler : Changes for 2.1 kernel map.
25 * Michel Lespinasse : Changes for 2.1 kernel map.
26 * Michael Chastain : Change trampoline.S to gnu as.
27 * Alan Cox : Dumb bug: 'B' step PPro's are fine
28 * Ingo Molnar : Added APIC timers, based on code
30 * Ingo Molnar : various cleanups and rewrites
31 * Tigran Aivazian : fixed "0.00 in /proc/uptime on SMP" bug.
32 * Maciej W. Rozycki : Bits for genuine 82489DX APICs
33 * Andi Kleen : Changed for SMP boot into long mode.
34 * Martin J. Bligh : Added support for multi-quad systems
35 * Dave Jones : Report invalid combinations of Athlon CPUs.
36 * Rusty Russell : Hacked into shape for new "hotplug" boot process.
37 * Andi Kleen : Converted to new state machine.
38 * Ashok Raj : CPU hotplug support
39 * Glauber Costa : i386 and x86_64 integration
42 #include <linux/init.h>
43 #include <linux/smp.h>
44 #include <linux/module.h>
45 #include <linux/sched.h>
46 #include <linux/percpu.h>
47 #include <linux/bootmem.h>
48 #include <linux/err.h>
49 #include <linux/nmi.h>
50 #include <linux/tboot.h>
51 #include <linux/stackprotector.h>
52 #include <linux/gfp.h>
59 #include <asm/trampoline.h>
62 #include <asm/pgtable.h>
63 #include <asm/tlbflush.h>
66 #include <asm/setup.h>
67 #include <asm/uv/uv.h>
68 #include <linux/mc146818rtc.h>
70 #include <asm/smpboot_hooks.h>
71 #include <asm/i8259.h>
74 u8 apicid_2_node[MAX_APICID];
77 /* State of each CPU */
78 DEFINE_PER_CPU(int, cpu_state) = { 0 };
80 /* Store all idle threads, this can be reused instead of creating
81 * a new thread. Also avoids complicated thread destroy functionality
84 #ifdef CONFIG_HOTPLUG_CPU
86 * Needed only for CONFIG_HOTPLUG_CPU because __cpuinitdata is
87 * removed after init for !CONFIG_HOTPLUG_CPU.
89 static DEFINE_PER_CPU(struct task_struct *, idle_thread_array);
90 #define get_idle_for_cpu(x) (per_cpu(idle_thread_array, x))
91 #define set_idle_for_cpu(x, p) (per_cpu(idle_thread_array, x) = (p))
94 * We need this for trampoline_base protection from concurrent accesses when
95 * off- and onlining cores wildly.
97 static DEFINE_MUTEX(x86_cpu_hotplug_driver_mutex);
99 void cpu_hotplug_driver_lock()
101 mutex_lock(&x86_cpu_hotplug_driver_mutex);
104 void cpu_hotplug_driver_unlock()
106 mutex_unlock(&x86_cpu_hotplug_driver_mutex);
109 ssize_t arch_cpu_probe(const char *buf, size_t count) { return -1; }
110 ssize_t arch_cpu_release(const char *buf, size_t count) { return -1; }
112 static struct task_struct *idle_thread_array[NR_CPUS] __cpuinitdata ;
113 #define get_idle_for_cpu(x) (idle_thread_array[(x)])
114 #define set_idle_for_cpu(x, p) (idle_thread_array[(x)] = (p))
117 /* Number of siblings per CPU package */
118 int smp_num_siblings = 1;
119 EXPORT_SYMBOL(smp_num_siblings);
121 /* Last level cache ID of each logical CPU */
122 DEFINE_PER_CPU(u16, cpu_llc_id) = BAD_APICID;
124 /* representing HT siblings of each logical CPU */
125 DEFINE_PER_CPU(cpumask_var_t, cpu_sibling_map);
126 EXPORT_PER_CPU_SYMBOL(cpu_sibling_map);
128 /* representing HT and core siblings of each logical CPU */
129 DEFINE_PER_CPU(cpumask_var_t, cpu_core_map);
130 EXPORT_PER_CPU_SYMBOL(cpu_core_map);
132 /* Per CPU bogomips and other parameters */
133 DEFINE_PER_CPU_SHARED_ALIGNED(struct cpuinfo_x86, cpu_info);
134 EXPORT_PER_CPU_SYMBOL(cpu_info);
136 atomic_t init_deasserted;
138 #if defined(CONFIG_NUMA) && defined(CONFIG_X86_32)
139 /* which node each logical CPU is on */
140 int cpu_to_node_map[NR_CPUS] __read_mostly = { [0 ... NR_CPUS-1] = 0 };
141 EXPORT_SYMBOL(cpu_to_node_map);
143 /* set up a mapping between cpu and node. */
144 static void map_cpu_to_node(int cpu, int node)
146 printk(KERN_INFO "Mapping cpu %d to node %d\n", cpu, node);
147 cpumask_set_cpu(cpu, node_to_cpumask_map[node]);
148 cpu_to_node_map[cpu] = node;
151 /* undo a mapping between cpu and node. */
152 static void unmap_cpu_to_node(int cpu)
156 printk(KERN_INFO "Unmapping cpu %d from all nodes\n", cpu);
157 for (node = 0; node < MAX_NUMNODES; node++)
158 cpumask_clear_cpu(cpu, node_to_cpumask_map[node]);
159 cpu_to_node_map[cpu] = 0;
161 #else /* !(CONFIG_NUMA && CONFIG_X86_32) */
162 #define map_cpu_to_node(cpu, node) ({})
163 #define unmap_cpu_to_node(cpu) ({})
167 static int boot_cpu_logical_apicid;
169 u8 cpu_2_logical_apicid[NR_CPUS] __read_mostly =
170 { [0 ... NR_CPUS-1] = BAD_APICID };
172 static void map_cpu_to_logical_apicid(void)
174 int cpu = smp_processor_id();
175 int apicid = logical_smp_processor_id();
176 int node = apic->apicid_to_node(apicid);
178 if (!node_online(node))
179 node = first_online_node;
181 cpu_2_logical_apicid[cpu] = apicid;
182 map_cpu_to_node(cpu, node);
185 void numa_remove_cpu(int cpu)
187 cpu_2_logical_apicid[cpu] = BAD_APICID;
188 unmap_cpu_to_node(cpu);
191 #define map_cpu_to_logical_apicid() do {} while (0)
195 * Report back to the Boot Processor.
198 static void __cpuinit smp_callin(void)
201 unsigned long timeout;
204 * If waken up by an INIT in an 82489DX configuration
205 * we may get here before an INIT-deassert IPI reaches
206 * our local APIC. We have to wait for the IPI or we'll
207 * lock up on an APIC access.
209 if (apic->wait_for_init_deassert)
210 apic->wait_for_init_deassert(&init_deasserted);
213 * (This works even if the APIC is not enabled.)
215 phys_id = read_apic_id();
216 cpuid = smp_processor_id();
217 if (cpumask_test_cpu(cpuid, cpu_callin_mask)) {
218 panic("%s: phys CPU#%d, CPU#%d already present??\n", __func__,
221 pr_debug("CPU#%d (phys ID: %d) waiting for CALLOUT\n", cpuid, phys_id);
224 * STARTUP IPIs are fragile beasts as they might sometimes
225 * trigger some glue motherboard logic. Complete APIC bus
226 * silence for 1 second, this overestimates the time the
227 * boot CPU is spending to send the up to 2 STARTUP IPIs
228 * by a factor of two. This should be enough.
232 * Waiting 2s total for startup (udelay is not yet working)
234 timeout = jiffies + 2*HZ;
235 while (time_before(jiffies, timeout)) {
237 * Has the boot CPU finished it's STARTUP sequence?
239 if (cpumask_test_cpu(cpuid, cpu_callout_mask))
244 if (!time_before(jiffies, timeout)) {
245 panic("%s: CPU%d started up but did not get a callout!\n",
250 * the boot CPU has finished the init stage and is spinning
251 * on callin_map until we finish. We are free to set up this
252 * CPU, first the APIC. (this is probably redundant on most
256 pr_debug("CALLIN, before setup_local_APIC().\n");
257 if (apic->smp_callin_clear_local_apic)
258 apic->smp_callin_clear_local_apic();
260 end_local_APIC_setup();
261 map_cpu_to_logical_apicid();
264 * Need to setup vector mappings before we enable interrupts.
266 setup_vector_irq(smp_processor_id());
270 * Need to enable IRQs because it can take longer and then
271 * the NMI watchdog might kill us.
276 pr_debug("Stack at about %p\n", &cpuid);
279 * Save our processor parameters
281 smp_store_cpu_info(cpuid);
283 notify_cpu_starting(cpuid);
286 * Allow the master to continue.
288 cpumask_set_cpu(cpuid, cpu_callin_mask);
292 * Activate a secondary processor.
294 notrace static void __cpuinit start_secondary(void *unused)
297 * Don't put *anything* before cpu_init(), SMP booting is too
298 * fragile that we want to limit the things done here to the
299 * most necessary things.
304 * Switch away from the trampoline page-table
306 * Do this before cpu_init() because it needs to access per-cpu
307 * data which may not be mapped in the trampoline page-table.
309 load_cr3(swapper_pg_dir);
317 /* otherwise gcc will move up smp_processor_id before the cpu_init */
320 * Check TSC synchronization with the BP:
322 check_tsc_sync_target();
324 if (nmi_watchdog == NMI_IO_APIC) {
325 legacy_pic->chip->mask(0);
326 enable_NMI_through_LVT0();
327 legacy_pic->chip->unmask(0);
330 /* This must be done before setting cpu_online_mask */
331 set_cpu_sibling_map(raw_smp_processor_id());
335 * We need to hold call_lock, so there is no inconsistency
336 * between the time smp_call_function() determines number of
337 * IPI recipients, and the time when the determination is made
338 * for which cpus receive the IPI. Holding this
339 * lock helps us to not include this cpu in a currently in progress
340 * smp_call_function().
342 * We need to hold vector_lock so there the set of online cpus
343 * does not change while we are assigning vectors to cpus. Holding
344 * this lock ensures we don't half assign or remove an irq from a cpu.
348 set_cpu_online(smp_processor_id(), true);
349 unlock_vector_lock();
351 per_cpu(cpu_state, smp_processor_id()) = CPU_ONLINE;
352 x86_platform.nmi_init();
354 /* enable local interrupts */
357 /* to prevent fake stack check failure in clock setup */
358 boot_init_stack_canary();
360 x86_cpuinit.setup_percpu_clockev();
366 #ifdef CONFIG_CPUMASK_OFFSTACK
367 /* In this case, llc_shared_map is a pointer to a cpumask. */
368 static inline void copy_cpuinfo_x86(struct cpuinfo_x86 *dst,
369 const struct cpuinfo_x86 *src)
371 struct cpumask *llc = dst->llc_shared_map;
373 dst->llc_shared_map = llc;
376 static inline void copy_cpuinfo_x86(struct cpuinfo_x86 *dst,
377 const struct cpuinfo_x86 *src)
381 #endif /* CONFIG_CPUMASK_OFFSTACK */
384 * The bootstrap kernel entry code has set these up. Save them for
388 void __cpuinit smp_store_cpu_info(int id)
390 struct cpuinfo_x86 *c = &cpu_data(id);
392 copy_cpuinfo_x86(c, &boot_cpu_data);
395 identify_secondary_cpu(c);
399 void __cpuinit set_cpu_sibling_map(int cpu)
402 struct cpuinfo_x86 *c = &cpu_data(cpu);
404 cpumask_set_cpu(cpu, cpu_sibling_setup_mask);
406 if (smp_num_siblings > 1) {
407 for_each_cpu(i, cpu_sibling_setup_mask) {
408 struct cpuinfo_x86 *o = &cpu_data(i);
410 if (c->phys_proc_id == o->phys_proc_id &&
411 c->cpu_core_id == o->cpu_core_id) {
412 cpumask_set_cpu(i, cpu_sibling_mask(cpu));
413 cpumask_set_cpu(cpu, cpu_sibling_mask(i));
414 cpumask_set_cpu(i, cpu_core_mask(cpu));
415 cpumask_set_cpu(cpu, cpu_core_mask(i));
416 cpumask_set_cpu(i, c->llc_shared_map);
417 cpumask_set_cpu(cpu, o->llc_shared_map);
421 cpumask_set_cpu(cpu, cpu_sibling_mask(cpu));
424 cpumask_set_cpu(cpu, c->llc_shared_map);
426 if (current_cpu_data.x86_max_cores == 1) {
427 cpumask_copy(cpu_core_mask(cpu), cpu_sibling_mask(cpu));
432 for_each_cpu(i, cpu_sibling_setup_mask) {
433 if (per_cpu(cpu_llc_id, cpu) != BAD_APICID &&
434 per_cpu(cpu_llc_id, cpu) == per_cpu(cpu_llc_id, i)) {
435 cpumask_set_cpu(i, c->llc_shared_map);
436 cpumask_set_cpu(cpu, cpu_data(i).llc_shared_map);
438 if (c->phys_proc_id == cpu_data(i).phys_proc_id) {
439 cpumask_set_cpu(i, cpu_core_mask(cpu));
440 cpumask_set_cpu(cpu, cpu_core_mask(i));
442 * Does this new cpu bringup a new core?
444 if (cpumask_weight(cpu_sibling_mask(cpu)) == 1) {
446 * for each core in package, increment
447 * the booted_cores for this new cpu
449 if (cpumask_first(cpu_sibling_mask(i)) == i)
452 * increment the core count for all
453 * the other cpus in this package
456 cpu_data(i).booted_cores++;
457 } else if (i != cpu && !c->booted_cores)
458 c->booted_cores = cpu_data(i).booted_cores;
463 /* maps the cpu to the sched domain representing multi-core */
464 const struct cpumask *cpu_coregroup_mask(int cpu)
466 struct cpuinfo_x86 *c = &cpu_data(cpu);
468 * For perf, we return last level cache shared map.
469 * And for power savings, we return cpu_core_map
471 if ((sched_mc_power_savings || sched_smt_power_savings) &&
472 !(cpu_has(c, X86_FEATURE_AMD_DCM)))
473 return cpu_core_mask(cpu);
475 return c->llc_shared_map;
478 static void impress_friends(void)
481 unsigned long bogosum = 0;
483 * Allow the user to impress friends.
485 pr_debug("Before bogomips.\n");
486 for_each_possible_cpu(cpu)
487 if (cpumask_test_cpu(cpu, cpu_callout_mask))
488 bogosum += cpu_data(cpu).loops_per_jiffy;
490 "Total of %d processors activated (%lu.%02lu BogoMIPS).\n",
493 (bogosum/(5000/HZ))%100);
495 pr_debug("Before bogocount - setting activated=1.\n");
498 void __inquire_remote_apic(int apicid)
500 unsigned i, regs[] = { APIC_ID >> 4, APIC_LVR >> 4, APIC_SPIV >> 4 };
501 char *names[] = { "ID", "VERSION", "SPIV" };
505 printk(KERN_INFO "Inquiring remote APIC 0x%x...\n", apicid);
507 for (i = 0; i < ARRAY_SIZE(regs); i++) {
508 printk(KERN_INFO "... APIC 0x%x %s: ", apicid, names[i]);
513 status = safe_apic_wait_icr_idle();
516 "a previous APIC delivery may have failed\n");
518 apic_icr_write(APIC_DM_REMRD | regs[i], apicid);
523 status = apic_read(APIC_ICR) & APIC_ICR_RR_MASK;
524 } while (status == APIC_ICR_RR_INPROG && timeout++ < 1000);
527 case APIC_ICR_RR_VALID:
528 status = apic_read(APIC_RRR);
529 printk(KERN_CONT "%08x\n", status);
532 printk(KERN_CONT "failed\n");
538 * Poke the other CPU in the eye via NMI to wake it up. Remember that the normal
539 * INIT, INIT, STARTUP sequence will reset the chip hard for us, and this
540 * won't ... remember to clear down the APIC, etc later.
543 wakeup_secondary_cpu_via_nmi(int logical_apicid, unsigned long start_eip)
545 unsigned long send_status, accept_status = 0;
549 /* Boot on the stack */
550 /* Kick the second */
551 apic_icr_write(APIC_DM_NMI | apic->dest_logical, logical_apicid);
553 pr_debug("Waiting for send to finish...\n");
554 send_status = safe_apic_wait_icr_idle();
557 * Give the other CPU some time to accept the IPI.
560 if (APIC_INTEGRATED(apic_version[boot_cpu_physical_apicid])) {
561 maxlvt = lapic_get_maxlvt();
562 if (maxlvt > 3) /* Due to the Pentium erratum 3AP. */
563 apic_write(APIC_ESR, 0);
564 accept_status = (apic_read(APIC_ESR) & 0xEF);
566 pr_debug("NMI sent.\n");
569 printk(KERN_ERR "APIC never delivered???\n");
571 printk(KERN_ERR "APIC delivery error (%lx).\n", accept_status);
573 return (send_status | accept_status);
577 wakeup_secondary_cpu_via_init(int phys_apicid, unsigned long start_eip)
579 unsigned long send_status, accept_status = 0;
580 int maxlvt, num_starts, j;
582 maxlvt = lapic_get_maxlvt();
585 * Be paranoid about clearing APIC errors.
587 if (APIC_INTEGRATED(apic_version[phys_apicid])) {
588 if (maxlvt > 3) /* Due to the Pentium erratum 3AP. */
589 apic_write(APIC_ESR, 0);
593 pr_debug("Asserting INIT.\n");
596 * Turn INIT on target chip
601 apic_icr_write(APIC_INT_LEVELTRIG | APIC_INT_ASSERT | APIC_DM_INIT,
604 pr_debug("Waiting for send to finish...\n");
605 send_status = safe_apic_wait_icr_idle();
609 pr_debug("Deasserting INIT.\n");
613 apic_icr_write(APIC_INT_LEVELTRIG | APIC_DM_INIT, phys_apicid);
615 pr_debug("Waiting for send to finish...\n");
616 send_status = safe_apic_wait_icr_idle();
619 atomic_set(&init_deasserted, 1);
622 * Should we send STARTUP IPIs ?
624 * Determine this based on the APIC version.
625 * If we don't have an integrated APIC, don't send the STARTUP IPIs.
627 if (APIC_INTEGRATED(apic_version[phys_apicid]))
633 * Paravirt / VMI wants a startup IPI hook here to set up the
634 * target processor state.
636 startup_ipi_hook(phys_apicid, (unsigned long) start_secondary,
637 (unsigned long)stack_start.sp);
640 * Run STARTUP IPI loop.
642 pr_debug("#startup loops: %d.\n", num_starts);
644 for (j = 1; j <= num_starts; j++) {
645 pr_debug("Sending STARTUP #%d.\n", j);
646 if (maxlvt > 3) /* Due to the Pentium erratum 3AP. */
647 apic_write(APIC_ESR, 0);
649 pr_debug("After apic_write.\n");
656 /* Boot on the stack */
657 /* Kick the second */
658 apic_icr_write(APIC_DM_STARTUP | (start_eip >> 12),
662 * Give the other CPU some time to accept the IPI.
666 pr_debug("Startup point 1.\n");
668 pr_debug("Waiting for send to finish...\n");
669 send_status = safe_apic_wait_icr_idle();
672 * Give the other CPU some time to accept the IPI.
675 if (maxlvt > 3) /* Due to the Pentium erratum 3AP. */
676 apic_write(APIC_ESR, 0);
677 accept_status = (apic_read(APIC_ESR) & 0xEF);
678 if (send_status || accept_status)
681 pr_debug("After Startup.\n");
684 printk(KERN_ERR "APIC never delivered???\n");
686 printk(KERN_ERR "APIC delivery error (%lx).\n", accept_status);
688 return (send_status | accept_status);
692 struct work_struct work;
693 struct task_struct *idle;
694 struct completion done;
698 static void __cpuinit do_fork_idle(struct work_struct *work)
700 struct create_idle *c_idle =
701 container_of(work, struct create_idle, work);
703 c_idle->idle = fork_idle(c_idle->cpu);
704 complete(&c_idle->done);
707 /* reduce the number of lines printed when booting a large cpu count system */
708 static void __cpuinit announce_cpu(int cpu, int apicid)
710 static int current_node = -1;
711 int node = early_cpu_to_node(cpu);
713 if (system_state == SYSTEM_BOOTING) {
714 if (node != current_node) {
715 if (current_node > (-1))
718 pr_info("Booting Node %3d, Processors ", node);
720 pr_cont(" #%d%s", cpu, cpu == (nr_cpu_ids - 1) ? " Ok.\n" : "");
723 pr_info("Booting Node %d Processor %d APIC 0x%x\n",
728 * NOTE - on most systems this is a PHYSICAL apic ID, but on multiquad
729 * (ie clustered apic addressing mode), this is a LOGICAL apic ID.
730 * Returns zero if CPU booted OK, else error code from
731 * ->wakeup_secondary_cpu.
733 static int __cpuinit do_boot_cpu(int apicid, int cpu)
735 unsigned long boot_error = 0;
736 unsigned long start_ip;
738 struct create_idle c_idle = {
740 .done = COMPLETION_INITIALIZER_ONSTACK(c_idle.done),
743 INIT_WORK_ON_STACK(&c_idle.work, do_fork_idle);
745 alternatives_smp_switch(1);
747 c_idle.idle = get_idle_for_cpu(cpu);
750 * We can't use kernel_thread since we must avoid to
751 * reschedule the child.
754 c_idle.idle->thread.sp = (unsigned long) (((struct pt_regs *)
755 (THREAD_SIZE + task_stack_page(c_idle.idle))) - 1);
756 init_idle(c_idle.idle, cpu);
760 schedule_work(&c_idle.work);
761 wait_for_completion(&c_idle.done);
763 if (IS_ERR(c_idle.idle)) {
764 printk("failed fork for CPU %d\n", cpu);
765 destroy_work_on_stack(&c_idle.work);
766 return PTR_ERR(c_idle.idle);
769 set_idle_for_cpu(cpu, c_idle.idle);
771 per_cpu(current_task, cpu) = c_idle.idle;
773 /* Stack for startup_32 can be just as for start_secondary onwards */
775 initial_page_table = __pa(&trampoline_pg_dir);
777 clear_tsk_thread_flag(c_idle.idle, TIF_FORK);
778 initial_gs = per_cpu_offset(cpu);
779 per_cpu(kernel_stack, cpu) =
780 (unsigned long)task_stack_page(c_idle.idle) -
781 KERNEL_STACK_OFFSET + THREAD_SIZE;
783 early_gdt_descr.address = (unsigned long)get_cpu_gdt_table(cpu);
784 initial_code = (unsigned long)start_secondary;
785 stack_start.sp = (void *) c_idle.idle->thread.sp;
787 /* start_ip had better be page-aligned! */
788 start_ip = setup_trampoline();
790 /* So we see what's up */
791 announce_cpu(cpu, apicid);
794 * This grunge runs the startup process for
795 * the targeted processor.
798 atomic_set(&init_deasserted, 0);
800 if (get_uv_system_type() != UV_NON_UNIQUE_APIC) {
802 pr_debug("Setting warm reset code and vector.\n");
804 smpboot_setup_warm_reset_vector(start_ip);
806 * Be paranoid about clearing APIC errors.
808 if (APIC_INTEGRATED(apic_version[boot_cpu_physical_apicid])) {
809 apic_write(APIC_ESR, 0);
815 * Kick the secondary CPU. Use the method in the APIC driver
816 * if it's defined - or use an INIT boot APIC message otherwise:
818 if (apic->wakeup_secondary_cpu)
819 boot_error = apic->wakeup_secondary_cpu(apicid, start_ip);
821 boot_error = wakeup_secondary_cpu_via_init(apicid, start_ip);
825 * allow APs to start initializing.
827 pr_debug("Before Callout %d.\n", cpu);
828 cpumask_set_cpu(cpu, cpu_callout_mask);
829 pr_debug("After Callout %d.\n", cpu);
832 * Wait 5s total for a response
834 for (timeout = 0; timeout < 50000; timeout++) {
835 if (cpumask_test_cpu(cpu, cpu_callin_mask))
836 break; /* It has booted */
839 * Allow other tasks to run while we wait for the
840 * AP to come online. This also gives a chance
841 * for the MTRR work(triggered by the AP coming online)
842 * to be completed in the stop machine context.
847 if (cpumask_test_cpu(cpu, cpu_callin_mask))
848 pr_debug("CPU%d: has booted.\n", cpu);
851 if (*((volatile unsigned char *)trampoline_base)
853 /* trampoline started but...? */
854 pr_err("CPU%d: Stuck ??\n", cpu);
856 /* trampoline code not run */
857 pr_err("CPU%d: Not responding.\n", cpu);
858 if (apic->inquire_remote_apic)
859 apic->inquire_remote_apic(apicid);
864 /* Try to put things back the way they were before ... */
865 numa_remove_cpu(cpu); /* was set by numa_add_cpu */
867 /* was set by do_boot_cpu() */
868 cpumask_clear_cpu(cpu, cpu_callout_mask);
870 /* was set by cpu_init() */
871 cpumask_clear_cpu(cpu, cpu_initialized_mask);
873 set_cpu_present(cpu, false);
874 per_cpu(x86_cpu_to_apicid, cpu) = BAD_APICID;
877 /* mark "stuck" area as not stuck */
878 *((volatile unsigned long *)trampoline_base) = 0;
880 if (get_uv_system_type() != UV_NON_UNIQUE_APIC) {
882 * Cleanup possible dangling ends...
884 smpboot_restore_warm_reset_vector();
887 destroy_work_on_stack(&c_idle.work);
891 int __cpuinit native_cpu_up(unsigned int cpu)
893 int apicid = apic->cpu_present_to_apicid(cpu);
897 WARN_ON(irqs_disabled());
899 pr_debug("++++++++++++++++++++=_---CPU UP %u\n", cpu);
901 if (apicid == BAD_APICID || apicid == boot_cpu_physical_apicid ||
902 !physid_isset(apicid, phys_cpu_present_map)) {
903 printk(KERN_ERR "%s: bad cpu %d\n", __func__, cpu);
908 * Already booted CPU?
910 if (cpumask_test_cpu(cpu, cpu_callin_mask)) {
911 pr_debug("do_boot_cpu %d Already started\n", cpu);
916 * Save current MTRR state in case it was changed since early boot
917 * (e.g. by the ACPI SMI) to initialize new CPUs with MTRRs in sync:
921 per_cpu(cpu_state, cpu) = CPU_UP_PREPARE;
923 err = do_boot_cpu(apicid, cpu);
926 pr_debug("do_boot_cpu failed %d\n", err);
931 * Check TSC synchronization with the AP (keep irqs disabled
934 local_irq_save(flags);
935 check_tsc_sync_source(cpu);
936 local_irq_restore(flags);
938 while (!cpu_online(cpu)) {
940 touch_nmi_watchdog();
947 * Fall back to non SMP mode after errors.
949 * RED-PEN audit/test this more. I bet there is more state messed up here.
951 static __init void disable_smp(void)
953 init_cpu_present(cpumask_of(0));
954 init_cpu_possible(cpumask_of(0));
955 smpboot_clear_io_apic_irqs();
957 if (smp_found_config)
958 physid_set_mask_of_physid(boot_cpu_physical_apicid, &phys_cpu_present_map);
960 physid_set_mask_of_physid(0, &phys_cpu_present_map);
961 map_cpu_to_logical_apicid();
962 cpumask_set_cpu(0, cpu_sibling_mask(0));
963 cpumask_set_cpu(0, cpu_core_mask(0));
967 * Various sanity checks.
969 static int __init smp_sanity_check(unsigned max_cpus)
973 #if !defined(CONFIG_X86_BIGSMP) && defined(CONFIG_X86_32)
974 if (def_to_bigsmp && nr_cpu_ids > 8) {
979 "More than 8 CPUs detected - skipping them.\n"
980 "Use CONFIG_X86_BIGSMP.\n");
983 for_each_present_cpu(cpu) {
985 set_cpu_present(cpu, false);
990 for_each_possible_cpu(cpu) {
992 set_cpu_possible(cpu, false);
1000 if (!physid_isset(hard_smp_processor_id(), phys_cpu_present_map)) {
1002 "weird, boot CPU (#%d) not listed by the BIOS.\n",
1003 hard_smp_processor_id());
1005 physid_set(hard_smp_processor_id(), phys_cpu_present_map);
1009 * If we couldn't find an SMP configuration at boot time,
1010 * get out of here now!
1012 if (!smp_found_config && !acpi_lapic) {
1014 printk(KERN_NOTICE "SMP motherboard not detected.\n");
1016 if (APIC_init_uniprocessor())
1017 printk(KERN_NOTICE "Local APIC not detected."
1018 " Using dummy APIC emulation.\n");
1023 * Should not be necessary because the MP table should list the boot
1024 * CPU too, but we do it for the sake of robustness anyway.
1026 if (!apic->check_phys_apicid_present(boot_cpu_physical_apicid)) {
1028 "weird, boot CPU (#%d) not listed by the BIOS.\n",
1029 boot_cpu_physical_apicid);
1030 physid_set(hard_smp_processor_id(), phys_cpu_present_map);
1035 * If we couldn't find a local APIC, then get out of here now!
1037 if (APIC_INTEGRATED(apic_version[boot_cpu_physical_apicid]) &&
1039 if (!disable_apic) {
1040 pr_err("BIOS bug, local APIC #%d not detected!...\n",
1041 boot_cpu_physical_apicid);
1042 pr_err("... forcing use of dummy APIC emulation."
1043 "(tell your hw vendor)\n");
1045 smpboot_clear_io_apic();
1046 arch_disable_smp_support();
1050 verify_local_APIC();
1053 * If SMP should be disabled, then really disable it!
1056 printk(KERN_INFO "SMP mode deactivated.\n");
1057 smpboot_clear_io_apic();
1059 localise_nmi_watchdog();
1063 end_local_APIC_setup();
1070 static void __init smp_cpu_index_default(void)
1073 struct cpuinfo_x86 *c;
1075 for_each_possible_cpu(i) {
1077 /* mark all to hotplug */
1078 c->cpu_index = nr_cpu_ids;
1083 * Prepare for SMP bootup. The MP table or ACPI has been read
1084 * earlier. Just do some sanity checking here and enable APIC mode.
1086 void __init native_smp_prepare_cpus(unsigned int max_cpus)
1091 smp_cpu_index_default();
1092 current_cpu_data = boot_cpu_data;
1093 cpumask_copy(cpu_callin_mask, cpumask_of(0));
1096 * Setup boot CPU information
1098 smp_store_cpu_info(0); /* Final full version of the data */
1099 #ifdef CONFIG_X86_32
1100 boot_cpu_logical_apicid = logical_smp_processor_id();
1102 current_thread_info()->cpu = 0; /* needed? */
1103 for_each_possible_cpu(i) {
1104 zalloc_cpumask_var(&per_cpu(cpu_sibling_map, i), GFP_KERNEL);
1105 zalloc_cpumask_var(&per_cpu(cpu_core_map, i), GFP_KERNEL);
1106 zalloc_cpumask_var(&cpu_data(i).llc_shared_map, GFP_KERNEL);
1108 set_cpu_sibling_map(0);
1111 default_setup_apic_routing();
1113 if (smp_sanity_check(max_cpus) < 0) {
1114 printk(KERN_INFO "SMP disabled\n");
1120 if (read_apic_id() != boot_cpu_physical_apicid) {
1121 panic("Boot APIC ID in local APIC unexpected (%d vs %d)",
1122 read_apic_id(), boot_cpu_physical_apicid);
1123 /* Or can we switch back to PIC here? */
1130 * Switch from PIC to APIC mode.
1135 * Enable IO APIC before setting up error vector
1137 if (!skip_ioapic_setup && nr_ioapics)
1140 end_local_APIC_setup();
1142 map_cpu_to_logical_apicid();
1144 if (apic->setup_portio_remap)
1145 apic->setup_portio_remap();
1147 smpboot_setup_io_apic();
1149 * Set up local APIC timer on boot CPU.
1152 printk(KERN_INFO "CPU%d: ", 0);
1153 print_cpu_info(&cpu_data(0));
1154 x86_init.timers.setup_percpu_clockev();
1159 set_mtrr_aps_delayed_init();
1164 void arch_enable_nonboot_cpus_begin(void)
1166 set_mtrr_aps_delayed_init();
1169 void arch_enable_nonboot_cpus_end(void)
1175 * Early setup to make printk work.
1177 void __init native_smp_prepare_boot_cpu(void)
1179 int me = smp_processor_id();
1180 switch_to_new_gdt(me);
1181 /* already set me in cpu_online_mask in boot_cpu_init() */
1182 cpumask_set_cpu(me, cpu_callout_mask);
1183 per_cpu(cpu_state, me) = CPU_ONLINE;
1186 void __init native_smp_cpus_done(unsigned int max_cpus)
1188 pr_debug("Boot done.\n");
1191 #ifdef CONFIG_X86_IO_APIC
1192 setup_ioapic_dest();
1194 check_nmi_watchdog();
1198 static int __initdata setup_possible_cpus = -1;
1199 static int __init _setup_possible_cpus(char *str)
1201 get_option(&str, &setup_possible_cpus);
1204 early_param("possible_cpus", _setup_possible_cpus);
1208 * cpu_possible_mask should be static, it cannot change as cpu's
1209 * are onlined, or offlined. The reason is per-cpu data-structures
1210 * are allocated by some modules at init time, and dont expect to
1211 * do this dynamically on cpu arrival/departure.
1212 * cpu_present_mask on the other hand can change dynamically.
1213 * In case when cpu_hotplug is not compiled, then we resort to current
1214 * behaviour, which is cpu_possible == cpu_present.
1217 * Three ways to find out the number of additional hotplug CPUs:
1218 * - If the BIOS specified disabled CPUs in ACPI/mptables use that.
1219 * - The user can overwrite it with possible_cpus=NUM
1220 * - Otherwise don't reserve additional CPUs.
1221 * We do this because additional CPUs waste a lot of memory.
1224 __init void prefill_possible_map(void)
1228 /* no processor from mptable or madt */
1229 if (!num_processors)
1232 i = setup_max_cpus ?: 1;
1233 if (setup_possible_cpus == -1) {
1234 possible = num_processors;
1235 #ifdef CONFIG_HOTPLUG_CPU
1237 possible += disabled_cpus;
1243 possible = setup_possible_cpus;
1245 total_cpus = max_t(int, possible, num_processors + disabled_cpus);
1247 /* nr_cpu_ids could be reduced via nr_cpus= */
1248 if (possible > nr_cpu_ids) {
1250 "%d Processors exceeds NR_CPUS limit of %d\n",
1251 possible, nr_cpu_ids);
1252 possible = nr_cpu_ids;
1255 #ifdef CONFIG_HOTPLUG_CPU
1256 if (!setup_max_cpus)
1260 "%d Processors exceeds max_cpus limit of %u\n",
1261 possible, setup_max_cpus);
1265 printk(KERN_INFO "SMP: Allowing %d CPUs, %d hotplug CPUs\n",
1266 possible, max_t(int, possible - num_processors, 0));
1268 for (i = 0; i < possible; i++)
1269 set_cpu_possible(i, true);
1270 for (; i < NR_CPUS; i++)
1271 set_cpu_possible(i, false);
1273 nr_cpu_ids = possible;
1276 #ifdef CONFIG_HOTPLUG_CPU
1278 static void remove_siblinginfo(int cpu)
1281 struct cpuinfo_x86 *c = &cpu_data(cpu);
1283 for_each_cpu(sibling, cpu_core_mask(cpu)) {
1284 cpumask_clear_cpu(cpu, cpu_core_mask(sibling));
1286 * last thread sibling in this cpu core going down
1288 if (cpumask_weight(cpu_sibling_mask(cpu)) == 1)
1289 cpu_data(sibling).booted_cores--;
1292 for_each_cpu(sibling, cpu_sibling_mask(cpu))
1293 cpumask_clear_cpu(cpu, cpu_sibling_mask(sibling));
1294 cpumask_clear(cpu_sibling_mask(cpu));
1295 cpumask_clear(cpu_core_mask(cpu));
1296 c->phys_proc_id = 0;
1298 cpumask_clear_cpu(cpu, cpu_sibling_setup_mask);
1301 static void __ref remove_cpu_from_maps(int cpu)
1303 set_cpu_online(cpu, false);
1304 cpumask_clear_cpu(cpu, cpu_callout_mask);
1305 cpumask_clear_cpu(cpu, cpu_callin_mask);
1306 /* was set by cpu_init() */
1307 cpumask_clear_cpu(cpu, cpu_initialized_mask);
1308 numa_remove_cpu(cpu);
1311 void cpu_disable_common(void)
1313 int cpu = smp_processor_id();
1315 remove_siblinginfo(cpu);
1317 /* It's now safe to remove this processor from the online map */
1319 remove_cpu_from_maps(cpu);
1320 unlock_vector_lock();
1324 int native_cpu_disable(void)
1326 int cpu = smp_processor_id();
1329 * Perhaps use cpufreq to drop frequency, but that could go
1330 * into generic code.
1332 * We won't take down the boot processor on i386 due to some
1333 * interrupts only being able to be serviced by the BSP.
1334 * Especially so if we're not using an IOAPIC -zwane
1339 if (nmi_watchdog == NMI_LOCAL_APIC)
1340 stop_apic_nmi_watchdog(NULL);
1343 cpu_disable_common();
1347 void native_cpu_die(unsigned int cpu)
1349 /* We don't do anything here: idle task is faking death itself. */
1352 for (i = 0; i < 10; i++) {
1353 /* They ack this in play_dead by setting CPU_DEAD */
1354 if (per_cpu(cpu_state, cpu) == CPU_DEAD) {
1355 if (system_state == SYSTEM_RUNNING)
1356 pr_info("CPU %u is now offline\n", cpu);
1358 if (1 == num_online_cpus())
1359 alternatives_smp_switch(0);
1364 pr_err("CPU %u didn't die...\n", cpu);
1367 void play_dead_common(void)
1370 reset_lazy_tlbstate();
1371 irq_ctx_exit(raw_smp_processor_id());
1372 c1e_remove_cpu(raw_smp_processor_id());
1376 __get_cpu_var(cpu_state) = CPU_DEAD;
1379 * With physical CPU hotplug, we should halt the cpu
1381 local_irq_disable();
1384 void native_play_dead(void)
1387 tboot_shutdown(TB_SHUTDOWN_WFS);
1391 #else /* ... !CONFIG_HOTPLUG_CPU */
1392 int native_cpu_disable(void)
1397 void native_cpu_die(unsigned int cpu)
1399 /* We said "no" in __cpu_disable */
1403 void native_play_dead(void)