1 #include <linux/errno.h>
2 #include <linux/kernel.h>
5 #include <linux/prctl.h>
6 #include <linux/slab.h>
7 #include <linux/sched.h>
8 #include <linux/module.h>
10 #include <linux/clockchips.h>
11 #include <linux/random.h>
12 #include <linux/user-return-notifier.h>
13 #include <linux/dmi.h>
14 #include <linux/utsname.h>
15 #include <trace/events/power.h>
16 #include <linux/hw_breakpoint.h>
18 #include <asm/system.h>
20 #include <asm/syscalls.h>
22 #include <asm/uaccess.h>
24 #include <asm/debugreg.h>
26 struct kmem_cache *task_xstate_cachep;
27 EXPORT_SYMBOL_GPL(task_xstate_cachep);
29 int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src)
34 if (fpu_allocated(&src->thread.fpu)) {
35 memset(&dst->thread.fpu, 0, sizeof(dst->thread.fpu));
36 ret = fpu_alloc(&dst->thread.fpu);
39 fpu_copy(&dst->thread.fpu, &src->thread.fpu);
44 void free_thread_xstate(struct task_struct *tsk)
46 fpu_free(&tsk->thread.fpu);
49 void free_thread_info(struct thread_info *ti)
51 free_thread_xstate(ti->task);
52 free_pages((unsigned long)ti, get_order(THREAD_SIZE));
55 void arch_task_cache_init(void)
58 kmem_cache_create("task_xstate", xstate_size,
59 __alignof__(union thread_xstate),
60 SLAB_PANIC | SLAB_NOTRACK, NULL);
64 * Free current thread data structures etc..
66 void exit_thread(void)
68 struct task_struct *me = current;
69 struct thread_struct *t = &me->thread;
70 unsigned long *bp = t->io_bitmap_ptr;
73 struct tss_struct *tss = &per_cpu(init_tss, get_cpu());
75 t->io_bitmap_ptr = NULL;
76 clear_thread_flag(TIF_IO_BITMAP);
78 * Careful, clear this in the TSS too:
80 memset(tss->io_bitmap, 0xff, t->io_bitmap_max);
87 void show_regs(struct pt_regs *regs)
90 show_trace(NULL, regs, (unsigned long *)kernel_stack_pointer(regs));
93 void show_regs_common(void)
95 const char *vendor, *product, *board;
97 vendor = dmi_get_system_info(DMI_SYS_VENDOR);
100 product = dmi_get_system_info(DMI_PRODUCT_NAME);
104 /* Board Name is optional */
105 board = dmi_get_system_info(DMI_BOARD_NAME);
107 printk(KERN_CONT "\n");
108 printk(KERN_DEFAULT "Pid: %d, comm: %.20s %s %s %.*s",
109 current->pid, current->comm, print_tainted(),
110 init_utsname()->release,
111 (int)strcspn(init_utsname()->version, " "),
112 init_utsname()->version);
113 printk(KERN_CONT " ");
114 printk(KERN_CONT "%s %s", vendor, product);
116 printk(KERN_CONT "/");
117 printk(KERN_CONT "%s", board);
119 printk(KERN_CONT "\n");
122 void flush_thread(void)
124 struct task_struct *tsk = current;
126 flush_ptrace_hw_breakpoint(tsk);
127 memset(tsk->thread.tls_array, 0, sizeof(tsk->thread.tls_array));
129 * Forget coprocessor state..
131 tsk->fpu_counter = 0;
136 static void hard_disable_TSC(void)
138 write_cr4(read_cr4() | X86_CR4_TSD);
141 void disable_TSC(void)
144 if (!test_and_set_thread_flag(TIF_NOTSC))
146 * Must flip the CPU state synchronously with
147 * TIF_NOTSC in the current running context.
153 static void hard_enable_TSC(void)
155 write_cr4(read_cr4() & ~X86_CR4_TSD);
158 static void enable_TSC(void)
161 if (test_and_clear_thread_flag(TIF_NOTSC))
163 * Must flip the CPU state synchronously with
164 * TIF_NOTSC in the current running context.
170 int get_tsc_mode(unsigned long adr)
174 if (test_thread_flag(TIF_NOTSC))
175 val = PR_TSC_SIGSEGV;
179 return put_user(val, (unsigned int __user *)adr);
182 int set_tsc_mode(unsigned int val)
184 if (val == PR_TSC_SIGSEGV)
186 else if (val == PR_TSC_ENABLE)
194 void __switch_to_xtra(struct task_struct *prev_p, struct task_struct *next_p,
195 struct tss_struct *tss)
197 struct thread_struct *prev, *next;
199 prev = &prev_p->thread;
200 next = &next_p->thread;
202 if (test_tsk_thread_flag(prev_p, TIF_BLOCKSTEP) ^
203 test_tsk_thread_flag(next_p, TIF_BLOCKSTEP)) {
204 unsigned long debugctl = get_debugctlmsr();
206 debugctl &= ~DEBUGCTLMSR_BTF;
207 if (test_tsk_thread_flag(next_p, TIF_BLOCKSTEP))
208 debugctl |= DEBUGCTLMSR_BTF;
210 update_debugctlmsr(debugctl);
213 if (test_tsk_thread_flag(prev_p, TIF_NOTSC) ^
214 test_tsk_thread_flag(next_p, TIF_NOTSC)) {
215 /* prev and next are different */
216 if (test_tsk_thread_flag(next_p, TIF_NOTSC))
222 if (test_tsk_thread_flag(next_p, TIF_IO_BITMAP)) {
224 * Copy the relevant range of the IO bitmap.
225 * Normally this is 128 bytes or less:
227 memcpy(tss->io_bitmap, next->io_bitmap_ptr,
228 max(prev->io_bitmap_max, next->io_bitmap_max));
229 } else if (test_tsk_thread_flag(prev_p, TIF_IO_BITMAP)) {
231 * Clear any possible leftover bits:
233 memset(tss->io_bitmap, 0xff, prev->io_bitmap_max);
235 propagate_user_return_notify(prev_p, next_p);
238 int sys_fork(struct pt_regs *regs)
240 return do_fork(SIGCHLD, regs->sp, regs, 0, NULL, NULL);
244 * This is trivial, and on the face of it looks like it
245 * could equally well be done in user mode.
247 * Not so, for quite unobvious reasons - register pressure.
248 * In user mode vfork() cannot have a stack frame, and if
249 * done by calling the "clone()" system call directly, you
250 * do not have enough call-clobbered registers to hold all
251 * the information you need.
253 int sys_vfork(struct pt_regs *regs)
255 return do_fork(CLONE_VFORK | CLONE_VM | SIGCHLD, regs->sp, regs, 0,
260 sys_clone(unsigned long clone_flags, unsigned long newsp,
261 void __user *parent_tid, void __user *child_tid, struct pt_regs *regs)
265 return do_fork(clone_flags, newsp, regs, 0, parent_tid, child_tid);
269 * This gets run with %si containing the
270 * function to call, and %di containing
273 extern void kernel_thread_helper(void);
276 * Create a kernel thread
278 int kernel_thread(int (*fn)(void *), void *arg, unsigned long flags)
282 memset(®s, 0, sizeof(regs));
284 regs.si = (unsigned long) fn;
285 regs.di = (unsigned long) arg;
290 regs.fs = __KERNEL_PERCPU;
291 regs.gs = __KERNEL_STACK_CANARY;
293 regs.ss = __KERNEL_DS;
297 regs.ip = (unsigned long) kernel_thread_helper;
298 regs.cs = __KERNEL_CS | get_kernel_rpl();
299 regs.flags = X86_EFLAGS_IF | 0x2;
301 /* Ok, create the new process.. */
302 return do_fork(flags | CLONE_VM | CLONE_UNTRACED, 0, ®s, 0, NULL, NULL);
304 EXPORT_SYMBOL(kernel_thread);
307 * sys_execve() executes a new program.
309 long sys_execve(const char __user *name,
310 const char __user *const __user *argv,
311 const char __user *const __user *envp, struct pt_regs *regs)
316 filename = getname(name);
317 error = PTR_ERR(filename);
318 if (IS_ERR(filename))
320 error = do_execve(filename, argv, envp, regs);
324 /* Make sure we don't return using sysenter.. */
325 set_thread_flag(TIF_IRET);
334 * Idle related variables and functions
336 unsigned long boot_option_idle_override = IDLE_NO_OVERRIDE;
337 EXPORT_SYMBOL(boot_option_idle_override);
340 * Powermanagement idle function, if any..
342 void (*pm_idle)(void);
343 #if defined(CONFIG_APM_MODULE) && defined(CONFIG_APM_CPU_IDLE)
344 EXPORT_SYMBOL(pm_idle);
349 * This halt magic was a workaround for ancient floppy DMA
350 * wreckage. It should be safe to remove.
352 static int hlt_counter;
353 void disable_hlt(void)
357 EXPORT_SYMBOL(disable_hlt);
359 void enable_hlt(void)
363 EXPORT_SYMBOL(enable_hlt);
365 static inline int hlt_use_halt(void)
367 return (!hlt_counter && boot_cpu_data.hlt_works_ok);
370 static inline int hlt_use_halt(void)
377 * We use this if we don't have any better
380 void default_idle(void)
382 if (hlt_use_halt()) {
383 trace_power_start(POWER_CSTATE, 1, smp_processor_id());
384 trace_cpu_idle(1, smp_processor_id());
385 current_thread_info()->status &= ~TS_POLLING;
387 * TS_POLLING-cleared state must be visible before we
393 safe_halt(); /* enables interrupts racelessly */
396 current_thread_info()->status |= TS_POLLING;
397 trace_power_end(smp_processor_id());
398 trace_cpu_idle(PWR_EVENT_EXIT, smp_processor_id());
401 /* loop is done by the caller */
405 #if defined(CONFIG_APM_MODULE) && defined(CONFIG_APM_CPU_IDLE)
406 EXPORT_SYMBOL(default_idle);
409 void stop_this_cpu(void *dummy)
415 set_cpu_online(smp_processor_id(), false);
416 disable_local_APIC();
419 if (hlt_works(smp_processor_id()))
424 static void do_nothing(void *unused)
429 * cpu_idle_wait - Used to ensure that all the CPUs discard old value of
430 * pm_idle and update to new pm_idle value. Required while changing pm_idle
431 * handler on SMP systems.
433 * Caller must have changed pm_idle to the new value before the call. Old
434 * pm_idle value will not be used by any CPU after the return of this function.
436 void cpu_idle_wait(void)
439 /* kick all the CPUs so that they exit out of pm_idle */
440 smp_call_function(do_nothing, NULL, 1);
442 EXPORT_SYMBOL_GPL(cpu_idle_wait);
445 * This uses new MONITOR/MWAIT instructions on P4 processors with PNI,
446 * which can obviate IPI to trigger checking of need_resched.
447 * We execute MONITOR against need_resched and enter optimized wait state
448 * through MWAIT. Whenever someone changes need_resched, we would be woken
449 * up from MWAIT (without an IPI).
451 * New with Core Duo processors, MWAIT can take some hints based on CPU
454 void mwait_idle_with_hints(unsigned long ax, unsigned long cx)
456 if (!need_resched()) {
457 if (cpu_has(__this_cpu_ptr(&cpu_info), X86_FEATURE_CLFLUSH_MONITOR))
458 clflush((void *)¤t_thread_info()->flags);
460 __monitor((void *)¤t_thread_info()->flags, 0, 0);
467 /* Default MONITOR/MWAIT with no hints, used for default C1 state */
468 static void mwait_idle(void)
470 if (!need_resched()) {
471 trace_power_start(POWER_CSTATE, 1, smp_processor_id());
472 trace_cpu_idle(1, smp_processor_id());
473 if (cpu_has(__this_cpu_ptr(&cpu_info), X86_FEATURE_CLFLUSH_MONITOR))
474 clflush((void *)¤t_thread_info()->flags);
476 __monitor((void *)¤t_thread_info()->flags, 0, 0);
482 trace_power_end(smp_processor_id());
483 trace_cpu_idle(PWR_EVENT_EXIT, smp_processor_id());
489 * On SMP it's slightly faster (but much more power-consuming!)
490 * to poll the ->work.need_resched flag instead of waiting for the
491 * cross-CPU IPI to arrive. Use this option with caution.
493 static void poll_idle(void)
495 trace_power_start(POWER_CSTATE, 0, smp_processor_id());
496 trace_cpu_idle(0, smp_processor_id());
498 while (!need_resched())
500 trace_power_end(smp_processor_id());
501 trace_cpu_idle(PWR_EVENT_EXIT, smp_processor_id());
505 * mwait selection logic:
507 * It depends on the CPU. For AMD CPUs that support MWAIT this is
508 * wrong. Family 0x10 and 0x11 CPUs will enter C1 on HLT. Powersavings
509 * then depend on a clock divisor and current Pstate of the core. If
510 * all cores of a processor are in halt state (C1) the processor can
511 * enter the C1E (C1 enhanced) state. If mwait is used this will never
514 * idle=mwait overrides this decision and forces the usage of mwait.
517 #define MWAIT_INFO 0x05
518 #define MWAIT_ECX_EXTENDED_INFO 0x01
519 #define MWAIT_EDX_C1 0xf0
521 int mwait_usable(const struct cpuinfo_x86 *c)
523 u32 eax, ebx, ecx, edx;
525 if (boot_option_idle_override == IDLE_FORCE_MWAIT)
528 if (c->cpuid_level < MWAIT_INFO)
531 cpuid(MWAIT_INFO, &eax, &ebx, &ecx, &edx);
532 /* Check, whether EDX has extended info about MWAIT */
533 if (!(ecx & MWAIT_ECX_EXTENDED_INFO))
537 * edx enumeratios MONITOR/MWAIT extensions. Check, whether
540 return (edx & MWAIT_EDX_C1);
543 bool amd_e400_c1e_detected;
544 EXPORT_SYMBOL(amd_e400_c1e_detected);
546 static cpumask_var_t amd_e400_c1e_mask;
548 void amd_e400_remove_cpu(int cpu)
550 if (amd_e400_c1e_mask != NULL)
551 cpumask_clear_cpu(cpu, amd_e400_c1e_mask);
555 * AMD Erratum 400 aware idle routine. We check for C1E active in the interrupt
556 * pending message MSR. If we detect C1E, then we handle it the same
557 * way as C3 power states (local apic timer and TSC stop)
559 static void amd_e400_idle(void)
564 if (!amd_e400_c1e_detected) {
567 rdmsr(MSR_K8_INT_PENDING_MSG, lo, hi);
569 if (lo & K8_INTP_C1E_ACTIVE_MASK) {
570 amd_e400_c1e_detected = true;
571 if (!boot_cpu_has(X86_FEATURE_NONSTOP_TSC))
572 mark_tsc_unstable("TSC halt in AMD C1E");
573 printk(KERN_INFO "System has AMD C1E enabled\n");
577 if (amd_e400_c1e_detected) {
578 int cpu = smp_processor_id();
580 if (!cpumask_test_cpu(cpu, amd_e400_c1e_mask)) {
581 cpumask_set_cpu(cpu, amd_e400_c1e_mask);
583 * Force broadcast so ACPI can not interfere.
585 clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_FORCE,
587 printk(KERN_INFO "Switch to broadcast mode on CPU%d\n",
590 clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_ENTER, &cpu);
595 * The switch back from broadcast mode needs to be
596 * called with interrupts disabled.
599 clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_EXIT, &cpu);
605 void __cpuinit select_idle_routine(const struct cpuinfo_x86 *c)
608 if (pm_idle == poll_idle && smp_num_siblings > 1) {
609 printk_once(KERN_WARNING "WARNING: polling idle and HT enabled,"
610 " performance may degrade.\n");
616 if (cpu_has(c, X86_FEATURE_MWAIT) && mwait_usable(c)) {
618 * One CPU supports mwait => All CPUs supports mwait
620 printk(KERN_INFO "using mwait in idle threads.\n");
621 pm_idle = mwait_idle;
622 } else if (cpu_has_amd_erratum(amd_erratum_400)) {
623 /* E400: APIC timer interrupt does not wake up CPU from C1e */
624 printk(KERN_INFO "using AMD E400 aware idle routine\n");
625 pm_idle = amd_e400_idle;
627 pm_idle = default_idle;
630 void __init init_amd_e400_c1e_mask(void)
632 /* If we're using amd_e400_idle, we need to allocate amd_e400_c1e_mask. */
633 if (pm_idle == amd_e400_idle)
634 zalloc_cpumask_var(&amd_e400_c1e_mask, GFP_KERNEL);
637 static int __init idle_setup(char *str)
642 if (!strcmp(str, "poll")) {
643 printk("using polling idle threads.\n");
645 boot_option_idle_override = IDLE_POLL;
646 } else if (!strcmp(str, "mwait")) {
647 boot_option_idle_override = IDLE_FORCE_MWAIT;
648 } else if (!strcmp(str, "halt")) {
650 * When the boot option of idle=halt is added, halt is
651 * forced to be used for CPU idle. In such case CPU C2/C3
652 * won't be used again.
653 * To continue to load the CPU idle driver, don't touch
654 * the boot_option_idle_override.
656 pm_idle = default_idle;
657 boot_option_idle_override = IDLE_HALT;
658 } else if (!strcmp(str, "nomwait")) {
660 * If the boot option of "idle=nomwait" is added,
661 * it means that mwait will be disabled for CPU C2/C3
662 * states. In such case it won't touch the variable
663 * of boot_option_idle_override.
665 boot_option_idle_override = IDLE_NOMWAIT;
671 early_param("idle", idle_setup);
673 unsigned long arch_align_stack(unsigned long sp)
675 if (!(current->personality & ADDR_NO_RANDOMIZE) && randomize_va_space)
676 sp -= get_random_int() % 8192;
680 unsigned long arch_randomize_brk(struct mm_struct *mm)
682 unsigned long range_end = mm->brk + 0x02000000;
683 return randomize_range(mm->brk, range_end, 0) ? : mm->brk;