1 #include <linux/errno.h>
2 #include <linux/kernel.h>
5 #include <linux/prctl.h>
6 #include <linux/slab.h>
7 #include <linux/sched.h>
8 #include <linux/module.h>
10 #include <linux/clockchips.h>
11 #include <linux/random.h>
12 #include <linux/user-return-notifier.h>
13 #include <linux/dmi.h>
14 #include <linux/utsname.h>
15 #include <trace/events/power.h>
16 #include <linux/hw_breakpoint.h>
18 #include <asm/system.h>
20 #include <asm/syscalls.h>
22 #include <asm/uaccess.h>
24 #include <asm/debugreg.h>
26 struct kmem_cache *task_xstate_cachep;
27 EXPORT_SYMBOL_GPL(task_xstate_cachep);
29 int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src)
34 if (fpu_allocated(&src->thread.fpu)) {
35 memset(&dst->thread.fpu, 0, sizeof(dst->thread.fpu));
36 ret = fpu_alloc(&dst->thread.fpu);
39 fpu_copy(&dst->thread.fpu, &src->thread.fpu);
44 void free_thread_xstate(struct task_struct *tsk)
46 fpu_free(&tsk->thread.fpu);
49 void free_thread_info(struct thread_info *ti)
51 free_thread_xstate(ti->task);
52 free_pages((unsigned long)ti, THREAD_ORDER);
55 void arch_task_cache_init(void)
58 kmem_cache_create("task_xstate", xstate_size,
59 __alignof__(union thread_xstate),
60 SLAB_PANIC | SLAB_NOTRACK, NULL);
64 * Free current thread data structures etc..
66 void exit_thread(void)
68 struct task_struct *me = current;
69 struct thread_struct *t = &me->thread;
70 unsigned long *bp = t->io_bitmap_ptr;
73 struct tss_struct *tss = &per_cpu(init_tss, get_cpu());
75 t->io_bitmap_ptr = NULL;
76 clear_thread_flag(TIF_IO_BITMAP);
78 * Careful, clear this in the TSS too:
80 memset(tss->io_bitmap, 0xff, t->io_bitmap_max);
87 void show_regs(struct pt_regs *regs)
90 show_trace(NULL, regs, (unsigned long *)kernel_stack_pointer(regs), 0);
93 void show_regs_common(void)
95 const char *vendor, *product, *board;
97 vendor = dmi_get_system_info(DMI_SYS_VENDOR);
100 product = dmi_get_system_info(DMI_PRODUCT_NAME);
104 /* Board Name is optional */
105 board = dmi_get_system_info(DMI_BOARD_NAME);
107 printk(KERN_CONT "\n");
108 printk(KERN_DEFAULT "Pid: %d, comm: %.20s %s %s %.*s",
109 current->pid, current->comm, print_tainted(),
110 init_utsname()->release,
111 (int)strcspn(init_utsname()->version, " "),
112 init_utsname()->version);
113 printk(KERN_CONT " %s %s", vendor, product);
115 printk(KERN_CONT "/%s", board);
116 printk(KERN_CONT "\n");
119 void flush_thread(void)
121 struct task_struct *tsk = current;
123 flush_ptrace_hw_breakpoint(tsk);
124 memset(tsk->thread.tls_array, 0, sizeof(tsk->thread.tls_array));
126 * Forget coprocessor state..
128 tsk->fpu_counter = 0;
133 static void hard_disable_TSC(void)
135 write_cr4(read_cr4() | X86_CR4_TSD);
138 void disable_TSC(void)
141 if (!test_and_set_thread_flag(TIF_NOTSC))
143 * Must flip the CPU state synchronously with
144 * TIF_NOTSC in the current running context.
150 static void hard_enable_TSC(void)
152 write_cr4(read_cr4() & ~X86_CR4_TSD);
155 static void enable_TSC(void)
158 if (test_and_clear_thread_flag(TIF_NOTSC))
160 * Must flip the CPU state synchronously with
161 * TIF_NOTSC in the current running context.
167 int get_tsc_mode(unsigned long adr)
171 if (test_thread_flag(TIF_NOTSC))
172 val = PR_TSC_SIGSEGV;
176 return put_user(val, (unsigned int __user *)adr);
179 int set_tsc_mode(unsigned int val)
181 if (val == PR_TSC_SIGSEGV)
183 else if (val == PR_TSC_ENABLE)
191 void __switch_to_xtra(struct task_struct *prev_p, struct task_struct *next_p,
192 struct tss_struct *tss)
194 struct thread_struct *prev, *next;
196 prev = &prev_p->thread;
197 next = &next_p->thread;
199 if (test_tsk_thread_flag(prev_p, TIF_BLOCKSTEP) ^
200 test_tsk_thread_flag(next_p, TIF_BLOCKSTEP)) {
201 unsigned long debugctl = get_debugctlmsr();
203 debugctl &= ~DEBUGCTLMSR_BTF;
204 if (test_tsk_thread_flag(next_p, TIF_BLOCKSTEP))
205 debugctl |= DEBUGCTLMSR_BTF;
207 update_debugctlmsr(debugctl);
210 if (test_tsk_thread_flag(prev_p, TIF_NOTSC) ^
211 test_tsk_thread_flag(next_p, TIF_NOTSC)) {
212 /* prev and next are different */
213 if (test_tsk_thread_flag(next_p, TIF_NOTSC))
219 if (test_tsk_thread_flag(next_p, TIF_IO_BITMAP)) {
221 * Copy the relevant range of the IO bitmap.
222 * Normally this is 128 bytes or less:
224 memcpy(tss->io_bitmap, next->io_bitmap_ptr,
225 max(prev->io_bitmap_max, next->io_bitmap_max));
226 } else if (test_tsk_thread_flag(prev_p, TIF_IO_BITMAP)) {
228 * Clear any possible leftover bits:
230 memset(tss->io_bitmap, 0xff, prev->io_bitmap_max);
232 propagate_user_return_notify(prev_p, next_p);
235 int sys_fork(struct pt_regs *regs)
237 return do_fork(SIGCHLD, regs->sp, regs, 0, NULL, NULL);
241 * This is trivial, and on the face of it looks like it
242 * could equally well be done in user mode.
244 * Not so, for quite unobvious reasons - register pressure.
245 * In user mode vfork() cannot have a stack frame, and if
246 * done by calling the "clone()" system call directly, you
247 * do not have enough call-clobbered registers to hold all
248 * the information you need.
250 int sys_vfork(struct pt_regs *regs)
252 return do_fork(CLONE_VFORK | CLONE_VM | SIGCHLD, regs->sp, regs, 0,
257 sys_clone(unsigned long clone_flags, unsigned long newsp,
258 void __user *parent_tid, void __user *child_tid, struct pt_regs *regs)
262 return do_fork(clone_flags, newsp, regs, 0, parent_tid, child_tid);
266 * This gets run with %si containing the
267 * function to call, and %di containing
270 extern void kernel_thread_helper(void);
273 * Create a kernel thread
275 int kernel_thread(int (*fn)(void *), void *arg, unsigned long flags)
279 memset(®s, 0, sizeof(regs));
281 regs.si = (unsigned long) fn;
282 regs.di = (unsigned long) arg;
287 regs.fs = __KERNEL_PERCPU;
288 regs.gs = __KERNEL_STACK_CANARY;
290 regs.ss = __KERNEL_DS;
294 regs.ip = (unsigned long) kernel_thread_helper;
295 regs.cs = __KERNEL_CS | get_kernel_rpl();
296 regs.flags = X86_EFLAGS_IF | X86_EFLAGS_BIT1;
298 /* Ok, create the new process.. */
299 return do_fork(flags | CLONE_VM | CLONE_UNTRACED, 0, ®s, 0, NULL, NULL);
301 EXPORT_SYMBOL(kernel_thread);
304 * sys_execve() executes a new program.
306 long sys_execve(const char __user *name,
307 const char __user *const __user *argv,
308 const char __user *const __user *envp, struct pt_regs *regs)
313 filename = getname(name);
314 error = PTR_ERR(filename);
315 if (IS_ERR(filename))
317 error = do_execve(filename, argv, envp, regs);
321 /* Make sure we don't return using sysenter.. */
322 set_thread_flag(TIF_IRET);
331 * Idle related variables and functions
333 unsigned long boot_option_idle_override = IDLE_NO_OVERRIDE;
334 EXPORT_SYMBOL(boot_option_idle_override);
337 * Powermanagement idle function, if any..
339 void (*pm_idle)(void);
340 #ifdef CONFIG_APM_MODULE
341 EXPORT_SYMBOL(pm_idle);
346 * This halt magic was a workaround for ancient floppy DMA
347 * wreckage. It should be safe to remove.
349 static int hlt_counter;
350 void disable_hlt(void)
354 EXPORT_SYMBOL(disable_hlt);
356 void enable_hlt(void)
360 EXPORT_SYMBOL(enable_hlt);
362 static inline int hlt_use_halt(void)
364 return (!hlt_counter && boot_cpu_data.hlt_works_ok);
367 static inline int hlt_use_halt(void)
374 * We use this if we don't have any better
377 void default_idle(void)
379 if (hlt_use_halt()) {
380 trace_power_start_rcuidle(POWER_CSTATE, 1, smp_processor_id());
381 trace_cpu_idle_rcuidle(1, smp_processor_id());
382 current_thread_info()->status &= ~TS_POLLING;
384 * TS_POLLING-cleared state must be visible before we
390 safe_halt(); /* enables interrupts racelessly */
393 current_thread_info()->status |= TS_POLLING;
394 trace_power_end_rcuidle(smp_processor_id());
395 trace_cpu_idle_rcuidle(PWR_EVENT_EXIT, smp_processor_id());
398 /* loop is done by the caller */
402 #ifdef CONFIG_APM_MODULE
403 EXPORT_SYMBOL(default_idle);
406 bool set_pm_idle_to_default(void)
408 bool ret = !!pm_idle;
410 pm_idle = default_idle;
414 void stop_this_cpu(void *dummy)
420 set_cpu_online(smp_processor_id(), false);
421 disable_local_APIC();
424 if (hlt_works(smp_processor_id()))
429 static void do_nothing(void *unused)
434 * cpu_idle_wait - Used to ensure that all the CPUs discard old value of
435 * pm_idle and update to new pm_idle value. Required while changing pm_idle
436 * handler on SMP systems.
438 * Caller must have changed pm_idle to the new value before the call. Old
439 * pm_idle value will not be used by any CPU after the return of this function.
441 void cpu_idle_wait(void)
444 /* kick all the CPUs so that they exit out of pm_idle */
445 smp_call_function(do_nothing, NULL, 1);
447 EXPORT_SYMBOL_GPL(cpu_idle_wait);
449 /* Default MONITOR/MWAIT with no hints, used for default C1 state */
450 static void mwait_idle(void)
452 if (!need_resched()) {
453 trace_power_start_rcuidle(POWER_CSTATE, 1, smp_processor_id());
454 trace_cpu_idle_rcuidle(1, smp_processor_id());
455 if (this_cpu_has(X86_FEATURE_CLFLUSH_MONITOR))
456 clflush((void *)¤t_thread_info()->flags);
458 __monitor((void *)¤t_thread_info()->flags, 0, 0);
464 trace_power_end_rcuidle(smp_processor_id());
465 trace_cpu_idle_rcuidle(PWR_EVENT_EXIT, smp_processor_id());
471 * On SMP it's slightly faster (but much more power-consuming!)
472 * to poll the ->work.need_resched flag instead of waiting for the
473 * cross-CPU IPI to arrive. Use this option with caution.
475 static void poll_idle(void)
477 trace_power_start_rcuidle(POWER_CSTATE, 0, smp_processor_id());
478 trace_cpu_idle_rcuidle(0, smp_processor_id());
480 while (!need_resched())
482 trace_power_end_rcuidle(smp_processor_id());
483 trace_cpu_idle_rcuidle(PWR_EVENT_EXIT, smp_processor_id());
487 * mwait selection logic:
489 * It depends on the CPU. For AMD CPUs that support MWAIT this is
490 * wrong. Family 0x10 and 0x11 CPUs will enter C1 on HLT. Powersavings
491 * then depend on a clock divisor and current Pstate of the core. If
492 * all cores of a processor are in halt state (C1) the processor can
493 * enter the C1E (C1 enhanced) state. If mwait is used this will never
496 * idle=mwait overrides this decision and forces the usage of mwait.
499 #define MWAIT_INFO 0x05
500 #define MWAIT_ECX_EXTENDED_INFO 0x01
501 #define MWAIT_EDX_C1 0xf0
503 int mwait_usable(const struct cpuinfo_x86 *c)
505 u32 eax, ebx, ecx, edx;
507 if (boot_option_idle_override == IDLE_FORCE_MWAIT)
510 if (c->cpuid_level < MWAIT_INFO)
513 cpuid(MWAIT_INFO, &eax, &ebx, &ecx, &edx);
514 /* Check, whether EDX has extended info about MWAIT */
515 if (!(ecx & MWAIT_ECX_EXTENDED_INFO))
519 * edx enumeratios MONITOR/MWAIT extensions. Check, whether
522 return (edx & MWAIT_EDX_C1);
525 bool amd_e400_c1e_detected;
526 EXPORT_SYMBOL(amd_e400_c1e_detected);
528 static cpumask_var_t amd_e400_c1e_mask;
530 void amd_e400_remove_cpu(int cpu)
532 if (amd_e400_c1e_mask != NULL)
533 cpumask_clear_cpu(cpu, amd_e400_c1e_mask);
537 * AMD Erratum 400 aware idle routine. We check for C1E active in the interrupt
538 * pending message MSR. If we detect C1E, then we handle it the same
539 * way as C3 power states (local apic timer and TSC stop)
541 static void amd_e400_idle(void)
546 if (!amd_e400_c1e_detected) {
549 rdmsr(MSR_K8_INT_PENDING_MSG, lo, hi);
551 if (lo & K8_INTP_C1E_ACTIVE_MASK) {
552 amd_e400_c1e_detected = true;
553 if (!boot_cpu_has(X86_FEATURE_NONSTOP_TSC))
554 mark_tsc_unstable("TSC halt in AMD C1E");
555 printk(KERN_INFO "System has AMD C1E enabled\n");
559 if (amd_e400_c1e_detected) {
560 int cpu = smp_processor_id();
562 if (!cpumask_test_cpu(cpu, amd_e400_c1e_mask)) {
563 cpumask_set_cpu(cpu, amd_e400_c1e_mask);
565 * Force broadcast so ACPI can not interfere.
567 clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_FORCE,
569 printk(KERN_INFO "Switch to broadcast mode on CPU%d\n",
572 clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_ENTER, &cpu);
577 * The switch back from broadcast mode needs to be
578 * called with interrupts disabled.
581 clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_EXIT, &cpu);
587 void __cpuinit select_idle_routine(const struct cpuinfo_x86 *c)
590 if (pm_idle == poll_idle && smp_num_siblings > 1) {
591 printk_once(KERN_WARNING "WARNING: polling idle and HT enabled,"
592 " performance may degrade.\n");
598 if (cpu_has(c, X86_FEATURE_MWAIT) && mwait_usable(c)) {
600 * One CPU supports mwait => All CPUs supports mwait
602 printk(KERN_INFO "using mwait in idle threads.\n");
603 pm_idle = mwait_idle;
604 } else if (cpu_has_amd_erratum(amd_erratum_400)) {
605 /* E400: APIC timer interrupt does not wake up CPU from C1e */
606 printk(KERN_INFO "using AMD E400 aware idle routine\n");
607 pm_idle = amd_e400_idle;
609 pm_idle = default_idle;
612 void __init init_amd_e400_c1e_mask(void)
614 /* If we're using amd_e400_idle, we need to allocate amd_e400_c1e_mask. */
615 if (pm_idle == amd_e400_idle)
616 zalloc_cpumask_var(&amd_e400_c1e_mask, GFP_KERNEL);
619 static int __init idle_setup(char *str)
624 if (!strcmp(str, "poll")) {
625 printk("using polling idle threads.\n");
627 boot_option_idle_override = IDLE_POLL;
628 } else if (!strcmp(str, "mwait")) {
629 boot_option_idle_override = IDLE_FORCE_MWAIT;
630 WARN_ONCE(1, "\"idle=mwait\" will be removed in 2012\n");
631 } else if (!strcmp(str, "halt")) {
633 * When the boot option of idle=halt is added, halt is
634 * forced to be used for CPU idle. In such case CPU C2/C3
635 * won't be used again.
636 * To continue to load the CPU idle driver, don't touch
637 * the boot_option_idle_override.
639 pm_idle = default_idle;
640 boot_option_idle_override = IDLE_HALT;
641 } else if (!strcmp(str, "nomwait")) {
643 * If the boot option of "idle=nomwait" is added,
644 * it means that mwait will be disabled for CPU C2/C3
645 * states. In such case it won't touch the variable
646 * of boot_option_idle_override.
648 boot_option_idle_override = IDLE_NOMWAIT;
654 early_param("idle", idle_setup);
656 unsigned long arch_align_stack(unsigned long sp)
658 if (!(current->personality & ADDR_NO_RANDOMIZE) && randomize_va_space)
659 sp -= get_random_int() % 8192;
663 unsigned long arch_randomize_brk(struct mm_struct *mm)
665 unsigned long range_end = mm->brk + 0x02000000;
666 return randomize_range(mm->brk, range_end, 0) ? : mm->brk;