1 #include <linux/errno.h>
2 #include <linux/kernel.h>
5 #include <linux/prctl.h>
6 #include <linux/slab.h>
7 #include <linux/sched.h>
8 #include <linux/module.h>
10 #include <linux/clockchips.h>
11 #include <linux/random.h>
12 #include <linux/user-return-notifier.h>
13 #include <linux/dmi.h>
14 #include <linux/utsname.h>
15 #include <linux/stackprotector.h>
16 #include <linux/tick.h>
17 #include <linux/cpuidle.h>
18 #include <trace/events/power.h>
19 #include <linux/hw_breakpoint.h>
22 #include <asm/syscalls.h>
24 #include <asm/uaccess.h>
26 #include <asm/fpu-internal.h>
27 #include <asm/debugreg.h>
31 static DEFINE_PER_CPU(unsigned char, is_idle);
32 static ATOMIC_NOTIFIER_HEAD(idle_notifier);
34 void idle_notifier_register(struct notifier_block *n)
36 atomic_notifier_chain_register(&idle_notifier, n);
38 EXPORT_SYMBOL_GPL(idle_notifier_register);
40 void idle_notifier_unregister(struct notifier_block *n)
42 atomic_notifier_chain_unregister(&idle_notifier, n);
44 EXPORT_SYMBOL_GPL(idle_notifier_unregister);
47 struct kmem_cache *task_xstate_cachep;
48 EXPORT_SYMBOL_GPL(task_xstate_cachep);
51 * this gets called so that we can store lazy state into memory and copy the
52 * current task into the new thread.
54 int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src)
61 if (fpu_allocated(&src->thread.fpu)) {
62 memset(&dst->thread.fpu, 0, sizeof(dst->thread.fpu));
63 ret = fpu_alloc(&dst->thread.fpu);
66 fpu_copy(&dst->thread.fpu, &src->thread.fpu);
71 void free_thread_xstate(struct task_struct *tsk)
73 fpu_free(&tsk->thread.fpu);
76 void free_thread_info(struct thread_info *ti)
78 free_thread_xstate(ti->task);
79 free_pages((unsigned long)ti, THREAD_ORDER);
82 void arch_task_cache_init(void)
85 kmem_cache_create("task_xstate", xstate_size,
86 __alignof__(union thread_xstate),
87 SLAB_PANIC | SLAB_NOTRACK, NULL);
90 static inline void drop_fpu(struct task_struct *tsk)
93 * Forget coprocessor state..
101 * Free current thread data structures etc..
103 void exit_thread(void)
105 struct task_struct *me = current;
106 struct thread_struct *t = &me->thread;
107 unsigned long *bp = t->io_bitmap_ptr;
110 struct tss_struct *tss = &per_cpu(init_tss, get_cpu());
112 t->io_bitmap_ptr = NULL;
113 clear_thread_flag(TIF_IO_BITMAP);
115 * Careful, clear this in the TSS too:
117 memset(tss->io_bitmap, 0xff, t->io_bitmap_max);
118 t->io_bitmap_max = 0;
126 void show_regs(struct pt_regs *regs)
128 show_registers(regs);
129 show_trace(NULL, regs, (unsigned long *)kernel_stack_pointer(regs), 0);
132 void show_regs_common(void)
134 const char *vendor, *product, *board;
136 vendor = dmi_get_system_info(DMI_SYS_VENDOR);
139 product = dmi_get_system_info(DMI_PRODUCT_NAME);
143 /* Board Name is optional */
144 board = dmi_get_system_info(DMI_BOARD_NAME);
146 printk(KERN_CONT "\n");
147 printk(KERN_DEFAULT "Pid: %d, comm: %.20s %s %s %.*s",
148 current->pid, current->comm, print_tainted(),
149 init_utsname()->release,
150 (int)strcspn(init_utsname()->version, " "),
151 init_utsname()->version);
152 printk(KERN_CONT " %s %s", vendor, product);
154 printk(KERN_CONT "/%s", board);
155 printk(KERN_CONT "\n");
158 void flush_thread(void)
160 struct task_struct *tsk = current;
162 flush_ptrace_hw_breakpoint(tsk);
163 memset(tsk->thread.tls_array, 0, sizeof(tsk->thread.tls_array));
167 static void hard_disable_TSC(void)
169 write_cr4(read_cr4() | X86_CR4_TSD);
172 void disable_TSC(void)
175 if (!test_and_set_thread_flag(TIF_NOTSC))
177 * Must flip the CPU state synchronously with
178 * TIF_NOTSC in the current running context.
184 static void hard_enable_TSC(void)
186 write_cr4(read_cr4() & ~X86_CR4_TSD);
189 static void enable_TSC(void)
192 if (test_and_clear_thread_flag(TIF_NOTSC))
194 * Must flip the CPU state synchronously with
195 * TIF_NOTSC in the current running context.
201 int get_tsc_mode(unsigned long adr)
205 if (test_thread_flag(TIF_NOTSC))
206 val = PR_TSC_SIGSEGV;
210 return put_user(val, (unsigned int __user *)adr);
213 int set_tsc_mode(unsigned int val)
215 if (val == PR_TSC_SIGSEGV)
217 else if (val == PR_TSC_ENABLE)
225 void __switch_to_xtra(struct task_struct *prev_p, struct task_struct *next_p,
226 struct tss_struct *tss)
228 struct thread_struct *prev, *next;
230 prev = &prev_p->thread;
231 next = &next_p->thread;
233 if (test_tsk_thread_flag(prev_p, TIF_BLOCKSTEP) ^
234 test_tsk_thread_flag(next_p, TIF_BLOCKSTEP)) {
235 unsigned long debugctl = get_debugctlmsr();
237 debugctl &= ~DEBUGCTLMSR_BTF;
238 if (test_tsk_thread_flag(next_p, TIF_BLOCKSTEP))
239 debugctl |= DEBUGCTLMSR_BTF;
241 update_debugctlmsr(debugctl);
244 if (test_tsk_thread_flag(prev_p, TIF_NOTSC) ^
245 test_tsk_thread_flag(next_p, TIF_NOTSC)) {
246 /* prev and next are different */
247 if (test_tsk_thread_flag(next_p, TIF_NOTSC))
253 if (test_tsk_thread_flag(next_p, TIF_IO_BITMAP)) {
255 * Copy the relevant range of the IO bitmap.
256 * Normally this is 128 bytes or less:
258 memcpy(tss->io_bitmap, next->io_bitmap_ptr,
259 max(prev->io_bitmap_max, next->io_bitmap_max));
260 } else if (test_tsk_thread_flag(prev_p, TIF_IO_BITMAP)) {
262 * Clear any possible leftover bits:
264 memset(tss->io_bitmap, 0xff, prev->io_bitmap_max);
266 propagate_user_return_notify(prev_p, next_p);
269 int sys_fork(struct pt_regs *regs)
271 return do_fork(SIGCHLD, regs->sp, regs, 0, NULL, NULL);
275 * This is trivial, and on the face of it looks like it
276 * could equally well be done in user mode.
278 * Not so, for quite unobvious reasons - register pressure.
279 * In user mode vfork() cannot have a stack frame, and if
280 * done by calling the "clone()" system call directly, you
281 * do not have enough call-clobbered registers to hold all
282 * the information you need.
284 int sys_vfork(struct pt_regs *regs)
286 return do_fork(CLONE_VFORK | CLONE_VM | SIGCHLD, regs->sp, regs, 0,
291 sys_clone(unsigned long clone_flags, unsigned long newsp,
292 void __user *parent_tid, void __user *child_tid, struct pt_regs *regs)
296 return do_fork(clone_flags, newsp, regs, 0, parent_tid, child_tid);
300 * This gets run with %si containing the
301 * function to call, and %di containing
304 extern void kernel_thread_helper(void);
307 * Create a kernel thread
309 int kernel_thread(int (*fn)(void *), void *arg, unsigned long flags)
313 memset(®s, 0, sizeof(regs));
315 regs.si = (unsigned long) fn;
316 regs.di = (unsigned long) arg;
321 regs.fs = __KERNEL_PERCPU;
322 regs.gs = __KERNEL_STACK_CANARY;
324 regs.ss = __KERNEL_DS;
328 regs.ip = (unsigned long) kernel_thread_helper;
329 regs.cs = __KERNEL_CS | get_kernel_rpl();
330 regs.flags = X86_EFLAGS_IF | X86_EFLAGS_BIT1;
332 /* Ok, create the new process.. */
333 return do_fork(flags | CLONE_VM | CLONE_UNTRACED, 0, ®s, 0, NULL, NULL);
335 EXPORT_SYMBOL(kernel_thread);
338 * sys_execve() executes a new program.
340 long sys_execve(const char __user *name,
341 const char __user *const __user *argv,
342 const char __user *const __user *envp, struct pt_regs *regs)
347 filename = getname(name);
348 error = PTR_ERR(filename);
349 if (IS_ERR(filename))
351 error = do_execve(filename, argv, envp, regs);
355 /* Make sure we don't return using sysenter.. */
356 set_thread_flag(TIF_IRET);
365 * Idle related variables and functions
367 unsigned long boot_option_idle_override = IDLE_NO_OVERRIDE;
368 EXPORT_SYMBOL(boot_option_idle_override);
371 * Powermanagement idle function, if any..
373 void (*pm_idle)(void);
374 #ifdef CONFIG_APM_MODULE
375 EXPORT_SYMBOL(pm_idle);
378 static inline int hlt_use_halt(void)
384 static inline void play_dead(void)
391 void enter_idle(void)
393 percpu_write(is_idle, 1);
394 atomic_notifier_call_chain(&idle_notifier, IDLE_START, NULL);
397 static void __exit_idle(void)
399 if (x86_test_and_clear_bit_percpu(0, is_idle) == 0)
401 atomic_notifier_call_chain(&idle_notifier, IDLE_END, NULL);
404 /* Called from interrupts to signify idle end */
407 /* idle loop has pid 0 */
415 * The idle thread. There's no useful work to be
416 * done, so just try to conserve power and have a
417 * low exit latency (ie sit in a loop waiting for
418 * somebody to say that they'd like to reschedule)
423 * If we're the non-boot CPU, nothing set the stack canary up
424 * for us. CPU0 already has it initialized but no harm in
425 * doing it again. This is a good place for updating it, as
426 * we wont ever return from this function (so the invalid
427 * canaries already on the stack wont ever trigger).
429 boot_init_stack_canary();
430 current_thread_info()->status |= TS_POLLING;
433 tick_nohz_idle_enter();
435 while (!need_resched()) {
438 if (cpu_is_offline(smp_processor_id()))
442 * Idle routines should keep interrupts disabled
443 * from here on, until they go to idle.
444 * Otherwise, idle callbacks can misfire.
451 /* Don't trace irqs off for idle */
452 stop_critical_timings();
454 /* enter_idle() needs rcu for notifiers */
457 if (cpuidle_idle_call())
461 start_critical_timings();
463 /* In many cases the interrupt that ended idle
464 has already called exit_idle. But some idle
465 loops can be woken up without interrupt. */
469 tick_nohz_idle_exit();
470 preempt_enable_no_resched();
477 * We use this if we don't have any better
480 void default_idle(void)
482 if (hlt_use_halt()) {
483 trace_power_start_rcuidle(POWER_CSTATE, 1, smp_processor_id());
484 trace_cpu_idle_rcuidle(1, smp_processor_id());
485 current_thread_info()->status &= ~TS_POLLING;
487 * TS_POLLING-cleared state must be visible before we
493 safe_halt(); /* enables interrupts racelessly */
496 current_thread_info()->status |= TS_POLLING;
497 trace_power_end_rcuidle(smp_processor_id());
498 trace_cpu_idle_rcuidle(PWR_EVENT_EXIT, smp_processor_id());
501 /* loop is done by the caller */
505 #ifdef CONFIG_APM_MODULE
506 EXPORT_SYMBOL(default_idle);
509 bool set_pm_idle_to_default(void)
511 bool ret = !!pm_idle;
513 pm_idle = default_idle;
517 void stop_this_cpu(void *dummy)
523 set_cpu_online(smp_processor_id(), false);
524 disable_local_APIC();
527 if (hlt_works(smp_processor_id()))
532 static void do_nothing(void *unused)
537 * cpu_idle_wait - Used to ensure that all the CPUs discard old value of
538 * pm_idle and update to new pm_idle value. Required while changing pm_idle
539 * handler on SMP systems.
541 * Caller must have changed pm_idle to the new value before the call. Old
542 * pm_idle value will not be used by any CPU after the return of this function.
544 void cpu_idle_wait(void)
547 /* kick all the CPUs so that they exit out of pm_idle */
548 smp_call_function(do_nothing, NULL, 1);
550 EXPORT_SYMBOL_GPL(cpu_idle_wait);
552 /* Default MONITOR/MWAIT with no hints, used for default C1 state */
553 static void mwait_idle(void)
555 if (!need_resched()) {
556 trace_power_start_rcuidle(POWER_CSTATE, 1, smp_processor_id());
557 trace_cpu_idle_rcuidle(1, smp_processor_id());
558 if (this_cpu_has(X86_FEATURE_CLFLUSH_MONITOR))
559 clflush((void *)¤t_thread_info()->flags);
561 __monitor((void *)¤t_thread_info()->flags, 0, 0);
567 trace_power_end_rcuidle(smp_processor_id());
568 trace_cpu_idle_rcuidle(PWR_EVENT_EXIT, smp_processor_id());
574 * On SMP it's slightly faster (but much more power-consuming!)
575 * to poll the ->work.need_resched flag instead of waiting for the
576 * cross-CPU IPI to arrive. Use this option with caution.
578 static void poll_idle(void)
580 trace_power_start_rcuidle(POWER_CSTATE, 0, smp_processor_id());
581 trace_cpu_idle_rcuidle(0, smp_processor_id());
583 while (!need_resched())
585 trace_power_end_rcuidle(smp_processor_id());
586 trace_cpu_idle_rcuidle(PWR_EVENT_EXIT, smp_processor_id());
590 * mwait selection logic:
592 * It depends on the CPU. For AMD CPUs that support MWAIT this is
593 * wrong. Family 0x10 and 0x11 CPUs will enter C1 on HLT. Powersavings
594 * then depend on a clock divisor and current Pstate of the core. If
595 * all cores of a processor are in halt state (C1) the processor can
596 * enter the C1E (C1 enhanced) state. If mwait is used this will never
599 * idle=mwait overrides this decision and forces the usage of mwait.
602 #define MWAIT_INFO 0x05
603 #define MWAIT_ECX_EXTENDED_INFO 0x01
604 #define MWAIT_EDX_C1 0xf0
606 int mwait_usable(const struct cpuinfo_x86 *c)
608 u32 eax, ebx, ecx, edx;
610 if (boot_option_idle_override == IDLE_FORCE_MWAIT)
613 if (c->cpuid_level < MWAIT_INFO)
616 cpuid(MWAIT_INFO, &eax, &ebx, &ecx, &edx);
617 /* Check, whether EDX has extended info about MWAIT */
618 if (!(ecx & MWAIT_ECX_EXTENDED_INFO))
622 * edx enumeratios MONITOR/MWAIT extensions. Check, whether
625 return (edx & MWAIT_EDX_C1);
628 bool amd_e400_c1e_detected;
629 EXPORT_SYMBOL(amd_e400_c1e_detected);
631 static cpumask_var_t amd_e400_c1e_mask;
633 void amd_e400_remove_cpu(int cpu)
635 if (amd_e400_c1e_mask != NULL)
636 cpumask_clear_cpu(cpu, amd_e400_c1e_mask);
640 * AMD Erratum 400 aware idle routine. We check for C1E active in the interrupt
641 * pending message MSR. If we detect C1E, then we handle it the same
642 * way as C3 power states (local apic timer and TSC stop)
644 static void amd_e400_idle(void)
649 if (!amd_e400_c1e_detected) {
652 rdmsr(MSR_K8_INT_PENDING_MSG, lo, hi);
654 if (lo & K8_INTP_C1E_ACTIVE_MASK) {
655 amd_e400_c1e_detected = true;
656 if (!boot_cpu_has(X86_FEATURE_NONSTOP_TSC))
657 mark_tsc_unstable("TSC halt in AMD C1E");
658 printk(KERN_INFO "System has AMD C1E enabled\n");
662 if (amd_e400_c1e_detected) {
663 int cpu = smp_processor_id();
665 if (!cpumask_test_cpu(cpu, amd_e400_c1e_mask)) {
666 cpumask_set_cpu(cpu, amd_e400_c1e_mask);
668 * Force broadcast so ACPI can not interfere.
670 clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_FORCE,
672 printk(KERN_INFO "Switch to broadcast mode on CPU%d\n",
675 clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_ENTER, &cpu);
680 * The switch back from broadcast mode needs to be
681 * called with interrupts disabled.
684 clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_EXIT, &cpu);
690 void __cpuinit select_idle_routine(const struct cpuinfo_x86 *c)
693 if (pm_idle == poll_idle && smp_num_siblings > 1) {
694 printk_once(KERN_WARNING "WARNING: polling idle and HT enabled,"
695 " performance may degrade.\n");
701 if (cpu_has(c, X86_FEATURE_MWAIT) && mwait_usable(c)) {
703 * One CPU supports mwait => All CPUs supports mwait
705 printk(KERN_INFO "using mwait in idle threads.\n");
706 pm_idle = mwait_idle;
707 } else if (cpu_has_amd_erratum(amd_erratum_400)) {
708 /* E400: APIC timer interrupt does not wake up CPU from C1e */
709 printk(KERN_INFO "using AMD E400 aware idle routine\n");
710 pm_idle = amd_e400_idle;
712 pm_idle = default_idle;
715 void __init init_amd_e400_c1e_mask(void)
717 /* If we're using amd_e400_idle, we need to allocate amd_e400_c1e_mask. */
718 if (pm_idle == amd_e400_idle)
719 zalloc_cpumask_var(&amd_e400_c1e_mask, GFP_KERNEL);
722 static int __init idle_setup(char *str)
727 if (!strcmp(str, "poll")) {
728 printk("using polling idle threads.\n");
730 boot_option_idle_override = IDLE_POLL;
731 } else if (!strcmp(str, "mwait")) {
732 boot_option_idle_override = IDLE_FORCE_MWAIT;
733 WARN_ONCE(1, "\"idle=mwait\" will be removed in 2012\n");
734 } else if (!strcmp(str, "halt")) {
736 * When the boot option of idle=halt is added, halt is
737 * forced to be used for CPU idle. In such case CPU C2/C3
738 * won't be used again.
739 * To continue to load the CPU idle driver, don't touch
740 * the boot_option_idle_override.
742 pm_idle = default_idle;
743 boot_option_idle_override = IDLE_HALT;
744 } else if (!strcmp(str, "nomwait")) {
746 * If the boot option of "idle=nomwait" is added,
747 * it means that mwait will be disabled for CPU C2/C3
748 * states. In such case it won't touch the variable
749 * of boot_option_idle_override.
751 boot_option_idle_override = IDLE_NOMWAIT;
757 early_param("idle", idle_setup);
759 unsigned long arch_align_stack(unsigned long sp)
761 if (!(current->personality & ADDR_NO_RANDOMIZE) && randomize_va_space)
762 sp -= get_random_int() % 8192;
766 unsigned long arch_randomize_brk(struct mm_struct *mm)
768 unsigned long range_end = mm->brk + 0x02000000;
769 return randomize_range(mm->brk, range_end, 0) ? : mm->brk;