2 * Common interrupt code for 32 and 64 bit
5 #include <linux/interrupt.h>
6 #include <linux/kernel_stat.h>
7 #include <linux/seq_file.h>
9 #include <linux/ftrace.h>
12 #include <asm/io_apic.h>
16 atomic_t irq_err_count;
18 /* Function pointer for generic interrupt vector handling */
19 void (*generic_interrupt_extension)(void) = NULL;
22 * 'what should we do if we get a hw irq event on an illegal vector'.
23 * each architecture has to answer this themselves.
25 void ack_bad_irq(unsigned int irq)
27 printk(KERN_ERR "unexpected IRQ trap at vector %02x\n", irq);
29 #ifdef CONFIG_X86_LOCAL_APIC
31 * Currently unexpected vectors happen only on SMP and APIC.
32 * We _must_ ack these because every local APIC has only N
33 * irq slots per priority level, and a 'hanging, unacked' IRQ
34 * holds up an irq slot - in excessive cases (when multiple
35 * unexpected vectors occur) that might lock up the APIC
37 * But only ack when the APIC is enabled -AK
44 #define irq_stats(x) (&per_cpu(irq_stat, x))
46 * /proc/interrupts printing:
48 static int show_other_interrupts(struct seq_file *p, int prec)
52 seq_printf(p, "%*s: ", prec, "NMI");
53 for_each_online_cpu(j)
54 seq_printf(p, "%10u ", irq_stats(j)->__nmi_count);
55 seq_printf(p, " Non-maskable interrupts\n");
56 #ifdef CONFIG_X86_LOCAL_APIC
57 seq_printf(p, "%*s: ", prec, "LOC");
58 for_each_online_cpu(j)
59 seq_printf(p, "%10u ", irq_stats(j)->apic_timer_irqs);
60 seq_printf(p, " Local timer interrupts\n");
62 seq_printf(p, "%*s: ", prec, "SPU");
63 for_each_online_cpu(j)
64 seq_printf(p, "%10u ", irq_stats(j)->irq_spurious_count);
65 seq_printf(p, " Spurious interrupts\n");
66 seq_printf(p, "CNT: ");
67 for_each_online_cpu(j)
68 seq_printf(p, "%10u ", irq_stats(j)->apic_perf_irqs);
69 seq_printf(p, " Performance counter interrupts\n");
70 seq_printf(p, "PND: ");
71 for_each_online_cpu(j)
72 seq_printf(p, "%10u ", irq_stats(j)->apic_pending_irqs);
73 seq_printf(p, " Performance pending work\n");
75 if (generic_interrupt_extension) {
76 seq_printf(p, "PLT: ");
77 for_each_online_cpu(j)
78 seq_printf(p, "%10u ", irq_stats(j)->generic_irqs);
79 seq_printf(p, " Platform interrupts\n");
82 seq_printf(p, "%*s: ", prec, "RES");
83 for_each_online_cpu(j)
84 seq_printf(p, "%10u ", irq_stats(j)->irq_resched_count);
85 seq_printf(p, " Rescheduling interrupts\n");
86 seq_printf(p, "%*s: ", prec, "CAL");
87 for_each_online_cpu(j)
88 seq_printf(p, "%10u ", irq_stats(j)->irq_call_count);
89 seq_printf(p, " Function call interrupts\n");
90 seq_printf(p, "%*s: ", prec, "TLB");
91 for_each_online_cpu(j)
92 seq_printf(p, "%10u ", irq_stats(j)->irq_tlb_count);
93 seq_printf(p, " TLB shootdowns\n");
96 seq_printf(p, "%*s: ", prec, "TRM");
97 for_each_online_cpu(j)
98 seq_printf(p, "%10u ", irq_stats(j)->irq_thermal_count);
99 seq_printf(p, " Thermal event interrupts\n");
100 # ifdef CONFIG_X86_64
101 seq_printf(p, "%*s: ", prec, "THR");
102 for_each_online_cpu(j)
103 seq_printf(p, "%10u ", irq_stats(j)->irq_threshold_count);
104 seq_printf(p, " Threshold APIC interrupts\n");
107 seq_printf(p, "%*s: %10u\n", prec, "ERR", atomic_read(&irq_err_count));
108 #if defined(CONFIG_X86_IO_APIC)
109 seq_printf(p, "%*s: %10u\n", prec, "MIS", atomic_read(&irq_mis_count));
114 int show_interrupts(struct seq_file *p, void *v)
116 unsigned long flags, any_count = 0;
117 int i = *(loff_t *) v, j, prec;
118 struct irqaction *action;
119 struct irq_desc *desc;
124 for (prec = 3, j = 1000; prec < 10 && j <= nr_irqs; ++prec)
128 return show_other_interrupts(p, prec);
132 seq_printf(p, "%*s", prec + 8, "");
133 for_each_online_cpu(j)
134 seq_printf(p, "CPU%-8d", j);
138 desc = irq_to_desc(i);
142 spin_lock_irqsave(&desc->lock, flags);
143 for_each_online_cpu(j)
144 any_count |= kstat_irqs_cpu(i, j);
145 action = desc->action;
146 if (!action && !any_count)
149 seq_printf(p, "%*d: ", prec, i);
150 for_each_online_cpu(j)
151 seq_printf(p, "%10u ", kstat_irqs_cpu(i, j));
152 seq_printf(p, " %8s", desc->chip->name);
153 seq_printf(p, "-%-8s", desc->name);
156 seq_printf(p, " %s", action->name);
157 while ((action = action->next) != NULL)
158 seq_printf(p, ", %s", action->name);
163 spin_unlock_irqrestore(&desc->lock, flags);
170 u64 arch_irq_stat_cpu(unsigned int cpu)
172 u64 sum = irq_stats(cpu)->__nmi_count;
174 #ifdef CONFIG_X86_LOCAL_APIC
175 sum += irq_stats(cpu)->apic_timer_irqs;
176 sum += irq_stats(cpu)->irq_spurious_count;
177 sum += irq_stats(cpu)->apic_perf_irqs;
178 sum += irq_stats(cpu)->apic_pending_irqs;
180 if (generic_interrupt_extension)
181 sum += irq_stats(cpu)->generic_irqs;
183 sum += irq_stats(cpu)->irq_resched_count;
184 sum += irq_stats(cpu)->irq_call_count;
185 sum += irq_stats(cpu)->irq_tlb_count;
187 #ifdef CONFIG_X86_MCE
188 sum += irq_stats(cpu)->irq_thermal_count;
189 # ifdef CONFIG_X86_64
190 sum += irq_stats(cpu)->irq_threshold_count;
196 u64 arch_irq_stat(void)
198 u64 sum = atomic_read(&irq_err_count);
200 #ifdef CONFIG_X86_IO_APIC
201 sum += atomic_read(&irq_mis_count);
208 * do_IRQ handles all normal device IRQ's (the special
209 * SMP cross-CPU interrupts have their own specific
212 unsigned int __irq_entry do_IRQ(struct pt_regs *regs)
214 struct pt_regs *old_regs = set_irq_regs(regs);
216 /* high bit used in ret_from_ code */
217 unsigned vector = ~regs->orig_ax;
223 irq = __get_cpu_var(vector_irq)[vector];
225 if (!handle_irq(irq, regs)) {
231 if (printk_ratelimit())
232 printk(KERN_EMERG "%s: %d.%d No irq handler for vector (irq %d)\n",
233 __func__, smp_processor_id(), vector, irq);
238 set_irq_regs(old_regs);
243 * Handler for GENERIC_INTERRUPT_VECTOR.
245 void smp_generic_interrupt(struct pt_regs *regs)
247 struct pt_regs *old_regs = set_irq_regs(regs);
255 inc_irq_stat(generic_irqs);
257 if (generic_interrupt_extension)
258 generic_interrupt_extension();
262 set_irq_regs(old_regs);
265 EXPORT_SYMBOL_GPL(vector_used_by_percpu_irq);