arch/x86/kernel/i387.c

   1 /*
   2  *  Copyright (C) 1994 Linus Torvalds
   3  *
   4  *  Pentium III FXSR, SSE support
   5  *  General FPU state handling cleanups
   6  *      Gareth Hughes <gareth@valinux.com>, May 2000
   7  */
   8 #include <linux/module.h>
   9 #include <linux/regset.h>
  10 #include <linux/sched.h>
  11 #include <linux/slab.h>
  12
  13 #include <asm/sigcontext.h>
  14 #include <asm/processor.h>
  15 #include <asm/math_emu.h>
  16 #include <asm/uaccess.h>
  17 #include <asm/ptrace.h>
  18 #include <asm/i387.h>
  19 #include <asm/user.h>
  20
  21 #ifdef CONFIG_X86_64
  22 # include <asm/sigcontext32.h>
  23 # include <asm/user32.h>
  24 #else
  25 # define save_i387_xstate_ia32          save_i387_xstate
  26 # define restore_i387_xstate_ia32       restore_i387_xstate
  27 # define _fpstate_ia32          _fpstate
  28 # define _xstate_ia32           _xstate
  29 # define sig_xstate_ia32_size   sig_xstate_size
  30 # define fx_sw_reserved_ia32    fx_sw_reserved
  31 # define user_i387_ia32_struct  user_i387_struct
  32 # define user32_fxsr_struct     user_fxsr_struct
  33 #endif
  34
  35 #ifdef CONFIG_MATH_EMULATION
  36 # define HAVE_HWFP              (boot_cpu_data.hard_math)
  37 #else
  38 # define HAVE_HWFP              1
  39 #endif
  40
  41 static unsigned int             mxcsr_feature_mask __read_mostly = 0xffffffffu;
  42 unsigned int xstate_size;
  43 unsigned int sig_xstate_ia32_size = sizeof(struct _fpstate_ia32);
  44 static struct i387_fxsave_struct fx_scratch __cpuinitdata;
  45
  46 void __cpuinit mxcsr_feature_mask_init(void)
  47 {
  48         unsigned long mask = 0;
  49
  50         clts();
  51         if (cpu_has_fxsr) {
  52                 memset(&fx_scratch, 0, sizeof(struct i387_fxsave_struct));
  53                 asm volatile("fxsave %0" : : "m" (fx_scratch));
  54                 mask = fx_scratch.mxcsr_mask;
  55                 if (mask == 0)
  56                         mask = 0x0000ffbf;
  57         }
  58         mxcsr_feature_mask &= mask;
  59         stts();
  60 }
  61
  62 void __cpuinit init_thread_xstate(void)
  63 {
  64         if (!HAVE_HWFP) {
  65                 xstate_size = sizeof(struct i387_soft_struct);
  66                 return;
  67         }
  68
  69         if (cpu_has_xsave) {
  70                 xsave_cntxt_init();
  71                 return;
  72         }
  73
  74         if (cpu_has_fxsr)
  75                 xstate_size = sizeof(struct i387_fxsave_struct);
  76 #ifdef CONFIG_X86_32
  77         else
  78                 xstate_size = sizeof(struct i387_fsave_struct);
  79 #endif
  80 }
  81
  82 #ifdef CONFIG_X86_64
  83 /*
  84  * Called at bootup to set up the initial FPU state that is later cloned
  85  * into all processes.
  86  */
  87 void __cpuinit fpu_init(void)
  88 {
  89         unsigned long oldcr0 = read_cr0();
  90
  91         set_in_cr4(X86_CR4_OSFXSR);
  92         set_in_cr4(X86_CR4_OSXMMEXCPT);
  93
  94         write_cr0(oldcr0 & ~(X86_CR0_TS|X86_CR0_EM)); /* clear TS and EM */
  95
  96         /*
  97          * Boot processor to setup the FP and extended state context info.
  98          */
  99         if (!smp_processor_id())
 100                 init_thread_xstate();
 101         xsave_init();
 102
 103         mxcsr_feature_mask_init();
 104         /* clean state in init */
 105         current_thread_info()->status = 0;
 106         clear_used_math();
 107 }
 108 #endif  /* CONFIG_X86_64 */
 109
 110 void fpu_finit(struct fpu *fpu)
 111 {
 112 #ifdef CONFIG_X86_32
 113         if (!HAVE_HWFP) {
 114                 finit_soft_fpu(&fpu->state->soft);
 115                 return;
 116         }
 117 #endif
 118
 119         if (cpu_has_fxsr) {
 120                 struct i387_fxsave_struct *fx = &fpu->state->fxsave;
 121
 122                 memset(fx, 0, xstate_size);
 123                 fx->cwd = 0x37f;
 124                 if (cpu_has_xmm)
 125                         fx->mxcsr = MXCSR_DEFAULT;
 126         } else {
 127                 struct i387_fsave_struct *fp = &fpu->state->fsave;
 128                 memset(fp, 0, xstate_size);
 129                 fp->cwd = 0xffff037fu;
 130                 fp->swd = 0xffff0000u;
 131                 fp->twd = 0xffffffffu;
 132                 fp->fos = 0xffff0000u;
 133         }
 134 }
 135 EXPORT_SYMBOL_GPL(fpu_finit);
 136
 137 /*
 138  * The _current_ task is using the FPU for the first time
 139  * so initialize it and set the mxcsr to its default
 140  * value at reset if we support XMM instructions and then
 141  * remeber the current task has used the FPU.
 142  */
 143 int init_fpu(struct task_struct *tsk)
 144 {
 145         int ret;
 146
 147         if (tsk_used_math(tsk)) {
 148                 if (HAVE_HWFP && tsk == current)
 149                         unlazy_fpu(tsk);
 150                 return 0;
 151         }
 152
 153         /*
 154          * Memory allocation at the first usage of the FPU and other state.
 155          */
 156         ret = fpu_alloc(&tsk->thread.fpu);
 157         if (ret)
 158                 return ret;
 159
 160         fpu_finit(&tsk->thread.fpu);
 161
 162         set_stopped_child_used_math(tsk);
 163         return 0;
 164 }
 165
 166 /*
 167  * The xstateregs_active() routine is the same as the fpregs_active() routine,
 168  * as the "regset->n" for the xstate regset will be updated based on the feature
 169  * capabilites supported by the xsave.
 170  */
 171 int fpregs_active(struct task_struct *target, const struct user_regset *regset)
 172 {
 173         return tsk_used_math(target) ? regset->n : 0;
 174 }
 175
 176 int xfpregs_active(struct task_struct *target, const struct user_regset *regset)
 177 {
 178         return (cpu_has_fxsr && tsk_used_math(target)) ? regset->n : 0;
 179 }
 180
 181 int xfpregs_get(struct task_struct *target, const struct user_regset *regset,
 182                 unsigned int pos, unsigned int count,
 183                 void *kbuf, void __user *ubuf)
 184 {
 185         int ret;
 186
 187         if (!cpu_has_fxsr)
 188                 return -ENODEV;
 189
 190         ret = init_fpu(target);
 191         if (ret)
 192                 return ret;
 193
 194         return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
 195                                    &target->thread.fpu.state->fxsave, 0, -1);
 196 }
 197
 198 int xfpregs_set(struct task_struct *target, const struct user_regset *regset,
 199                 unsigned int pos, unsigned int count,
 200                 const void *kbuf, const void __user *ubuf)
 201 {
 202         int ret;
 203
 204         if (!cpu_has_fxsr)
 205                 return -ENODEV;
 206
 207         ret = init_fpu(target);
 208         if (ret)
 209                 return ret;
 210
 211         ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
 212                                  &target->thread.fpu.state->fxsave, 0, -1);
 213
 214         /*
 215          * mxcsr reserved bits must be masked to zero for security reasons.
 216          */
 217         target->thread.fpu.state->fxsave.mxcsr &= mxcsr_feature_mask;
 218
 219         /*
 220          * update the header bits in the xsave header, indicating the
 221          * presence of FP and SSE state.
 222          */
 223         if (cpu_has_xsave)
 224                 target->thread.fpu.state->xsave.xsave_hdr.xstate_bv |= XSTATE_FPSSE;
 225
 226         return ret;
 227 }
 228
 229 int xstateregs_get(struct task_struct *target, const struct user_regset *regset,
 230                 unsigned int pos, unsigned int count,
 231                 void *kbuf, void __user *ubuf)
 232 {
 233         int ret;
 234
 235         if (!cpu_has_xsave)
 236                 return -ENODEV;
 237
 238         ret = init_fpu(target);
 239         if (ret)
 240                 return ret;
 241
 242         /*
 243          * Copy the 48bytes defined by the software first into the xstate
 244          * memory layout in the thread struct, so that we can copy the entire
 245          * xstateregs to the user using one user_regset_copyout().
 246          */
 247         memcpy(&target->thread.fpu.state->fxsave.sw_reserved,
 248                xstate_fx_sw_bytes, sizeof(xstate_fx_sw_bytes));
 249
 250         /*
 251          * Copy the xstate memory layout.
 252          */
 253         ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
 254                                   &target->thread.fpu.state->xsave, 0, -1);
 255         return ret;
 256 }
 257
 258 int xstateregs_set(struct task_struct *target, const struct user_regset *regset,
 259                   unsigned int pos, unsigned int count,
 260                   const void *kbuf, const void __user *ubuf)
 261 {
 262         int ret;
 263         struct xsave_hdr_struct *xsave_hdr;
 264
 265         if (!cpu_has_xsave)
 266                 return -ENODEV;
 267
 268         ret = init_fpu(target);
 269         if (ret)
 270                 return ret;
 271
 272         ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
 273                                  &target->thread.fpu.state->xsave, 0, -1);
 274
 275         /*
 276          * mxcsr reserved bits must be masked to zero for security reasons.
 277          */
 278         target->thread.fpu.state->fxsave.mxcsr &= mxcsr_feature_mask;
 279
 280         xsave_hdr = &target->thread.fpu.state->xsave.xsave_hdr;
 281
 282         xsave_hdr->xstate_bv &= pcntxt_mask;
 283         /*
 284          * These bits must be zero.
 285          */
 286         xsave_hdr->reserved1[0] = xsave_hdr->reserved1[1] = 0;
 287
 288         return ret;
 289 }
 290
 291 #if defined CONFIG_X86_32 || defined CONFIG_IA32_EMULATION
 292
 293 /*
 294  * FPU tag word conversions.
 295  */
 296
 297 static inline unsigned short twd_i387_to_fxsr(unsigned short twd)
 298 {
 299         unsigned int tmp; /* to avoid 16 bit prefixes in the code */
 300
 301         /* Transform each pair of bits into 01 (valid) or 00 (empty) */
 302         tmp = ~twd;
 303         tmp = (tmp | (tmp>>1)) & 0x5555; /* 0V0V0V0V0V0V0V0V */
 304         /* and move the valid bits to the lower byte. */
 305         tmp = (tmp | (tmp >> 1)) & 0x3333; /* 00VV00VV00VV00VV */
 306         tmp = (tmp | (tmp >> 2)) & 0x0f0f; /* 0000VVVV0000VVVV */
 307         tmp = (tmp | (tmp >> 4)) & 0x00ff; /* 00000000VVVVVVVV */
 308
 309         return tmp;
 310 }
 311
 312 #define FPREG_ADDR(f, n)        ((void *)&(f)->st_space + (n) * 16);
 313 #define FP_EXP_TAG_VALID        0
 314 #define FP_EXP_TAG_ZERO         1
 315 #define FP_EXP_TAG_SPECIAL      2
 316 #define FP_EXP_TAG_EMPTY        3
 317
 318 static inline u32 twd_fxsr_to_i387(struct i387_fxsave_struct *fxsave)
 319 {
 320         struct _fpxreg *st;
 321         u32 tos = (fxsave->swd >> 11) & 7;
 322         u32 twd = (unsigned long) fxsave->twd;
 323         u32 tag;
 324         u32 ret = 0xffff0000u;
 325         int i;
 326
 327         for (i = 0; i < 8; i++, twd >>= 1) {
 328                 if (twd & 0x1) {
 329                         st = FPREG_ADDR(fxsave, (i - tos) & 7);
 330
 331                         switch (st->exponent & 0x7fff) {
 332                         case 0x7fff:
 333                                 tag = FP_EXP_TAG_SPECIAL;
 334                                 break;
 335                         case 0x0000:
 336                                 if (!st->significand[0] &&
 337                                     !st->significand[1] &&
 338                                     !st->significand[2] &&
 339                                     !st->significand[3])
 340                                         tag = FP_EXP_TAG_ZERO;
 341                                 else
 342                                         tag = FP_EXP_TAG_SPECIAL;
 343                                 break;
 344                         default:
 345                                 if (st->significand[3] & 0x8000)
 346                                         tag = FP_EXP_TAG_VALID;
 347                                 else
 348                                         tag = FP_EXP_TAG_SPECIAL;
 349                                 break;
 350                         }
 351                 } else {
 352                         tag = FP_EXP_TAG_EMPTY;
 353                 }
 354                 ret |= tag << (2 * i);
 355         }
 356         return ret;
 357 }
 358
 359 /*
 360  * FXSR floating point environment conversions.
 361  */
 362
 363 static void
 364 convert_from_fxsr(struct user_i387_ia32_struct *env, struct task_struct *tsk)
 365 {
 366         struct i387_fxsave_struct *fxsave = &tsk->thread.fpu.state->fxsave;
 367         struct _fpreg *to = (struct _fpreg *) &env->st_space[0];
 368         struct _fpxreg *from = (struct _fpxreg *) &fxsave->st_space[0];
 369         int i;
 370
 371         env->cwd = fxsave->cwd | 0xffff0000u;
 372         env->swd = fxsave->swd | 0xffff0000u;
 373         env->twd = twd_fxsr_to_i387(fxsave);
 374
 375 #ifdef CONFIG_X86_64
 376         env->fip = fxsave->rip;
 377         env->foo = fxsave->rdp;
 378         if (tsk == current) {
 379                 /*
 380                  * should be actually ds/cs at fpu exception time, but
 381                  * that information is not available in 64bit mode.
 382                  */
 383                 asm("mov %%ds, %[fos]" : [fos] "=r" (env->fos));
 384                 asm("mov %%cs, %[fcs]" : [fcs] "=r" (env->fcs));
 385         } else {
 386                 struct pt_regs *regs = task_pt_regs(tsk);
 387
 388                 env->fos = 0xffff0000 | tsk->thread.ds;
 389                 env->fcs = regs->cs;
 390         }
 391 #else
 392         env->fip = fxsave->fip;
 393         env->fcs = (u16) fxsave->fcs | ((u32) fxsave->fop << 16);
 394         env->foo = fxsave->foo;
 395         env->fos = fxsave->fos;
 396 #endif
 397
 398         for (i = 0; i < 8; ++i)
 399                 memcpy(&to[i], &from[i], sizeof(to[0]));
 400 }
 401
 402 static void convert_to_fxsr(struct task_struct *tsk,
 403                             const struct user_i387_ia32_struct *env)
 404
 405 {
 406         struct i387_fxsave_struct *fxsave = &tsk->thread.fpu.state->fxsave;
 407         struct _fpreg *from = (struct _fpreg *) &env->st_space[0];
 408         struct _fpxreg *to = (struct _fpxreg *) &fxsave->st_space[0];
 409         int i;
 410
 411         fxsave->cwd = env->cwd;
 412         fxsave->swd = env->swd;
 413         fxsave->twd = twd_i387_to_fxsr(env->twd);
 414         fxsave->fop = (u16) ((u32) env->fcs >> 16);
 415 #ifdef CONFIG_X86_64
 416         fxsave->rip = env->fip;
 417         fxsave->rdp = env->foo;
 418         /* cs and ds ignored */
 419 #else
 420         fxsave->fip = env->fip;
 421         fxsave->fcs = (env->fcs & 0xffff);
 422         fxsave->foo = env->foo;
 423         fxsave->fos = env->fos;
 424 #endif
 425
 426         for (i = 0; i < 8; ++i)
 427                 memcpy(&to[i], &from[i], sizeof(from[0]));
 428 }
 429
 430 int fpregs_get(struct task_struct *target, const struct user_regset *regset,
 431                unsigned int pos, unsigned int count,
 432                void *kbuf, void __user *ubuf)
 433 {
 434         struct user_i387_ia32_struct env;
 435         int ret;
 436
 437         ret = init_fpu(target);
 438         if (ret)
 439                 return ret;
 440
 441         if (!HAVE_HWFP)
 442                 return fpregs_soft_get(target, regset, pos, count, kbuf, ubuf);
 443
 444         if (!cpu_has_fxsr) {
 445                 return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
 446                                            &target->thread.fpu.state->fsave, 0,
 447                                            -1);
 448         }
 449
 450         if (kbuf && pos == 0 && count == sizeof(env)) {
 451                 convert_from_fxsr(kbuf, target);
 452                 return 0;
 453         }
 454
 455         convert_from_fxsr(&env, target);
 456
 457         return user_regset_copyout(&pos, &count, &kbuf, &ubuf, &env, 0, -1);
 458 }
 459
 460 int fpregs_set(struct task_struct *target, const struct user_regset *regset,
 461                unsigned int pos, unsigned int count,
 462                const void *kbuf, const void __user *ubuf)
 463 {
 464         struct user_i387_ia32_struct env;
 465         int ret;
 466
 467         ret = init_fpu(target);
 468         if (ret)
 469                 return ret;
 470
 471         if (!HAVE_HWFP)
 472                 return fpregs_soft_set(target, regset, pos, count, kbuf, ubuf);
 473
 474         if (!cpu_has_fxsr) {
 475                 return user_regset_copyin(&pos, &count, &kbuf, &ubuf,
 476                                           &target->thread.fpu.state->fsave, 0, -1);
 477         }
 478
 479         if (pos > 0 || count < sizeof(env))
 480                 convert_from_fxsr(&env, target);
 481
 482         ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &env, 0, -1);
 483         if (!ret)
 484                 convert_to_fxsr(target, &env);
 485
 486         /*
 487          * update the header bit in the xsave header, indicating the
 488          * presence of FP.
 489          */
 490         if (cpu_has_xsave)
 491                 target->thread.fpu.state->xsave.xsave_hdr.xstate_bv |= XSTATE_FP;
 492         return ret;
 493 }
 494
 495 /*
 496  * Signal frame handlers.
 497  */
 498
 499 static inline int save_i387_fsave(struct _fpstate_ia32 __user *buf)
 500 {
 501         struct task_struct *tsk = current;
 502         struct i387_fsave_struct *fp = &tsk->thread.fpu.state->fsave;
 503
 504         fp->status = fp->swd;
 505         if (__copy_to_user(buf, fp, sizeof(struct i387_fsave_struct)))
 506                 return -1;
 507         return 1;
 508 }
 509
 510 static int save_i387_fxsave(struct _fpstate_ia32 __user *buf)
 511 {
 512         struct task_struct *tsk = current;
 513         struct i387_fxsave_struct *fx = &tsk->thread.fpu.state->fxsave;
 514         struct user_i387_ia32_struct env;
 515         int err = 0;
 516
 517         convert_from_fxsr(&env, tsk);
 518         if (__copy_to_user(buf, &env, sizeof(env)))
 519                 return -1;
 520
 521         err |= __put_user(fx->swd, &buf->status);
 522         err |= __put_user(X86_FXSR_MAGIC, &buf->magic);
 523         if (err)
 524                 return -1;
 525
 526         if (__copy_to_user(&buf->_fxsr_env[0], fx, xstate_size))
 527                 return -1;
 528         return 1;
 529 }
 530
 531 static int save_i387_xsave(void __user *buf)
 532 {
 533         struct task_struct *tsk = current;
 534         struct _fpstate_ia32 __user *fx = buf;
 535         int err = 0;
 536
 537         /*
 538          * For legacy compatible, we always set FP/SSE bits in the bit
 539          * vector while saving the state to the user context.
 540          * This will enable us capturing any changes(during sigreturn) to
 541          * the FP/SSE bits by the legacy applications which don't touch
 542          * xstate_bv in the xsave header.
 543          *
 544          * xsave aware applications can change the xstate_bv in the xsave
 545          * header as well as change any contents in the memory layout.
 546          * xrestore as part of sigreturn will capture all the changes.
 547          */
 548         tsk->thread.fpu.state->xsave.xsave_hdr.xstate_bv |= XSTATE_FPSSE;
 549
 550         if (save_i387_fxsave(fx) < 0)
 551                 return -1;
 552
 553         err = __copy_to_user(&fx->sw_reserved, &fx_sw_reserved_ia32,
 554                              sizeof(struct _fpx_sw_bytes));
 555         err |= __put_user(FP_XSTATE_MAGIC2,
 556                           (__u32 __user *) (buf + sig_xstate_ia32_size
 557                                             - FP_XSTATE_MAGIC2_SIZE));
 558         if (err)
 559                 return -1;
 560
 561         return 1;
 562 }
 563
 564 int save_i387_xstate_ia32(void __user *buf)
 565 {
 566         struct _fpstate_ia32 __user *fp = (struct _fpstate_ia32 __user *) buf;
 567         struct task_struct *tsk = current;
 568
 569         if (!used_math())
 570                 return 0;
 571
 572         if (!access_ok(VERIFY_WRITE, buf, sig_xstate_ia32_size))
 573                 return -EACCES;
 574         /*
 575          * This will cause a "finit" to be triggered by the next
 576          * attempted FPU operation by the 'current' process.
 577          */
 578         clear_used_math();
 579
 580         if (!HAVE_HWFP) {
 581                 return fpregs_soft_get(current, NULL,
 582                                        0, sizeof(struct user_i387_ia32_struct),
 583                                        NULL, fp) ? -1 : 1;
 584         }
 585
 586         unlazy_fpu(tsk);
 587
 588         if (cpu_has_xsave)
 589                 return save_i387_xsave(fp);
 590         if (cpu_has_fxsr)
 591                 return save_i387_fxsave(fp);
 592         else
 593                 return save_i387_fsave(fp);
 594 }
 595
 596 static inline int restore_i387_fsave(struct _fpstate_ia32 __user *buf)
 597 {
 598         struct task_struct *tsk = current;
 599
 600         return __copy_from_user(&tsk->thread.fpu.state->fsave, buf,
 601                                 sizeof(struct i387_fsave_struct));
 602 }
 603
 604 static int restore_i387_fxsave(struct _fpstate_ia32 __user *buf,
 605                                unsigned int size)
 606 {
 607         struct task_struct *tsk = current;
 608         struct user_i387_ia32_struct env;
 609         int err;
 610
 611         err = __copy_from_user(&tsk->thread.fpu.state->fxsave, &buf->_fxsr_env[0],
 612                                size);
 613         /* mxcsr reserved bits must be masked to zero for security reasons */
 614         tsk->thread.fpu.state->fxsave.mxcsr &= mxcsr_feature_mask;
 615         if (err || __copy_from_user(&env, buf, sizeof(env)))
 616                 return 1;
 617         convert_to_fxsr(tsk, &env);
 618
 619         return 0;
 620 }
 621
 622 static int restore_i387_xsave(void __user *buf)
 623 {
 624         struct _fpx_sw_bytes fx_sw_user;
 625         struct _fpstate_ia32 __user *fx_user =
 626                         ((struct _fpstate_ia32 __user *) buf);
 627         struct i387_fxsave_struct __user *fx =
 628                 (struct i387_fxsave_struct __user *) &fx_user->_fxsr_env[0];
 629         struct xsave_hdr_struct *xsave_hdr =
 630                                 &current->thread.fpu.state->xsave.xsave_hdr;
 631         u64 mask;
 632         int err;
 633
 634         if (check_for_xstate(fx, buf, &fx_sw_user))
 635                 goto fx_only;
 636
 637         mask = fx_sw_user.xstate_bv;
 638
 639         err = restore_i387_fxsave(buf, fx_sw_user.xstate_size);
 640
 641         xsave_hdr->xstate_bv &= pcntxt_mask;
 642         /*
 643          * These bits must be zero.
 644          */
 645         xsave_hdr->reserved1[0] = xsave_hdr->reserved1[1] = 0;
 646
 647         /*
 648          * Init the state that is not present in the memory layout
 649          * and enabled by the OS.
 650          */
 651         mask = ~(pcntxt_mask & ~mask);
 652         xsave_hdr->xstate_bv &= mask;
 653
 654         return err;
 655 fx_only:
 656         /*
 657          * Couldn't find the extended state information in the memory
 658          * layout. Restore the FP/SSE and init the other extended state
 659          * enabled by the OS.
 660          */
 661         xsave_hdr->xstate_bv = XSTATE_FPSSE;
 662         return restore_i387_fxsave(buf, sizeof(struct i387_fxsave_struct));
 663 }
 664
 665 int restore_i387_xstate_ia32(void __user *buf)
 666 {
 667         int err;
 668         struct task_struct *tsk = current;
 669         struct _fpstate_ia32 __user *fp = (struct _fpstate_ia32 __user *) buf;
 670
 671         if (HAVE_HWFP)
 672                 clear_fpu(tsk);
 673
 674         if (!buf) {
 675                 if (used_math()) {
 676                         clear_fpu(tsk);
 677                         clear_used_math();
 678                 }
 679
 680                 return 0;
 681         } else
 682                 if (!access_ok(VERIFY_READ, buf, sig_xstate_ia32_size))
 683                         return -EACCES;
 684
 685         if (!used_math()) {
 686                 err = init_fpu(tsk);
 687                 if (err)
 688                         return err;
 689         }
 690
 691         if (HAVE_HWFP) {
 692                 if (cpu_has_xsave)
 693                         err = restore_i387_xsave(buf);
 694                 else if (cpu_has_fxsr)
 695                         err = restore_i387_fxsave(fp, sizeof(struct
 696                                                            i387_fxsave_struct));
 697                 else
 698                         err = restore_i387_fsave(fp);
 699         } else {
 700                 err = fpregs_soft_set(current, NULL,
 701                                       0, sizeof(struct user_i387_ia32_struct),
 702                                       NULL, fp) != 0;
 703         }
 704         set_used_math();
 705
 706         return err;
 707 }
 708
 709 /*
 710  * FPU state for core dumps.
 711  * This is only used for a.out dumps now.
 712  * It is declared generically using elf_fpregset_t (which is
 713  * struct user_i387_struct) but is in fact only used for 32-bit
 714  * dumps, so on 64-bit it is really struct user_i387_ia32_struct.
 715  */
 716 int dump_fpu(struct pt_regs *regs, struct user_i387_struct *fpu)
 717 {
 718         struct task_struct *tsk = current;
 719         int fpvalid;
 720
 721         fpvalid = !!used_math();
 722         if (fpvalid)
 723                 fpvalid = !fpregs_get(tsk, NULL,
 724                                       0, sizeof(struct user_i387_ia32_struct),
 725                                       fpu, NULL);
 726
 727         return fpvalid;
 728 }
 729 EXPORT_SYMBOL(dump_fpu);
 730
 731 #endif  /* CONFIG_X86_32 || CONFIG_IA32_EMULATION */