2 * x86 FPU boot time init code:
4 #include <asm/fpu/internal.h>
5 #include <asm/tlbflush.h>
8 * Initialize the TS bit in CR0 according to the style of context-switches
11 static void fpu__init_cpu_ctx_switch(void)
13 if (!cpu_has_eager_fpu)
20 * Initialize the registers found in all CPUs, CR0 and CR4:
22 static void fpu__init_cpu_generic(void)
25 unsigned long cr4_mask = 0;
28 cr4_mask |= X86_CR4_OSFXSR;
30 cr4_mask |= X86_CR4_OSXMMEXCPT;
32 cr4_set_bits(cr4_mask);
35 cr0 &= ~(X86_CR0_TS|X86_CR0_EM); /* clear TS and EM */
40 /* Flush out any pending x87 state: */
41 asm volatile ("fninit");
45 * Enable all supported FPU features. Called when a CPU is brought online:
47 void fpu__init_cpu(void)
49 fpu__init_cpu_generic();
50 fpu__init_cpu_xstate();
51 fpu__init_cpu_ctx_switch();
55 * The earliest FPU detection code.
57 * Set the X86_FEATURE_FPU CPU-capability bit based on
58 * trying to execute an actual sequence of FPU instructions:
60 static void fpu__init_system_early_generic(struct cpuinfo_x86 *c)
68 cr0 &= ~(X86_CR0_TS | X86_CR0_EM);
71 asm volatile("fninit ; fnstsw %0 ; fnstcw %1"
72 : "+m" (fsw), "+m" (fcw));
74 if (fsw == 0 && (fcw & 0x103f) == 0x003f)
75 set_cpu_cap(c, X86_FEATURE_FPU);
77 clear_cpu_cap(c, X86_FEATURE_FPU);
79 #ifndef CONFIG_MATH_EMULATION
81 pr_emerg("x86/fpu: Giving up, no FPU found and no math emulation present\n");
89 * Boot time FPU feature detection code:
91 unsigned int mxcsr_feature_mask __read_mostly = 0xffffffffu;
93 static void __init fpu__init_system_mxcsr(void)
95 unsigned int mask = 0;
98 struct fxregs_state fx_tmp __aligned(32) = { };
100 asm volatile("fxsave %0" : "+m" (fx_tmp));
102 mask = fx_tmp.mxcsr_mask;
105 * If zero then use the default features mask,
106 * which has all features set, except the
107 * denormals-are-zero feature bit:
112 mxcsr_feature_mask &= mask;
116 * Once per bootup FPU initialization sequences that will run on most x86 CPUs:
118 static void __init fpu__init_system_generic(void)
121 * Set up the legacy init FPU context. (xstate init might overwrite this
122 * with a more modern format, if the CPU supports it.)
124 fpstate_init_fxstate(&init_fpstate.fxsave);
126 fpu__init_system_mxcsr();
130 * Size of the FPU context state. All tasks in the system use the
131 * same context size, regardless of what portion they use.
132 * This is inherent to the XSAVE architecture which puts all state
133 * components into a single, continuous memory block:
135 unsigned int xstate_size;
136 EXPORT_SYMBOL_GPL(xstate_size);
139 * Set up the xstate_size based on the legacy FPU context size.
141 * We set this up first, and later it will be overwritten by
142 * fpu__init_system_xstate() if the CPU knows about xstates.
144 static void __init fpu__init_system_xstate_size_legacy(void)
146 static int on_boot_cpu = 1;
148 WARN_ON_FPU(!on_boot_cpu);
152 * Note that xstate_size might be overwriten later during
153 * fpu__init_system_xstate().
158 * Disable xsave as we do not support it if i387
159 * emulation is enabled.
161 setup_clear_cpu_cap(X86_FEATURE_XSAVE);
162 setup_clear_cpu_cap(X86_FEATURE_XSAVEOPT);
163 xstate_size = sizeof(struct swregs_state);
166 xstate_size = sizeof(struct fxregs_state);
168 xstate_size = sizeof(struct fregs_state);
173 * FPU context switching strategies:
175 * Against popular belief, we don't do lazy FPU saves, due to the
176 * task migration complications it brings on SMP - we only do
179 * 'lazy' is the traditional strategy, which is based on setting
180 * CR0::TS to 1 during context-switch (instead of doing a full
181 * restore of the FPU state), which causes the first FPU instruction
182 * after the context switch (whenever it is executed) to fault - at
183 * which point we lazily restore the FPU state into FPU registers.
185 * Tasks are of course under no obligation to execute FPU instructions,
186 * so it can easily happen that another context-switch occurs without
187 * a single FPU instruction being executed. If we eventually switch
188 * back to the original task (that still owns the FPU) then we have
189 * not only saved the restores along the way, but we also have the
190 * FPU ready to be used for the original task.
192 * 'eager' switching is used on modern CPUs, there we switch the FPU
193 * state during every context switch, regardless of whether the task
194 * has used FPU instructions in that time slice or not. This is done
195 * because modern FPU context saving instructions are able to optimize
196 * state saving and restoration in hardware: they can detect both
197 * unused and untouched FPU state and optimize accordingly.
199 * [ Note that even in 'lazy' mode we might optimize context switches
200 * to use 'eager' restores, if we detect that a task is using the FPU
201 * frequently. See the fpu->counter logic in fpu/internal.h for that. ]
203 static enum { AUTO, ENABLE, DISABLE } eagerfpu = AUTO;
205 static int __init eager_fpu_setup(char *s)
207 if (!strcmp(s, "on"))
209 else if (!strcmp(s, "off"))
211 else if (!strcmp(s, "auto"))
215 __setup("eagerfpu=", eager_fpu_setup);
218 * Pick the FPU context switching strategy:
220 static void __init fpu__init_system_ctx_switch(void)
222 static bool on_boot_cpu = 1;
224 WARN_ON_FPU(!on_boot_cpu);
227 WARN_ON_FPU(current->thread.fpu.fpstate_active);
228 current_thread_info()->status = 0;
230 /* Auto enable eagerfpu for xsaveopt */
231 if (cpu_has_xsaveopt && eagerfpu != DISABLE)
234 if (xfeatures_mask & XSTATE_EAGER) {
235 if (eagerfpu == DISABLE) {
236 pr_err("x86/fpu: eagerfpu switching disabled, disabling the following xstate features: 0x%llx.\n",
237 xfeatures_mask & XSTATE_EAGER);
238 xfeatures_mask &= ~XSTATE_EAGER;
244 if (eagerfpu == ENABLE)
245 setup_force_cpu_cap(X86_FEATURE_EAGER_FPU);
247 printk(KERN_INFO "x86/fpu: Using '%s' FPU context switches.\n", eagerfpu == ENABLE ? "eager" : "lazy");
251 * Called on the boot CPU once per system bootup, to set up the initial
252 * FPU state that is later cloned into all processes:
254 void __init fpu__init_system(struct cpuinfo_x86 *c)
256 fpu__init_system_early_generic(c);
259 * The FPU has to be operational for some of the
260 * later FPU init activities:
265 * But don't leave CR0::TS set yet, as some of the FPU setup
266 * methods depend on being able to execute FPU instructions
267 * that will fault on a set TS, such as the FXSAVE in
268 * fpu__init_system_mxcsr().
272 fpu__init_system_generic();
273 fpu__init_system_xstate_size_legacy();
274 fpu__init_system_xstate();
276 fpu__init_system_ctx_switch();
280 * Boot parameter to turn off FPU support and fall back to math-emu:
282 static int __init no_387(char *s)
284 setup_clear_cpu_cap(X86_FEATURE_FPU);
288 __setup("no387", no_387);
290 static int __init x86_xsave_setup(char *s)
294 setup_clear_cpu_cap(X86_FEATURE_XSAVE);
295 setup_clear_cpu_cap(X86_FEATURE_XSAVEOPT);
296 setup_clear_cpu_cap(X86_FEATURE_XSAVES);
297 setup_clear_cpu_cap(X86_FEATURE_AVX);
298 setup_clear_cpu_cap(X86_FEATURE_AVX2);
301 __setup("noxsave", x86_xsave_setup);
303 static int __init x86_xsaveopt_setup(char *s)
305 setup_clear_cpu_cap(X86_FEATURE_XSAVEOPT);
308 __setup("noxsaveopt", x86_xsaveopt_setup);
310 static int __init x86_xsaves_setup(char *s)
312 setup_clear_cpu_cap(X86_FEATURE_XSAVES);
315 __setup("noxsaves", x86_xsaves_setup);
317 static int __init x86_fxsr_setup(char *s)
319 setup_clear_cpu_cap(X86_FEATURE_FXSR);
320 setup_clear_cpu_cap(X86_FEATURE_FXSR_OPT);
321 setup_clear_cpu_cap(X86_FEATURE_XMM);
324 __setup("nofxsr", x86_fxsr_setup);