1 #include <linux/device.h>
7 MCE_UCNA_SEVERITY = MCE_DEFERRED_SEVERITY,
18 /* One object for each MCE bank, shared by all CPUs */
20 u64 ctl; /* subevents to enable */
21 unsigned char init; /* initialise bank? */
22 struct device_attribute attr; /* device attribute */
23 char attrname[ATTR_LEN]; /* attribute name */
26 int mce_severity(struct mce *a, int tolerant, char **msg, bool is_excp);
27 struct dentry *mce_get_debugfs_dir(void);
29 extern struct mce_bank *mce_banks;
30 extern mce_banks_t mce_banks_ce_disabled;
32 #ifdef CONFIG_X86_MCE_INTEL
33 unsigned long mce_intel_adjust_timer(unsigned long interval);
34 void mce_intel_cmci_poll(void);
35 void mce_intel_hcpu_update(unsigned long cpu);
36 void cmci_disable_bank(int bank);
38 # define mce_intel_adjust_timer mce_adjust_timer_default
39 static inline void mce_intel_cmci_poll(void) { }
40 static inline void mce_intel_hcpu_update(unsigned long cpu) { }
41 static inline void cmci_disable_bank(int bank) { }
44 void mce_timer_kick(unsigned long interval);
46 #ifdef CONFIG_ACPI_APEI
47 int apei_write_mce(struct mce *m);
48 ssize_t apei_read_mce(struct mce *m, u64 *record_id);
49 int apei_check_mce(void);
50 int apei_clear_mce(u64 record_id);
52 static inline int apei_write_mce(struct mce *m)
56 static inline ssize_t apei_read_mce(struct mce *m, u64 *record_id)
60 static inline int apei_check_mce(void)
64 static inline int apei_clear_mce(u64 record_id)