2 * Routines to indentify caches on Intel CPU.
5 * Venkatesh Pallipadi : Adding cache identification through cpuid(4)
6 * Ashok Raj <ashok.raj@intel.com>: Work with CPU hotplug infrastructure.
7 * Andi Kleen / Andreas Herrmann : CPUID4 emulation on AMD.
10 #include <linux/init.h>
11 #include <linux/slab.h>
12 #include <linux/device.h>
13 #include <linux/compiler.h>
14 #include <linux/cpu.h>
15 #include <linux/sched.h>
16 #include <linux/pci.h>
18 #include <asm/processor.h>
19 #include <linux/smp.h>
29 unsigned char descriptor;
34 /* All the cache descriptor types we care about (no TLB or
35 trace cache entries) */
37 static const struct _cache_table __cpuinitconst cache_table[] =
39 { 0x06, LVL_1_INST, 8 }, /* 4-way set assoc, 32 byte line size */
40 { 0x08, LVL_1_INST, 16 }, /* 4-way set assoc, 32 byte line size */
41 { 0x09, LVL_1_INST, 32 }, /* 4-way set assoc, 64 byte line size */
42 { 0x0a, LVL_1_DATA, 8 }, /* 2 way set assoc, 32 byte line size */
43 { 0x0c, LVL_1_DATA, 16 }, /* 4-way set assoc, 32 byte line size */
44 { 0x0d, LVL_1_DATA, 16 }, /* 4-way set assoc, 64 byte line size */
45 { 0x21, LVL_2, 256 }, /* 8-way set assoc, 64 byte line size */
46 { 0x22, LVL_3, 512 }, /* 4-way set assoc, sectored cache, 64 byte line size */
47 { 0x23, LVL_3, 1024 }, /* 8-way set assoc, sectored cache, 64 byte line size */
48 { 0x25, LVL_3, 2048 }, /* 8-way set assoc, sectored cache, 64 byte line size */
49 { 0x29, LVL_3, 4096 }, /* 8-way set assoc, sectored cache, 64 byte line size */
50 { 0x2c, LVL_1_DATA, 32 }, /* 8-way set assoc, 64 byte line size */
51 { 0x30, LVL_1_INST, 32 }, /* 8-way set assoc, 64 byte line size */
52 { 0x39, LVL_2, 128 }, /* 4-way set assoc, sectored cache, 64 byte line size */
53 { 0x3a, LVL_2, 192 }, /* 6-way set assoc, sectored cache, 64 byte line size */
54 { 0x3b, LVL_2, 128 }, /* 2-way set assoc, sectored cache, 64 byte line size */
55 { 0x3c, LVL_2, 256 }, /* 4-way set assoc, sectored cache, 64 byte line size */
56 { 0x3d, LVL_2, 384 }, /* 6-way set assoc, sectored cache, 64 byte line size */
57 { 0x3e, LVL_2, 512 }, /* 4-way set assoc, sectored cache, 64 byte line size */
58 { 0x3f, LVL_2, 256 }, /* 2-way set assoc, 64 byte line size */
59 { 0x41, LVL_2, 128 }, /* 4-way set assoc, 32 byte line size */
60 { 0x42, LVL_2, 256 }, /* 4-way set assoc, 32 byte line size */
61 { 0x43, LVL_2, 512 }, /* 4-way set assoc, 32 byte line size */
62 { 0x44, LVL_2, 1024 }, /* 4-way set assoc, 32 byte line size */
63 { 0x45, LVL_2, 2048 }, /* 4-way set assoc, 32 byte line size */
64 { 0x46, LVL_3, 4096 }, /* 4-way set assoc, 64 byte line size */
65 { 0x47, LVL_3, 8192 }, /* 8-way set assoc, 64 byte line size */
66 { 0x49, LVL_3, 4096 }, /* 16-way set assoc, 64 byte line size */
67 { 0x4a, LVL_3, 6144 }, /* 12-way set assoc, 64 byte line size */
68 { 0x4b, LVL_3, 8192 }, /* 16-way set assoc, 64 byte line size */
69 { 0x4c, LVL_3, 12288 }, /* 12-way set assoc, 64 byte line size */
70 { 0x4d, LVL_3, 16384 }, /* 16-way set assoc, 64 byte line size */
71 { 0x4e, LVL_2, 6144 }, /* 24-way set assoc, 64 byte line size */
72 { 0x60, LVL_1_DATA, 16 }, /* 8-way set assoc, sectored cache, 64 byte line size */
73 { 0x66, LVL_1_DATA, 8 }, /* 4-way set assoc, sectored cache, 64 byte line size */
74 { 0x67, LVL_1_DATA, 16 }, /* 4-way set assoc, sectored cache, 64 byte line size */
75 { 0x68, LVL_1_DATA, 32 }, /* 4-way set assoc, sectored cache, 64 byte line size */
76 { 0x70, LVL_TRACE, 12 }, /* 8-way set assoc */
77 { 0x71, LVL_TRACE, 16 }, /* 8-way set assoc */
78 { 0x72, LVL_TRACE, 32 }, /* 8-way set assoc */
79 { 0x73, LVL_TRACE, 64 }, /* 8-way set assoc */
80 { 0x78, LVL_2, 1024 }, /* 4-way set assoc, 64 byte line size */
81 { 0x79, LVL_2, 128 }, /* 8-way set assoc, sectored cache, 64 byte line size */
82 { 0x7a, LVL_2, 256 }, /* 8-way set assoc, sectored cache, 64 byte line size */
83 { 0x7b, LVL_2, 512 }, /* 8-way set assoc, sectored cache, 64 byte line size */
84 { 0x7c, LVL_2, 1024 }, /* 8-way set assoc, sectored cache, 64 byte line size */
85 { 0x7d, LVL_2, 2048 }, /* 8-way set assoc, 64 byte line size */
86 { 0x7f, LVL_2, 512 }, /* 2-way set assoc, 64 byte line size */
87 { 0x82, LVL_2, 256 }, /* 8-way set assoc, 32 byte line size */
88 { 0x83, LVL_2, 512 }, /* 8-way set assoc, 32 byte line size */
89 { 0x84, LVL_2, 1024 }, /* 8-way set assoc, 32 byte line size */
90 { 0x85, LVL_2, 2048 }, /* 8-way set assoc, 32 byte line size */
91 { 0x86, LVL_2, 512 }, /* 4-way set assoc, 64 byte line size */
92 { 0x87, LVL_2, 1024 }, /* 8-way set assoc, 64 byte line size */
93 { 0xd0, LVL_3, 512 }, /* 4-way set assoc, 64 byte line size */
94 { 0xd1, LVL_3, 1024 }, /* 4-way set assoc, 64 byte line size */
95 { 0xd2, LVL_3, 2048 }, /* 4-way set assoc, 64 byte line size */
96 { 0xd6, LVL_3, 1024 }, /* 8-way set assoc, 64 byte line size */
97 { 0xd7, LVL_3, 2048 }, /* 8-way set assoc, 64 byte line size */
98 { 0xd8, LVL_3, 4096 }, /* 12-way set assoc, 64 byte line size */
99 { 0xdc, LVL_3, 2048 }, /* 12-way set assoc, 64 byte line size */
100 { 0xdd, LVL_3, 4096 }, /* 12-way set assoc, 64 byte line size */
101 { 0xde, LVL_3, 8192 }, /* 12-way set assoc, 64 byte line size */
102 { 0xe2, LVL_3, 2048 }, /* 16-way set assoc, 64 byte line size */
103 { 0xe3, LVL_3, 4096 }, /* 16-way set assoc, 64 byte line size */
104 { 0xe4, LVL_3, 8192 }, /* 16-way set assoc, 64 byte line size */
105 { 0xea, LVL_3, 12288 }, /* 24-way set assoc, 64 byte line size */
106 { 0xeb, LVL_3, 18432 }, /* 24-way set assoc, 64 byte line size */
107 { 0xec, LVL_3, 24576 }, /* 24-way set assoc, 64 byte line size */
116 CACHE_TYPE_UNIFIED = 3
119 union _cpuid4_leaf_eax {
121 enum _cache_type type:5;
122 unsigned int level:3;
123 unsigned int is_self_initializing:1;
124 unsigned int is_fully_associative:1;
125 unsigned int reserved:4;
126 unsigned int num_threads_sharing:12;
127 unsigned int num_cores_on_die:6;
132 union _cpuid4_leaf_ebx {
134 unsigned int coherency_line_size:12;
135 unsigned int physical_line_partition:10;
136 unsigned int ways_of_associativity:10;
141 union _cpuid4_leaf_ecx {
143 unsigned int number_of_sets:32;
148 struct _cpuid4_info {
149 union _cpuid4_leaf_eax eax;
150 union _cpuid4_leaf_ebx ebx;
151 union _cpuid4_leaf_ecx ecx;
153 unsigned long can_disable;
154 DECLARE_BITMAP(shared_cpu_map, NR_CPUS);
157 /* subset of above _cpuid4_info w/o shared_cpu_map */
158 struct _cpuid4_info_regs {
159 union _cpuid4_leaf_eax eax;
160 union _cpuid4_leaf_ebx ebx;
161 union _cpuid4_leaf_ecx ecx;
163 unsigned long can_disable;
166 unsigned short num_cache_leaves;
168 /* AMD doesn't have CPUID4. Emulate it here to report the same
169 information to the user. This makes some assumptions about the machine:
170 L2 not shared, no SMT etc. that is currently true on AMD CPUs.
172 In theory the TLBs could be reported as fake type (they are in "dummy").
176 unsigned line_size:8;
177 unsigned lines_per_tag:8;
179 unsigned size_in_kb:8;
186 unsigned line_size:8;
187 unsigned lines_per_tag:4;
189 unsigned size_in_kb:16;
196 unsigned line_size:8;
197 unsigned lines_per_tag:4;
200 unsigned size_encoded:14;
205 static const unsigned short __cpuinitconst assocs[] = {
216 [0xf] = 0xffff /* fully associative - no way to show this currently */
219 static const unsigned char __cpuinitconst levels[] = { 1, 1, 2, 3 };
220 static const unsigned char __cpuinitconst types[] = { 1, 2, 3, 3 };
222 static void __cpuinit
223 amd_cpuid4(int leaf, union _cpuid4_leaf_eax *eax,
224 union _cpuid4_leaf_ebx *ebx,
225 union _cpuid4_leaf_ecx *ecx)
228 unsigned line_size, lines_per_tag, assoc, size_in_kb;
229 union l1_cache l1i, l1d;
232 union l1_cache *l1 = &l1d;
238 cpuid(0x80000005, &dummy, &dummy, &l1d.val, &l1i.val);
239 cpuid(0x80000006, &dummy, &dummy, &l2.val, &l3.val);
247 assoc = assocs[l1->assoc];
248 line_size = l1->line_size;
249 lines_per_tag = l1->lines_per_tag;
250 size_in_kb = l1->size_in_kb;
255 assoc = assocs[l2.assoc];
256 line_size = l2.line_size;
257 lines_per_tag = l2.lines_per_tag;
258 /* cpu_data has errata corrections for K7 applied */
259 size_in_kb = current_cpu_data.x86_cache_size;
264 assoc = assocs[l3.assoc];
265 line_size = l3.line_size;
266 lines_per_tag = l3.lines_per_tag;
267 size_in_kb = l3.size_encoded * 512;
268 if (boot_cpu_has(X86_FEATURE_AMD_DCM)) {
269 size_in_kb = size_in_kb >> 1;
277 eax->split.is_self_initializing = 1;
278 eax->split.type = types[leaf];
279 eax->split.level = levels[leaf];
280 eax->split.num_threads_sharing = 0;
281 eax->split.num_cores_on_die = current_cpu_data.x86_max_cores - 1;
285 eax->split.is_fully_associative = 1;
286 ebx->split.coherency_line_size = line_size - 1;
287 ebx->split.ways_of_associativity = assoc - 1;
288 ebx->split.physical_line_partition = lines_per_tag - 1;
289 ecx->split.number_of_sets = (size_in_kb * 1024) / line_size /
290 (ebx->split.ways_of_associativity + 1) - 1;
293 static void __cpuinit
294 amd_check_l3_disable(int index, struct _cpuid4_info_regs *this_leaf)
299 if (boot_cpu_data.x86 == 0x11)
302 /* see erratum #382 */
303 if ((boot_cpu_data.x86 == 0x10) && (boot_cpu_data.x86_model < 0x8))
306 this_leaf->can_disable = 1;
310 __cpuinit cpuid4_cache_lookup_regs(int index,
311 struct _cpuid4_info_regs *this_leaf)
313 union _cpuid4_leaf_eax eax;
314 union _cpuid4_leaf_ebx ebx;
315 union _cpuid4_leaf_ecx ecx;
318 if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD) {
319 amd_cpuid4(index, &eax, &ebx, &ecx);
320 if (boot_cpu_data.x86 >= 0x10)
321 amd_check_l3_disable(index, this_leaf);
323 cpuid_count(4, index, &eax.full, &ebx.full, &ecx.full, &edx);
326 if (eax.split.type == CACHE_TYPE_NULL)
327 return -EIO; /* better error ? */
329 this_leaf->eax = eax;
330 this_leaf->ebx = ebx;
331 this_leaf->ecx = ecx;
332 this_leaf->size = (ecx.split.number_of_sets + 1) *
333 (ebx.split.coherency_line_size + 1) *
334 (ebx.split.physical_line_partition + 1) *
335 (ebx.split.ways_of_associativity + 1);
339 static int __cpuinit find_num_cache_leaves(void)
341 unsigned int eax, ebx, ecx, edx;
342 union _cpuid4_leaf_eax cache_eax;
347 /* Do cpuid(4) loop to find out num_cache_leaves */
348 cpuid_count(4, i, &eax, &ebx, &ecx, &edx);
349 cache_eax.full = eax;
350 } while (cache_eax.split.type != CACHE_TYPE_NULL);
354 unsigned int __cpuinit init_intel_cacheinfo(struct cpuinfo_x86 *c)
357 unsigned int trace = 0, l1i = 0, l1d = 0, l2 = 0, l3 = 0;
358 unsigned int new_l1d = 0, new_l1i = 0; /* Cache sizes from cpuid(4) */
359 unsigned int new_l2 = 0, new_l3 = 0, i; /* Cache sizes from cpuid(4) */
360 unsigned int l2_id = 0, l3_id = 0, num_threads_sharing, index_msb;
362 unsigned int cpu = c->cpu_index;
365 if (c->cpuid_level > 3) {
366 static int is_initialized;
368 if (is_initialized == 0) {
369 /* Init num_cache_leaves from boot CPU */
370 num_cache_leaves = find_num_cache_leaves();
375 * Whenever possible use cpuid(4), deterministic cache
376 * parameters cpuid leaf to find the cache details
378 for (i = 0; i < num_cache_leaves; i++) {
379 struct _cpuid4_info_regs this_leaf;
382 retval = cpuid4_cache_lookup_regs(i, &this_leaf);
384 switch (this_leaf.eax.split.level) {
386 if (this_leaf.eax.split.type ==
388 new_l1d = this_leaf.size/1024;
389 else if (this_leaf.eax.split.type ==
391 new_l1i = this_leaf.size/1024;
394 new_l2 = this_leaf.size/1024;
395 num_threads_sharing = 1 + this_leaf.eax.split.num_threads_sharing;
396 index_msb = get_count_order(num_threads_sharing);
397 l2_id = c->apicid >> index_msb;
400 new_l3 = this_leaf.size/1024;
401 num_threads_sharing = 1 + this_leaf.eax.split.num_threads_sharing;
402 index_msb = get_count_order(
403 num_threads_sharing);
404 l3_id = c->apicid >> index_msb;
413 * Don't use cpuid2 if cpuid4 is supported. For P4, we use cpuid2 for
416 if ((num_cache_leaves == 0 || c->x86 == 15) && c->cpuid_level > 1) {
417 /* supports eax=2 call */
419 unsigned int regs[4];
420 unsigned char *dp = (unsigned char *)regs;
423 if (num_cache_leaves != 0 && c->x86 == 15)
426 /* Number of times to iterate */
427 n = cpuid_eax(2) & 0xFF;
429 for (i = 0 ; i < n ; i++) {
430 cpuid(2, ®s[0], ®s[1], ®s[2], ®s[3]);
432 /* If bit 31 is set, this is an unknown format */
433 for (j = 0 ; j < 3 ; j++)
434 if (regs[j] & (1 << 31))
437 /* Byte 0 is level count, not a descriptor */
438 for (j = 1 ; j < 16 ; j++) {
439 unsigned char des = dp[j];
442 /* look up this descriptor in the table */
443 while (cache_table[k].descriptor != 0) {
444 if (cache_table[k].descriptor == des) {
445 if (only_trace && cache_table[k].cache_type != LVL_TRACE)
447 switch (cache_table[k].cache_type) {
449 l1i += cache_table[k].size;
452 l1d += cache_table[k].size;
455 l2 += cache_table[k].size;
458 l3 += cache_table[k].size;
461 trace += cache_table[k].size;
483 per_cpu(cpu_llc_id, cpu) = l2_id;
490 per_cpu(cpu_llc_id, cpu) = l3_id;
494 c->x86_cache_size = l3 ? l3 : (l2 ? l2 : (l1i+l1d));
501 /* pointer to _cpuid4_info array (for each cache leaf) */
502 static DEFINE_PER_CPU(struct _cpuid4_info *, ici_cpuid4_info);
503 #define CPUID4_INFO_IDX(x, y) (&((per_cpu(ici_cpuid4_info, x))[y]))
506 static void __cpuinit cache_shared_cpu_map_setup(unsigned int cpu, int index)
508 struct _cpuid4_info *this_leaf, *sibling_leaf;
509 unsigned long num_threads_sharing;
511 struct cpuinfo_x86 *c = &cpu_data(cpu);
513 if ((index == 3) && (c->x86_vendor == X86_VENDOR_AMD)) {
514 struct cpuinfo_x86 *d;
515 for_each_online_cpu(i) {
516 if (!per_cpu(ici_cpuid4_info, i))
519 this_leaf = CPUID4_INFO_IDX(i, index);
520 cpumask_copy(to_cpumask(this_leaf->shared_cpu_map),
525 this_leaf = CPUID4_INFO_IDX(cpu, index);
526 num_threads_sharing = 1 + this_leaf->eax.split.num_threads_sharing;
528 if (num_threads_sharing == 1)
529 cpumask_set_cpu(cpu, to_cpumask(this_leaf->shared_cpu_map));
531 index_msb = get_count_order(num_threads_sharing);
533 for_each_online_cpu(i) {
534 if (cpu_data(i).apicid >> index_msb ==
535 c->apicid >> index_msb) {
537 to_cpumask(this_leaf->shared_cpu_map));
538 if (i != cpu && per_cpu(ici_cpuid4_info, i)) {
540 CPUID4_INFO_IDX(i, index);
541 cpumask_set_cpu(cpu, to_cpumask(
542 sibling_leaf->shared_cpu_map));
548 static void __cpuinit cache_remove_shared_cpu_map(unsigned int cpu, int index)
550 struct _cpuid4_info *this_leaf, *sibling_leaf;
553 this_leaf = CPUID4_INFO_IDX(cpu, index);
554 for_each_cpu(sibling, to_cpumask(this_leaf->shared_cpu_map)) {
555 sibling_leaf = CPUID4_INFO_IDX(sibling, index);
556 cpumask_clear_cpu(cpu,
557 to_cpumask(sibling_leaf->shared_cpu_map));
561 static void __cpuinit cache_shared_cpu_map_setup(unsigned int cpu, int index)
565 static void __cpuinit cache_remove_shared_cpu_map(unsigned int cpu, int index)
570 static void __cpuinit free_cache_attributes(unsigned int cpu)
574 for (i = 0; i < num_cache_leaves; i++)
575 cache_remove_shared_cpu_map(cpu, i);
577 kfree(per_cpu(ici_cpuid4_info, cpu));
578 per_cpu(ici_cpuid4_info, cpu) = NULL;
582 __cpuinit cpuid4_cache_lookup(int index, struct _cpuid4_info *this_leaf)
584 struct _cpuid4_info_regs *leaf_regs =
585 (struct _cpuid4_info_regs *)this_leaf;
587 return cpuid4_cache_lookup_regs(index, leaf_regs);
590 static void __cpuinit get_cpu_leaves(void *_retval)
592 int j, *retval = _retval, cpu = smp_processor_id();
594 /* Do cpuid and store the results */
595 for (j = 0; j < num_cache_leaves; j++) {
596 struct _cpuid4_info *this_leaf;
597 this_leaf = CPUID4_INFO_IDX(cpu, j);
598 *retval = cpuid4_cache_lookup(j, this_leaf);
599 if (unlikely(*retval < 0)) {
602 for (i = 0; i < j; i++)
603 cache_remove_shared_cpu_map(cpu, i);
606 cache_shared_cpu_map_setup(cpu, j);
610 static int __cpuinit detect_cache_attributes(unsigned int cpu)
614 if (num_cache_leaves == 0)
617 per_cpu(ici_cpuid4_info, cpu) = kzalloc(
618 sizeof(struct _cpuid4_info) * num_cache_leaves, GFP_KERNEL);
619 if (per_cpu(ici_cpuid4_info, cpu) == NULL)
622 smp_call_function_single(cpu, get_cpu_leaves, &retval, true);
624 kfree(per_cpu(ici_cpuid4_info, cpu));
625 per_cpu(ici_cpuid4_info, cpu) = NULL;
631 #include <linux/kobject.h>
632 #include <linux/sysfs.h>
634 extern struct sysdev_class cpu_sysdev_class; /* from drivers/base/cpu.c */
636 /* pointer to kobject for cpuX/cache */
637 static DEFINE_PER_CPU(struct kobject *, ici_cache_kobject);
639 struct _index_kobject {
642 unsigned short index;
645 /* pointer to array of kobjects for cpuX/cache/indexY */
646 static DEFINE_PER_CPU(struct _index_kobject *, ici_index_kobject);
647 #define INDEX_KOBJECT_PTR(x, y) (&((per_cpu(ici_index_kobject, x))[y]))
649 #define show_one_plus(file_name, object, val) \
650 static ssize_t show_##file_name \
651 (struct _cpuid4_info *this_leaf, char *buf) \
653 return sprintf(buf, "%lu\n", (unsigned long)this_leaf->object + val); \
656 show_one_plus(level, eax.split.level, 0);
657 show_one_plus(coherency_line_size, ebx.split.coherency_line_size, 1);
658 show_one_plus(physical_line_partition, ebx.split.physical_line_partition, 1);
659 show_one_plus(ways_of_associativity, ebx.split.ways_of_associativity, 1);
660 show_one_plus(number_of_sets, ecx.split.number_of_sets, 1);
662 static ssize_t show_size(struct _cpuid4_info *this_leaf, char *buf)
664 return sprintf(buf, "%luK\n", this_leaf->size / 1024);
667 static ssize_t show_shared_cpu_map_func(struct _cpuid4_info *this_leaf,
670 ptrdiff_t len = PTR_ALIGN(buf + PAGE_SIZE - 1, PAGE_SIZE) - buf;
674 const struct cpumask *mask;
676 mask = to_cpumask(this_leaf->shared_cpu_map);
678 cpulist_scnprintf(buf, len-2, mask) :
679 cpumask_scnprintf(buf, len-2, mask);
686 static inline ssize_t show_shared_cpu_map(struct _cpuid4_info *leaf, char *buf)
688 return show_shared_cpu_map_func(leaf, 0, buf);
691 static inline ssize_t show_shared_cpu_list(struct _cpuid4_info *leaf, char *buf)
693 return show_shared_cpu_map_func(leaf, 1, buf);
696 static ssize_t show_type(struct _cpuid4_info *this_leaf, char *buf)
698 switch (this_leaf->eax.split.type) {
699 case CACHE_TYPE_DATA:
700 return sprintf(buf, "Data\n");
701 case CACHE_TYPE_INST:
702 return sprintf(buf, "Instruction\n");
703 case CACHE_TYPE_UNIFIED:
704 return sprintf(buf, "Unified\n");
706 return sprintf(buf, "Unknown\n");
710 #define to_object(k) container_of(k, struct _index_kobject, kobj)
711 #define to_attr(a) container_of(a, struct _cache_attr, attr)
713 static ssize_t show_cache_disable(struct _cpuid4_info *this_leaf, char *buf,
716 int cpu = cpumask_first(to_cpumask(this_leaf->shared_cpu_map));
717 int node = cpu_to_node(cpu);
718 struct pci_dev *dev = node_to_k8_nb_misc(node);
719 unsigned int reg = 0;
721 if (!this_leaf->can_disable)
727 pci_read_config_dword(dev, 0x1BC + index * 4, ®);
728 return sprintf(buf, "%x\n", reg);
731 #define SHOW_CACHE_DISABLE(index) \
733 show_cache_disable_##index(struct _cpuid4_info *this_leaf, char *buf) \
735 return show_cache_disable(this_leaf, buf, index); \
737 SHOW_CACHE_DISABLE(0)
738 SHOW_CACHE_DISABLE(1)
740 static ssize_t store_cache_disable(struct _cpuid4_info *this_leaf,
741 const char *buf, size_t count, unsigned int index)
743 int cpu = cpumask_first(to_cpumask(this_leaf->shared_cpu_map));
744 int node = cpu_to_node(cpu);
745 struct pci_dev *dev = node_to_k8_nb_misc(node);
746 unsigned long val = 0;
747 unsigned int scrubber = 0;
749 if (!this_leaf->can_disable)
752 if (!capable(CAP_SYS_ADMIN))
758 if (strict_strtoul(buf, 10, &val) < 0)
763 pci_read_config_dword(dev, 0x58, &scrubber);
764 scrubber &= ~0x1f000000;
765 pci_write_config_dword(dev, 0x58, scrubber);
767 pci_write_config_dword(dev, 0x1BC + index * 4, val & ~0x40000000);
769 pci_write_config_dword(dev, 0x1BC + index * 4, val);
773 #define STORE_CACHE_DISABLE(index) \
775 store_cache_disable_##index(struct _cpuid4_info *this_leaf, \
776 const char *buf, size_t count) \
778 return store_cache_disable(this_leaf, buf, count, index); \
780 STORE_CACHE_DISABLE(0)
781 STORE_CACHE_DISABLE(1)
784 struct attribute attr;
785 ssize_t (*show)(struct _cpuid4_info *, char *);
786 ssize_t (*store)(struct _cpuid4_info *, const char *, size_t count);
789 #define define_one_ro(_name) \
790 static struct _cache_attr _name = \
791 __ATTR(_name, 0444, show_##_name, NULL)
793 define_one_ro(level);
795 define_one_ro(coherency_line_size);
796 define_one_ro(physical_line_partition);
797 define_one_ro(ways_of_associativity);
798 define_one_ro(number_of_sets);
800 define_one_ro(shared_cpu_map);
801 define_one_ro(shared_cpu_list);
803 static struct _cache_attr cache_disable_0 = __ATTR(cache_disable_0, 0644,
804 show_cache_disable_0, store_cache_disable_0);
805 static struct _cache_attr cache_disable_1 = __ATTR(cache_disable_1, 0644,
806 show_cache_disable_1, store_cache_disable_1);
808 static struct attribute *default_attrs[] = {
811 &coherency_line_size.attr,
812 &physical_line_partition.attr,
813 &ways_of_associativity.attr,
814 &number_of_sets.attr,
816 &shared_cpu_map.attr,
817 &shared_cpu_list.attr,
818 &cache_disable_0.attr,
819 &cache_disable_1.attr,
823 static ssize_t show(struct kobject *kobj, struct attribute *attr, char *buf)
825 struct _cache_attr *fattr = to_attr(attr);
826 struct _index_kobject *this_leaf = to_object(kobj);
830 fattr->show(CPUID4_INFO_IDX(this_leaf->cpu, this_leaf->index),
836 static ssize_t store(struct kobject *kobj, struct attribute *attr,
837 const char *buf, size_t count)
839 struct _cache_attr *fattr = to_attr(attr);
840 struct _index_kobject *this_leaf = to_object(kobj);
844 fattr->store(CPUID4_INFO_IDX(this_leaf->cpu, this_leaf->index),
850 static struct sysfs_ops sysfs_ops = {
855 static struct kobj_type ktype_cache = {
856 .sysfs_ops = &sysfs_ops,
857 .default_attrs = default_attrs,
860 static struct kobj_type ktype_percpu_entry = {
861 .sysfs_ops = &sysfs_ops,
864 static void __cpuinit cpuid4_cache_sysfs_exit(unsigned int cpu)
866 kfree(per_cpu(ici_cache_kobject, cpu));
867 kfree(per_cpu(ici_index_kobject, cpu));
868 per_cpu(ici_cache_kobject, cpu) = NULL;
869 per_cpu(ici_index_kobject, cpu) = NULL;
870 free_cache_attributes(cpu);
873 static int __cpuinit cpuid4_cache_sysfs_init(unsigned int cpu)
877 if (num_cache_leaves == 0)
880 err = detect_cache_attributes(cpu);
884 /* Allocate all required memory */
885 per_cpu(ici_cache_kobject, cpu) =
886 kzalloc(sizeof(struct kobject), GFP_KERNEL);
887 if (unlikely(per_cpu(ici_cache_kobject, cpu) == NULL))
890 per_cpu(ici_index_kobject, cpu) = kzalloc(
891 sizeof(struct _index_kobject) * num_cache_leaves, GFP_KERNEL);
892 if (unlikely(per_cpu(ici_index_kobject, cpu) == NULL))
898 cpuid4_cache_sysfs_exit(cpu);
902 static DECLARE_BITMAP(cache_dev_map, NR_CPUS);
904 /* Add/Remove cache interface for CPU device */
905 static int __cpuinit cache_add_dev(struct sys_device * sys_dev)
907 unsigned int cpu = sys_dev->id;
909 struct _index_kobject *this_object;
912 retval = cpuid4_cache_sysfs_init(cpu);
913 if (unlikely(retval < 0))
916 retval = kobject_init_and_add(per_cpu(ici_cache_kobject, cpu),
918 &sys_dev->kobj, "%s", "cache");
920 cpuid4_cache_sysfs_exit(cpu);
924 for (i = 0; i < num_cache_leaves; i++) {
925 this_object = INDEX_KOBJECT_PTR(cpu, i);
926 this_object->cpu = cpu;
927 this_object->index = i;
928 retval = kobject_init_and_add(&(this_object->kobj),
930 per_cpu(ici_cache_kobject, cpu),
932 if (unlikely(retval)) {
933 for (j = 0; j < i; j++)
934 kobject_put(&(INDEX_KOBJECT_PTR(cpu, j)->kobj));
935 kobject_put(per_cpu(ici_cache_kobject, cpu));
936 cpuid4_cache_sysfs_exit(cpu);
939 kobject_uevent(&(this_object->kobj), KOBJ_ADD);
941 cpumask_set_cpu(cpu, to_cpumask(cache_dev_map));
943 kobject_uevent(per_cpu(ici_cache_kobject, cpu), KOBJ_ADD);
947 static void __cpuinit cache_remove_dev(struct sys_device * sys_dev)
949 unsigned int cpu = sys_dev->id;
952 if (per_cpu(ici_cpuid4_info, cpu) == NULL)
954 if (!cpumask_test_cpu(cpu, to_cpumask(cache_dev_map)))
956 cpumask_clear_cpu(cpu, to_cpumask(cache_dev_map));
958 for (i = 0; i < num_cache_leaves; i++)
959 kobject_put(&(INDEX_KOBJECT_PTR(cpu, i)->kobj));
960 kobject_put(per_cpu(ici_cache_kobject, cpu));
961 cpuid4_cache_sysfs_exit(cpu);
964 static int __cpuinit cacheinfo_cpu_callback(struct notifier_block *nfb,
965 unsigned long action, void *hcpu)
967 unsigned int cpu = (unsigned long)hcpu;
968 struct sys_device *sys_dev;
970 sys_dev = get_cpu_sysdev(cpu);
973 case CPU_ONLINE_FROZEN:
974 cache_add_dev(sys_dev);
977 case CPU_DEAD_FROZEN:
978 cache_remove_dev(sys_dev);
984 static struct notifier_block __cpuinitdata cacheinfo_cpu_notifier = {
985 .notifier_call = cacheinfo_cpu_callback,
988 static int __cpuinit cache_sysfs_init(void)
992 if (num_cache_leaves == 0)
995 for_each_online_cpu(i) {
997 struct sys_device *sys_dev = get_cpu_sysdev(i);
999 err = cache_add_dev(sys_dev);
1003 register_hotcpu_notifier(&cacheinfo_cpu_notifier);
1007 device_initcall(cache_sysfs_init);