1 #ifndef _ASM_X86_PARAVIRT_H
2 #define _ASM_X86_PARAVIRT_H
3 /* Various instructions on x86 need to be replaced for
4 * para-virtualization: those hooks are defined here. */
7 #include <asm/pgtable_types.h>
10 #include <asm/paravirt_types.h>
13 #include <linux/bug.h>
14 #include <linux/types.h>
15 #include <linux/cpumask.h>
17 static inline int paravirt_enabled(void)
19 return pv_info.paravirt_enabled;
22 static inline void load_sp0(struct tss_struct *tss,
23 struct thread_struct *thread)
25 PVOP_VCALL2(pv_cpu_ops.load_sp0, tss, thread);
28 /* The paravirtualized CPUID instruction. */
29 static inline void __cpuid(unsigned int *eax, unsigned int *ebx,
30 unsigned int *ecx, unsigned int *edx)
32 PVOP_VCALL4(pv_cpu_ops.cpuid, eax, ebx, ecx, edx);
36 * These special macros can be used to get or set a debugging register
38 static inline unsigned long paravirt_get_debugreg(int reg)
40 return PVOP_CALL1(unsigned long, pv_cpu_ops.get_debugreg, reg);
42 #define get_debugreg(var, reg) var = paravirt_get_debugreg(reg)
43 static inline void set_debugreg(unsigned long val, int reg)
45 PVOP_VCALL2(pv_cpu_ops.set_debugreg, reg, val);
48 static inline void clts(void)
50 PVOP_VCALL0(pv_cpu_ops.clts);
53 static inline unsigned long read_cr0(void)
55 return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr0);
58 static inline void write_cr0(unsigned long x)
60 PVOP_VCALL1(pv_cpu_ops.write_cr0, x);
63 static inline unsigned long read_cr2(void)
65 return PVOP_CALL0(unsigned long, pv_mmu_ops.read_cr2);
68 static inline void write_cr2(unsigned long x)
70 PVOP_VCALL1(pv_mmu_ops.write_cr2, x);
73 static inline unsigned long read_cr3(void)
75 return PVOP_CALL0(unsigned long, pv_mmu_ops.read_cr3);
78 static inline void write_cr3(unsigned long x)
80 PVOP_VCALL1(pv_mmu_ops.write_cr3, x);
83 static inline unsigned long read_cr4(void)
85 return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr4);
87 static inline unsigned long read_cr4_safe(void)
89 return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr4_safe);
92 static inline void write_cr4(unsigned long x)
94 PVOP_VCALL1(pv_cpu_ops.write_cr4, x);
98 static inline unsigned long read_cr8(void)
100 return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr8);
103 static inline void write_cr8(unsigned long x)
105 PVOP_VCALL1(pv_cpu_ops.write_cr8, x);
109 static inline void arch_safe_halt(void)
111 PVOP_VCALL0(pv_irq_ops.safe_halt);
114 static inline void halt(void)
116 PVOP_VCALL0(pv_irq_ops.halt);
119 static inline void wbinvd(void)
121 PVOP_VCALL0(pv_cpu_ops.wbinvd);
124 #define get_kernel_rpl() (pv_info.kernel_rpl)
126 static inline u64 paravirt_read_msr(unsigned msr, int *err)
128 return PVOP_CALL2(u64, pv_cpu_ops.read_msr, msr, err);
131 static inline int paravirt_rdmsr_regs(u32 *regs)
133 return PVOP_CALL1(int, pv_cpu_ops.rdmsr_regs, regs);
136 static inline int paravirt_write_msr(unsigned msr, unsigned low, unsigned high)
138 return PVOP_CALL3(int, pv_cpu_ops.write_msr, msr, low, high);
141 static inline int paravirt_wrmsr_regs(u32 *regs)
143 return PVOP_CALL1(int, pv_cpu_ops.wrmsr_regs, regs);
146 /* These should all do BUG_ON(_err), but our headers are too tangled. */
147 #define rdmsr(msr, val1, val2) \
150 u64 _l = paravirt_read_msr(msr, &_err); \
155 #define wrmsr(msr, val1, val2) \
157 paravirt_write_msr(msr, val1, val2); \
160 #define rdmsrl(msr, val) \
163 val = paravirt_read_msr(msr, &_err); \
166 #define wrmsrl(msr, val) wrmsr(msr, (u32)((u64)(val)), ((u64)(val))>>32)
167 #define wrmsr_safe(msr, a, b) paravirt_write_msr(msr, a, b)
169 /* rdmsr with exception handling */
170 #define rdmsr_safe(msr, a, b) \
173 u64 _l = paravirt_read_msr(msr, &_err); \
179 #define rdmsr_safe_regs(regs) paravirt_rdmsr_regs(regs)
180 #define wrmsr_safe_regs(regs) paravirt_wrmsr_regs(regs)
182 static inline int rdmsrl_safe(unsigned msr, unsigned long long *p)
186 *p = paravirt_read_msr(msr, &err);
189 static inline int rdmsrl_amd_safe(unsigned msr, unsigned long long *p)
195 gprs[7] = 0x9c5a203a;
197 err = paravirt_rdmsr_regs(gprs);
199 *p = gprs[0] | ((u64)gprs[2] << 32);
204 static inline int wrmsrl_amd_safe(unsigned msr, unsigned long long val)
211 gprs[7] = 0x9c5a203a;
213 return paravirt_wrmsr_regs(gprs);
216 static inline u64 paravirt_read_tsc(void)
218 return PVOP_CALL0(u64, pv_cpu_ops.read_tsc);
221 #define rdtscl(low) \
223 u64 _l = paravirt_read_tsc(); \
227 #define rdtscll(val) (val = paravirt_read_tsc())
229 static inline unsigned long long paravirt_sched_clock(void)
231 return PVOP_CALL0(unsigned long long, pv_time_ops.sched_clock);
235 extern struct static_key paravirt_steal_enabled;
236 extern struct static_key paravirt_steal_rq_enabled;
238 static inline u64 paravirt_steal_clock(int cpu)
240 return PVOP_CALL1(u64, pv_time_ops.steal_clock, cpu);
243 static inline unsigned long long paravirt_read_pmc(int counter)
245 return PVOP_CALL1(u64, pv_cpu_ops.read_pmc, counter);
248 #define rdpmc(counter, low, high) \
250 u64 _l = paravirt_read_pmc(counter); \
255 static inline unsigned long long paravirt_rdtscp(unsigned int *aux)
257 return PVOP_CALL1(u64, pv_cpu_ops.read_tscp, aux);
260 #define rdtscp(low, high, aux) \
263 unsigned long __val = paravirt_rdtscp(&__aux); \
264 (low) = (u32)__val; \
265 (high) = (u32)(__val >> 32); \
269 #define rdtscpll(val, aux) \
271 unsigned long __aux; \
272 val = paravirt_rdtscp(&__aux); \
276 static inline void paravirt_alloc_ldt(struct desc_struct *ldt, unsigned entries)
278 PVOP_VCALL2(pv_cpu_ops.alloc_ldt, ldt, entries);
281 static inline void paravirt_free_ldt(struct desc_struct *ldt, unsigned entries)
283 PVOP_VCALL2(pv_cpu_ops.free_ldt, ldt, entries);
286 static inline void load_TR_desc(void)
288 PVOP_VCALL0(pv_cpu_ops.load_tr_desc);
290 static inline void load_gdt(const struct desc_ptr *dtr)
292 PVOP_VCALL1(pv_cpu_ops.load_gdt, dtr);
294 static inline void load_idt(const struct desc_ptr *dtr)
296 PVOP_VCALL1(pv_cpu_ops.load_idt, dtr);
298 static inline void set_ldt(const void *addr, unsigned entries)
300 PVOP_VCALL2(pv_cpu_ops.set_ldt, addr, entries);
302 static inline void store_gdt(struct desc_ptr *dtr)
304 PVOP_VCALL1(pv_cpu_ops.store_gdt, dtr);
306 static inline void store_idt(struct desc_ptr *dtr)
308 PVOP_VCALL1(pv_cpu_ops.store_idt, dtr);
310 static inline unsigned long paravirt_store_tr(void)
312 return PVOP_CALL0(unsigned long, pv_cpu_ops.store_tr);
314 #define store_tr(tr) ((tr) = paravirt_store_tr())
315 static inline void load_TLS(struct thread_struct *t, unsigned cpu)
317 PVOP_VCALL2(pv_cpu_ops.load_tls, t, cpu);
321 static inline void load_gs_index(unsigned int gs)
323 PVOP_VCALL1(pv_cpu_ops.load_gs_index, gs);
327 static inline void write_ldt_entry(struct desc_struct *dt, int entry,
330 PVOP_VCALL3(pv_cpu_ops.write_ldt_entry, dt, entry, desc);
333 static inline void write_gdt_entry(struct desc_struct *dt, int entry,
334 void *desc, int type)
336 PVOP_VCALL4(pv_cpu_ops.write_gdt_entry, dt, entry, desc, type);
339 static inline void write_idt_entry(gate_desc *dt, int entry, const gate_desc *g)
341 PVOP_VCALL3(pv_cpu_ops.write_idt_entry, dt, entry, g);
343 static inline void set_iopl_mask(unsigned mask)
345 PVOP_VCALL1(pv_cpu_ops.set_iopl_mask, mask);
348 /* The paravirtualized I/O functions */
349 static inline void slow_down_io(void)
351 pv_cpu_ops.io_delay();
352 #ifdef REALLY_SLOW_IO
353 pv_cpu_ops.io_delay();
354 pv_cpu_ops.io_delay();
355 pv_cpu_ops.io_delay();
360 static inline void startup_ipi_hook(int phys_apicid, unsigned long start_eip,
361 unsigned long start_esp)
363 PVOP_VCALL3(pv_apic_ops.startup_ipi_hook,
364 phys_apicid, start_eip, start_esp);
368 static inline void paravirt_activate_mm(struct mm_struct *prev,
369 struct mm_struct *next)
371 PVOP_VCALL2(pv_mmu_ops.activate_mm, prev, next);
374 static inline void arch_dup_mmap(struct mm_struct *oldmm,
375 struct mm_struct *mm)
377 PVOP_VCALL2(pv_mmu_ops.dup_mmap, oldmm, mm);
380 static inline void arch_exit_mmap(struct mm_struct *mm)
382 PVOP_VCALL1(pv_mmu_ops.exit_mmap, mm);
385 static inline void __flush_tlb(void)
387 PVOP_VCALL0(pv_mmu_ops.flush_tlb_user);
389 static inline void __flush_tlb_global(void)
391 PVOP_VCALL0(pv_mmu_ops.flush_tlb_kernel);
393 static inline void __flush_tlb_single(unsigned long addr)
395 PVOP_VCALL1(pv_mmu_ops.flush_tlb_single, addr);
398 static inline void flush_tlb_others(const struct cpumask *cpumask,
399 struct mm_struct *mm,
402 PVOP_VCALL3(pv_mmu_ops.flush_tlb_others, cpumask, mm, va);
405 static inline int paravirt_pgd_alloc(struct mm_struct *mm)
407 return PVOP_CALL1(int, pv_mmu_ops.pgd_alloc, mm);
410 static inline void paravirt_pgd_free(struct mm_struct *mm, pgd_t *pgd)
412 PVOP_VCALL2(pv_mmu_ops.pgd_free, mm, pgd);
415 static inline void paravirt_alloc_pte(struct mm_struct *mm, unsigned long pfn)
417 PVOP_VCALL2(pv_mmu_ops.alloc_pte, mm, pfn);
419 static inline void paravirt_release_pte(unsigned long pfn)
421 PVOP_VCALL1(pv_mmu_ops.release_pte, pfn);
424 static inline void paravirt_alloc_pmd(struct mm_struct *mm, unsigned long pfn)
426 PVOP_VCALL2(pv_mmu_ops.alloc_pmd, mm, pfn);
429 static inline void paravirt_release_pmd(unsigned long pfn)
431 PVOP_VCALL1(pv_mmu_ops.release_pmd, pfn);
434 static inline void paravirt_alloc_pud(struct mm_struct *mm, unsigned long pfn)
436 PVOP_VCALL2(pv_mmu_ops.alloc_pud, mm, pfn);
438 static inline void paravirt_release_pud(unsigned long pfn)
440 PVOP_VCALL1(pv_mmu_ops.release_pud, pfn);
443 static inline void pte_update(struct mm_struct *mm, unsigned long addr,
446 PVOP_VCALL3(pv_mmu_ops.pte_update, mm, addr, ptep);
448 static inline void pmd_update(struct mm_struct *mm, unsigned long addr,
451 PVOP_VCALL3(pv_mmu_ops.pmd_update, mm, addr, pmdp);
454 static inline void pte_update_defer(struct mm_struct *mm, unsigned long addr,
457 PVOP_VCALL3(pv_mmu_ops.pte_update_defer, mm, addr, ptep);
460 static inline void pmd_update_defer(struct mm_struct *mm, unsigned long addr,
463 PVOP_VCALL3(pv_mmu_ops.pmd_update_defer, mm, addr, pmdp);
466 static inline pte_t __pte(pteval_t val)
470 if (sizeof(pteval_t) > sizeof(long))
471 ret = PVOP_CALLEE2(pteval_t,
473 val, (u64)val >> 32);
475 ret = PVOP_CALLEE1(pteval_t,
479 return (pte_t) { .pte = ret };
482 static inline pteval_t pte_val(pte_t pte)
486 if (sizeof(pteval_t) > sizeof(long))
487 ret = PVOP_CALLEE2(pteval_t, pv_mmu_ops.pte_val,
488 pte.pte, (u64)pte.pte >> 32);
490 ret = PVOP_CALLEE1(pteval_t, pv_mmu_ops.pte_val,
496 static inline pgd_t __pgd(pgdval_t val)
500 if (sizeof(pgdval_t) > sizeof(long))
501 ret = PVOP_CALLEE2(pgdval_t, pv_mmu_ops.make_pgd,
502 val, (u64)val >> 32);
504 ret = PVOP_CALLEE1(pgdval_t, pv_mmu_ops.make_pgd,
507 return (pgd_t) { ret };
510 static inline pgdval_t pgd_val(pgd_t pgd)
514 if (sizeof(pgdval_t) > sizeof(long))
515 ret = PVOP_CALLEE2(pgdval_t, pv_mmu_ops.pgd_val,
516 pgd.pgd, (u64)pgd.pgd >> 32);
518 ret = PVOP_CALLEE1(pgdval_t, pv_mmu_ops.pgd_val,
524 #define __HAVE_ARCH_PTEP_MODIFY_PROT_TRANSACTION
525 static inline pte_t ptep_modify_prot_start(struct mm_struct *mm, unsigned long addr,
530 ret = PVOP_CALL3(pteval_t, pv_mmu_ops.ptep_modify_prot_start,
533 return (pte_t) { .pte = ret };
536 static inline void ptep_modify_prot_commit(struct mm_struct *mm, unsigned long addr,
537 pte_t *ptep, pte_t pte)
539 if (sizeof(pteval_t) > sizeof(long))
541 pv_mmu_ops.ptep_modify_prot_commit(mm, addr, ptep, pte);
543 PVOP_VCALL4(pv_mmu_ops.ptep_modify_prot_commit,
544 mm, addr, ptep, pte.pte);
547 static inline void set_pte(pte_t *ptep, pte_t pte)
549 if (sizeof(pteval_t) > sizeof(long))
550 PVOP_VCALL3(pv_mmu_ops.set_pte, ptep,
551 pte.pte, (u64)pte.pte >> 32);
553 PVOP_VCALL2(pv_mmu_ops.set_pte, ptep,
557 static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,
558 pte_t *ptep, pte_t pte)
560 if (sizeof(pteval_t) > sizeof(long))
562 pv_mmu_ops.set_pte_at(mm, addr, ptep, pte);
564 PVOP_VCALL4(pv_mmu_ops.set_pte_at, mm, addr, ptep, pte.pte);
567 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
568 static inline void set_pmd_at(struct mm_struct *mm, unsigned long addr,
569 pmd_t *pmdp, pmd_t pmd)
571 if (sizeof(pmdval_t) > sizeof(long))
573 pv_mmu_ops.set_pmd_at(mm, addr, pmdp, pmd);
575 PVOP_VCALL4(pv_mmu_ops.set_pmd_at, mm, addr, pmdp,
576 native_pmd_val(pmd));
580 static inline void set_pmd(pmd_t *pmdp, pmd_t pmd)
582 pmdval_t val = native_pmd_val(pmd);
584 if (sizeof(pmdval_t) > sizeof(long))
585 PVOP_VCALL3(pv_mmu_ops.set_pmd, pmdp, val, (u64)val >> 32);
587 PVOP_VCALL2(pv_mmu_ops.set_pmd, pmdp, val);
590 #if PAGETABLE_LEVELS >= 3
591 static inline pmd_t __pmd(pmdval_t val)
595 if (sizeof(pmdval_t) > sizeof(long))
596 ret = PVOP_CALLEE2(pmdval_t, pv_mmu_ops.make_pmd,
597 val, (u64)val >> 32);
599 ret = PVOP_CALLEE1(pmdval_t, pv_mmu_ops.make_pmd,
602 return (pmd_t) { ret };
605 static inline pmdval_t pmd_val(pmd_t pmd)
609 if (sizeof(pmdval_t) > sizeof(long))
610 ret = PVOP_CALLEE2(pmdval_t, pv_mmu_ops.pmd_val,
611 pmd.pmd, (u64)pmd.pmd >> 32);
613 ret = PVOP_CALLEE1(pmdval_t, pv_mmu_ops.pmd_val,
619 static inline void set_pud(pud_t *pudp, pud_t pud)
621 pudval_t val = native_pud_val(pud);
623 if (sizeof(pudval_t) > sizeof(long))
624 PVOP_VCALL3(pv_mmu_ops.set_pud, pudp,
625 val, (u64)val >> 32);
627 PVOP_VCALL2(pv_mmu_ops.set_pud, pudp,
630 #if PAGETABLE_LEVELS == 4
631 static inline pud_t __pud(pudval_t val)
635 if (sizeof(pudval_t) > sizeof(long))
636 ret = PVOP_CALLEE2(pudval_t, pv_mmu_ops.make_pud,
637 val, (u64)val >> 32);
639 ret = PVOP_CALLEE1(pudval_t, pv_mmu_ops.make_pud,
642 return (pud_t) { ret };
645 static inline pudval_t pud_val(pud_t pud)
649 if (sizeof(pudval_t) > sizeof(long))
650 ret = PVOP_CALLEE2(pudval_t, pv_mmu_ops.pud_val,
651 pud.pud, (u64)pud.pud >> 32);
653 ret = PVOP_CALLEE1(pudval_t, pv_mmu_ops.pud_val,
659 static inline void set_pgd(pgd_t *pgdp, pgd_t pgd)
661 pgdval_t val = native_pgd_val(pgd);
663 if (sizeof(pgdval_t) > sizeof(long))
664 PVOP_VCALL3(pv_mmu_ops.set_pgd, pgdp,
665 val, (u64)val >> 32);
667 PVOP_VCALL2(pv_mmu_ops.set_pgd, pgdp,
671 static inline void pgd_clear(pgd_t *pgdp)
673 set_pgd(pgdp, __pgd(0));
676 static inline void pud_clear(pud_t *pudp)
678 set_pud(pudp, __pud(0));
681 #endif /* PAGETABLE_LEVELS == 4 */
683 #endif /* PAGETABLE_LEVELS >= 3 */
685 #ifdef CONFIG_X86_PAE
686 /* Special-case pte-setting operations for PAE, which can't update a
687 64-bit pte atomically */
688 static inline void set_pte_atomic(pte_t *ptep, pte_t pte)
690 PVOP_VCALL3(pv_mmu_ops.set_pte_atomic, ptep,
691 pte.pte, pte.pte >> 32);
694 static inline void pte_clear(struct mm_struct *mm, unsigned long addr,
697 PVOP_VCALL3(pv_mmu_ops.pte_clear, mm, addr, ptep);
700 static inline void pmd_clear(pmd_t *pmdp)
702 PVOP_VCALL1(pv_mmu_ops.pmd_clear, pmdp);
704 #else /* !CONFIG_X86_PAE */
705 static inline void set_pte_atomic(pte_t *ptep, pte_t pte)
710 static inline void pte_clear(struct mm_struct *mm, unsigned long addr,
713 set_pte_at(mm, addr, ptep, __pte(0));
716 static inline void pmd_clear(pmd_t *pmdp)
718 set_pmd(pmdp, __pmd(0));
720 #endif /* CONFIG_X86_PAE */
722 #define __HAVE_ARCH_START_CONTEXT_SWITCH
723 static inline void arch_start_context_switch(struct task_struct *prev)
725 PVOP_VCALL1(pv_cpu_ops.start_context_switch, prev);
728 static inline void arch_end_context_switch(struct task_struct *next)
730 PVOP_VCALL1(pv_cpu_ops.end_context_switch, next);
733 #define __HAVE_ARCH_ENTER_LAZY_MMU_MODE
734 static inline void arch_enter_lazy_mmu_mode(void)
736 PVOP_VCALL0(pv_mmu_ops.lazy_mode.enter);
739 static inline void arch_leave_lazy_mmu_mode(void)
741 PVOP_VCALL0(pv_mmu_ops.lazy_mode.leave);
744 void arch_flush_lazy_mmu_mode(void);
746 static inline void __set_fixmap(unsigned /* enum fixed_addresses */ idx,
747 phys_addr_t phys, pgprot_t flags)
749 pv_mmu_ops.set_fixmap(idx, phys, flags);
752 #if defined(CONFIG_SMP) && defined(CONFIG_PARAVIRT_SPINLOCKS)
754 static inline int arch_spin_is_locked(struct arch_spinlock *lock)
756 return PVOP_CALL1(int, pv_lock_ops.spin_is_locked, lock);
759 static inline int arch_spin_is_contended(struct arch_spinlock *lock)
761 return PVOP_CALL1(int, pv_lock_ops.spin_is_contended, lock);
763 #define arch_spin_is_contended arch_spin_is_contended
765 static __always_inline void arch_spin_lock(struct arch_spinlock *lock)
767 PVOP_VCALL1(pv_lock_ops.spin_lock, lock);
770 static __always_inline void arch_spin_lock_flags(struct arch_spinlock *lock,
773 PVOP_VCALL2(pv_lock_ops.spin_lock_flags, lock, flags);
776 static __always_inline int arch_spin_trylock(struct arch_spinlock *lock)
778 return PVOP_CALL1(int, pv_lock_ops.spin_trylock, lock);
781 static __always_inline void arch_spin_unlock(struct arch_spinlock *lock)
783 PVOP_VCALL1(pv_lock_ops.spin_unlock, lock);
789 #define PV_SAVE_REGS "pushl %ecx; pushl %edx;"
790 #define PV_RESTORE_REGS "popl %edx; popl %ecx;"
792 /* save and restore all caller-save registers, except return value */
793 #define PV_SAVE_ALL_CALLER_REGS "pushl %ecx;"
794 #define PV_RESTORE_ALL_CALLER_REGS "popl %ecx;"
796 #define PV_FLAGS_ARG "0"
797 #define PV_EXTRA_CLOBBERS
798 #define PV_VEXTRA_CLOBBERS
800 /* save and restore all caller-save registers, except return value */
801 #define PV_SAVE_ALL_CALLER_REGS \
810 #define PV_RESTORE_ALL_CALLER_REGS \
820 /* We save some registers, but all of them, that's too much. We clobber all
821 * caller saved registers but the argument parameter */
822 #define PV_SAVE_REGS "pushq %%rdi;"
823 #define PV_RESTORE_REGS "popq %%rdi;"
824 #define PV_EXTRA_CLOBBERS EXTRA_CLOBBERS, "rcx" , "rdx", "rsi"
825 #define PV_VEXTRA_CLOBBERS EXTRA_CLOBBERS, "rdi", "rcx" , "rdx", "rsi"
826 #define PV_FLAGS_ARG "D"
830 * Generate a thunk around a function which saves all caller-save
831 * registers except for the return value. This allows C functions to
832 * be called from assembler code where fewer than normal registers are
833 * available. It may also help code generation around calls from C
834 * code if the common case doesn't use many registers.
836 * When a callee is wrapped in a thunk, the caller can assume that all
837 * arg regs and all scratch registers are preserved across the
838 * call. The return value in rax/eax will not be saved, even for void
841 #define PV_CALLEE_SAVE_REGS_THUNK(func) \
842 extern typeof(func) __raw_callee_save_##func; \
843 static void *__##func##__ __used = func; \
845 asm(".pushsection .text;" \
846 "__raw_callee_save_" #func ": " \
847 PV_SAVE_ALL_CALLER_REGS \
849 PV_RESTORE_ALL_CALLER_REGS \
853 /* Get a reference to a callee-save function */
854 #define PV_CALLEE_SAVE(func) \
855 ((struct paravirt_callee_save) { __raw_callee_save_##func })
857 /* Promise that "func" already uses the right calling convention */
858 #define __PV_IS_CALLEE_SAVE(func) \
859 ((struct paravirt_callee_save) { func })
861 static inline notrace unsigned long arch_local_save_flags(void)
863 return PVOP_CALLEE0(unsigned long, pv_irq_ops.save_fl);
866 static inline notrace void arch_local_irq_restore(unsigned long f)
868 PVOP_VCALLEE1(pv_irq_ops.restore_fl, f);
871 static inline notrace void arch_local_irq_disable(void)
873 PVOP_VCALLEE0(pv_irq_ops.irq_disable);
876 static inline notrace void arch_local_irq_enable(void)
878 PVOP_VCALLEE0(pv_irq_ops.irq_enable);
881 static inline notrace unsigned long arch_local_irq_save(void)
885 f = arch_local_save_flags();
886 arch_local_irq_disable();
891 /* Make sure as little as possible of this mess escapes. */
906 extern void default_banner(void);
908 #else /* __ASSEMBLY__ */
910 #define _PVSITE(ptype, clobbers, ops, word, algn) \
914 .pushsection .parainstructions,"a"; \
923 #define COND_PUSH(set, mask, reg) \
924 .if ((~(set)) & mask); push %reg; .endif
925 #define COND_POP(set, mask, reg) \
926 .if ((~(set)) & mask); pop %reg; .endif
930 #define PV_SAVE_REGS(set) \
931 COND_PUSH(set, CLBR_RAX, rax); \
932 COND_PUSH(set, CLBR_RCX, rcx); \
933 COND_PUSH(set, CLBR_RDX, rdx); \
934 COND_PUSH(set, CLBR_RSI, rsi); \
935 COND_PUSH(set, CLBR_RDI, rdi); \
936 COND_PUSH(set, CLBR_R8, r8); \
937 COND_PUSH(set, CLBR_R9, r9); \
938 COND_PUSH(set, CLBR_R10, r10); \
939 COND_PUSH(set, CLBR_R11, r11)
940 #define PV_RESTORE_REGS(set) \
941 COND_POP(set, CLBR_R11, r11); \
942 COND_POP(set, CLBR_R10, r10); \
943 COND_POP(set, CLBR_R9, r9); \
944 COND_POP(set, CLBR_R8, r8); \
945 COND_POP(set, CLBR_RDI, rdi); \
946 COND_POP(set, CLBR_RSI, rsi); \
947 COND_POP(set, CLBR_RDX, rdx); \
948 COND_POP(set, CLBR_RCX, rcx); \
949 COND_POP(set, CLBR_RAX, rax)
951 #define PARA_PATCH(struct, off) ((PARAVIRT_PATCH_##struct + (off)) / 8)
952 #define PARA_SITE(ptype, clobbers, ops) _PVSITE(ptype, clobbers, ops, .quad, 8)
953 #define PARA_INDIRECT(addr) *addr(%rip)
955 #define PV_SAVE_REGS(set) \
956 COND_PUSH(set, CLBR_EAX, eax); \
957 COND_PUSH(set, CLBR_EDI, edi); \
958 COND_PUSH(set, CLBR_ECX, ecx); \
959 COND_PUSH(set, CLBR_EDX, edx)
960 #define PV_RESTORE_REGS(set) \
961 COND_POP(set, CLBR_EDX, edx); \
962 COND_POP(set, CLBR_ECX, ecx); \
963 COND_POP(set, CLBR_EDI, edi); \
964 COND_POP(set, CLBR_EAX, eax)
966 #define PARA_PATCH(struct, off) ((PARAVIRT_PATCH_##struct + (off)) / 4)
967 #define PARA_SITE(ptype, clobbers, ops) _PVSITE(ptype, clobbers, ops, .long, 4)
968 #define PARA_INDIRECT(addr) *%cs:addr
971 #define INTERRUPT_RETURN \
972 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_iret), CLBR_NONE, \
973 jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_iret))
975 #define DISABLE_INTERRUPTS(clobbers) \
976 PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_irq_disable), clobbers, \
977 PV_SAVE_REGS(clobbers | CLBR_CALLEE_SAVE); \
978 call PARA_INDIRECT(pv_irq_ops+PV_IRQ_irq_disable); \
979 PV_RESTORE_REGS(clobbers | CLBR_CALLEE_SAVE);)
981 #define ENABLE_INTERRUPTS(clobbers) \
982 PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_irq_enable), clobbers, \
983 PV_SAVE_REGS(clobbers | CLBR_CALLEE_SAVE); \
984 call PARA_INDIRECT(pv_irq_ops+PV_IRQ_irq_enable); \
985 PV_RESTORE_REGS(clobbers | CLBR_CALLEE_SAVE);)
987 #define USERGS_SYSRET32 \
988 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_usergs_sysret32), \
990 jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_usergs_sysret32))
993 #define GET_CR0_INTO_EAX \
994 push %ecx; push %edx; \
995 call PARA_INDIRECT(pv_cpu_ops+PV_CPU_read_cr0); \
998 #define ENABLE_INTERRUPTS_SYSEXIT \
999 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_irq_enable_sysexit), \
1001 jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_irq_enable_sysexit))
1004 #else /* !CONFIG_X86_32 */
1007 * If swapgs is used while the userspace stack is still current,
1008 * there's no way to call a pvop. The PV replacement *must* be
1009 * inlined, or the swapgs instruction must be trapped and emulated.
1011 #define SWAPGS_UNSAFE_STACK \
1012 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_swapgs), CLBR_NONE, \
1016 * Note: swapgs is very special, and in practise is either going to be
1017 * implemented with a single "swapgs" instruction or something very
1018 * special. Either way, we don't need to save any registers for
1022 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_swapgs), CLBR_NONE, \
1023 call PARA_INDIRECT(pv_cpu_ops+PV_CPU_swapgs) \
1026 #define GET_CR2_INTO_RAX \
1027 call PARA_INDIRECT(pv_mmu_ops+PV_MMU_read_cr2)
1029 #define PARAVIRT_ADJUST_EXCEPTION_FRAME \
1030 PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_adjust_exception_frame), \
1032 call PARA_INDIRECT(pv_irq_ops+PV_IRQ_adjust_exception_frame))
1034 #define USERGS_SYSRET64 \
1035 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_usergs_sysret64), \
1037 jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_usergs_sysret64))
1039 #define ENABLE_INTERRUPTS_SYSEXIT32 \
1040 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_irq_enable_sysexit), \
1042 jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_irq_enable_sysexit))
1043 #endif /* CONFIG_X86_32 */
1045 #endif /* __ASSEMBLY__ */
1046 #else /* CONFIG_PARAVIRT */
1047 # define default_banner x86_init_noop
1048 #endif /* !CONFIG_PARAVIRT */
1049 #endif /* _ASM_X86_PARAVIRT_H */