arch/x86/include/asm/paravirt.h

   1 #ifndef _ASM_X86_PARAVIRT_H
   2 #define _ASM_X86_PARAVIRT_H
   3 /* Various instructions on x86 need to be replaced for
   4  * para-virtualization: those hooks are defined here. */
   5
   6 #ifdef CONFIG_PARAVIRT
   7 #include <asm/pgtable_types.h>
   8 #include <asm/asm.h>
   9
  10 /* Bitmask of what can be clobbered: usually at least eax. */
  11 #define CLBR_NONE 0
  12 #define CLBR_EAX  (1 << 0)
  13 #define CLBR_ECX  (1 << 1)
  14 #define CLBR_EDX  (1 << 2)
  15 #define CLBR_EDI  (1 << 3)
  16
  17 #ifdef CONFIG_X86_32
  18 /* CLBR_ANY should match all regs platform has. For i386, that's just it */
  19 #define CLBR_ANY  ((1 << 4) - 1)
  20
  21 #define CLBR_ARG_REGS   (CLBR_EAX | CLBR_EDX | CLBR_ECX)
  22 #define CLBR_RET_REG    (CLBR_EAX | CLBR_EDX)
  23 #define CLBR_SCRATCH    (0)
  24 #else
  25 #define CLBR_RAX  CLBR_EAX
  26 #define CLBR_RCX  CLBR_ECX
  27 #define CLBR_RDX  CLBR_EDX
  28 #define CLBR_RDI  CLBR_EDI
  29 #define CLBR_RSI  (1 << 4)
  30 #define CLBR_R8   (1 << 5)
  31 #define CLBR_R9   (1 << 6)
  32 #define CLBR_R10  (1 << 7)
  33 #define CLBR_R11  (1 << 8)
  34
  35 #define CLBR_ANY  ((1 << 9) - 1)
  36
  37 #define CLBR_ARG_REGS   (CLBR_RDI | CLBR_RSI | CLBR_RDX | \
  38                          CLBR_RCX | CLBR_R8 | CLBR_R9)
  39 #define CLBR_RET_REG    (CLBR_RAX)
  40 #define CLBR_SCRATCH    (CLBR_R10 | CLBR_R11)
  41
  42 #include <asm/desc_defs.h>
  43 #endif /* X86_64 */
  44
  45 #define CLBR_CALLEE_SAVE ((CLBR_ARG_REGS | CLBR_SCRATCH) & ~CLBR_RET_REG)
  46
  47 #ifndef __ASSEMBLY__
  48 #include <linux/types.h>
  49 #include <linux/cpumask.h>
  50 #include <asm/kmap_types.h>
  51 #include <asm/desc_defs.h>
  52
  53 struct page;
  54 struct thread_struct;
  55 struct desc_ptr;
  56 struct tss_struct;
  57 struct mm_struct;
  58 struct desc_struct;
  59 struct task_struct;
  60
  61 /*
  62  * Wrapper type for pointers to code which uses the non-standard
  63  * calling convention.  See PV_CALL_SAVE_REGS_THUNK below.
  64  */
  65 struct paravirt_callee_save {
  66         void *func;
  67 };
  68
  69 /* general info */
  70 struct pv_info {
  71         unsigned int kernel_rpl;
  72         int shared_kernel_pmd;
  73         int paravirt_enabled;
  74         const char *name;
  75 };
  76
  77 struct pv_init_ops {
  78         /*
  79          * Patch may replace one of the defined code sequences with
  80          * arbitrary code, subject to the same register constraints.
  81          * This generally means the code is not free to clobber any
  82          * registers other than EAX.  The patch function should return
  83          * the number of bytes of code generated, as we nop pad the
  84          * rest in generic code.
  85          */
  86         unsigned (*patch)(u8 type, u16 clobber, void *insnbuf,
  87                           unsigned long addr, unsigned len);
  88
  89         /* Basic arch-specific setup */
  90         void (*arch_setup)(void);
  91         char *(*memory_setup)(void);
  92         void (*post_allocator_init)(void);
  93
  94         /* Print a banner to identify the environment */
  95         void (*banner)(void);
  96 };
  97
  98
  99 struct pv_lazy_ops {
 100         /* Set deferred update mode, used for batching operations. */
 101         void (*enter)(void);
 102         void (*leave)(void);
 103 };
 104
 105 struct pv_time_ops {
 106         void (*time_init)(void);
 107
 108         /* Set and set time of day */
 109         unsigned long (*get_wallclock)(void);
 110         int (*set_wallclock)(unsigned long);
 111
 112         unsigned long long (*sched_clock)(void);
 113         unsigned long (*get_tsc_khz)(void);
 114 };
 115
 116 struct pv_cpu_ops {
 117         /* hooks for various privileged instructions */
 118         unsigned long (*get_debugreg)(int regno);
 119         void (*set_debugreg)(int regno, unsigned long value);
 120
 121         void (*clts)(void);
 122
 123         unsigned long (*read_cr0)(void);
 124         void (*write_cr0)(unsigned long);
 125
 126         unsigned long (*read_cr4_safe)(void);
 127         unsigned long (*read_cr4)(void);
 128         void (*write_cr4)(unsigned long);
 129
 130 #ifdef CONFIG_X86_64
 131         unsigned long (*read_cr8)(void);
 132         void (*write_cr8)(unsigned long);
 133 #endif
 134
 135         /* Segment descriptor handling */
 136         void (*load_tr_desc)(void);
 137         void (*load_gdt)(const struct desc_ptr *);
 138         void (*load_idt)(const struct desc_ptr *);
 139         void (*store_gdt)(struct desc_ptr *);
 140         void (*store_idt)(struct desc_ptr *);
 141         void (*set_ldt)(const void *desc, unsigned entries);
 142         unsigned long (*store_tr)(void);
 143         void (*load_tls)(struct thread_struct *t, unsigned int cpu);
 144 #ifdef CONFIG_X86_64
 145         void (*load_gs_index)(unsigned int idx);
 146 #endif
 147         void (*write_ldt_entry)(struct desc_struct *ldt, int entrynum,
 148                                 const void *desc);
 149         void (*write_gdt_entry)(struct desc_struct *,
 150                                 int entrynum, const void *desc, int size);
 151         void (*write_idt_entry)(gate_desc *,
 152                                 int entrynum, const gate_desc *gate);
 153         void (*alloc_ldt)(struct desc_struct *ldt, unsigned entries);
 154         void (*free_ldt)(struct desc_struct *ldt, unsigned entries);
 155
 156         void (*load_sp0)(struct tss_struct *tss, struct thread_struct *t);
 157
 158         void (*set_iopl_mask)(unsigned mask);
 159
 160         void (*wbinvd)(void);
 161         void (*io_delay)(void);
 162
 163         /* cpuid emulation, mostly so that caps bits can be disabled */
 164         void (*cpuid)(unsigned int *eax, unsigned int *ebx,
 165                       unsigned int *ecx, unsigned int *edx);
 166
 167         /* MSR, PMC and TSR operations.
 168            err = 0/-EFAULT.  wrmsr returns 0/-EFAULT. */
 169         u64 (*read_msr)(unsigned int msr, int *err);
 170         int (*rdmsr_regs)(u32 *regs);
 171         int (*write_msr)(unsigned int msr, unsigned low, unsigned high);
 172         int (*wrmsr_regs)(u32 *regs);
 173
 174         u64 (*read_tsc)(void);
 175         u64 (*read_pmc)(int counter);
 176         unsigned long long (*read_tscp)(unsigned int *aux);
 177
 178         /*
 179          * Atomically enable interrupts and return to userspace.  This
 180          * is only ever used to return to 32-bit processes; in a
 181          * 64-bit kernel, it's used for 32-on-64 compat processes, but
 182          * never native 64-bit processes.  (Jump, not call.)
 183          */
 184         void (*irq_enable_sysexit)(void);
 185
 186         /*
 187          * Switch to usermode gs and return to 64-bit usermode using
 188          * sysret.  Only used in 64-bit kernels to return to 64-bit
 189          * processes.  Usermode register state, including %rsp, must
 190          * already be restored.
 191          */
 192         void (*usergs_sysret64)(void);
 193
 194         /*
 195          * Switch to usermode gs and return to 32-bit usermode using
 196          * sysret.  Used to return to 32-on-64 compat processes.
 197          * Other usermode register state, including %esp, must already
 198          * be restored.
 199          */
 200         void (*usergs_sysret32)(void);
 201
 202         /* Normal iret.  Jump to this with the standard iret stack
 203            frame set up. */
 204         void (*iret)(void);
 205
 206         void (*swapgs)(void);
 207
 208         void (*start_context_switch)(struct task_struct *prev);
 209         void (*end_context_switch)(struct task_struct *next);
 210 };
 211
 212 struct pv_irq_ops {
 213         void (*init_IRQ)(void);
 214
 215         /*
 216          * Get/set interrupt state.  save_fl and restore_fl are only
 217          * expected to use X86_EFLAGS_IF; all other bits
 218          * returned from save_fl are undefined, and may be ignored by
 219          * restore_fl.
 220          *
 221          * NOTE: These functions callers expect the callee to preserve
 222          * more registers than the standard C calling convention.
 223          */
 224         struct paravirt_callee_save save_fl;
 225         struct paravirt_callee_save restore_fl;
 226         struct paravirt_callee_save irq_disable;
 227         struct paravirt_callee_save irq_enable;
 228
 229         void (*safe_halt)(void);
 230         void (*halt)(void);
 231
 232 #ifdef CONFIG_X86_64
 233         void (*adjust_exception_frame)(void);
 234 #endif
 235 };
 236
 237 struct pv_apic_ops {
 238 #ifdef CONFIG_X86_LOCAL_APIC
 239         void (*setup_boot_clock)(void);
 240         void (*setup_secondary_clock)(void);
 241
 242         void (*startup_ipi_hook)(int phys_apicid,
 243                                  unsigned long start_eip,
 244                                  unsigned long start_esp);
 245 #endif
 246 };
 247
 248 struct pv_mmu_ops {
 249         /*
 250          * Called before/after init_mm pagetable setup. setup_start
 251          * may reset %cr3, and may pre-install parts of the pagetable;
 252          * pagetable setup is expected to preserve any existing
 253          * mapping.
 254          */
 255         void (*pagetable_setup_start)(pgd_t *pgd_base);
 256         void (*pagetable_setup_done)(pgd_t *pgd_base);
 257
 258         unsigned long (*read_cr2)(void);
 259         void (*write_cr2)(unsigned long);
 260
 261         unsigned long (*read_cr3)(void);
 262         void (*write_cr3)(unsigned long);
 263
 264         /*
 265          * Hooks for intercepting the creation/use/destruction of an
 266          * mm_struct.
 267          */
 268         void (*activate_mm)(struct mm_struct *prev,
 269                             struct mm_struct *next);
 270         void (*dup_mmap)(struct mm_struct *oldmm,
 271                          struct mm_struct *mm);
 272         void (*exit_mmap)(struct mm_struct *mm);
 273
 274
 275         /* TLB operations */
 276         void (*flush_tlb_user)(void);
 277         void (*flush_tlb_kernel)(void);
 278         void (*flush_tlb_single)(unsigned long addr);
 279         void (*flush_tlb_others)(const struct cpumask *cpus,
 280                                  struct mm_struct *mm,
 281                                  unsigned long va);
 282
 283         /* Hooks for allocating and freeing a pagetable top-level */
 284         int  (*pgd_alloc)(struct mm_struct *mm);
 285         void (*pgd_free)(struct mm_struct *mm, pgd_t *pgd);
 286
 287         /*
 288          * Hooks for allocating/releasing pagetable pages when they're
 289          * attached to a pagetable
 290          */
 291         void (*alloc_pte)(struct mm_struct *mm, unsigned long pfn);
 292         void (*alloc_pmd)(struct mm_struct *mm, unsigned long pfn);
 293         void (*alloc_pmd_clone)(unsigned long pfn, unsigned long clonepfn, unsigned long start, unsigned long count);
 294         void (*alloc_pud)(struct mm_struct *mm, unsigned long pfn);
 295         void (*release_pte)(unsigned long pfn);
 296         void (*release_pmd)(unsigned long pfn);
 297         void (*release_pud)(unsigned long pfn);
 298
 299         /* Pagetable manipulation functions */
 300         void (*set_pte)(pte_t *ptep, pte_t pteval);
 301         void (*set_pte_at)(struct mm_struct *mm, unsigned long addr,
 302                            pte_t *ptep, pte_t pteval);
 303         void (*set_pmd)(pmd_t *pmdp, pmd_t pmdval);
 304         void (*pte_update)(struct mm_struct *mm, unsigned long addr,
 305                            pte_t *ptep);
 306         void (*pte_update_defer)(struct mm_struct *mm,
 307                                  unsigned long addr, pte_t *ptep);
 308
 309         pte_t (*ptep_modify_prot_start)(struct mm_struct *mm, unsigned long addr,
 310                                         pte_t *ptep);
 311         void (*ptep_modify_prot_commit)(struct mm_struct *mm, unsigned long addr,
 312                                         pte_t *ptep, pte_t pte);
 313
 314         struct paravirt_callee_save pte_val;
 315         struct paravirt_callee_save make_pte;
 316
 317         struct paravirt_callee_save pgd_val;
 318         struct paravirt_callee_save make_pgd;
 319
 320 #if PAGETABLE_LEVELS >= 3
 321 #ifdef CONFIG_X86_PAE
 322         void (*set_pte_atomic)(pte_t *ptep, pte_t pteval);
 323         void (*pte_clear)(struct mm_struct *mm, unsigned long addr,
 324                           pte_t *ptep);
 325         void (*pmd_clear)(pmd_t *pmdp);
 326
 327 #endif  /* CONFIG_X86_PAE */
 328
 329         void (*set_pud)(pud_t *pudp, pud_t pudval);
 330
 331         struct paravirt_callee_save pmd_val;
 332         struct paravirt_callee_save make_pmd;
 333
 334 #if PAGETABLE_LEVELS == 4
 335         struct paravirt_callee_save pud_val;
 336         struct paravirt_callee_save make_pud;
 337
 338         void (*set_pgd)(pgd_t *pudp, pgd_t pgdval);
 339 #endif  /* PAGETABLE_LEVELS == 4 */
 340 #endif  /* PAGETABLE_LEVELS >= 3 */
 341
 342 #ifdef CONFIG_HIGHPTE
 343         void *(*kmap_atomic_pte)(struct page *page, enum km_type type);
 344 #endif
 345
 346         struct pv_lazy_ops lazy_mode;
 347
 348         /* dom0 ops */
 349
 350         /* Sometimes the physical address is a pfn, and sometimes its
 351            an mfn.  We can tell which is which from the index. */
 352         void (*set_fixmap)(unsigned /* enum fixed_addresses */ idx,
 353                            phys_addr_t phys, pgprot_t flags);
 354 };
 355
 356 struct raw_spinlock;
 357 struct pv_lock_ops {
 358         int (*spin_is_locked)(struct raw_spinlock *lock);
 359         int (*spin_is_contended)(struct raw_spinlock *lock);
 360         void (*spin_lock)(struct raw_spinlock *lock);
 361         void (*spin_lock_flags)(struct raw_spinlock *lock, unsigned long flags);
 362         int (*spin_trylock)(struct raw_spinlock *lock);
 363         void (*spin_unlock)(struct raw_spinlock *lock);
 364 };
 365
 366 /* This contains all the paravirt structures: we get a convenient
 367  * number for each function using the offset which we use to indicate
 368  * what to patch. */
 369 struct paravirt_patch_template {
 370         struct pv_init_ops pv_init_ops;
 371         struct pv_time_ops pv_time_ops;
 372         struct pv_cpu_ops pv_cpu_ops;
 373         struct pv_irq_ops pv_irq_ops;
 374         struct pv_apic_ops pv_apic_ops;
 375         struct pv_mmu_ops pv_mmu_ops;
 376         struct pv_lock_ops pv_lock_ops;
 377 };
 378
 379 extern struct pv_info pv_info;
 380 extern struct pv_init_ops pv_init_ops;
 381 extern struct pv_time_ops pv_time_ops;
 382 extern struct pv_cpu_ops pv_cpu_ops;
 383 extern struct pv_irq_ops pv_irq_ops;
 384 extern struct pv_apic_ops pv_apic_ops;
 385 extern struct pv_mmu_ops pv_mmu_ops;
 386 extern struct pv_lock_ops pv_lock_ops;
 387
 388 #define PARAVIRT_PATCH(x)                                       \
 389         (offsetof(struct paravirt_patch_template, x) / sizeof(void *))
 390
 391 #define paravirt_type(op)                               \
 392         [paravirt_typenum] "i" (PARAVIRT_PATCH(op)),    \
 393         [paravirt_opptr] "i" (&(op))
 394 #define paravirt_clobber(clobber)               \
 395         [paravirt_clobber] "i" (clobber)
 396
 397 /*
 398  * Generate some code, and mark it as patchable by the
 399  * apply_paravirt() alternate instruction patcher.
 400  */
 401 #define _paravirt_alt(insn_string, type, clobber)       \
 402         "771:\n\t" insn_string "\n" "772:\n"            \
 403         ".pushsection .parainstructions,\"a\"\n"        \
 404         _ASM_ALIGN "\n"                                 \
 405         _ASM_PTR " 771b\n"                              \
 406         "  .byte " type "\n"                            \
 407         "  .byte 772b-771b\n"                           \
 408         "  .short " clobber "\n"                        \
 409         ".popsection\n"
 410
 411 /* Generate patchable code, with the default asm parameters. */
 412 #define paravirt_alt(insn_string)                                       \
 413         _paravirt_alt(insn_string, "%c[paravirt_typenum]", "%c[paravirt_clobber]")
 414
 415 /* Simple instruction patching code. */
 416 #define DEF_NATIVE(ops, name, code)                                     \
 417         extern const char start_##ops##_##name[], end_##ops##_##name[]; \
 418         asm("start_" #ops "_" #name ": " code "; end_" #ops "_" #name ":")
 419
 420 unsigned paravirt_patch_nop(void);
 421 unsigned paravirt_patch_ident_32(void *insnbuf, unsigned len);
 422 unsigned paravirt_patch_ident_64(void *insnbuf, unsigned len);
 423 unsigned paravirt_patch_ignore(unsigned len);
 424 unsigned paravirt_patch_call(void *insnbuf,
 425                              const void *target, u16 tgt_clobbers,
 426                              unsigned long addr, u16 site_clobbers,
 427                              unsigned len);
 428 unsigned paravirt_patch_jmp(void *insnbuf, const void *target,
 429                             unsigned long addr, unsigned len);
 430 unsigned paravirt_patch_default(u8 type, u16 clobbers, void *insnbuf,
 431                                 unsigned long addr, unsigned len);
 432
 433 unsigned paravirt_patch_insns(void *insnbuf, unsigned len,
 434                               const char *start, const char *end);
 435
 436 unsigned native_patch(u8 type, u16 clobbers, void *ibuf,
 437                       unsigned long addr, unsigned len);
 438
 439 int paravirt_disable_iospace(void);
 440
 441 /*
 442  * This generates an indirect call based on the operation type number.
 443  * The type number, computed in PARAVIRT_PATCH, is derived from the
 444  * offset into the paravirt_patch_template structure, and can therefore be
 445  * freely converted back into a structure offset.
 446  */
 447 #define PARAVIRT_CALL   "call *%c[paravirt_opptr];"
 448
 449 /*
 450  * These macros are intended to wrap calls through one of the paravirt
 451  * ops structs, so that they can be later identified and patched at
 452  * runtime.
 453  *
 454  * Normally, a call to a pv_op function is a simple indirect call:
 455  * (pv_op_struct.operations)(args...).
 456  *
 457  * Unfortunately, this is a relatively slow operation for modern CPUs,
 458  * because it cannot necessarily determine what the destination
 459  * address is.  In this case, the address is a runtime constant, so at
 460  * the very least we can patch the call to e a simple direct call, or
 461  * ideally, patch an inline implementation into the callsite.  (Direct
 462  * calls are essentially free, because the call and return addresses
 463  * are completely predictable.)
 464  *
 465  * For i386, these macros rely on the standard gcc "regparm(3)" calling
 466  * convention, in which the first three arguments are placed in %eax,
 467  * %edx, %ecx (in that order), and the remaining arguments are placed
 468  * on the stack.  All caller-save registers (eax,edx,ecx) are expected
 469  * to be modified (either clobbered or used for return values).
 470  * X86_64, on the other hand, already specifies a register-based calling
 471  * conventions, returning at %rax, with parameteres going on %rdi, %rsi,
 472  * %rdx, and %rcx. Note that for this reason, x86_64 does not need any
 473  * special handling for dealing with 4 arguments, unlike i386.
 474  * However, x86_64 also have to clobber all caller saved registers, which
 475  * unfortunately, are quite a bit (r8 - r11)
 476  *
 477  * The call instruction itself is marked by placing its start address
 478  * and size into the .parainstructions section, so that
 479  * apply_paravirt() in arch/i386/kernel/alternative.c can do the
 480  * appropriate patching under the control of the backend pv_init_ops
 481  * implementation.
 482  *
 483  * Unfortunately there's no way to get gcc to generate the args setup
 484  * for the call, and then allow the call itself to be generated by an
 485  * inline asm.  Because of this, we must do the complete arg setup and
 486  * return value handling from within these macros.  This is fairly
 487  * cumbersome.
 488  *
 489  * There are 5 sets of PVOP_* macros for dealing with 0-4 arguments.
 490  * It could be extended to more arguments, but there would be little
 491  * to be gained from that.  For each number of arguments, there are
 492  * the two VCALL and CALL variants for void and non-void functions.
 493  *
 494  * When there is a return value, the invoker of the macro must specify
 495  * the return type.  The macro then uses sizeof() on that type to
 496  * determine whether its a 32 or 64 bit value, and places the return
 497  * in the right register(s) (just %eax for 32-bit, and %edx:%eax for
 498  * 64-bit). For x86_64 machines, it just returns at %rax regardless of
 499  * the return value size.
 500  *
 501  * 64-bit arguments are passed as a pair of adjacent 32-bit arguments
 502  * i386 also passes 64-bit arguments as a pair of adjacent 32-bit arguments
 503  * in low,high order
 504  *
 505  * Small structures are passed and returned in registers.  The macro
 506  * calling convention can't directly deal with this, so the wrapper
 507  * functions must do this.
 508  *
 509  * These PVOP_* macros are only defined within this header.  This
 510  * means that all uses must be wrapped in inline functions.  This also
 511  * makes sure the incoming and outgoing types are always correct.
 512  */
 513 #ifdef CONFIG_X86_32
 514 #define PVOP_VCALL_ARGS                         \
 515         unsigned long __eax = __eax, __edx = __edx, __ecx = __ecx
 516 #define PVOP_CALL_ARGS                  PVOP_VCALL_ARGS
 517
 518 #define PVOP_CALL_ARG1(x)               "a" ((unsigned long)(x))
 519 #define PVOP_CALL_ARG2(x)               "d" ((unsigned long)(x))
 520 #define PVOP_CALL_ARG3(x)               "c" ((unsigned long)(x))
 521
 522 #define PVOP_VCALL_CLOBBERS             "=a" (__eax), "=d" (__edx),     \
 523                                         "=c" (__ecx)
 524 #define PVOP_CALL_CLOBBERS              PVOP_VCALL_CLOBBERS
 525
 526 #define PVOP_VCALLEE_CLOBBERS           "=a" (__eax), "=d" (__edx)
 527 #define PVOP_CALLEE_CLOBBERS            PVOP_VCALLEE_CLOBBERS
 528
 529 #define EXTRA_CLOBBERS
 530 #define VEXTRA_CLOBBERS
 531 #else  /* CONFIG_X86_64 */
 532 #define PVOP_VCALL_ARGS                                 \
 533         unsigned long __edi = __edi, __esi = __esi,     \
 534                 __edx = __edx, __ecx = __ecx
 535 #define PVOP_CALL_ARGS          PVOP_VCALL_ARGS, __eax
 536
 537 #define PVOP_CALL_ARG1(x)               "D" ((unsigned long)(x))
 538 #define PVOP_CALL_ARG2(x)               "S" ((unsigned long)(x))
 539 #define PVOP_CALL_ARG3(x)               "d" ((unsigned long)(x))
 540 #define PVOP_CALL_ARG4(x)               "c" ((unsigned long)(x))
 541
 542 #define PVOP_VCALL_CLOBBERS     "=D" (__edi),                           \
 543                                 "=S" (__esi), "=d" (__edx),             \
 544                                 "=c" (__ecx)
 545 #define PVOP_CALL_CLOBBERS      PVOP_VCALL_CLOBBERS, "=a" (__eax)
 546
 547 #define PVOP_VCALLEE_CLOBBERS   "=a" (__eax)
 548 #define PVOP_CALLEE_CLOBBERS    PVOP_VCALLEE_CLOBBERS
 549
 550 #define EXTRA_CLOBBERS   , "r8", "r9", "r10", "r11"
 551 #define VEXTRA_CLOBBERS  , "rax", "r8", "r9", "r10", "r11"
 552 #endif  /* CONFIG_X86_32 */
 553
 554 #ifdef CONFIG_PARAVIRT_DEBUG
 555 #define PVOP_TEST_NULL(op)      BUG_ON(op == NULL)
 556 #else
 557 #define PVOP_TEST_NULL(op)      ((void)op)
 558 #endif
 559
 560 #define ____PVOP_CALL(rettype, op, clbr, call_clbr, extra_clbr,         \
 561                       pre, post, ...)                                   \
 562         ({                                                              \
 563                 rettype __ret;                                          \
 564                 PVOP_CALL_ARGS;                                         \
 565                 PVOP_TEST_NULL(op);                                     \
 566                 /* This is 32-bit specific, but is okay in 64-bit */    \
 567                 /* since this condition will never hold */              \
 568                 if (sizeof(rettype) > sizeof(unsigned long)) {          \
 569                         asm volatile(pre                                \
 570                                      paravirt_alt(PARAVIRT_CALL)        \
 571                                      post                               \
 572                                      : call_clbr                        \
 573                                      : paravirt_type(op),               \
 574                                        paravirt_clobber(clbr),          \
 575                                        ##__VA_ARGS__                    \
 576                                      : "memory", "cc" extra_clbr);      \
 577                         __ret = (rettype)((((u64)__edx) << 32) | __eax); \
 578                 } else {                                                \
 579                         asm volatile(pre                                \
 580                                      paravirt_alt(PARAVIRT_CALL)        \
 581                                      post                               \
 582                                      : call_clbr                        \
 583                                      : paravirt_type(op),               \
 584                                        paravirt_clobber(clbr),          \
 585                                        ##__VA_ARGS__                    \
 586                                      : "memory", "cc" extra_clbr);      \
 587                         __ret = (rettype)__eax;                         \
 588                 }                                                       \
 589                 __ret;                                                  \
 590         })
 591
 592 #define __PVOP_CALL(rettype, op, pre, post, ...)                        \
 593         ____PVOP_CALL(rettype, op, CLBR_ANY, PVOP_CALL_CLOBBERS,        \
 594                       EXTRA_CLOBBERS, pre, post, ##__VA_ARGS__)
 595
 596 #define __PVOP_CALLEESAVE(rettype, op, pre, post, ...)                  \
 597         ____PVOP_CALL(rettype, op.func, CLBR_RET_REG,                   \
 598                       PVOP_CALLEE_CLOBBERS, ,                           \
 599                       pre, post, ##__VA_ARGS__)
 600
 601
 602 #define ____PVOP_VCALL(op, clbr, call_clbr, extra_clbr, pre, post, ...) \
 603         ({                                                              \
 604                 PVOP_VCALL_ARGS;                                        \
 605                 PVOP_TEST_NULL(op);                                     \
 606                 asm volatile(pre                                        \
 607                              paravirt_alt(PARAVIRT_CALL)                \
 608                              post                                       \
 609                              : call_clbr                                \
 610                              : paravirt_type(op),                       \
 611                                paravirt_clobber(clbr),                  \
 612                                ##__VA_ARGS__                            \
 613                              : "memory", "cc" extra_clbr);              \
 614         })
 615
 616 #define __PVOP_VCALL(op, pre, post, ...)                                \
 617         ____PVOP_VCALL(op, CLBR_ANY, PVOP_VCALL_CLOBBERS,               \
 618                        VEXTRA_CLOBBERS,                                 \
 619                        pre, post, ##__VA_ARGS__)
 620
 621 #define __PVOP_VCALLEESAVE(rettype, op, pre, post, ...)                 \
 622         ____PVOP_CALL(rettype, op.func, CLBR_RET_REG,                   \
 623                       PVOP_VCALLEE_CLOBBERS, ,                          \
 624                       pre, post, ##__VA_ARGS__)
 625
 626
 627
 628 #define PVOP_CALL0(rettype, op)                                         \
 629         __PVOP_CALL(rettype, op, "", "")
 630 #define PVOP_VCALL0(op)                                                 \
 631         __PVOP_VCALL(op, "", "")
 632
 633 #define PVOP_CALLEE0(rettype, op)                                       \
 634         __PVOP_CALLEESAVE(rettype, op, "", "")
 635 #define PVOP_VCALLEE0(op)                                               \
 636         __PVOP_VCALLEESAVE(op, "", "")
 637
 638
 639 #define PVOP_CALL1(rettype, op, arg1)                                   \
 640         __PVOP_CALL(rettype, op, "", "", PVOP_CALL_ARG1(arg1))
 641 #define PVOP_VCALL1(op, arg1)                                           \
 642         __PVOP_VCALL(op, "", "", PVOP_CALL_ARG1(arg1))
 643
 644 #define PVOP_CALLEE1(rettype, op, arg1)                                 \
 645         __PVOP_CALLEESAVE(rettype, op, "", "", PVOP_CALL_ARG1(arg1))
 646 #define PVOP_VCALLEE1(op, arg1)                                         \
 647         __PVOP_VCALLEESAVE(op, "", "", PVOP_CALL_ARG1(arg1))
 648
 649
 650 #define PVOP_CALL2(rettype, op, arg1, arg2)                             \
 651         __PVOP_CALL(rettype, op, "", "", PVOP_CALL_ARG1(arg1),          \
 652                     PVOP_CALL_ARG2(arg2))
 653 #define PVOP_VCALL2(op, arg1, arg2)                                     \
 654         __PVOP_VCALL(op, "", "", PVOP_CALL_ARG1(arg1),                  \
 655                      PVOP_CALL_ARG2(arg2))
 656
 657 #define PVOP_CALLEE2(rettype, op, arg1, arg2)                           \
 658         __PVOP_CALLEESAVE(rettype, op, "", "", PVOP_CALL_ARG1(arg1),    \
 659                           PVOP_CALL_ARG2(arg2))
 660 #define PVOP_VCALLEE2(op, arg1, arg2)                                   \
 661         __PVOP_VCALLEESAVE(op, "", "", PVOP_CALL_ARG1(arg1),            \
 662                            PVOP_CALL_ARG2(arg2))
 663
 664
 665 #define PVOP_CALL3(rettype, op, arg1, arg2, arg3)                       \
 666         __PVOP_CALL(rettype, op, "", "", PVOP_CALL_ARG1(arg1),          \
 667                     PVOP_CALL_ARG2(arg2), PVOP_CALL_ARG3(arg3))
 668 #define PVOP_VCALL3(op, arg1, arg2, arg3)                               \
 669         __PVOP_VCALL(op, "", "", PVOP_CALL_ARG1(arg1),                  \
 670                      PVOP_CALL_ARG2(arg2), PVOP_CALL_ARG3(arg3))
 671
 672 /* This is the only difference in x86_64. We can make it much simpler */
 673 #ifdef CONFIG_X86_32
 674 #define PVOP_CALL4(rettype, op, arg1, arg2, arg3, arg4)                 \
 675         __PVOP_CALL(rettype, op,                                        \
 676                     "push %[_arg4];", "lea 4(%%esp),%%esp;",            \
 677                     PVOP_CALL_ARG1(arg1), PVOP_CALL_ARG2(arg2),         \
 678                     PVOP_CALL_ARG3(arg3), [_arg4] "mr" ((u32)(arg4)))
 679 #define PVOP_VCALL4(op, arg1, arg2, arg3, arg4)                         \
 680         __PVOP_VCALL(op,                                                \
 681                     "push %[_arg4];", "lea 4(%%esp),%%esp;",            \
 682                     "0" ((u32)(arg1)), "1" ((u32)(arg2)),               \
 683                     "2" ((u32)(arg3)), [_arg4] "mr" ((u32)(arg4)))
 684 #else
 685 #define PVOP_CALL4(rettype, op, arg1, arg2, arg3, arg4)                 \
 686         __PVOP_CALL(rettype, op, "", "",                                \
 687                     PVOP_CALL_ARG1(arg1), PVOP_CALL_ARG2(arg2),         \
 688                     PVOP_CALL_ARG3(arg3), PVOP_CALL_ARG4(arg4))
 689 #define PVOP_VCALL4(op, arg1, arg2, arg3, arg4)                         \
 690         __PVOP_VCALL(op, "", "",                                        \
 691                      PVOP_CALL_ARG1(arg1), PVOP_CALL_ARG2(arg2),        \
 692                      PVOP_CALL_ARG3(arg3), PVOP_CALL_ARG4(arg4))
 693 #endif
 694
 695 static inline int paravirt_enabled(void)
 696 {
 697         return pv_info.paravirt_enabled;
 698 }
 699
 700 static inline void load_sp0(struct tss_struct *tss,
 701                              struct thread_struct *thread)
 702 {
 703         PVOP_VCALL2(pv_cpu_ops.load_sp0, tss, thread);
 704 }
 705
 706 #define ARCH_SETUP                      pv_init_ops.arch_setup();
 707 static inline unsigned long get_wallclock(void)
 708 {
 709         return PVOP_CALL0(unsigned long, pv_time_ops.get_wallclock);
 710 }
 711
 712 static inline int set_wallclock(unsigned long nowtime)
 713 {
 714         return PVOP_CALL1(int, pv_time_ops.set_wallclock, nowtime);
 715 }
 716
 717 static inline void (*choose_time_init(void))(void)
 718 {
 719         return pv_time_ops.time_init;
 720 }
 721
 722 /* The paravirtualized CPUID instruction. */
 723 static inline void __cpuid(unsigned int *eax, unsigned int *ebx,
 724                            unsigned int *ecx, unsigned int *edx)
 725 {
 726         PVOP_VCALL4(pv_cpu_ops.cpuid, eax, ebx, ecx, edx);
 727 }
 728
 729 /*
 730  * These special macros can be used to get or set a debugging register
 731  */
 732 static inline unsigned long paravirt_get_debugreg(int reg)
 733 {
 734         return PVOP_CALL1(unsigned long, pv_cpu_ops.get_debugreg, reg);
 735 }
 736 #define get_debugreg(var, reg) var = paravirt_get_debugreg(reg)
 737 static inline void set_debugreg(unsigned long val, int reg)
 738 {
 739         PVOP_VCALL2(pv_cpu_ops.set_debugreg, reg, val);
 740 }
 741
 742 static inline void clts(void)
 743 {
 744         PVOP_VCALL0(pv_cpu_ops.clts);
 745 }
 746
 747 static inline unsigned long read_cr0(void)
 748 {
 749         return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr0);
 750 }
 751
 752 static inline void write_cr0(unsigned long x)
 753 {
 754         PVOP_VCALL1(pv_cpu_ops.write_cr0, x);
 755 }
 756
 757 static inline unsigned long read_cr2(void)
 758 {
 759         return PVOP_CALL0(unsigned long, pv_mmu_ops.read_cr2);
 760 }
 761
 762 static inline void write_cr2(unsigned long x)
 763 {
 764         PVOP_VCALL1(pv_mmu_ops.write_cr2, x);
 765 }
 766
 767 static inline unsigned long read_cr3(void)
 768 {
 769         return PVOP_CALL0(unsigned long, pv_mmu_ops.read_cr3);
 770 }
 771
 772 static inline void write_cr3(unsigned long x)
 773 {
 774         PVOP_VCALL1(pv_mmu_ops.write_cr3, x);
 775 }
 776
 777 static inline unsigned long read_cr4(void)
 778 {
 779         return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr4);
 780 }
 781 static inline unsigned long read_cr4_safe(void)
 782 {
 783         return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr4_safe);
 784 }
 785
 786 static inline void write_cr4(unsigned long x)
 787 {
 788         PVOP_VCALL1(pv_cpu_ops.write_cr4, x);
 789 }
 790
 791 #ifdef CONFIG_X86_64
 792 static inline unsigned long read_cr8(void)
 793 {
 794         return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr8);
 795 }
 796
 797 static inline void write_cr8(unsigned long x)
 798 {
 799         PVOP_VCALL1(pv_cpu_ops.write_cr8, x);
 800 }
 801 #endif
 802
 803 static inline void raw_safe_halt(void)
 804 {
 805         PVOP_VCALL0(pv_irq_ops.safe_halt);
 806 }
 807
 808 static inline void halt(void)
 809 {
 810         PVOP_VCALL0(pv_irq_ops.safe_halt);
 811 }
 812
 813 static inline void wbinvd(void)
 814 {
 815         PVOP_VCALL0(pv_cpu_ops.wbinvd);
 816 }
 817
 818 #define get_kernel_rpl()  (pv_info.kernel_rpl)
 819
 820 static inline u64 paravirt_read_msr(unsigned msr, int *err)
 821 {
 822         return PVOP_CALL2(u64, pv_cpu_ops.read_msr, msr, err);
 823 }
 824
 825 static inline int paravirt_rdmsr_regs(u32 *regs)
 826 {
 827         return PVOP_CALL1(int, pv_cpu_ops.rdmsr_regs, regs);
 828 }
 829
 830 static inline int paravirt_write_msr(unsigned msr, unsigned low, unsigned high)
 831 {
 832         return PVOP_CALL3(int, pv_cpu_ops.write_msr, msr, low, high);
 833 }
 834
 835 static inline int paravirt_wrmsr_regs(u32 *regs)
 836 {
 837         return PVOP_CALL1(int, pv_cpu_ops.wrmsr_regs, regs);
 838 }
 839
 840 /* These should all do BUG_ON(_err), but our headers are too tangled. */
 841 #define rdmsr(msr, val1, val2)                  \
 842 do {                                            \
 843         int _err;                               \
 844         u64 _l = paravirt_read_msr(msr, &_err); \
 845         val1 = (u32)_l;                         \
 846         val2 = _l >> 32;                        \
 847 } while (0)
 848
 849 #define wrmsr(msr, val1, val2)                  \
 850 do {                                            \
 851         paravirt_write_msr(msr, val1, val2);    \
 852 } while (0)
 853
 854 #define rdmsrl(msr, val)                        \
 855 do {                                            \
 856         int _err;                               \
 857         val = paravirt_read_msr(msr, &_err);    \
 858 } while (0)
 859
 860 #define wrmsrl(msr, val)        wrmsr(msr, (u32)((u64)(val)), ((u64)(val))>>32)
 861 #define wrmsr_safe(msr, a, b)   paravirt_write_msr(msr, a, b)
 862
 863 /* rdmsr with exception handling */
 864 #define rdmsr_safe(msr, a, b)                   \
 865 ({                                              \
 866         int _err;                               \
 867         u64 _l = paravirt_read_msr(msr, &_err); \
 868         (*a) = (u32)_l;                         \
 869         (*b) = _l >> 32;                        \
 870         _err;                                   \
 871 })
 872
 873 #define rdmsr_safe_regs(regs)   paravirt_rdmsr_regs(regs)
 874 #define wrmsr_safe_regs(regs)   paravirt_wrmsr_regs(regs)
 875
 876 static inline int rdmsrl_safe(unsigned msr, unsigned long long *p)
 877 {
 878         int err;
 879
 880         *p = paravirt_read_msr(msr, &err);
 881         return err;
 882 }
 883 static inline int rdmsrl_amd_safe(unsigned msr, unsigned long long *p)
 884 {
 885         u32 gprs[8] = { 0 };
 886         int err;
 887
 888         gprs[1] = msr;
 889         gprs[7] = 0x9c5a203a;
 890
 891         err = paravirt_rdmsr_regs(gprs);
 892
 893         *p = gprs[0] | ((u64)gprs[2] << 32);
 894
 895         return err;
 896 }
 897
 898 static inline int wrmsrl_amd_safe(unsigned msr, unsigned long long val)
 899 {
 900         u32 gprs[8] = { 0 };
 901
 902         gprs[0] = (u32)val;
 903         gprs[1] = msr;
 904         gprs[2] = val >> 32;
 905         gprs[7] = 0x9c5a203a;
 906
 907         return paravirt_wrmsr_regs(gprs);
 908 }
 909
 910 static inline u64 paravirt_read_tsc(void)
 911 {
 912         return PVOP_CALL0(u64, pv_cpu_ops.read_tsc);
 913 }
 914
 915 #define rdtscl(low)                             \
 916 do {                                            \
 917         u64 _l = paravirt_read_tsc();           \
 918         low = (int)_l;                          \
 919 } while (0)
 920
 921 #define rdtscll(val) (val = paravirt_read_tsc())
 922
 923 static inline unsigned long long paravirt_sched_clock(void)
 924 {
 925         return PVOP_CALL0(unsigned long long, pv_time_ops.sched_clock);
 926 }
 927 #define calibrate_tsc() (pv_time_ops.get_tsc_khz())
 928
 929 static inline unsigned long long paravirt_read_pmc(int counter)
 930 {
 931         return PVOP_CALL1(u64, pv_cpu_ops.read_pmc, counter);
 932 }
 933
 934 #define rdpmc(counter, low, high)               \
 935 do {                                            \
 936         u64 _l = paravirt_read_pmc(counter);    \
 937         low = (u32)_l;                          \
 938         high = _l >> 32;                        \
 939 } while (0)
 940
 941 static inline unsigned long long paravirt_rdtscp(unsigned int *aux)
 942 {
 943         return PVOP_CALL1(u64, pv_cpu_ops.read_tscp, aux);
 944 }
 945
 946 #define rdtscp(low, high, aux)                          \
 947 do {                                                    \
 948         int __aux;                                      \
 949         unsigned long __val = paravirt_rdtscp(&__aux);  \
 950         (low) = (u32)__val;                             \
 951         (high) = (u32)(__val >> 32);                    \
 952         (aux) = __aux;                                  \
 953 } while (0)
 954
 955 #define rdtscpll(val, aux)                              \
 956 do {                                                    \
 957         unsigned long __aux;                            \
 958         val = paravirt_rdtscp(&__aux);                  \
 959         (aux) = __aux;                                  \
 960 } while (0)
 961
 962 static inline void paravirt_alloc_ldt(struct desc_struct *ldt, unsigned entries)
 963 {
 964         PVOP_VCALL2(pv_cpu_ops.alloc_ldt, ldt, entries);
 965 }
 966
 967 static inline void paravirt_free_ldt(struct desc_struct *ldt, unsigned entries)
 968 {
 969         PVOP_VCALL2(pv_cpu_ops.free_ldt, ldt, entries);
 970 }
 971
 972 static inline void load_TR_desc(void)
 973 {
 974         PVOP_VCALL0(pv_cpu_ops.load_tr_desc);
 975 }
 976 static inline void load_gdt(const struct desc_ptr *dtr)
 977 {
 978         PVOP_VCALL1(pv_cpu_ops.load_gdt, dtr);
 979 }
 980 static inline void load_idt(const struct desc_ptr *dtr)
 981 {
 982         PVOP_VCALL1(pv_cpu_ops.load_idt, dtr);
 983 }
 984 static inline void set_ldt(const void *addr, unsigned entries)
 985 {
 986         PVOP_VCALL2(pv_cpu_ops.set_ldt, addr, entries);
 987 }
 988 static inline void store_gdt(struct desc_ptr *dtr)
 989 {
 990         PVOP_VCALL1(pv_cpu_ops.store_gdt, dtr);
 991 }
 992 static inline void store_idt(struct desc_ptr *dtr)
 993 {
 994         PVOP_VCALL1(pv_cpu_ops.store_idt, dtr);
 995 }
 996 static inline unsigned long paravirt_store_tr(void)
 997 {
 998         return PVOP_CALL0(unsigned long, pv_cpu_ops.store_tr);
 999 }
1000 #define store_tr(tr)    ((tr) = paravirt_store_tr())
1001 static inline void load_TLS(struct thread_struct *t, unsigned cpu)
1002 {
1003         PVOP_VCALL2(pv_cpu_ops.load_tls, t, cpu);
1004 }
1005
1006 #ifdef CONFIG_X86_64
1007 static inline void load_gs_index(unsigned int gs)
1008 {
1009         PVOP_VCALL1(pv_cpu_ops.load_gs_index, gs);
1010 }
1011 #endif
1012
1013 static inline void write_ldt_entry(struct desc_struct *dt, int entry,
1014                                    const void *desc)
1015 {
1016         PVOP_VCALL3(pv_cpu_ops.write_ldt_entry, dt, entry, desc);
1017 }
1018
1019 static inline void write_gdt_entry(struct desc_struct *dt, int entry,
1020                                    void *desc, int type)
1021 {
1022         PVOP_VCALL4(pv_cpu_ops.write_gdt_entry, dt, entry, desc, type);
1023 }
1024
1025 static inline void write_idt_entry(gate_desc *dt, int entry, const gate_desc *g)
1026 {
1027         PVOP_VCALL3(pv_cpu_ops.write_idt_entry, dt, entry, g);
1028 }
1029 static inline void set_iopl_mask(unsigned mask)
1030 {
1031         PVOP_VCALL1(pv_cpu_ops.set_iopl_mask, mask);
1032 }
1033
1034 /* The paravirtualized I/O functions */
1035 static inline void slow_down_io(void)
1036 {
1037         pv_cpu_ops.io_delay();
1038 #ifdef REALLY_SLOW_IO
1039         pv_cpu_ops.io_delay();
1040         pv_cpu_ops.io_delay();
1041         pv_cpu_ops.io_delay();
1042 #endif
1043 }
1044
1045 #ifdef CONFIG_X86_LOCAL_APIC
1046 static inline void setup_boot_clock(void)
1047 {
1048         PVOP_VCALL0(pv_apic_ops.setup_boot_clock);
1049 }
1050
1051 static inline void setup_secondary_clock(void)
1052 {
1053         PVOP_VCALL0(pv_apic_ops.setup_secondary_clock);
1054 }
1055 #endif
1056
1057 static inline void paravirt_post_allocator_init(void)
1058 {
1059         if (pv_init_ops.post_allocator_init)
1060                 (*pv_init_ops.post_allocator_init)();
1061 }
1062
1063 static inline void paravirt_pagetable_setup_start(pgd_t *base)
1064 {
1065         (*pv_mmu_ops.pagetable_setup_start)(base);
1066 }
1067
1068 static inline void paravirt_pagetable_setup_done(pgd_t *base)
1069 {
1070         (*pv_mmu_ops.pagetable_setup_done)(base);
1071 }
1072
1073 #ifdef CONFIG_SMP
1074 static inline void startup_ipi_hook(int phys_apicid, unsigned long start_eip,
1075                                     unsigned long start_esp)
1076 {
1077         PVOP_VCALL3(pv_apic_ops.startup_ipi_hook,
1078                     phys_apicid, start_eip, start_esp);
1079 }
1080 #endif
1081
1082 static inline void paravirt_activate_mm(struct mm_struct *prev,
1083                                         struct mm_struct *next)
1084 {
1085         PVOP_VCALL2(pv_mmu_ops.activate_mm, prev, next);
1086 }
1087
1088 static inline void arch_dup_mmap(struct mm_struct *oldmm,
1089                                  struct mm_struct *mm)
1090 {
1091         PVOP_VCALL2(pv_mmu_ops.dup_mmap, oldmm, mm);
1092 }
1093
1094 static inline void arch_exit_mmap(struct mm_struct *mm)
1095 {
1096         PVOP_VCALL1(pv_mmu_ops.exit_mmap, mm);
1097 }
1098
1099 static inline void __flush_tlb(void)
1100 {
1101         PVOP_VCALL0(pv_mmu_ops.flush_tlb_user);
1102 }
1103 static inline void __flush_tlb_global(void)
1104 {
1105         PVOP_VCALL0(pv_mmu_ops.flush_tlb_kernel);
1106 }
1107 static inline void __flush_tlb_single(unsigned long addr)
1108 {
1109         PVOP_VCALL1(pv_mmu_ops.flush_tlb_single, addr);
1110 }
1111
1112 static inline void flush_tlb_others(const struct cpumask *cpumask,
1113                                     struct mm_struct *mm,
1114                                     unsigned long va)
1115 {
1116         PVOP_VCALL3(pv_mmu_ops.flush_tlb_others, cpumask, mm, va);
1117 }
1118
1119 static inline int paravirt_pgd_alloc(struct mm_struct *mm)
1120 {
1121         return PVOP_CALL1(int, pv_mmu_ops.pgd_alloc, mm);
1122 }
1123
1124 static inline void paravirt_pgd_free(struct mm_struct *mm, pgd_t *pgd)
1125 {
1126         PVOP_VCALL2(pv_mmu_ops.pgd_free, mm, pgd);
1127 }
1128
1129 static inline void paravirt_alloc_pte(struct mm_struct *mm, unsigned long pfn)
1130 {
1131         PVOP_VCALL2(pv_mmu_ops.alloc_pte, mm, pfn);
1132 }
1133 static inline void paravirt_release_pte(unsigned long pfn)
1134 {
1135         PVOP_VCALL1(pv_mmu_ops.release_pte, pfn);
1136 }
1137
1138 static inline void paravirt_alloc_pmd(struct mm_struct *mm, unsigned long pfn)
1139 {
1140         PVOP_VCALL2(pv_mmu_ops.alloc_pmd, mm, pfn);
1141 }
1142
1143 static inline void paravirt_alloc_pmd_clone(unsigned long pfn, unsigned long clonepfn,
1144                                             unsigned long start, unsigned long count)
1145 {
1146         PVOP_VCALL4(pv_mmu_ops.alloc_pmd_clone, pfn, clonepfn, start, count);
1147 }
1148 static inline void paravirt_release_pmd(unsigned long pfn)
1149 {
1150         PVOP_VCALL1(pv_mmu_ops.release_pmd, pfn);
1151 }
1152
1153 static inline void paravirt_alloc_pud(struct mm_struct *mm, unsigned long pfn)
1154 {
1155         PVOP_VCALL2(pv_mmu_ops.alloc_pud, mm, pfn);
1156 }
1157 static inline void paravirt_release_pud(unsigned long pfn)
1158 {
1159         PVOP_VCALL1(pv_mmu_ops.release_pud, pfn);
1160 }
1161
1162 #ifdef CONFIG_HIGHPTE
1163 static inline void *kmap_atomic_pte(struct page *page, enum km_type type)
1164 {
1165         unsigned long ret;
1166         ret = PVOP_CALL2(unsigned long, pv_mmu_ops.kmap_atomic_pte, page, type);
1167         return (void *)ret;
1168 }
1169 #endif
1170
1171 static inline void pte_update(struct mm_struct *mm, unsigned long addr,
1172                               pte_t *ptep)
1173 {
1174         PVOP_VCALL3(pv_mmu_ops.pte_update, mm, addr, ptep);
1175 }
1176
1177 static inline void pte_update_defer(struct mm_struct *mm, unsigned long addr,
1178                                     pte_t *ptep)
1179 {
1180         PVOP_VCALL3(pv_mmu_ops.pte_update_defer, mm, addr, ptep);
1181 }
1182
1183 static inline pte_t __pte(pteval_t val)
1184 {
1185         pteval_t ret;
1186
1187         if (sizeof(pteval_t) > sizeof(long))
1188                 ret = PVOP_CALLEE2(pteval_t,
1189                                    pv_mmu_ops.make_pte,
1190                                    val, (u64)val >> 32);
1191         else
1192                 ret = PVOP_CALLEE1(pteval_t,
1193                                    pv_mmu_ops.make_pte,
1194                                    val);
1195
1196         return (pte_t) { .pte = ret };
1197 }
1198
1199 static inline pteval_t pte_val(pte_t pte)
1200 {
1201         pteval_t ret;
1202
1203         if (sizeof(pteval_t) > sizeof(long))
1204                 ret = PVOP_CALLEE2(pteval_t, pv_mmu_ops.pte_val,
1205                                    pte.pte, (u64)pte.pte >> 32);
1206         else
1207                 ret = PVOP_CALLEE1(pteval_t, pv_mmu_ops.pte_val,
1208                                    pte.pte);
1209
1210         return ret;
1211 }
1212
1213 static inline pgd_t __pgd(pgdval_t val)
1214 {
1215         pgdval_t ret;
1216
1217         if (sizeof(pgdval_t) > sizeof(long))
1218                 ret = PVOP_CALLEE2(pgdval_t, pv_mmu_ops.make_pgd,
1219                                    val, (u64)val >> 32);
1220         else
1221                 ret = PVOP_CALLEE1(pgdval_t, pv_mmu_ops.make_pgd,
1222                                    val);
1223
1224         return (pgd_t) { ret };
1225 }
1226
1227 static inline pgdval_t pgd_val(pgd_t pgd)
1228 {
1229         pgdval_t ret;
1230
1231         if (sizeof(pgdval_t) > sizeof(long))
1232                 ret =  PVOP_CALLEE2(pgdval_t, pv_mmu_ops.pgd_val,
1233                                     pgd.pgd, (u64)pgd.pgd >> 32);
1234         else
1235                 ret =  PVOP_CALLEE1(pgdval_t, pv_mmu_ops.pgd_val,
1236                                     pgd.pgd);
1237
1238         return ret;
1239 }
1240
1241 #define  __HAVE_ARCH_PTEP_MODIFY_PROT_TRANSACTION
1242 static inline pte_t ptep_modify_prot_start(struct mm_struct *mm, unsigned long addr,
1243                                            pte_t *ptep)
1244 {
1245         pteval_t ret;
1246
1247         ret = PVOP_CALL3(pteval_t, pv_mmu_ops.ptep_modify_prot_start,
1248                          mm, addr, ptep);
1249
1250         return (pte_t) { .pte = ret };
1251 }
1252
1253 static inline void ptep_modify_prot_commit(struct mm_struct *mm, unsigned long addr,
1254                                            pte_t *ptep, pte_t pte)
1255 {
1256         if (sizeof(pteval_t) > sizeof(long))
1257                 /* 5 arg words */
1258                 pv_mmu_ops.ptep_modify_prot_commit(mm, addr, ptep, pte);
1259         else
1260                 PVOP_VCALL4(pv_mmu_ops.ptep_modify_prot_commit,
1261                             mm, addr, ptep, pte.pte);
1262 }
1263
1264 static inline void set_pte(pte_t *ptep, pte_t pte)
1265 {
1266         if (sizeof(pteval_t) > sizeof(long))
1267                 PVOP_VCALL3(pv_mmu_ops.set_pte, ptep,
1268                             pte.pte, (u64)pte.pte >> 32);
1269         else
1270                 PVOP_VCALL2(pv_mmu_ops.set_pte, ptep,
1271                             pte.pte);
1272 }
1273
1274 static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,
1275                               pte_t *ptep, pte_t pte)
1276 {
1277         if (sizeof(pteval_t) > sizeof(long))
1278                 /* 5 arg words */
1279                 pv_mmu_ops.set_pte_at(mm, addr, ptep, pte);
1280         else
1281                 PVOP_VCALL4(pv_mmu_ops.set_pte_at, mm, addr, ptep, pte.pte);
1282 }
1283
1284 static inline void set_pmd(pmd_t *pmdp, pmd_t pmd)
1285 {
1286         pmdval_t val = native_pmd_val(pmd);
1287
1288         if (sizeof(pmdval_t) > sizeof(long))
1289                 PVOP_VCALL3(pv_mmu_ops.set_pmd, pmdp, val, (u64)val >> 32);
1290         else
1291                 PVOP_VCALL2(pv_mmu_ops.set_pmd, pmdp, val);
1292 }
1293
1294 #if PAGETABLE_LEVELS >= 3
1295 static inline pmd_t __pmd(pmdval_t val)
1296 {
1297         pmdval_t ret;
1298
1299         if (sizeof(pmdval_t) > sizeof(long))
1300                 ret = PVOP_CALLEE2(pmdval_t, pv_mmu_ops.make_pmd,
1301                                    val, (u64)val >> 32);
1302         else
1303                 ret = PVOP_CALLEE1(pmdval_t, pv_mmu_ops.make_pmd,
1304                                    val);
1305
1306         return (pmd_t) { ret };
1307 }
1308
1309 static inline pmdval_t pmd_val(pmd_t pmd)
1310 {
1311         pmdval_t ret;
1312
1313         if (sizeof(pmdval_t) > sizeof(long))
1314                 ret =  PVOP_CALLEE2(pmdval_t, pv_mmu_ops.pmd_val,
1315                                     pmd.pmd, (u64)pmd.pmd >> 32);
1316         else
1317                 ret =  PVOP_CALLEE1(pmdval_t, pv_mmu_ops.pmd_val,
1318                                     pmd.pmd);
1319
1320         return ret;
1321 }
1322
1323 static inline void set_pud(pud_t *pudp, pud_t pud)
1324 {
1325         pudval_t val = native_pud_val(pud);
1326
1327         if (sizeof(pudval_t) > sizeof(long))
1328                 PVOP_VCALL3(pv_mmu_ops.set_pud, pudp,
1329                             val, (u64)val >> 32);
1330         else
1331                 PVOP_VCALL2(pv_mmu_ops.set_pud, pudp,
1332                             val);
1333 }
1334 #if PAGETABLE_LEVELS == 4
1335 static inline pud_t __pud(pudval_t val)
1336 {
1337         pudval_t ret;
1338
1339         if (sizeof(pudval_t) > sizeof(long))
1340                 ret = PVOP_CALLEE2(pudval_t, pv_mmu_ops.make_pud,
1341                                    val, (u64)val >> 32);
1342         else
1343                 ret = PVOP_CALLEE1(pudval_t, pv_mmu_ops.make_pud,
1344                                    val);
1345
1346         return (pud_t) { ret };
1347 }
1348
1349 static inline pudval_t pud_val(pud_t pud)
1350 {
1351         pudval_t ret;
1352
1353         if (sizeof(pudval_t) > sizeof(long))
1354                 ret =  PVOP_CALLEE2(pudval_t, pv_mmu_ops.pud_val,
1355                                     pud.pud, (u64)pud.pud >> 32);
1356         else
1357                 ret =  PVOP_CALLEE1(pudval_t, pv_mmu_ops.pud_val,
1358                                     pud.pud);
1359
1360         return ret;
1361 }
1362
1363 static inline void set_pgd(pgd_t *pgdp, pgd_t pgd)
1364 {
1365         pgdval_t val = native_pgd_val(pgd);
1366
1367         if (sizeof(pgdval_t) > sizeof(long))
1368                 PVOP_VCALL3(pv_mmu_ops.set_pgd, pgdp,
1369                             val, (u64)val >> 32);
1370         else
1371                 PVOP_VCALL2(pv_mmu_ops.set_pgd, pgdp,
1372                             val);
1373 }
1374
1375 static inline void pgd_clear(pgd_t *pgdp)
1376 {
1377         set_pgd(pgdp, __pgd(0));
1378 }
1379
1380 static inline void pud_clear(pud_t *pudp)
1381 {
1382         set_pud(pudp, __pud(0));
1383 }
1384
1385 #endif  /* PAGETABLE_LEVELS == 4 */
1386
1387 #endif  /* PAGETABLE_LEVELS >= 3 */
1388
1389 #ifdef CONFIG_X86_PAE
1390 /* Special-case pte-setting operations for PAE, which can't update a
1391    64-bit pte atomically */
1392 static inline void set_pte_atomic(pte_t *ptep, pte_t pte)
1393 {
1394         PVOP_VCALL3(pv_mmu_ops.set_pte_atomic, ptep,
1395                     pte.pte, pte.pte >> 32);
1396 }
1397
1398 static inline void pte_clear(struct mm_struct *mm, unsigned long addr,
1399                              pte_t *ptep)
1400 {
1401         PVOP_VCALL3(pv_mmu_ops.pte_clear, mm, addr, ptep);
1402 }
1403
1404 static inline void pmd_clear(pmd_t *pmdp)
1405 {
1406         PVOP_VCALL1(pv_mmu_ops.pmd_clear, pmdp);
1407 }
1408 #else  /* !CONFIG_X86_PAE */
1409 static inline void set_pte_atomic(pte_t *ptep, pte_t pte)
1410 {
1411         set_pte(ptep, pte);
1412 }
1413
1414 static inline void pte_clear(struct mm_struct *mm, unsigned long addr,
1415                              pte_t *ptep)
1416 {
1417         set_pte_at(mm, addr, ptep, __pte(0));
1418 }
1419
1420 static inline void pmd_clear(pmd_t *pmdp)
1421 {
1422         set_pmd(pmdp, __pmd(0));
1423 }
1424 #endif  /* CONFIG_X86_PAE */
1425
1426 /* Lazy mode for batching updates / context switch */
1427 enum paravirt_lazy_mode {
1428         PARAVIRT_LAZY_NONE,
1429         PARAVIRT_LAZY_MMU,
1430         PARAVIRT_LAZY_CPU,
1431 };
1432
1433 enum paravirt_lazy_mode paravirt_get_lazy_mode(void);
1434 void paravirt_start_context_switch(struct task_struct *prev);
1435 void paravirt_end_context_switch(struct task_struct *next);
1436
1437 void paravirt_enter_lazy_mmu(void);
1438 void paravirt_leave_lazy_mmu(void);
1439
1440 #define  __HAVE_ARCH_START_CONTEXT_SWITCH
1441 static inline void arch_start_context_switch(struct task_struct *prev)
1442 {
1443         PVOP_VCALL1(pv_cpu_ops.start_context_switch, prev);
1444 }
1445
1446 static inline void arch_end_context_switch(struct task_struct *next)
1447 {
1448         PVOP_VCALL1(pv_cpu_ops.end_context_switch, next);
1449 }
1450
1451 #define  __HAVE_ARCH_ENTER_LAZY_MMU_MODE
1452 static inline void arch_enter_lazy_mmu_mode(void)
1453 {
1454         PVOP_VCALL0(pv_mmu_ops.lazy_mode.enter);
1455 }
1456
1457 static inline void arch_leave_lazy_mmu_mode(void)
1458 {
1459         PVOP_VCALL0(pv_mmu_ops.lazy_mode.leave);
1460 }
1461
1462 void arch_flush_lazy_mmu_mode(void);
1463
1464 static inline void __set_fixmap(unsigned /* enum fixed_addresses */ idx,
1465                                 phys_addr_t phys, pgprot_t flags)
1466 {
1467         pv_mmu_ops.set_fixmap(idx, phys, flags);
1468 }
1469
1470 void _paravirt_nop(void);
1471 u32 _paravirt_ident_32(u32);
1472 u64 _paravirt_ident_64(u64);
1473
1474 #define paravirt_nop    ((void *)_paravirt_nop)
1475
1476 #if defined(CONFIG_SMP) && defined(CONFIG_PARAVIRT_SPINLOCKS)
1477
1478 static inline int __raw_spin_is_locked(struct raw_spinlock *lock)
1479 {
1480         return PVOP_CALL1(int, pv_lock_ops.spin_is_locked, lock);
1481 }
1482
1483 static inline int __raw_spin_is_contended(struct raw_spinlock *lock)
1484 {
1485         return PVOP_CALL1(int, pv_lock_ops.spin_is_contended, lock);
1486 }
1487 #define __raw_spin_is_contended __raw_spin_is_contended
1488
1489 static __always_inline void __raw_spin_lock(struct raw_spinlock *lock)
1490 {
1491         PVOP_VCALL1(pv_lock_ops.spin_lock, lock);
1492 }
1493
1494 static __always_inline void __raw_spin_lock_flags(struct raw_spinlock *lock,
1495                                                   unsigned long flags)
1496 {
1497         PVOP_VCALL2(pv_lock_ops.spin_lock_flags, lock, flags);
1498 }
1499
1500 static __always_inline int __raw_spin_trylock(struct raw_spinlock *lock)
1501 {
1502         return PVOP_CALL1(int, pv_lock_ops.spin_trylock, lock);
1503 }
1504
1505 static __always_inline void __raw_spin_unlock(struct raw_spinlock *lock)
1506 {
1507         PVOP_VCALL1(pv_lock_ops.spin_unlock, lock);
1508 }
1509
1510 #endif
1511
1512 /* These all sit in the .parainstructions section to tell us what to patch. */
1513 struct paravirt_patch_site {
1514         u8 *instr;              /* original instructions */
1515         u8 instrtype;           /* type of this instruction */
1516         u8 len;                 /* length of original instruction */
1517         u16 clobbers;           /* what registers you may clobber */
1518 };
1519
1520 extern struct paravirt_patch_site __parainstructions[],
1521         __parainstructions_end[];
1522
1523 #ifdef CONFIG_X86_32
1524 #define PV_SAVE_REGS "pushl %ecx; pushl %edx;"
1525 #define PV_RESTORE_REGS "popl %edx; popl %ecx;"
1526
1527 /* save and restore all caller-save registers, except return value */
1528 #define PV_SAVE_ALL_CALLER_REGS         "pushl %ecx;"
1529 #define PV_RESTORE_ALL_CALLER_REGS      "popl  %ecx;"
1530
1531 #define PV_FLAGS_ARG "0"
1532 #define PV_EXTRA_CLOBBERS
1533 #define PV_VEXTRA_CLOBBERS
1534 #else
1535 /* save and restore all caller-save registers, except return value */
1536 #define PV_SAVE_ALL_CALLER_REGS                                         \
1537         "push %rcx;"                                                    \
1538         "push %rdx;"                                                    \
1539         "push %rsi;"                                                    \
1540         "push %rdi;"                                                    \
1541         "push %r8;"                                                     \
1542         "push %r9;"                                                     \
1543         "push %r10;"                                                    \
1544         "push %r11;"
1545 #define PV_RESTORE_ALL_CALLER_REGS                                      \
1546         "pop %r11;"                                                     \
1547         "pop %r10;"                                                     \
1548         "pop %r9;"                                                      \
1549         "pop %r8;"                                                      \
1550         "pop %rdi;"                                                     \
1551         "pop %rsi;"                                                     \
1552         "pop %rdx;"                                                     \
1553         "pop %rcx;"
1554
1555 /* We save some registers, but all of them, that's too much. We clobber all
1556  * caller saved registers but the argument parameter */
1557 #define PV_SAVE_REGS "pushq %%rdi;"
1558 #define PV_RESTORE_REGS "popq %%rdi;"
1559 #define PV_EXTRA_CLOBBERS EXTRA_CLOBBERS, "rcx" , "rdx", "rsi"
1560 #define PV_VEXTRA_CLOBBERS EXTRA_CLOBBERS, "rdi", "rcx" , "rdx", "rsi"
1561 #define PV_FLAGS_ARG "D"
1562 #endif
1563
1564 /*
1565  * Generate a thunk around a function which saves all caller-save
1566  * registers except for the return value.  This allows C functions to
1567  * be called from assembler code where fewer than normal registers are
1568  * available.  It may also help code generation around calls from C
1569  * code if the common case doesn't use many registers.
1570  *
1571  * When a callee is wrapped in a thunk, the caller can assume that all
1572  * arg regs and all scratch registers are preserved across the
1573  * call. The return value in rax/eax will not be saved, even for void
1574  * functions.
1575  */
1576 #define PV_CALLEE_SAVE_REGS_THUNK(func)                                 \
1577         extern typeof(func) __raw_callee_save_##func;                   \
1578         static void *__##func##__ __used = func;                        \
1579                                                                         \
1580         asm(".pushsection .text;"                                       \
1581             "__raw_callee_save_" #func ": "                             \
1582             PV_SAVE_ALL_CALLER_REGS                                     \
1583             "call " #func ";"                                           \
1584             PV_RESTORE_ALL_CALLER_REGS                                  \
1585             "ret;"                                                      \
1586             ".popsection")
1587
1588 /* Get a reference to a callee-save function */
1589 #define PV_CALLEE_SAVE(func)                                            \
1590         ((struct paravirt_callee_save) { __raw_callee_save_##func })
1591
1592 /* Promise that "func" already uses the right calling convention */
1593 #define __PV_IS_CALLEE_SAVE(func)                       \
1594         ((struct paravirt_callee_save) { func })
1595
1596 static inline unsigned long __raw_local_save_flags(void)
1597 {
1598         unsigned long f;
1599
1600         asm volatile(paravirt_alt(PARAVIRT_CALL)
1601                      : "=a"(f)
1602                      : paravirt_type(pv_irq_ops.save_fl),
1603                        paravirt_clobber(CLBR_EAX)
1604                      : "memory", "cc");
1605         return f;
1606 }
1607
1608 static inline void raw_local_irq_restore(unsigned long f)
1609 {
1610         asm volatile(paravirt_alt(PARAVIRT_CALL)
1611                      : "=a"(f)
1612                      : PV_FLAGS_ARG(f),
1613                        paravirt_type(pv_irq_ops.restore_fl),
1614                        paravirt_clobber(CLBR_EAX)
1615                      : "memory", "cc");
1616 }
1617
1618 static inline void raw_local_irq_disable(void)
1619 {
1620         asm volatile(paravirt_alt(PARAVIRT_CALL)
1621                      :
1622                      : paravirt_type(pv_irq_ops.irq_disable),
1623                        paravirt_clobber(CLBR_EAX)
1624                      : "memory", "eax", "cc");
1625 }
1626
1627 static inline void raw_local_irq_enable(void)
1628 {
1629         asm volatile(paravirt_alt(PARAVIRT_CALL)
1630                      :
1631                      : paravirt_type(pv_irq_ops.irq_enable),
1632                        paravirt_clobber(CLBR_EAX)
1633                      : "memory", "eax", "cc");
1634 }
1635
1636 static inline unsigned long __raw_local_irq_save(void)
1637 {
1638         unsigned long f;
1639
1640         f = __raw_local_save_flags();
1641         raw_local_irq_disable();
1642         return f;
1643 }
1644
1645
1646 /* Make sure as little as possible of this mess escapes. */
1647 #undef PARAVIRT_CALL
1648 #undef __PVOP_CALL
1649 #undef __PVOP_VCALL
1650 #undef PVOP_VCALL0
1651 #undef PVOP_CALL0
1652 #undef PVOP_VCALL1
1653 #undef PVOP_CALL1
1654 #undef PVOP_VCALL2
1655 #undef PVOP_CALL2
1656 #undef PVOP_VCALL3
1657 #undef PVOP_CALL3
1658 #undef PVOP_VCALL4
1659 #undef PVOP_CALL4
1660
1661 #else  /* __ASSEMBLY__ */
1662
1663 #define _PVSITE(ptype, clobbers, ops, word, algn)       \
1664 771:;                                           \
1665         ops;                                    \
1666 772:;                                           \
1667         .pushsection .parainstructions,"a";     \
1668          .align algn;                           \
1669          word 771b;                             \
1670          .byte ptype;                           \
1671          .byte 772b-771b;                       \
1672          .short clobbers;                       \
1673         .popsection
1674
1675
1676 #define COND_PUSH(set, mask, reg)                       \
1677         .if ((~(set)) & mask); push %reg; .endif
1678 #define COND_POP(set, mask, reg)                        \
1679         .if ((~(set)) & mask); pop %reg; .endif
1680
1681 #ifdef CONFIG_X86_64
1682
1683 #define PV_SAVE_REGS(set)                       \
1684         COND_PUSH(set, CLBR_RAX, rax);          \
1685         COND_PUSH(set, CLBR_RCX, rcx);          \
1686         COND_PUSH(set, CLBR_RDX, rdx);          \
1687         COND_PUSH(set, CLBR_RSI, rsi);          \
1688         COND_PUSH(set, CLBR_RDI, rdi);          \
1689         COND_PUSH(set, CLBR_R8, r8);            \
1690         COND_PUSH(set, CLBR_R9, r9);            \
1691         COND_PUSH(set, CLBR_R10, r10);          \
1692         COND_PUSH(set, CLBR_R11, r11)
1693 #define PV_RESTORE_REGS(set)                    \
1694         COND_POP(set, CLBR_R11, r11);           \
1695         COND_POP(set, CLBR_R10, r10);           \
1696         COND_POP(set, CLBR_R9, r9);             \
1697         COND_POP(set, CLBR_R8, r8);             \
1698         COND_POP(set, CLBR_RDI, rdi);           \
1699         COND_POP(set, CLBR_RSI, rsi);           \
1700         COND_POP(set, CLBR_RDX, rdx);           \
1701         COND_POP(set, CLBR_RCX, rcx);           \
1702         COND_POP(set, CLBR_RAX, rax)
1703
1704 #define PARA_PATCH(struct, off)        ((PARAVIRT_PATCH_##struct + (off)) / 8)
1705 #define PARA_SITE(ptype, clobbers, ops) _PVSITE(ptype, clobbers, ops, .quad, 8)
1706 #define PARA_INDIRECT(addr)     *addr(%rip)
1707 #else
1708 #define PV_SAVE_REGS(set)                       \
1709         COND_PUSH(set, CLBR_EAX, eax);          \
1710         COND_PUSH(set, CLBR_EDI, edi);          \
1711         COND_PUSH(set, CLBR_ECX, ecx);          \
1712         COND_PUSH(set, CLBR_EDX, edx)
1713 #define PV_RESTORE_REGS(set)                    \
1714         COND_POP(set, CLBR_EDX, edx);           \
1715         COND_POP(set, CLBR_ECX, ecx);           \
1716         COND_POP(set, CLBR_EDI, edi);           \
1717         COND_POP(set, CLBR_EAX, eax)
1718
1719 #define PARA_PATCH(struct, off)        ((PARAVIRT_PATCH_##struct + (off)) / 4)
1720 #define PARA_SITE(ptype, clobbers, ops) _PVSITE(ptype, clobbers, ops, .long, 4)
1721 #define PARA_INDIRECT(addr)     *%cs:addr
1722 #endif
1723
1724 #define INTERRUPT_RETURN                                                \
1725         PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_iret), CLBR_NONE,       \
1726                   jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_iret))
1727
1728 #define DISABLE_INTERRUPTS(clobbers)                                    \
1729         PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_irq_disable), clobbers, \
1730                   PV_SAVE_REGS(clobbers | CLBR_CALLEE_SAVE);            \
1731                   call PARA_INDIRECT(pv_irq_ops+PV_IRQ_irq_disable);    \
1732                   PV_RESTORE_REGS(clobbers | CLBR_CALLEE_SAVE);)
1733
1734 #define ENABLE_INTERRUPTS(clobbers)                                     \
1735         PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_irq_enable), clobbers,  \
1736                   PV_SAVE_REGS(clobbers | CLBR_CALLEE_SAVE);            \
1737                   call PARA_INDIRECT(pv_irq_ops+PV_IRQ_irq_enable);     \
1738                   PV_RESTORE_REGS(clobbers | CLBR_CALLEE_SAVE);)
1739
1740 #define USERGS_SYSRET32                                                 \
1741         PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_usergs_sysret32),       \
1742                   CLBR_NONE,                                            \
1743                   jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_usergs_sysret32))
1744
1745 #ifdef CONFIG_X86_32
1746 #define GET_CR0_INTO_EAX                                \
1747         push %ecx; push %edx;                           \
1748         call PARA_INDIRECT(pv_cpu_ops+PV_CPU_read_cr0); \
1749         pop %edx; pop %ecx
1750
1751 #define ENABLE_INTERRUPTS_SYSEXIT                                       \
1752         PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_irq_enable_sysexit),    \
1753                   CLBR_NONE,                                            \
1754                   jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_irq_enable_sysexit))
1755
1756
1757 #else   /* !CONFIG_X86_32 */
1758
1759 /*
1760  * If swapgs is used while the userspace stack is still current,
1761  * there's no way to call a pvop.  The PV replacement *must* be
1762  * inlined, or the swapgs instruction must be trapped and emulated.
1763  */
1764 #define SWAPGS_UNSAFE_STACK                                             \
1765         PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_swapgs), CLBR_NONE,     \
1766                   swapgs)
1767
1768 /*
1769  * Note: swapgs is very special, and in practise is either going to be
1770  * implemented with a single "swapgs" instruction or something very
1771  * special.  Either way, we don't need to save any registers for
1772  * it.
1773  */
1774 #define SWAPGS                                                          \
1775         PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_swapgs), CLBR_NONE,     \
1776                   call PARA_INDIRECT(pv_cpu_ops+PV_CPU_swapgs)          \
1777                  )
1778
1779 #define GET_CR2_INTO_RCX                                \
1780         call PARA_INDIRECT(pv_mmu_ops+PV_MMU_read_cr2); \
1781         movq %rax, %rcx;                                \
1782         xorq %rax, %rax;
1783
1784 #define PARAVIRT_ADJUST_EXCEPTION_FRAME                                 \
1785         PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_adjust_exception_frame), \
1786                   CLBR_NONE,                                            \
1787                   call PARA_INDIRECT(pv_irq_ops+PV_IRQ_adjust_exception_frame))
1788
1789 #define USERGS_SYSRET64                                                 \
1790         PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_usergs_sysret64),       \
1791                   CLBR_NONE,                                            \
1792                   jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_usergs_sysret64))
1793
1794 #define ENABLE_INTERRUPTS_SYSEXIT32                                     \
1795         PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_irq_enable_sysexit),    \
1796                   CLBR_NONE,                                            \
1797                   jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_irq_enable_sysexit))
1798 #endif  /* CONFIG_X86_32 */
1799
1800 #endif /* __ASSEMBLY__ */
1801 #endif /* CONFIG_PARAVIRT */
1802 #endif /* _ASM_X86_PARAVIRT_H */