1 #ifndef _ASM_X86_PARAVIRT_H
2 #define _ASM_X86_PARAVIRT_H
3 /* Various instructions on x86 need to be replaced for
4 * para-virtualization: those hooks are defined here. */
7 #include <asm/pgtable_types.h>
10 #include <asm/paravirt_types.h>
13 #include <linux/bug.h>
14 #include <linux/types.h>
15 #include <linux/cpumask.h>
17 static inline int paravirt_enabled(void)
19 return pv_info.paravirt_enabled;
22 static inline void load_sp0(struct tss_struct *tss,
23 struct thread_struct *thread)
25 PVOP_VCALL2(pv_cpu_ops.load_sp0, tss, thread);
28 /* The paravirtualized CPUID instruction. */
29 static inline void __cpuid(unsigned int *eax, unsigned int *ebx,
30 unsigned int *ecx, unsigned int *edx)
32 PVOP_VCALL4(pv_cpu_ops.cpuid, eax, ebx, ecx, edx);
36 * These special macros can be used to get or set a debugging register
38 static inline unsigned long paravirt_get_debugreg(int reg)
40 return PVOP_CALL1(unsigned long, pv_cpu_ops.get_debugreg, reg);
42 #define get_debugreg(var, reg) var = paravirt_get_debugreg(reg)
43 static inline void set_debugreg(unsigned long val, int reg)
45 PVOP_VCALL2(pv_cpu_ops.set_debugreg, reg, val);
48 static inline void clts(void)
50 PVOP_VCALL0(pv_cpu_ops.clts);
53 static inline unsigned long read_cr0(void)
55 return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr0);
58 static inline void write_cr0(unsigned long x)
60 PVOP_VCALL1(pv_cpu_ops.write_cr0, x);
63 static inline unsigned long read_cr2(void)
65 return PVOP_CALL0(unsigned long, pv_mmu_ops.read_cr2);
68 static inline void write_cr2(unsigned long x)
70 PVOP_VCALL1(pv_mmu_ops.write_cr2, x);
73 static inline unsigned long read_cr3(void)
75 return PVOP_CALL0(unsigned long, pv_mmu_ops.read_cr3);
78 static inline void write_cr3(unsigned long x)
80 PVOP_VCALL1(pv_mmu_ops.write_cr3, x);
83 static inline unsigned long read_cr4(void)
85 return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr4);
87 static inline unsigned long read_cr4_safe(void)
89 return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr4_safe);
92 static inline void write_cr4(unsigned long x)
94 PVOP_VCALL1(pv_cpu_ops.write_cr4, x);
98 static inline unsigned long read_cr8(void)
100 return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr8);
103 static inline void write_cr8(unsigned long x)
105 PVOP_VCALL1(pv_cpu_ops.write_cr8, x);
109 static inline void arch_safe_halt(void)
111 PVOP_VCALL0(pv_irq_ops.safe_halt);
114 static inline void halt(void)
116 PVOP_VCALL0(pv_irq_ops.halt);
119 static inline void wbinvd(void)
121 PVOP_VCALL0(pv_cpu_ops.wbinvd);
124 #define get_kernel_rpl() (pv_info.kernel_rpl)
126 static inline u64 paravirt_read_msr(unsigned msr, int *err)
128 return PVOP_CALL2(u64, pv_cpu_ops.read_msr, msr, err);
131 static inline int paravirt_write_msr(unsigned msr, unsigned low, unsigned high)
133 return PVOP_CALL3(int, pv_cpu_ops.write_msr, msr, low, high);
136 /* These should all do BUG_ON(_err), but our headers are too tangled. */
137 #define rdmsr(msr, val1, val2) \
140 u64 _l = paravirt_read_msr(msr, &_err); \
145 #define wrmsr(msr, val1, val2) \
147 paravirt_write_msr(msr, val1, val2); \
150 #define rdmsrl(msr, val) \
153 val = paravirt_read_msr(msr, &_err); \
156 #define wrmsrl(msr, val) wrmsr(msr, (u32)((u64)(val)), ((u64)(val))>>32)
157 #define wrmsr_safe(msr, a, b) paravirt_write_msr(msr, a, b)
159 /* rdmsr with exception handling */
160 #define rdmsr_safe(msr, a, b) \
163 u64 _l = paravirt_read_msr(msr, &_err); \
169 static inline int rdmsrl_safe(unsigned msr, unsigned long long *p)
173 *p = paravirt_read_msr(msr, &err);
177 static inline u64 paravirt_read_tsc(void)
179 return PVOP_CALL0(u64, pv_cpu_ops.read_tsc);
182 #define rdtscl(low) \
184 u64 _l = paravirt_read_tsc(); \
188 #define rdtscll(val) (val = paravirt_read_tsc())
190 static inline unsigned long long paravirt_sched_clock(void)
192 return PVOP_CALL0(unsigned long long, pv_time_ops.sched_clock);
196 extern struct static_key paravirt_steal_enabled;
197 extern struct static_key paravirt_steal_rq_enabled;
199 static inline u64 paravirt_steal_clock(int cpu)
201 return PVOP_CALL1(u64, pv_time_ops.steal_clock, cpu);
204 static inline unsigned long long paravirt_read_pmc(int counter)
206 return PVOP_CALL1(u64, pv_cpu_ops.read_pmc, counter);
209 #define rdpmc(counter, low, high) \
211 u64 _l = paravirt_read_pmc(counter); \
216 #define rdpmcl(counter, val) ((val) = paravirt_read_pmc(counter))
218 static inline unsigned long long paravirt_rdtscp(unsigned int *aux)
220 return PVOP_CALL1(u64, pv_cpu_ops.read_tscp, aux);
223 #define rdtscp(low, high, aux) \
226 unsigned long __val = paravirt_rdtscp(&__aux); \
227 (low) = (u32)__val; \
228 (high) = (u32)(__val >> 32); \
232 #define rdtscpll(val, aux) \
234 unsigned long __aux; \
235 val = paravirt_rdtscp(&__aux); \
239 static inline void paravirt_alloc_ldt(struct desc_struct *ldt, unsigned entries)
241 PVOP_VCALL2(pv_cpu_ops.alloc_ldt, ldt, entries);
244 static inline void paravirt_free_ldt(struct desc_struct *ldt, unsigned entries)
246 PVOP_VCALL2(pv_cpu_ops.free_ldt, ldt, entries);
249 static inline void load_TR_desc(void)
251 PVOP_VCALL0(pv_cpu_ops.load_tr_desc);
253 static inline void load_gdt(const struct desc_ptr *dtr)
255 PVOP_VCALL1(pv_cpu_ops.load_gdt, dtr);
257 static inline void load_idt(const struct desc_ptr *dtr)
259 PVOP_VCALL1(pv_cpu_ops.load_idt, dtr);
261 static inline void set_ldt(const void *addr, unsigned entries)
263 PVOP_VCALL2(pv_cpu_ops.set_ldt, addr, entries);
265 static inline void store_gdt(struct desc_ptr *dtr)
267 PVOP_VCALL1(pv_cpu_ops.store_gdt, dtr);
269 static inline void store_idt(struct desc_ptr *dtr)
271 PVOP_VCALL1(pv_cpu_ops.store_idt, dtr);
273 static inline unsigned long paravirt_store_tr(void)
275 return PVOP_CALL0(unsigned long, pv_cpu_ops.store_tr);
277 #define store_tr(tr) ((tr) = paravirt_store_tr())
278 static inline void load_TLS(struct thread_struct *t, unsigned cpu)
280 PVOP_VCALL2(pv_cpu_ops.load_tls, t, cpu);
284 static inline void load_gs_index(unsigned int gs)
286 PVOP_VCALL1(pv_cpu_ops.load_gs_index, gs);
290 static inline void write_ldt_entry(struct desc_struct *dt, int entry,
293 PVOP_VCALL3(pv_cpu_ops.write_ldt_entry, dt, entry, desc);
296 static inline void write_gdt_entry(struct desc_struct *dt, int entry,
297 void *desc, int type)
299 PVOP_VCALL4(pv_cpu_ops.write_gdt_entry, dt, entry, desc, type);
302 static inline void write_idt_entry(gate_desc *dt, int entry, const gate_desc *g)
304 PVOP_VCALL3(pv_cpu_ops.write_idt_entry, dt, entry, g);
306 static inline void set_iopl_mask(unsigned mask)
308 PVOP_VCALL1(pv_cpu_ops.set_iopl_mask, mask);
311 /* The paravirtualized I/O functions */
312 static inline void slow_down_io(void)
314 pv_cpu_ops.io_delay();
315 #ifdef REALLY_SLOW_IO
316 pv_cpu_ops.io_delay();
317 pv_cpu_ops.io_delay();
318 pv_cpu_ops.io_delay();
323 static inline void startup_ipi_hook(int phys_apicid, unsigned long start_eip,
324 unsigned long start_esp)
326 PVOP_VCALL3(pv_apic_ops.startup_ipi_hook,
327 phys_apicid, start_eip, start_esp);
331 static inline void paravirt_activate_mm(struct mm_struct *prev,
332 struct mm_struct *next)
334 PVOP_VCALL2(pv_mmu_ops.activate_mm, prev, next);
337 static inline void arch_dup_mmap(struct mm_struct *oldmm,
338 struct mm_struct *mm)
340 PVOP_VCALL2(pv_mmu_ops.dup_mmap, oldmm, mm);
343 static inline void arch_exit_mmap(struct mm_struct *mm)
345 PVOP_VCALL1(pv_mmu_ops.exit_mmap, mm);
348 static inline void __flush_tlb(void)
350 PVOP_VCALL0(pv_mmu_ops.flush_tlb_user);
352 static inline void __flush_tlb_global(void)
354 PVOP_VCALL0(pv_mmu_ops.flush_tlb_kernel);
356 static inline void __flush_tlb_single(unsigned long addr)
358 PVOP_VCALL1(pv_mmu_ops.flush_tlb_single, addr);
361 static inline void flush_tlb_others(const struct cpumask *cpumask,
362 struct mm_struct *mm,
365 PVOP_VCALL3(pv_mmu_ops.flush_tlb_others, cpumask, mm, va);
368 static inline int paravirt_pgd_alloc(struct mm_struct *mm)
370 return PVOP_CALL1(int, pv_mmu_ops.pgd_alloc, mm);
373 static inline void paravirt_pgd_free(struct mm_struct *mm, pgd_t *pgd)
375 PVOP_VCALL2(pv_mmu_ops.pgd_free, mm, pgd);
378 static inline void paravirt_alloc_pte(struct mm_struct *mm, unsigned long pfn)
380 PVOP_VCALL2(pv_mmu_ops.alloc_pte, mm, pfn);
382 static inline void paravirt_release_pte(unsigned long pfn)
384 PVOP_VCALL1(pv_mmu_ops.release_pte, pfn);
387 static inline void paravirt_alloc_pmd(struct mm_struct *mm, unsigned long pfn)
389 PVOP_VCALL2(pv_mmu_ops.alloc_pmd, mm, pfn);
392 static inline void paravirt_release_pmd(unsigned long pfn)
394 PVOP_VCALL1(pv_mmu_ops.release_pmd, pfn);
397 static inline void paravirt_alloc_pud(struct mm_struct *mm, unsigned long pfn)
399 PVOP_VCALL2(pv_mmu_ops.alloc_pud, mm, pfn);
401 static inline void paravirt_release_pud(unsigned long pfn)
403 PVOP_VCALL1(pv_mmu_ops.release_pud, pfn);
406 static inline void pte_update(struct mm_struct *mm, unsigned long addr,
409 PVOP_VCALL3(pv_mmu_ops.pte_update, mm, addr, ptep);
411 static inline void pmd_update(struct mm_struct *mm, unsigned long addr,
414 PVOP_VCALL3(pv_mmu_ops.pmd_update, mm, addr, pmdp);
417 static inline void pte_update_defer(struct mm_struct *mm, unsigned long addr,
420 PVOP_VCALL3(pv_mmu_ops.pte_update_defer, mm, addr, ptep);
423 static inline void pmd_update_defer(struct mm_struct *mm, unsigned long addr,
426 PVOP_VCALL3(pv_mmu_ops.pmd_update_defer, mm, addr, pmdp);
429 static inline pte_t __pte(pteval_t val)
433 if (sizeof(pteval_t) > sizeof(long))
434 ret = PVOP_CALLEE2(pteval_t,
436 val, (u64)val >> 32);
438 ret = PVOP_CALLEE1(pteval_t,
442 return (pte_t) { .pte = ret };
445 static inline pteval_t pte_val(pte_t pte)
449 if (sizeof(pteval_t) > sizeof(long))
450 ret = PVOP_CALLEE2(pteval_t, pv_mmu_ops.pte_val,
451 pte.pte, (u64)pte.pte >> 32);
453 ret = PVOP_CALLEE1(pteval_t, pv_mmu_ops.pte_val,
459 static inline pgd_t __pgd(pgdval_t val)
463 if (sizeof(pgdval_t) > sizeof(long))
464 ret = PVOP_CALLEE2(pgdval_t, pv_mmu_ops.make_pgd,
465 val, (u64)val >> 32);
467 ret = PVOP_CALLEE1(pgdval_t, pv_mmu_ops.make_pgd,
470 return (pgd_t) { ret };
473 static inline pgdval_t pgd_val(pgd_t pgd)
477 if (sizeof(pgdval_t) > sizeof(long))
478 ret = PVOP_CALLEE2(pgdval_t, pv_mmu_ops.pgd_val,
479 pgd.pgd, (u64)pgd.pgd >> 32);
481 ret = PVOP_CALLEE1(pgdval_t, pv_mmu_ops.pgd_val,
487 #define __HAVE_ARCH_PTEP_MODIFY_PROT_TRANSACTION
488 static inline pte_t ptep_modify_prot_start(struct mm_struct *mm, unsigned long addr,
493 ret = PVOP_CALL3(pteval_t, pv_mmu_ops.ptep_modify_prot_start,
496 return (pte_t) { .pte = ret };
499 static inline void ptep_modify_prot_commit(struct mm_struct *mm, unsigned long addr,
500 pte_t *ptep, pte_t pte)
502 if (sizeof(pteval_t) > sizeof(long))
504 pv_mmu_ops.ptep_modify_prot_commit(mm, addr, ptep, pte);
506 PVOP_VCALL4(pv_mmu_ops.ptep_modify_prot_commit,
507 mm, addr, ptep, pte.pte);
510 static inline void set_pte(pte_t *ptep, pte_t pte)
512 if (sizeof(pteval_t) > sizeof(long))
513 PVOP_VCALL3(pv_mmu_ops.set_pte, ptep,
514 pte.pte, (u64)pte.pte >> 32);
516 PVOP_VCALL2(pv_mmu_ops.set_pte, ptep,
520 static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,
521 pte_t *ptep, pte_t pte)
523 if (sizeof(pteval_t) > sizeof(long))
525 pv_mmu_ops.set_pte_at(mm, addr, ptep, pte);
527 PVOP_VCALL4(pv_mmu_ops.set_pte_at, mm, addr, ptep, pte.pte);
530 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
531 static inline void set_pmd_at(struct mm_struct *mm, unsigned long addr,
532 pmd_t *pmdp, pmd_t pmd)
534 if (sizeof(pmdval_t) > sizeof(long))
536 pv_mmu_ops.set_pmd_at(mm, addr, pmdp, pmd);
538 PVOP_VCALL4(pv_mmu_ops.set_pmd_at, mm, addr, pmdp,
539 native_pmd_val(pmd));
543 static inline void set_pmd(pmd_t *pmdp, pmd_t pmd)
545 pmdval_t val = native_pmd_val(pmd);
547 if (sizeof(pmdval_t) > sizeof(long))
548 PVOP_VCALL3(pv_mmu_ops.set_pmd, pmdp, val, (u64)val >> 32);
550 PVOP_VCALL2(pv_mmu_ops.set_pmd, pmdp, val);
553 #if PAGETABLE_LEVELS >= 3
554 static inline pmd_t __pmd(pmdval_t val)
558 if (sizeof(pmdval_t) > sizeof(long))
559 ret = PVOP_CALLEE2(pmdval_t, pv_mmu_ops.make_pmd,
560 val, (u64)val >> 32);
562 ret = PVOP_CALLEE1(pmdval_t, pv_mmu_ops.make_pmd,
565 return (pmd_t) { ret };
568 static inline pmdval_t pmd_val(pmd_t pmd)
572 if (sizeof(pmdval_t) > sizeof(long))
573 ret = PVOP_CALLEE2(pmdval_t, pv_mmu_ops.pmd_val,
574 pmd.pmd, (u64)pmd.pmd >> 32);
576 ret = PVOP_CALLEE1(pmdval_t, pv_mmu_ops.pmd_val,
582 static inline void set_pud(pud_t *pudp, pud_t pud)
584 pudval_t val = native_pud_val(pud);
586 if (sizeof(pudval_t) > sizeof(long))
587 PVOP_VCALL3(pv_mmu_ops.set_pud, pudp,
588 val, (u64)val >> 32);
590 PVOP_VCALL2(pv_mmu_ops.set_pud, pudp,
593 #if PAGETABLE_LEVELS == 4
594 static inline pud_t __pud(pudval_t val)
598 if (sizeof(pudval_t) > sizeof(long))
599 ret = PVOP_CALLEE2(pudval_t, pv_mmu_ops.make_pud,
600 val, (u64)val >> 32);
602 ret = PVOP_CALLEE1(pudval_t, pv_mmu_ops.make_pud,
605 return (pud_t) { ret };
608 static inline pudval_t pud_val(pud_t pud)
612 if (sizeof(pudval_t) > sizeof(long))
613 ret = PVOP_CALLEE2(pudval_t, pv_mmu_ops.pud_val,
614 pud.pud, (u64)pud.pud >> 32);
616 ret = PVOP_CALLEE1(pudval_t, pv_mmu_ops.pud_val,
622 static inline void set_pgd(pgd_t *pgdp, pgd_t pgd)
624 pgdval_t val = native_pgd_val(pgd);
626 if (sizeof(pgdval_t) > sizeof(long))
627 PVOP_VCALL3(pv_mmu_ops.set_pgd, pgdp,
628 val, (u64)val >> 32);
630 PVOP_VCALL2(pv_mmu_ops.set_pgd, pgdp,
634 static inline void pgd_clear(pgd_t *pgdp)
636 set_pgd(pgdp, __pgd(0));
639 static inline void pud_clear(pud_t *pudp)
641 set_pud(pudp, __pud(0));
644 #endif /* PAGETABLE_LEVELS == 4 */
646 #endif /* PAGETABLE_LEVELS >= 3 */
648 #ifdef CONFIG_X86_PAE
649 /* Special-case pte-setting operations for PAE, which can't update a
650 64-bit pte atomically */
651 static inline void set_pte_atomic(pte_t *ptep, pte_t pte)
653 PVOP_VCALL3(pv_mmu_ops.set_pte_atomic, ptep,
654 pte.pte, pte.pte >> 32);
657 static inline void pte_clear(struct mm_struct *mm, unsigned long addr,
660 PVOP_VCALL3(pv_mmu_ops.pte_clear, mm, addr, ptep);
663 static inline void pmd_clear(pmd_t *pmdp)
665 PVOP_VCALL1(pv_mmu_ops.pmd_clear, pmdp);
667 #else /* !CONFIG_X86_PAE */
668 static inline void set_pte_atomic(pte_t *ptep, pte_t pte)
673 static inline void pte_clear(struct mm_struct *mm, unsigned long addr,
676 set_pte_at(mm, addr, ptep, __pte(0));
679 static inline void pmd_clear(pmd_t *pmdp)
681 set_pmd(pmdp, __pmd(0));
683 #endif /* CONFIG_X86_PAE */
685 #define __HAVE_ARCH_START_CONTEXT_SWITCH
686 static inline void arch_start_context_switch(struct task_struct *prev)
688 PVOP_VCALL1(pv_cpu_ops.start_context_switch, prev);
691 static inline void arch_end_context_switch(struct task_struct *next)
693 PVOP_VCALL1(pv_cpu_ops.end_context_switch, next);
696 #define __HAVE_ARCH_ENTER_LAZY_MMU_MODE
697 static inline void arch_enter_lazy_mmu_mode(void)
699 PVOP_VCALL0(pv_mmu_ops.lazy_mode.enter);
702 static inline void arch_leave_lazy_mmu_mode(void)
704 PVOP_VCALL0(pv_mmu_ops.lazy_mode.leave);
707 void arch_flush_lazy_mmu_mode(void);
709 static inline void __set_fixmap(unsigned /* enum fixed_addresses */ idx,
710 phys_addr_t phys, pgprot_t flags)
712 pv_mmu_ops.set_fixmap(idx, phys, flags);
715 #if defined(CONFIG_SMP) && defined(CONFIG_PARAVIRT_SPINLOCKS)
717 static inline int arch_spin_is_locked(struct arch_spinlock *lock)
719 return PVOP_CALL1(int, pv_lock_ops.spin_is_locked, lock);
722 static inline int arch_spin_is_contended(struct arch_spinlock *lock)
724 return PVOP_CALL1(int, pv_lock_ops.spin_is_contended, lock);
726 #define arch_spin_is_contended arch_spin_is_contended
728 static __always_inline void arch_spin_lock(struct arch_spinlock *lock)
730 PVOP_VCALL1(pv_lock_ops.spin_lock, lock);
733 static __always_inline void arch_spin_lock_flags(struct arch_spinlock *lock,
736 PVOP_VCALL2(pv_lock_ops.spin_lock_flags, lock, flags);
739 static __always_inline int arch_spin_trylock(struct arch_spinlock *lock)
741 return PVOP_CALL1(int, pv_lock_ops.spin_trylock, lock);
744 static __always_inline void arch_spin_unlock(struct arch_spinlock *lock)
746 PVOP_VCALL1(pv_lock_ops.spin_unlock, lock);
752 #define PV_SAVE_REGS "pushl %ecx; pushl %edx;"
753 #define PV_RESTORE_REGS "popl %edx; popl %ecx;"
755 /* save and restore all caller-save registers, except return value */
756 #define PV_SAVE_ALL_CALLER_REGS "pushl %ecx;"
757 #define PV_RESTORE_ALL_CALLER_REGS "popl %ecx;"
759 #define PV_FLAGS_ARG "0"
760 #define PV_EXTRA_CLOBBERS
761 #define PV_VEXTRA_CLOBBERS
763 /* save and restore all caller-save registers, except return value */
764 #define PV_SAVE_ALL_CALLER_REGS \
773 #define PV_RESTORE_ALL_CALLER_REGS \
783 /* We save some registers, but all of them, that's too much. We clobber all
784 * caller saved registers but the argument parameter */
785 #define PV_SAVE_REGS "pushq %%rdi;"
786 #define PV_RESTORE_REGS "popq %%rdi;"
787 #define PV_EXTRA_CLOBBERS EXTRA_CLOBBERS, "rcx" , "rdx", "rsi"
788 #define PV_VEXTRA_CLOBBERS EXTRA_CLOBBERS, "rdi", "rcx" , "rdx", "rsi"
789 #define PV_FLAGS_ARG "D"
793 * Generate a thunk around a function which saves all caller-save
794 * registers except for the return value. This allows C functions to
795 * be called from assembler code where fewer than normal registers are
796 * available. It may also help code generation around calls from C
797 * code if the common case doesn't use many registers.
799 * When a callee is wrapped in a thunk, the caller can assume that all
800 * arg regs and all scratch registers are preserved across the
801 * call. The return value in rax/eax will not be saved, even for void
804 #define PV_CALLEE_SAVE_REGS_THUNK(func) \
805 extern typeof(func) __raw_callee_save_##func; \
806 static void *__##func##__ __used = func; \
808 asm(".pushsection .text;" \
809 "__raw_callee_save_" #func ": " \
810 PV_SAVE_ALL_CALLER_REGS \
812 PV_RESTORE_ALL_CALLER_REGS \
816 /* Get a reference to a callee-save function */
817 #define PV_CALLEE_SAVE(func) \
818 ((struct paravirt_callee_save) { __raw_callee_save_##func })
820 /* Promise that "func" already uses the right calling convention */
821 #define __PV_IS_CALLEE_SAVE(func) \
822 ((struct paravirt_callee_save) { func })
824 static inline notrace unsigned long arch_local_save_flags(void)
826 return PVOP_CALLEE0(unsigned long, pv_irq_ops.save_fl);
829 static inline notrace void arch_local_irq_restore(unsigned long f)
831 PVOP_VCALLEE1(pv_irq_ops.restore_fl, f);
834 static inline notrace void arch_local_irq_disable(void)
836 PVOP_VCALLEE0(pv_irq_ops.irq_disable);
839 static inline notrace void arch_local_irq_enable(void)
841 PVOP_VCALLEE0(pv_irq_ops.irq_enable);
844 static inline notrace unsigned long arch_local_irq_save(void)
848 f = arch_local_save_flags();
849 arch_local_irq_disable();
854 /* Make sure as little as possible of this mess escapes. */
869 extern void default_banner(void);
871 #else /* __ASSEMBLY__ */
873 #define _PVSITE(ptype, clobbers, ops, word, algn) \
877 .pushsection .parainstructions,"a"; \
886 #define COND_PUSH(set, mask, reg) \
887 .if ((~(set)) & mask); push %reg; .endif
888 #define COND_POP(set, mask, reg) \
889 .if ((~(set)) & mask); pop %reg; .endif
893 #define PV_SAVE_REGS(set) \
894 COND_PUSH(set, CLBR_RAX, rax); \
895 COND_PUSH(set, CLBR_RCX, rcx); \
896 COND_PUSH(set, CLBR_RDX, rdx); \
897 COND_PUSH(set, CLBR_RSI, rsi); \
898 COND_PUSH(set, CLBR_RDI, rdi); \
899 COND_PUSH(set, CLBR_R8, r8); \
900 COND_PUSH(set, CLBR_R9, r9); \
901 COND_PUSH(set, CLBR_R10, r10); \
902 COND_PUSH(set, CLBR_R11, r11)
903 #define PV_RESTORE_REGS(set) \
904 COND_POP(set, CLBR_R11, r11); \
905 COND_POP(set, CLBR_R10, r10); \
906 COND_POP(set, CLBR_R9, r9); \
907 COND_POP(set, CLBR_R8, r8); \
908 COND_POP(set, CLBR_RDI, rdi); \
909 COND_POP(set, CLBR_RSI, rsi); \
910 COND_POP(set, CLBR_RDX, rdx); \
911 COND_POP(set, CLBR_RCX, rcx); \
912 COND_POP(set, CLBR_RAX, rax)
914 #define PARA_PATCH(struct, off) ((PARAVIRT_PATCH_##struct + (off)) / 8)
915 #define PARA_SITE(ptype, clobbers, ops) _PVSITE(ptype, clobbers, ops, .quad, 8)
916 #define PARA_INDIRECT(addr) *addr(%rip)
918 #define PV_SAVE_REGS(set) \
919 COND_PUSH(set, CLBR_EAX, eax); \
920 COND_PUSH(set, CLBR_EDI, edi); \
921 COND_PUSH(set, CLBR_ECX, ecx); \
922 COND_PUSH(set, CLBR_EDX, edx)
923 #define PV_RESTORE_REGS(set) \
924 COND_POP(set, CLBR_EDX, edx); \
925 COND_POP(set, CLBR_ECX, ecx); \
926 COND_POP(set, CLBR_EDI, edi); \
927 COND_POP(set, CLBR_EAX, eax)
929 #define PARA_PATCH(struct, off) ((PARAVIRT_PATCH_##struct + (off)) / 4)
930 #define PARA_SITE(ptype, clobbers, ops) _PVSITE(ptype, clobbers, ops, .long, 4)
931 #define PARA_INDIRECT(addr) *%cs:addr
934 #define INTERRUPT_RETURN \
935 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_iret), CLBR_NONE, \
936 jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_iret))
938 #define DISABLE_INTERRUPTS(clobbers) \
939 PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_irq_disable), clobbers, \
940 PV_SAVE_REGS(clobbers | CLBR_CALLEE_SAVE); \
941 call PARA_INDIRECT(pv_irq_ops+PV_IRQ_irq_disable); \
942 PV_RESTORE_REGS(clobbers | CLBR_CALLEE_SAVE);)
944 #define ENABLE_INTERRUPTS(clobbers) \
945 PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_irq_enable), clobbers, \
946 PV_SAVE_REGS(clobbers | CLBR_CALLEE_SAVE); \
947 call PARA_INDIRECT(pv_irq_ops+PV_IRQ_irq_enable); \
948 PV_RESTORE_REGS(clobbers | CLBR_CALLEE_SAVE);)
950 #define USERGS_SYSRET32 \
951 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_usergs_sysret32), \
953 jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_usergs_sysret32))
956 #define GET_CR0_INTO_EAX \
957 push %ecx; push %edx; \
958 call PARA_INDIRECT(pv_cpu_ops+PV_CPU_read_cr0); \
961 #define ENABLE_INTERRUPTS_SYSEXIT \
962 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_irq_enable_sysexit), \
964 jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_irq_enable_sysexit))
967 #else /* !CONFIG_X86_32 */
970 * If swapgs is used while the userspace stack is still current,
971 * there's no way to call a pvop. The PV replacement *must* be
972 * inlined, or the swapgs instruction must be trapped and emulated.
974 #define SWAPGS_UNSAFE_STACK \
975 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_swapgs), CLBR_NONE, \
979 * Note: swapgs is very special, and in practise is either going to be
980 * implemented with a single "swapgs" instruction or something very
981 * special. Either way, we don't need to save any registers for
985 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_swapgs), CLBR_NONE, \
986 call PARA_INDIRECT(pv_cpu_ops+PV_CPU_swapgs) \
989 #define GET_CR2_INTO_RAX \
990 call PARA_INDIRECT(pv_mmu_ops+PV_MMU_read_cr2)
992 #define PARAVIRT_ADJUST_EXCEPTION_FRAME \
993 PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_adjust_exception_frame), \
995 call PARA_INDIRECT(pv_irq_ops+PV_IRQ_adjust_exception_frame))
997 #define USERGS_SYSRET64 \
998 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_usergs_sysret64), \
1000 jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_usergs_sysret64))
1002 #define ENABLE_INTERRUPTS_SYSEXIT32 \
1003 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_irq_enable_sysexit), \
1005 jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_irq_enable_sysexit))
1006 #endif /* CONFIG_X86_32 */
1008 #endif /* __ASSEMBLY__ */
1009 #else /* CONFIG_PARAVIRT */
1010 # define default_banner x86_init_noop
1011 #endif /* !CONFIG_PARAVIRT */
1012 #endif /* _ASM_X86_PARAVIRT_H */